There was a mix of UTF-8 and ISO-8859 files in the U-Boot source
tree, which could cause issues with the patchwork review system.
This commit converts all ISO-8859 files to UTF-8.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
This driver can be used for kirkwood SoCs by enabling CONFIG_RTC_MV. Tested on
Global Scale Technologies Dreamplug.
Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
Rework for AT91SAM9263 SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <uboot@emk-elektronik.de>
Rework for AT91SAM9RL SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
V4: US->USART, cosmetics
Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Bits 0..3 in cs_mask = CS0..CS3 in SPI mode require it to be peripheral
Bits 4..7 in cs_mask = CS0..CS3 in GPIO mode require it to be output
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
The CONFIG_AT91RM9200_USART is an remnant of
18ed5e9550 which deleted the
at91rm9200_usart driver.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The CONFIG_AT91_LEGACY warning became obsolete due to complete removal of
at91rm9200 arch code in arm920t.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The big "ARM: remove broken boards" series deletes all boards using
obsolete arm920t/at91rm9200 arch code. Therefore we can safely remove
this code now.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.
VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- Add mkimage support for OMAP boot image
- Add support for OMAP boot image(MLO) generation in the new
SPL framework
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- Add MMC raw and FAT mode boot support for OMAP
- Provide a means by which parameters passed by ROM-code
can be saved in u-boot.
- Save boot mode related information passed by OMAP4 ROM-code
and use it to determine where to load the u-boot from
- Assumes that the image has a mkimage header. Gets the
payload size and load address from this header. If the
header is not detected assume u-boot.bin as payload
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- Provide alternate implementations of board_init_f()
board_init_r() for OMAP spl.
- Provide linker script
- Initialize global data
- Add serial console support
- Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move
it to board config header from config.mk
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- Allow SPL to have .bss disjoint from rest of the image
- Allow for .bss setup in CONFIG_SPL_BUILD case too.
- Take care of the special case where relocation offset = 0.
- Compile out exception handling code and install a simpler
vector
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Identify SDRAM devices connected to EMIF automatically:
LPDDR2 devices have some Mode Registers that provide details
about the device such as the type, density, bus width
etc. EMIF has the capability to read these registers. If there
are no devices connected to a given chip-select reading mode
registers will return junk values. After reading as many such
registers as possible and matching with expected ranges of
values the driver can identify if there is a device connected
to the respective CS. If we identify that a device is connected
the values read give us complete details about the device.
This along with the base AC timings specified by JESD209-2
allows us to do a complete automatic initialization of
SDRAM that works on all boards.
Please note that the default AC timings specified by JESD209-2
will be safe for all devices but not necessarily optimal. However,
for the Elpida devices used on Panda and SDP the default timings
are both safe and optimal.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Calculate EMIF register values based on AC timing parameters
from the SDRAM datasheet and the DDR frequency rather than
using the hard-coded values.
For a new board the user doen't have to go through the tedious
process of calculating the register values. Instead, just
provide the AC timings from the device data sheet as input
and the driver will automatically calculate the register values.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Add support for:
1. DPLL locking
2. Initialization of clock domains and clock modules
3. Setting up the right voltage on voltage rails
This work draws upon previous work done for x-loader by:
Santosh Shilimkar <santosh.shilimkar@ti.com>
Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- separate mux settings into essential and non essential parts
- essential part is board independent as of now(so move it
to SoC directory). Will help in having single SPL for all
boards.
- Non-essential part(the pins not essential for u-boot to function)
need to be phased out eventually.
- Correct mux data by aligning to the latest settings in x-loader
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The basic hardware init of OMAP4(s_init()) can happen in 4
different contexts:
1. SPL running from SRAM
2. U-Boot running from FLASH
3. Non-XIP U-Boot loaded to SDRAM by SPL
4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
Configuration Header feature
What level of hw initialization gets done depends on this
context. Add a utility function to find this context.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Some of the LPSC constants were incorrect, and some were missing. This
commit fixes the incorrect constants (which were not used anywhere in
the tree) and adds all constants for both DA830 and DA850, as per the
TI datasheets.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
There are two main sets of LPSC constants, depending on the processor
family. The DA8xx constants were given in an enum whereas the non-DA8xx
constants were preprocessor defines. This commit switches the DA8xx
constants to defines for consistency.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The function davinci_emac_mii_mode_sel() is defined in
board/davinci/common/misc.c for any DA8xx CPU which has
CONFIG_DRIVER_TI_EMAC enabled. However, the prototype was only being
declared in <include/asm/arch/davinci_misc.h> for the DA850 EVM board.
This patch declares it for all DA8xx CPUs where CONFIG_DRIVER_TI_EMAC
is enabled.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Add a generic GPIO driver for the DaVinci DA8xx processors. It is turned
on by defining CONFIG_DA8XX_GPIO and fulfills the generic GPIO interface
specified in <asm/gpio.h> . The driver has support for both manipulating
GPIO pins as well as automatically configuring the pin multiplexor
registers to set the pin function to GPIO.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
In preparation for a generic GPIO driver for the DA8xx processors,
rename <asm/arch/gpio_defs.h> to <asm/arch/gpio.h> and fix up all files
which include it.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The array of strings corresponding to cpu revision is
used only when CONFIG_DISPLAY_CPUINFO is selected - in
the function print_cpuinfo().
Enclose definition of this array in #ifdef...#endif for
the same.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Clean up some duplicated prototype declarations.
Get rid of now useless AVR32 initcalls.h file.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Graeme Russ <graeme.russ@gmail.com>
Also remove bogus comment.
Signed-off-by: Zhong hongbo <bocui107@gmail.com>
Changed commit message
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Recieve/Receive
recieve/receive
Interupt/Interrupt
interupt/interrupt
Addres/Address
addres/address
Signed-off-by: Mike Williams <mike@mikebwilliams.com>
This patch removes the architecture specific implementation of
version_string where possible. Some architectures use a special place
and therefore we provide U_BOOT_VERSION_STRING definition and a common
weak symbol version_string.
Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Peter Pan <pppeterpppan@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
In some circumstances, reset_timer_masked() was called be timer_init() in
order to perform architecture specific timer initialisation. In such
cases, the required code in reset_timer_masked() has been moved into
timer_init()
* 'master' of git://git.denx.de/u-boot-mmc:
mmc: rescan fails on empty slot
AT91:mmc:fix multiple read/write error
mmc: Access mode validation for eMMC cards > 2 GiB
mmc: sh_mmcif: add support for Renesas MMCIF
mmc: fix the condition for MMC version 4
MMC: add marvell sdhci driver
MMC: add sdhci generic framework
MMC: add erase function to both mmc and sd
MMC: unify mmc read and write operation
mmc: Tegra2: Enable SD/MMC driver for Seaboard and Harmony
mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3
This check was broken. r3 does not contain the silicon revision anymore, so
we need to reload it. Also, this errata only applies to i.MX51.
Signed-off-by: David Jander <david@protonic.nl>
Acked-by: Stefano Babic <sbabic@denx.de>
Checkpatch.pl complains about the volatile qualifier in calls to
get_ram_size(). Remove this qualifier in the prototype and in the
calls where it is useless, and leave it only in the function body
where it is needed.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
cpu_init_crit can be skipped, but the code is still enabled requiring a
platform to supply lowlevel_init.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.aribaud@free.fr>
CONFIG_MACH_TYPE is used to set the machine type number in the
common arm code instead of setting it in the board code.
Boards with dynamically discoverable machine types can still set the
machine type number in the board code.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
On i.MX27, the asm-offsets.h file is not yet generated as it should be.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
On i.MX5, the asm-offsets.h file is not yet generated as it should be.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
zmx25 is a board based on imx25 SoC, 64 Megs of LPDDR, 32 Megs of NOR flash, an
optional NAND flash.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Offsets to registers may be needed in asm code. This patch adds automated
generation of these offsets form C structures.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Adding support for USB host on imx25 using the internal PHY. Changing the name
of base address define for imx31 to get some unification.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
mx27_uart_init_pins does the IOMUX setting for UART1 port.
Change the function name to make the UART port number explicit.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
asm-offsets.h should be auto generated. This patch adds two rules to rules.mk
which makes this possible and removes the rules on imx35.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Some boards e.g. keymile arm boards have CONFIG_CMD_I2C switched on
but they use soft i2c on kirkwood. So don't switch CONFIG_I2C_MVTWSI
on in this case.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
* Fix compiler error for cpu at91sam9, if lowlevel init is enabled
* use correct ATMEL_ name scheme to define ATMEL_BASE_SDRAMC
Signed-off-by: Jens Scharsig
This is a copy of arm926ejs/at91 api for perpherial initialisation.
At the moment we just need the usart part of the api.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch enables the new clock features from arm920t/at91/clock.c. This
is an required step to get at91rm9200_usart replaced by atmel_usart driver.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Jens Scharsig <js_at_ng@scharsoft.de>
Cc: Eric Bénard <eric@eukrea.com>
This patch adds an copy of arm926ejs/at91/clock.c to arm920t/at91. The
arm926ejs specialities are removed from arm920t version and vice versa.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch sets the ATMEL_PMX_AA_TXD2 to the correct value.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
CC: Jens Scharsig <js_at_ng@scharsoft.de>
CC: eric@eukrea.com
Acked-by: Eric Bénard <eric@eukrea.com>
As implemented now the timer used to implement __udelay counts
to 0xffffffff and then gets stuck there because the the programmed
reload value is 0xffffffff. This value is not only wrong but
illegal according to the reference manual.
One can reproduce the bug by leaving a board at the u-boot prompt
for sometime then issuing a sleep command. The sleep will hang
forever.
The timer is a count up timer that reloads as it rolls over
from 0xffffffff so the correct load value is 0.
Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce
a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff.
Signed-off-by: John Rigby <john.rigby@linaro.org>
Tested-by: Igor Grinberg <grinberg@compulab.co.il>
PL310 is the L2$ controller from ARM used in many SoCs
including the Cortex-A9 based OMAP4430
Add support for some of the key PL310 operations
- Invalidate all
- Invalidate range
- Flush(clean & invalidate) all
- Flush range
Signed-off-by: Aneesh V <aneesh@ti.com>
1. make sure that page table setup is not done multiple times
2. flush_dcache_all() is more appropriate while disabling cache
than a range flush on the entire memory(flush_cache())
Provide a default implementation for flush_dcache_all()
for backward compatibility and to avoid build issues.
Signed-off-by: Aneesh V <aneesh@ti.com>
- Enable I-cache on bootup
- Enable MMU and D-cache immediately after relocation
- Do necessary initialization before enabling d-cache and MMU
- Changes to cleanup_before_linux()
- Make changes according to the new framework
Signed-off-by: Aneesh V <aneesh@ti.com>
Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:
CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF
CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF
Signed-off-by: Aneesh V <aneesh@ti.com>
V2:
* Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE
V4:
* Changed all three flags to the final names suggested as above
and accordingly changed the commit message
- Add a framework for layered cache maintenance
- separate out SOC specific outer cache maintenance from
maintenance of caches known to CPU
- Add generic ARMv7 cache maintenance operations that affect all
caches known to ARMv7 CPUs. For instance in Cortex-A8 these
opertions will affect both L1 and L2 caches. In Cortex-A9
these will affect only L1 cache
- D-cache operations supported:
- Invalidate entire D-cache
- Invalidate D-cache range
- Flush(clean & invalidate) entire D-cache
- Flush D-cache range
- I-cache operations supported:
- Invalidate entire I-cache
- Add maintenance functions for TLB, branch predictor array etc.
- Enable -march=armv7-a so that armv7 assembly instructions can be
used
Signed-off-by: Aneesh V <aneesh@ti.com>
* 'master' of git://git.denx.de/u-boot-arm:
run arm_pci_init after relocation
IXP42x PCI rewrite
update/fix PDNB3 board
update/fix IXDP425 / IXDPG425 boards
add dvlhost (dLAN 200 AV Wireless G) board
IXP NPE: add support for fixed-speed MII ports
update/fix AcTux4 board
update/fix AcTux3 board
update/fix AcTux2 board
update/fix AcTux1 board
use -ffunction-sections / --gc-sections on IXP42x
support CONFIG_SYS_LDSCRIPT on ARM
fix "depend" target in npe directory
Fix IXP code to work after relocation was added
trigger hardware watchdog in IXP42x serial driver
add support for IXP42x Rev. B1 and newer
add XScale sub architecture (IXP/PXA) to maintainer list
Conflicts:
arch/arm/lib/board.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
clean up IXP PCI handling: get rid of IXP-private bus scan, BAR assign etc.
code and use u-boot's PCI infrastructure instead. Move board-specific PCI
setup code (clock/reset) to board directory.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
- jump to real flash location after reset before turning off flash mirror
- fix timer system to use HZ == 1000, remove broken interrupt-based code
Signed-off-by: Michael Schwingen <michael@schwingen.org>
The 'trab' board configuration is broken, and there is nobody who is
interested and willing to fix it. Drop it.
This includes support for VFD displays which have always been used by
this board only.
Signed-off-by: Wolfgang Denk <wd@denx.de>
* convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme
* Fix: timer.c compile error io.h not found with arm/at91rm9200
* update arm920t/at91 to ATMEL_xxx name scheme
* update arm920t/at91 soc lib
* update at91_emac driver
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Tested-by: Andreas Bießmann <andreas.devel@gmail.com>
Based on ST-Ericsson internal git repo.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
CC: Albert Aribaud <albert.aribaud@free.fr>
This patch added set_mmc_clk for external clock control.
c210 didn't support host clock control.
So We need external_clock_control function for c210.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
S5PC210 SoC have two cpu revisions, and have some difference.
So, support the cpu revision for each revision.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
SROM config code is made common for S5P series of boards.
smdkc100.c now refers to s5p-common/sromc.c for SROM related
subroutines.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
S5PC2XX: Macro values for Pull Up and Driver Strength were wrong.
S5PC1XX: Macro values for Driver Strength were wrong.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
get_reset_cause() should not be exported. Drop code in the function
after return statement that can generate warnings due to unreachable code.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* use start/end label for initialization tables instead of fix values
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch allow to override CONFIG_SYS_TCLK from board configuration
files. This is needed for the Network Space v2 which use a non standard
core clock frequency (166MHz instead of 200MHz for a 6281 SoC).
As a possible enhancement for 6281 and 6282 devices, TCLK could be
dynamically detected by checking the Sample at Reset register bit 21.
Additionally this patch fix a typo.
Signed-off-by: Simon Guinot <sguinot@lacie.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Drop warnings in get_cpu_rev and changes the return value
(a u32 instead of char * is returned) of the function
to be coherent with other processors.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Detlev Zundel <dzu@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Currently, some linker scripts are found by common code in config.mk.
Some are found using CONFIG_SYS_LDSCRIPT, but the code for that is
sometimes in arch config.mk and sometimes in board config.mk. Some
are found using an arch-specific rule for looking in CPUDIR, etc.
Further, the powerpc config.mk rule relied on CONFIG_NAND_SPL
when it really wanted CONFIG_NAND_U_BOOT -- which covered up the fact
that not all NAND_U_BOOT builds actually wanted CPUDIR/u-boot-nand.lds.
Replace all of this -- except for a handful of boards that are actually
selecting a linker script in a unique way -- with centralized ldscript
finding.
If board code specifies LDSCRIPT, that will be used.
Otherwise, if CONFIG_SYS_LDSCRIPT is specified, that will be used.
If neither of these are specified, then the central config.mk will
check for the existence of the following, in order:
$(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds (only if CONFIG_NAND_U_BOOT)
$(TOPDIR)/$(CPUDIR)/u-boot-nand.lds (only if CONFIG_NAND_U_BOOT)
$(TOPDIR)/board/$(BOARDDIR)/u-boot.lds
$(TOPDIR)/$(CPUDIR)/u-boot.lds
Some boards (sc3, cm5200, munices) provided their own u-boot.lds that
were dead code, because they were overridden by a CPUDIR u-boot.lds under
the old powerpc rules. These boards' own u-boot.lds have bitrotted and
no longer work -- these lds files have been removed.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Graeme Russ <graeme.russ@gmail.com>
If FB address is defined specific address then don't grab memory for LCD
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Kumar Gala <kumar.gala@freescale.com>
Move the header file and definitions of ftsmc020
static memory control unit from a320 SoC folder to
"drivers/mtd" folder.
This change will let other SoC which also use ftsmc020
could share the same header file.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Move the header file "ftsdmc020.h" (SDRAM Controller)
to "include/faraday" folder.
This change will let other SoC which also use ftsdmc020
could share the same header file.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Removed boot_flash_* extern variables.
boot_flash_type was totally unused. The other ones were actually constants, so
they have been replaced with #defines in the board config files.
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Since addr_sp is a byte address, it should be adjusted by 12 here.
Signed-off-by: Eric Cooper <ecc@cmu.edu>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Wolfgang Denk <wd@denx.de>
CONFIG_OMAP34XX must be checked for existence, not value.
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The reset sequence/configuration for ehci is highly board specific,
so this will be done in the source for the board, instead of
introducing several CONFIG_* which would be needed to make those
few lines in beagle.c usable across different OMAP boards.
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Move the header file and definitions of fttmr010
power control unit from a320 SoC folder to
"include/faraday" folder.
This change will let other SoC which also use fttmr010
could share the same header file.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Add i2c_clk_enable in the cpu specific code, since previous platform it,
while new platform don't need. In the pantheon and armada100 platform,
this function is defined as NULL one.
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
For better sharing with other platform other than pxa's,
it is more convenient to put the driver to the common place.
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
ftpmu010 related code has been moved to drivers/power/.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
This allows the reading of EEPROMS on the expansion bus without adding
external pull-ups.
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Drop warnings due to recent commit
ARM: mx31: Print the silicon version
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
factor out boot cause function to common code to avoid
the duplicate code in each board support package
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Commit 5d2c154 (IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers)
renamed mx31-imx-regs.h to imx-regs.h.
Change the file label accordingly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Use the same method of the Linux kernel to print the MX31 silicon version on
boot.
Tested on a MX31PDK with a 2.0 silicon, where it shows:
CPU: Freescale i.MX31 rev 2.0 at 531 MHz
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
As exception among the i.MX processors, the i.MX31 has headers
without general names (mx31-regs.h, mx31.h instead of imx-regs.h and
clock.h). This requires several nasty #ifdef in the drivers to
include the correct header. The patch cleans up the driver and
renames the header files as for the other i.MX processors.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The patch add CONFIG_HW_WATCHDOG to be used
with the internal watchdog timer of the MX31
processor. Two function are exported for the
board maintainers:
mxc_hw_watchdog_enable
mxc_hw_watchdog_reset
The board maintainer can decide to use mxc_hw_watchdog_reset as
hw_watchdog_reset, or to implement his own function to reset
the watchdog.
The watchdog timer can be configured with CONFIG_SYS_WD_TIMER_SECS
(value in seconds). The MX31 allows values between 0.5
(CONFIG_SYS_WD_TIMER_SECS = 0) and 128 seconds.
Signed-off-by: Stefano Babic <sbabic@denx.de>
If a regions is reserved in the fdt, then it should not be used. Add
the memreserve regions to the lmb so that u-boot doesn't use them to
store the initrd.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
For the calls to boot_relocate_fdt(), boot_get_cmdline(), and
boot_get_kbd(), the value of bootmem_base is always obtained by
calling getenv_bootm_low(). Since the value always comes from the
same source, the calling signature for those functions can be
simplified by making them call getenv_bootm_low() directly.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Rename STANDALONE_LOAD_ADDR into CONFIG_STANDALONE_LOAD_ADDR
and allow that the architecture-specific default value gets
overwritten by defining the value in the board header file.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Cc: Tsi Chung Liew <tsi-chung.liew@freescale.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The MMC registers are accessed through struct s5p_mmc member
variables. MMC controller "control4" register offset is set
to 0x8C as per data sheet. The size of struct s5p_mmc is also
corrected.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Use the global data instead of bss variable, replace as follow.
count_value -> removed
timestamp -> tbl
lastdec -> lastinc
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Albert ARIBAUD <albert.aribaud@free.fr>
This is common pwm driver of S5P.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Since nand boot have some limit for the first 4KB, We only
disable the LED function to reduce the code space. At the
same time, Fix the compile error for LED function undefined
in the compile time of nand_spl.
Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Monitor protection region in FLASH did not cover .rel.dyn
and .dynsym sections, because it uses __bss_start to compute
monitor_flash_len. Use _end instead.
Add _end to linker scripts for end of u-boot image
Add _end_ofs to all the start.S.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Currently, _end is used for end of BSS section. We want _end to mean
end of u-boot image, so we rename _end to __bss_end__ first.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
get_sp() was incorrectly excluded if none of
CONFIG_SETUP_MEMORY_TAGS
CONFIG_CMDLINE_TAG
CONFIG_INITRD_TAG
CONFIG_SERIAL_TAG
CONFIG_REVISION_TAG
were defined.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Since there are lots of difference between kirkwood and armada series,
it is better to seperate them but still keep the most common file
shared by all marvell platform in the mv-common configure file.
This patch move the kirkwood only driver definitoin in mv-common to
the <soc_name>/config.h.
This patch is tested with compilation for armada100 and guruplug.
Signed-off-by: Lei Wen <leiwen@marvell.com>
Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:
The problem is that the argument "v" gets evaluated twice. This
breaks code like used here (from "drivers/net/dnet.c"):
for (i = 0; i < wrsz; i++)
writel(*bufp++, &dnet->regs->TX_DATA_FIFO);
Use auxiliary variables to avoid such problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>
S5PC210 is a 32-bit RISC and Cortex-A9 Dual Core based micro-processor.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss
values in the arm926ejs timers implementation.
The usage of bss values in drivers before initialisation of bss is forbidden.
In that special case some data in .rel.dyn gets corrupted.
This patch is similiar to the patch Dirk Behme posted
for the armv7/omap-common/timer.c and added suggestions
from Reinhard Meyer.
Tested on the arm926ejs mx27 based magnesium board
Tested on the arm926ejs kirkwood based suen3 board
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Albert ARIBAUD <albert.aribaud@free.fr>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Stefano Babic <sbabic@denx.de>
cc: Reinhard Meyer <u-boot@emk-elektronik.de>
Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss
values in the arm1136 timer driver for mx31 and omap24xx
The usage of bss values in drivers before initialisation of bss is forbidden.
In that special case some data in .rel.dyn gets corrupted.
This patch is similiar to the patch Dirk Behme posted
for the armv7/omap-common/timer.c
Tested on the mx31 based qong board
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Albert ARIBAUD <albert.aribaud@free.fr>
Acked-by: Albert ARIBAUD <albert.aribaud@free.fr>
gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.
Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations when
gcc 4.5.1 is used.
Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current headers.
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Alessandro Rubini <rubini-list@gnudd.com>
Tested-by: Thomas Weber <weber@corscience.de>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Alexander Holler <holler@ahsoftware.de>
Because of the bss area is cleared after relocation, we've lost pointers.
This patch fixed it.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
The option CONFIG_SOC_DM6447 seems to have ended up
in the code by mistake. It is not used anywhere and
there is no chip called DM6447.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Support for DM6467 was incomplete and the build failed
as well. Patches were sent to the list but have not been
added. This enhances the DM6467 support.
Some more patches will need to be sent to bring
it in line with what is available in internal TI
trees
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Added arch/arm/cpu/arm926ejs/davinci/et1011c.c for handling
ET1011C gigabit phy. which overrides get_link_speed function
from default implementation. This enables output of 125 MHz
reference clock on SYS_CLK pin.
Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Added support for MMC/SD cards for Davinci. This feature is enabled by
CONFIG_DAVINCI_MMC and is dependant on CONFIG_MMC and CONFIG_GENERIC_MMC
options. This is tested on DM355 and DM365 EVMs with both the available mmc
controllers.
Signed-off-by: Alagu Sankar <alagusankar@embwise.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Commit 8aba9dceeb breaks
ARM boards because for ARM the -pie option is used
for partial linking together with -r option.
The patch adds the -pie option to link u-boot.bin only.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <liu.h.jason@gmail.com>
CC: lool@dooz.org
CC: Wolfgang Denk <wd@denx.de>
CC: Albert Aribaud <albert.aribaud@free.fr>
Tested-by: Alexander Holler <holler@ahsoftware.de>
The usage of bss values in drivers before initialisation of bss is forbidden.
In that special case some data in .rel.dyn gets corrupted.
This patch is the same as recently applied for arm926js architecture.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Heiko Schocher <hs@denx.de>
This patch cleans driver code replacing all accesses
to registers with fixed offsets with a corresponding
structure.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The patch adds basic support for the Freescale's i.MX35
(arm1136 based) processor.
The patch adds also a prototype for the initialization
of the FEC(ethernet controller) to netdev.h to avoid
warnings.
Signed-off-by: Stefano Babic <sbabic@denx.de>
