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ARMV7: OMAP3: Add GPMC_CONFIGx register value definitions

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Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This commit is contained in:
Luca Ceresoli 2011-04-19 09:48:51 -04:00 • committed by Albert ARIBAUD
parent b32e8126a3
commit c2b626c199
1 changed files with 95 additions and 0 deletions
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arch/arm/include/asm/arch-omap3/omap3-regs.h Normal file
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/*
* (c) 2011 Comelit Group SpA, Luca Ceresoli <luca.ceresoli@comelit.it>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef _OMAP3_REGS_H
#define _OMAP3_REGS_H
/*
* Register definitions for OMAP3 processors.
*/
/*
* GPMC_CONFIG1 - GPMC_CONFIG7
*/
/* Values for GPMC_CONFIG1 - signal control parameters */
#define WRAPBURST (1 << 31)
#define READMULTIPLE (1 << 30)
#define READTYPE (1 << 29)
#define WRITEMULTIPLE (1 << 28)
#define WRITETYPE (1 << 27)
#define CLKACTIVATIONTIME(x) (((x) & 3) << 25)
#define ATTACHEDDEVICEPAGELENGTH(x) (((x) & 3) << 23)
#define WAITREADMONITORING (1 << 22)
#define WAITWRITEMONITORING (1 << 21)
#define WAITMONITORINGTIME(x) (((x) & 3) << 18)
#define WAITPINSELECT(x) (((x) & 3) << 16)
#define DEVICESIZE(x) (((x) & 3) << 12)
#define DEVICESIZE_8BIT DEVICESIZE(0)
#define DEVICESIZE_16BIT DEVICESIZE(1)
#define DEVICETYPE(x) (((x) & 3) << 10)
#define DEVICETYPE_NOR DEVICETYPE(0)
#define DEVICETYPE_NAND DEVICETYPE(2)
#define MUXADDDATA (1 << 9)
#define TIMEPARAGRANULARITY (1 << 4)
#define GPMCFCLKDIVIDER(x) (((x) & 3) << 0)
/* Values for GPMC_CONFIG2 - CS timing */
#define CSWROFFTIME(x) (((x) & 0x1f) << 16)
#define CSRDOFFTIME(x) (((x) & 0x1f) << 8)
#define CSEXTRADELAY (1 << 7)
#define CSONTIME(x) (((x) & 0xf) << 0)
/* Values for GPMC_CONFIG3 - nADV timing */
#define ADVWROFFTIME(x) (((x) & 0x1f) << 16)
#define ADVRDOFFTIME(x) (((x) & 0x1f) << 8)
#define ADVEXTRADELAY (1 << 7)
#define ADVONTIME(x) (((x) & 0xf) << 0)
/* Values for GPMC_CONFIG4 - nWE and nOE timing */
#define WEOFFTIME(x) (((x) & 0x1f) << 24)
#define WEEXTRADELAY (1 << 23)
#define WEONTIME(x) (((x) & 0xf) << 16)
#define OEOFFTIME(x) (((x) & 0x1f) << 8)
#define OEEXTRADELAY (1 << 7)
#define OEONTIME(x) (((x) & 0xf) << 0)
/* Values for GPMC_CONFIG5 - RdAccessTime and CycleTime timing */
#define PAGEBURSTACCESSTIME(x) (((x) & 0xf) << 24)
#define RDACCESSTIME(x) (((x) & 0x1f) << 16)
#define WRCYCLETIME(x) (((x) & 0x1f) << 8)
#define RDCYCLETIME(x) (((x) & 0x1f) << 0)
/* Values for GPMC_CONFIG6 - misc timings */
#define WRACCESSTIME(x) (((x) & 0x1f) << 24)
#define WRDATAONADMUXBUS(x) (((x) & 0xf) << 16)
#define CYCLE2CYCLEDELAY(x) (((x) & 0xf) << 8)
#define CYCLE2CYCLESAMECSEN (1 << 7)
#define CYCLE2CYCLEDIFFCSEN (1 << 6)
#define BUSTURNAROUND(x) (((x) & 0xf) << 0)
/* Values for GPMC_CONFIG7 - CS address mapping configuration */
#define MASKADDRESS(x) (((x) & 0xf) << 8)
#define CSVALID (1 << 6)
#define BASEADDRESS(x) (((x) & 0x3f) << 0)
#endif /* _OMAP3_REGS_H */