The RESET2 hook is a PSCI v1.1 functionality, rename the macro accordinly.
Add missing handler for the RESET2 hook, so it can be implemented by U-Boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Commit 56c2dbdaba ("imx: bootaux: cleanup code") introduces the
following LTO related warning:
"
arch/arm/mach-imx/imx_bootaux.c:24:31: warning: type of ‘hostmap’ does not match original declaration [-Wlto-type-mismatch]
24 | const __weak struct rproc_att hostmap[] = { };
| ^
arch/arm/mach-imx/imx8m/soc.c:1590:24: note: array types have different bounds
1590 | const struct rproc_att hostmap[] = {
| ^
arch/arm/mach-imx/imx8m/soc.c:1590:24: note: ‘hostmap’ was previously declared here
../aarch64-linux-gnu/bin/ld: warning: u-boot has a LOAD segment with RWX permissions
"
This is because the weak empty array of structures "hostmap" is eventually
replaced by non-empty array of structures with different number of elements.
Fix this by avoiding weak variable size array, instead use a weak function
which returns single pointer to the array.
Fixes: 56c2dbdaba ("imx: bootaux: cleanup code")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks. Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rockchip RV1126 is a high-performance vision processor SoC
for IPC/CVR, especially for AI related application.
Add arch core support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I22fde40ec375e3c6aba39808abf252edc45d4b04
Add full ddr pctl registers and bit masks for px30.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
DDR chip capacity is computed based on GRF split in some
Rockchip SoC's like PX30 and RV1126.
Add split argument in ddr print info so-that the respective
ddr driver will pass the grf split.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This function can be used by other modules. Also add comments.
Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20230110105650.54580-2-avromanov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
A number of CONFIG symbols have crept in that are never referenced in
code, so drop them here. Further, we have two symbols being enabled
in headers while already enabled correctly in Kconfig, so these lines
can also be removed.
Signed-off-by: Tom Rini <trini@konsulko.com>
When the ti814x_evm config was removed most, but not all, of the
relevant support code was remove. Get rid of what was missed.
Fixes: 50b5326868 ("ti814x: Remove platform")
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_FLASH_SPANSION_S29WS_N
CONFIG_FLASH_VERIFY
CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
CONFIG_FSL_ISBC_KEY_EXT
CONFIG_FSL_TRUST_ARCH_v1
CONFIG_FSL_SDHC_V2_3
CONFIG_MAX_DSP_CPUS
CONFIG_MIU_2BIT_INTERLEAVED
CONFIG_SERIAL_BOOT
CONFIG_SPI_BOOTING
CONFIG_X86EMU_RAW_IO
Signed-off-by: Tom Rini <trini@konsulko.com>
Add information that will be needed for enabling the UEFI capsule
update feature on the RockPi4 boards. With the feature enabled, it
would be possible to update the idbloader and u-boot.itb images on the
RockPi4B and RockPi4C variants.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code. Doing this removes some board support code
which was also unused. Finally, this removes some CONFIG symbols that
otherwise needed to be migrated to Kconfig, but were unused in code now.
Signed-off-by: Tom Rini <trini@konsulko.com>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_PCI and
CONFIG_SYS_PCIE namespace do not easily transition to Kconfig. In many
cases they likely should come from the device tree instead. Move these
out of CONFIG namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NUM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NS16550
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_SPL_NS16550_MIN_FUNCTIONS
CONFIG_SYS_NS16550_MEM32
CONFIG_SYS_NS16550_PORT_MAPPED
CONFIG_SYS_NS16550_REG_SIZE
CONFIG_SYS_NS16550_SERIAL
To do this we also introduce CONFIG_SPL_SYS_NS16550_SERIAL so that
platforms can enable the legacy driver here for SPL.
Signed-off-by: Tom Rini <trini@konsulko.com>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use macro to represent the RL and WL setting to ensure the PHY and
controller setting are aligned.
Review-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().
Rename it to resolve this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Layerscape update
- support sysreset,
- de-select FSL_IFC when booting from SD
- disable unused parts of ICID tables
- reduce ns_dev size for csu
- enable dma snooping for ls104x
- nand driver fixups for ls1043ardb rev 7.0 boards.
UART0 can obviously also be used for debug uart in U-Boot, so let's add
its support.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Several parts of the ICID table are only necessary for U-Boot proper.
Disable them in SPL. This saves around 500 bytes.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This enables eDMA snooping on the LS1043A and LS1046A. This will allow
marking the I2C, LPUART, and SPI devices on these SoCs as DMA coherent.
Oddly, this bit is only documented for the LS1043A, and is marked as
"reserved" in the LS1046ARM. I have tested this patch on the LS1046A
and found that marking i2c0 as dma-coherent works without issue.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
It is used as delay for gpmi write strobe.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
- SPL fixes for STM32F7 MCUs
- Device tree alignement with kernelv6.0-rc4 for MCU's board
- Device tree alignement with kernelv6.0-rc3 for MPU's board
- Update DDR node for STM32MP15
- Cleanup config file for STM32MP1
- Update for cmd_stm32key command
- Fix compatible string to add partitions for STM32MP1
- Update for stm32programmer tool
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Merge tag 'u-boot-stm32-20220927' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
- Increase SYS_MALLOC_F_LEN for STM32 MCU's board
- SPL fixes for STM32F7 MCUs
- Device tree alignement with kernelv6.0-rc4 for MCU's board
- Device tree alignement with kernelv6.0-rc3 for MPU's board
- Update DDR node for STM32MP15
- Cleanup config file for STM32MP1
- Update for cmd_stm32key command
- Fix compatible string to add partitions for STM32MP1
- Update for stm32programmer tool
This commit adds board support for i.MXRT1170-EVK from NXP. This board
is an evaluation kit provided by NXP for i.MXRT117x processor family.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Commit 5bb2c550b1 ("arm: mvebu: Move internal registers in
arch_very_early_init() function") moved code from file cpu.c to lowlevel.c,
which moves Marvell internal registers from address INTREG_BASE_ADDR_REG to
SOC_REGS_PHY_BASE.
But the steps describing how to do it correctly were documented only in
older U-Boot versions and commit cefd764222 ("arm: mvebu: Fix internal
register config on A38x") probably unintentionally removed important
details about MMU from code comments around.
Commit 5bb2c550b1 ("arm: mvebu: Move internal registers in
arch_very_early_init() function") implemented code movement according to
(now incomplete) comments which resulted in semi-broken code.
The result is that I-cache is currently disabled for all Armada 38x boards
and maybe there are some other (unreported / undetected) issues.
Reimplement it correctly. First flush all caches, then disable MMU and L2
cache and then move Marvell internal registers. There is no need to
explicitly disable I-cache.
After this change lzmadec command with lzma image of 0x7000000 bytes is
doing decompression just 5 seconds. Before this change it was 30 seconds.
To make lowlevel.S code more readable, extend asm/pl310.h header file to be
compatible with assembler and use macros from this file.
Fixes: 5bb2c550b1 ("arm: mvebu: Move internal registers in arch_very_early_init() function")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
LTO (Link-Time Optimisation) is an very useful feature which can
significantly reduce the size of U-Boot binaries. So far it has been
made available for selected ARM boards and sandbox.
However, incremental builds are much slower when LTO is used. For example,
an incremental build of sandbox takes 2.1 seconds on my machine, but 6.7
seconds with LTO enabled.
Add a NO_LTO parameter to the build, similar to NO_SDL, so it can be
disabled during development if needed, for faster builds.
Add some documentation about LTO while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
There is currently a problem that U-Boot can not work on ARMv4
because assembly imlementations of memcpy() and some other functions
use "bx lr" instruction that is not available on ARMv4 ("mov pc, lr"
should be used instead).
A working preprocessor-based solution to this problem is found in
arch/arm/lib/relocate.S. Move it to the "ret" macro in
arch/arm/include/asm/assembler.h and change all "bx lr" code
to "ret lr" in functions that may run on ARMv4. Linux source code
deals with this problem in the same manner.
v1 -> v2:
Comment update. Pointed out by Andre Przywara.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
CC: Samuel Holland <samuel@sholland.org>
CC: Ye Li <ye.li@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Andre Przywara <andre.przywara@arm.com>
CC: Marek Vasut <marex@denx.de>
CC: Sean Anderson <sean.anderson@seco.com>
CC: Tom Rini <trini@konsulko.com>
This driver has not been converted to DM_ETH. The migration
deadline passed 2 years ago.
Cc: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
This converts the following to Kconfig:
CONFIG_FSL_NGPIXIS
CONFIG_SYS_FSL_QMAN_V3
CONFIG_SYS_FSL_RAID_ENGINE
CONFIG_SYS_FSL_RMU
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
CONFIG_SYS_FSL_SRIO_LIODN
CONFIG_SYS_FSL_TBCLK_DIV
CONFIG_SYS_FSL_USB1_PHY_ENABLE
CONFIG_SYS_FSL_USB2_PHY_ENABLE
CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FSL_CORES_PER_CLUSTER
As part of this, correct the dependencies on SYS_FSL_THREADS_PER_CORE.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FSL_CCSR_GUR_BE
CONFIG_SYS_FSL_CCSR_SCFG_BE
CONFIG_SYS_FSL_ESDHC_BE
CONFIG_SYS_FSL_IFC_BE
CONFIG_SYS_FSL_PEX_LUT_BE
CONFIG_SYS_FSL_CCSR_GUR_LE
CONFIG_SYS_FSL_CCSR_SCFG_LE
CONFIG_SYS_FSL_ESDHC_LE
CONFIG_SYS_FSL_IFC_LE
CONFIG_SYS_FSL_PEX_LUT_LE
Signed-off-by: Tom Rini <trini@konsulko.com>
Set ARM clock to OD frequency 1.7Ghz, since we have set PMIC VDD_SOC
to Overdrive voltage 0.9V
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since i.MX9 uses same DDR PHY with i.MX8M, split the DDRPHY to a common
directory under imx, then use dedicated ddr controller driver for each
iMX9 and iMX8M.
The DDRPHY registers are space compressed, so it needs conversion to
access the DDRPHY address. Introduce a common PHY address remap function
for both iMX8M and iMX9 for all PHY registers accessing.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Implement the DDR driver clock interfaces for set DDR rate and
bypass DDR PLL
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To support on-demand booting M33 image from A core. SPL needs
to follow M33 kick up sequence to release M33 firstly,
then set M33 CPUWAIT signal. ATF will clear CPUWAIT to kick
M33 to run.
The prepare function also works around the M33 TCM ECC issue by
clean the TCM. Also enable sentinel handshake and WDOG1 clock
for M33 stop and reset.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add power init of MEDIAMIX, MLMIX and DDRMIX. And clear isolation
of MIPI DSI/CSI, USBPHY after the power up.
SPL should call the power init in its boot sequence before accessing
above three MIX and USB.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add GPIO registers structure for iMX93, so that we can enable lpgpio
driver
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX93 fuse can be accessed through FSB and s400-api. Add mapping tables
for i.MX93. The offset address of FSB accessing OTP shadow registers is
different between i.MX8ULP and i.MX93, so use macro to define the offset
address instead of hardcode.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Update the get chip revision methond to use S400 API, also record
other information like lifecycle and UID to global data.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add TRDC driver to iMX9. The TRDC init splits to two phases:
1. Early init phase will release TRDC from Sentinel and open write
permission to the memory where SPL image runs. Sentinel will set
the memory to RX only after ROM authentication for the OEM
closed part.
2. Init phase will configure TRDC to allow non-secure master to
access DDR. So the peripherals can work in u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Introduce Sentinel API ahab_release_m33_trout to make sure sentinel
release M33 trout and make sure M33 could boot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To support more RDC instances on i.MX93, update API to latest
definition.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since iMX9 uses S401 which shares the API with iMX8ULP. So move S400
MU driver and API to a common place and selected by CONFIG_IMX_SENTINEL
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX9 shares same ROM API with i.MX8ULP, so make the i.MX8ULP the function
prototype common and usable by i.MX9.
Also include mmc env functions that use ROM API.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add timer_init to update ARM arch timer with correct frequency
from system counter and enable system counter.
Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add clock API to support CCM root clock and LPCG setting
Set the CCM AUTHEN register to allow non-secure world to set
root clock and lpcg.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MN/P/ULP supports ROM API, they have almost same get_boot_device
implementation, so move to a common file. And when support i.MX9,
no need to include the other function copy.
Since sys_proto.h is included in imx_romapi.c, there will be build
warning for i.MX8M because wdog_regs not defined, so include imx-regs.h
in i.MX8M sys_proro.h
Signed-off-by: Peng Fan <peng.fan@nxp.com>
For SoCs support ROM API, CONFIG_SPL_BOOTROM_SUPPORT is needed,
so use this macro to guard the code to avoid extend the list.
And drop the guard with structure definition, there is no need.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The macro `CONFIG_SYS_UBOOT_BASE` is used by SPL loaders `"NOR"` and
`"XIP"` to determine the base address of u-boot.
For `"NOR"` on i.MX8MM it is the base address of QSPI0 plus the offset
of the flattened image tree blob.
Although `QSPI0_AMBA_BASE` is used to define CONFIG_SYS_UBOOT_BASE in
multiple board header files for i.MX8MM, it is not specified.
Specify offset of flattened image tree blob (needs to be set to same
value as specified in 'binman' node), base address of QSPI0 and size of
FlexSPI configuration block.
Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
The ROM API is thoroughly undocumented, but apparently passing the xor
of the real arguments as an extra argument is required [1]. Also, we
need to do the "save gd/restore gd" dance. These are both error-prone,
and lead to a lot of code duplication.
Since both imx8m[np] and imx8ulp SOCs have this, add a separate
translation unit which is included precisely when the new
CONFIG_IMX8_ROMAPI symbol is set, which provide convenience wrappers
that take care of computing the xor value as well as doing the gd
dance, and that thus have a more intuitive API. Subsequent patches
will make use of these to reduce boilerplate.
[1] One wonders, for example, if the check is only applied to the
lower 32 bits, or if we're implicitly relying on all 64-bit pointer
values we're passing effectively have 0 in the upper 32 bits.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
This exposes the struct rom_api, the g_rom_api variable declaration
and the associated #defines to slightly fewer boards: namely, those
IMX8M which are not IMX8MN or IMX8MP. But the latter two are the only
IMX8M* ones where the g_rom_api variable is defined (in imx8m/soc.c),
so that should be fine.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
