Add support for PCIe on MX6 SabreSDP board and enable the support
in the config file.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Liu Ying <Ying.Liu@freescale.com>
If we build this function in cases where we would be discarding it
anyhow we still end up with maybe unused warnings. Rather than litter
the function with __maybe_unused, just spell out when to build it.
Signed-off-by: Tom Rini <trini@ti.com>
CPU sets DMA buffer descriptors with data required for inetrnal DMA such as:
* Ownership of BD
* Buffer size
* Pointer to data buffer in memory
Then we need to make sure DMA engine of NAND controller gets proper data.
For this we flush buffer rescriptor.
Then we're ready for DMA transaction.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Tom Rini <trini@ti.com>
U-Boot uses the 'mkimage' tool to produce various image types,
not only uImage image type. Rename the invocation name from
UIMAGE to MKIMAGE.
The following command was used to do the replacement:
git grep 'quiet_cmd_mkimage.* = UIMAGE' | cut -d : -f 1 | \
xargs -i sed -i "s@\(quiet_cmd_mkimage\)\(.*\) = UIMAGE @\1\2 = MKIMAGE@" {}
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
I2C protocol requires open-drain IOs. Fix the Dalmore and Venice2 pinmux
tables to configure the IOs correctly. Without this, Tegra may actively
drive the lines high while an external device is actively driving the
lines low, which can only lead to bad things.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add a simple LCD driver which uses SDL to display the image. We update the
image regularly, while still providing for reasonable performance.
Adjust the common lcd code to support sandbox.
For command-line runs we do not want the LCD to be displayed, so add a
--show_lcd option to enable it.
Tested-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a common library for obtaining access to the Chrome OS EC. This is
used by boards which need to talk to the EC.
Reviewed-by: Vadim Bendebury <vbendeb@google.com>
Tested-by: Vadim Bendebury <vbendeb@google.com>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
romImage is set by CONFIG_ECOVEC_ROMIMAGE_ADDR to 0xA0040000.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Prior to Kbuild, $(TOPDIR) or $(SRCTREE) was used for
pointing to the top of source directory.
(No difference between the two.)
In Kbuild style, $(srctree) is used for instead.
This commit renames SRCTREE to srctree and deletes the
defition of SRCTREE.
Note that SRCTREE in scripts/kernel-doc, scripts/docproc.c,
doc/DocBook/Makefile should be keep.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Prior to Kbuild, $(TOPDIR) or $(SRCTREE) was used for
pointing to the top of source directory.
(No difference between the two.)
In Kbuild style, $(srctree) is used instead.
This commit renames TOPDIR to srctree and delete the
defition of TOPDIR.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The switch HW reset results in a disconnection of the switch port daisy-
chain for a few seconds. This is not desired in the normal field use
case. So lets remove this switch reset from the normal bootup sequence
and move it into a board specific command. This way it can be executed
in the development environment when really needed.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Lukas Stockmann <lukas.stockmann@siemens.com>
Cc: Tom Rini <trini@ti.com>
This patch enables to run Trats2 board on device tree.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch enables to run Trats board on device tree.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch enables to run Universal board on device tree.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch enables to run Origen board on device tree.
Uart, DRAM and MMC init functions are removed as their
generic replacements form the common board file are used.
The config file is modified to contain only board specific options.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch enables sdhci initialisation and misc_init_r in common board
file for all exynos 4 based boards.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch moves board specific max77686 init function from
common board to smdk5250 board file.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Cc: Rajeshwari Birje <rajeshwari.birje@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds common dtsi file and config header for all
Exynos 4 based boards.
Patch additionaly adds board specific (weak) functions for
board_early_init_f and board_power_init functions.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The checkboard function's implementation is common for all
DT supporting boards and should be placed in the board common file.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Cc: Amar <amarendra.xt@samsung.com>
Acked-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Gateworks Ventana is a product family based on the i.MX6. This
patch adds support for all boards in the Ventana family. Where
possible, data from the boards EEPROM is used to determine various
details about the board at runtime.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Many USB host controller drivers contain almost identical copies of the
same virtual root hub descriptors. Put these into a common file to avoid
duplication.
Note that there were some very minor differences between the descriptors
in the various files, such as:
- USB 1.0 vs. USB 1.1
- Manufacturer/Device ID
- Max packet size
- String content
I assume these aren't relevant.
Cc: Thomas Lange <thomas@corelatus.se>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Eric Millbrandt <emillbrandt@coldhaus.com>
Cc: Pierre Aubert <p.aubert@staubli.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Rodolfo Giometti <giometti@linux.it>
Cc: Zhang Wei <wei.zhang@freescale.com>
Cc: Mateusz Zalega <m.zalega@samsung.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Markus Klotzbuecher <mk@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: C Nauman <cnauman@diagraph.com>
Cc: David Müller <d.mueller@elsoft.ch>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Thomas Abraham <t-abraham@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Andrew Murray <amurray@embedded-bits.co.uk>
Cc: Matej Frančeškin <matej.franceskin@comtrade.com>
Cc: Cliff Cai <cliff.cai@analog.com>
Cc: Bryan Wu <cooloney@gmail.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it
as 1000000 and idmr.h defines it as (50000000 / 64).
When compiling these two boards, a warning message is displayed:
time.c:14:2: warning: #warning "CONFIG_SYS_HZ must be 1000
and should not be defined by platforms" [-Wcpp]
There are no board maintainers for them so this commit just
deletes them.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Jason Jin <Jason.jin@freescale.com>
Add NAND SPL boot support with hardware PMECC.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Add SPI SPL boot support for sama5d3xek board.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC.
Now it supports boot from NAND flash and SD/MMC card.
Features support:
- NAND flash
- SD/MMC card
- Two USB hosts
- Ethernet (one GMAC, one EMAC)
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[reorder boards.cfg]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Add support for using the Atmel MCI driver on at91sam9263ek.
This change is modeled after the existing at91sam9260ek support.
Please note that this hooks up slot1 (MCI1) for SD. Not both.
Tested with at91bootstrap and u-boot on dataflash in slot 0
and fat-formatted 8GB SDHC in slot 1 on first revision
at91sam9263ek (which must use dataflash in slot0 to boot).
CONFIG_ATMEL_MCI_PORTB not tested.
Signed-off-by: Andreas Henriksson <andreas.henriksson@endian.se>
[remove empty line]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Update following DDR related settings for T1040RDB, T1042RDB_PI
-Correct number of chip selects to two as t1040 supports
two Chip selects.
-Update board_specific_parameters udimm structure with settings
derived via calibration.
-Update ddr_raw_timing sructure corresponding to DIMM.
-Set ODT to off. Typically on FSL board, ODT is set to 75 ohm,
but on T104xRDB, on setting this , DDR instability is observed.
Board-level debugging is in progress.
Verified the updated settings to be working fine with dual-ranked
Micron, MT18KSF51272AZ-1G6 DIMM at data rate 1600MT/s.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
T1040 has internal display interface unit (DIU) for driving video.
T1040QDS supports video mode via
-LCD using TI enconder
-HDMI type interface via HDMI encoder
Chrontel, CH7301C encoder which is I2C programmable is used as
HDMI connector on T1040QDS.
This patch add support to
-enable Video interface for T1040QDS
-route qixis multiplexing to enable DIU-HDMI interface on board
-program DIU pixel clock gerenartor for T1040
-program HDMI encoder via I2C on board
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC.
It works in two mode: standalone mode and PCIe endpoint mode.
T2080PCIe-RDB Feature Overview
------------------------------
Processor:
- T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
DDR Memory:
- Single memory controller capable of supporting DDR3 and DDR3-LP devices
- 72bit 4GB DDR3-LP SODIMM in slot
Ethernet interfaces:
- Two 10M/100M/1G RGMII ports on-board
- Two 10Gbps SFP+ ports on-board
- Two 10Gbps Base-T ports on-board
Accelerator:
- DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
SerDes 16 lanes configuration:
- SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10)
- SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2)
- SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3)
- SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2)
- SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2)
- SerDes-2 Lane G-H: to SATA1 & SATA2
IFC/Local Bus:
- NOR: 128MB 16-bit NOR flash
- NAND: 512MB 8-bit NAND flash
- CPLD: for system controlling with programable header on-board
eSPI:
- 64MB N25Q512 SPI flash
USB:
- Two USB2.0 ports with internal PHY (both Type-A)
PCIe:
- One PCIe x4 gold-finger
- One PCIe x4 connector
- One PCIe x2 end-point device (C293 Crypto co-processor)
SATA:
- Two SATA 2.0 ports on-board
SDHC:
- support a TF-card on-board
I2C:
- Four I2C controllers.
UART:
- Dual 4-pins UART serial ports
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Change QIXIS timing parameter CONFIG_SYS_CS3_FTIM2 to 8 from 0.
Fix EMI2 for t2080qds, which was caused by adding t2081qds.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
SerDes PLLs may not lock reliably at 5 G VCO configuration(A006384)
and at cold temperatures(A006475), workaround recalibrate the
PLLs with some SerDes configuration
Both these errata are only applicable for b4 rev1.
So, make workaround for these errata conditional,
depending upon soc version.
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Change setting of SerDes2 refclk2 to have the default value as it is
coming on board that is 156.25MHz, for XFI to work.
Also change PLL_NUM variable to the one defined in config_mpc85xx.h
for B4860 and B4420.
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
On B4860 and B4420, some serdes protocols can be used with LC VCO as
well as Ring VCO options.
Addded Alternate options with LC VCO for such protocols.
For example protocol 0x2a on srds 1 becomes 0x29 if it is LC VCO.
The alternate option has the same functionality as the original option;
the only difference being LC VCO rather than Ring VCO.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
1) SerDes2 Refclks have been set properly to make
PCIe SATA to work as it work on SerDes refclk of 100MHz
2) Mask the SerDes's device reset request before changing
the Refclks for SerDes1 and SerDes2 for PLL locks to
happen properly, device reset request bit unmasked
after SerDes refclks configuration
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
1) Add new SerDes1 protocols having Aurora in them
2) Add VSC cross point connections for Aurora to work with
CPRI and SGMIIs
3) Configure VSC crossbar switch to connect SerDes1
lanes to aurora on board, by checking SerDes1 protocols
4) SerDes1 Refclks have been set properly to make
Aurora, CPRI and SGMIIs to work together properly
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Before this commit, CONFIG_MPC8260 and CONFIG_8260
were used mixed-up.
All boards with mpc8260 cpu defined both of them:
- CONFIG_MPC8260 was defined in board config headers
and include/common.h
- CONFIG_8260 was defined arch/powerpc/cpu/mpc8260/config.mk
We do not need to have both of them.
This commit keeps only CONFIG_MPC8260.
This commit does:
- Delete CONFIG_8260 and CONFIG_MPC8260 definition
in config headers and include/common.h
- Rename CONFIG_8260 to CONFIG_MPC8260
in arch/powerpc/cpu/mpc8260/config.mk.
- Rename #ifdef CONFIG_8260 to #ifdef CONFIG_MPC8260
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Many (but not all) of Blackfin boards give -O2 option
to compile under lib/ directory.
That means lib/ should be speed-optimized,
whereas other parts should be size-optimized.
We want to keep the same behavior,
but do not want to parse board/*/config.mk again and again.
We've got no choice but to invent a new method.
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED, if it is enabled,
gives -O2 flag only for building under lib/ directory.
Dirty codes which I had marked as "FIX ME"
in board/${BOARD}/config.mk have been deleted.
Instead, CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED has been
defined in include/configs/${BOARD}.h.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
As ppc4xx currently only supports the deprecated nand_spl infrastructure
and nobody seems to have time / resources to port this over to the newer
SPL infrastructure, lets remove NAND booting completely.
This should not affect the "normal", non NAND-booting ppc4xx platforms
that are currently supported.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tirumala Marri <tmarri@apm.com>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>
config.tmp is never generated
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
B&R boards are using Phy Addresses 'one' and 'two', prior this was
defined through #define PHYADDR 1 within a header file.
Now this is addresses are given with device-driver structure.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Include <input.h> in order to fix the following sparse warning:
wandboard.c:278:5: warning: symbol 'overwrite_console' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Add a prototype for board_phy_config() to fix the following sparse warning:
wandboard.c:200:5: warning: symbol 'board_phy_config' was not declared. Should it be static?
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fix the following sparse warning:
wandboard.c:58:22: warning: symbol 'usdhc1_pads' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
omap_gpmc.h is a generic header used by OMAP NAND driver for all TI platfoms.
Hence this file should be present in generic folder instead of architecture
specific include folder.
Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5
Signed-off-by: Pekon Gupta <pekon@ti.com>
There are no source files in board/synopsys/arcangel4/
directory.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
The same outputs are generated with or without -I$(TOPDIR)/board.
I cannot understand why it is necessary. Remove.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Copied from Linux sources "include/linux/sizes.h" commit
413541dd66d51f791a0b169d9b9014e4f56be13c
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Tom Rini <trini@ti.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Stefan Roese <sr@denx.de>
[trini: Add bcm Kona platforms to the patch]
Signed-off-by: Tom Rini <trini@ti.com>
Since the switch may be re-configured for VLAN usage in Linux (or any
other OS), lets reset the switch to its default register values upon
power-up. Otherwise network might not be available in U-Boot.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Lukas Stockmann <lukas.stockmann@siemens.com>
Cc: Tom Rini <trini@ti.com>
Updating EMIF_PHY_CTRL and adding EMIF_READ_WRITE_EXECUTION_THRESHOLD
registers.
In EMIF_PHY_CTRL:
Updating [4:0]READ_LATENCY to 8, because at higher frequencies like
400MHz the read latency expected will be CL+3 as per tests from HW
folks.
Clearing [19]PHY_DIS_CALIB_RST bit as this is used onl for debug
purpose. With out this resume is not working(Still waiting for PHY team
to come back for better explanation).
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Adding support for reading cpsw 2nd mac address from efuse and pass it
to kernel via dtb which will be used in dual emac mode of cpsw.
Also correct the bit masking of mac id read from the efuse.
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Adding support for reading cpsw 2nd mac address from efuse and pass it
to kernel via dtb which will be used in dual emac mode of cpsw.
Also adding mii command support to am335x common config.
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Adding support for CPSW to AM43xx EPOS nad GP EVM which is connected
to RMII and RGMII phy respectively and enable cpsw in config.
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Some platforms like AM437x have different EVMs with different phy addresses,
so this patch adds support for passing phy address via cpsw plaform data.
Also renamed phy_id to phy_addr so better understanding of the code.
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
[trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335
pengwyn boards]
Signed-off-by: Tom Rini <trini@ti.com>
board/sheldon/simpc8313/config.mk is used only for nand_spl.
So it should go into nand_spl/board/sheldon/simpc8313/.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
NAND boot mode on AM335x EVM has been verified, and steps
to use it has been documented and update in this README
Signed-off-by: Pekon Gupta <pekon@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Tom Rini <trini@ti.com>
Remove the last uses of symbol offsets in ARM U-Boot.
Remove some needless uses of _TEXT_BASE.
Remove all _TEXT_BASE definitions.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
This prevents references to _end from generating absolute
relocation records.
This change is binary invariant for ARM targets.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Newly added cm_t335 was missed in commit 47ed5dd0 which
made ARM targets produce full ELF files. Fix its linker
script.
This change is binary-invariant when only .dynsym, .dynstr,
.dynamic, .plt, .interp and .gun sections are declared.
Sections .hash, .got.plt, .dynbss and .ARM.exidx are also
declared so that their (unused) content is moved out of the
u-boot binary.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
With this, fixup a trivial build error of get_effective_memsize needing
to be updated in the new board/freescale/p1010rdb/spl.c
Signed-off-by: Tom Rini <trini@ti.com>
Rename OBJCFLAGS to OBJCOPYFLAGS beforehand to use
"cmd_objcopy" in scripts/Makefile.lib in an upcoming commit.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
In the previous patches, we introduced the SPL/TPL fraamework.
For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
the DDR according to the SPD and loads the final uboot image into DDR, then
jump to the DDR to begin execution.
For NAND booting way, the nand SPL has size limitation on some board(e.g.
P1010RDB), it can not be more than 8KB, we can call it "minimal SPL", So the
dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is
loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD
and loads the final uboot image into DDR,then jump to the DDR to begin execution.
This patch enabled SPL/TPL for P1010RDB to support starting from NAND/SD/SPI
flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL.
Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to
execute, so the section .resetvec is no longer needed.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
T2081 QDS is a high-performance computing evaluation, development and
test platform supporting the T2081 QorIQ Power Architecture processor.
T2081QDS board Overview
-----------------------
- T2081 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
- 2MB shared L2 and 512KB L3 CoreNet platform cache (CPC)
- CoreNet fabric supporting coherent and noncoherent transactions with
prioritization and bandwidth allocation
- 32-/64-bit DDR3/DDR3LP SDRAM memory controller with ECC and interleaving
- Ethernet interfaces:
- Two on-board 10M/100M/1G bps RGMII ports
- Two 10Gbps XFI with on-board SFP+ cage
- 1Gbps/2.5Gbps SGMII Riser card
- 10Gbps XAUI Riser card
- Accelerator:
- DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
- SerDes:
- 8 lanes up to 10.3125GHz
- Supports SGMII, HiGig, XFI, XAUI and Aurora debug,
- IFC:
- 512MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA
- eSPI:
- Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040)
- USB:
- Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB)
- PCIe:
- Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV)
- eSDHC:
- Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and
voltage translators
- I2C:
- Four I2C controllers.
- UART:
- Dual 4-pins UART serial ports
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
HOSTCFLAGS_autoconf.mk.dep was added by commit 422322f
but it has never been used.
Cc: Vadim Bendebury <vbendeb@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Add support for the bcm28155_ap reference board.
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Reviewed-by: Tim Kryger <tkryger@linaro.org>
New hardware version cannot recognize the SD-Card
because the SYS_NRESWARM, set as GPIO, does not
guarantee the required reset time.
Change the pin function back to enable the
SYS_NRESWARM signal driven by the SOC.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Schematic indicates GPIO5_7 is to be used for VTT regulator control
rather than GPIO0_21 so modify enable_vtt_regulator to reflect this.
Without this some boards will experience DDR3 corruption and fail to
boot.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[trini: Rework patch against mainline]
Signed-off-by: Tom Rini <trini@ti.com>
Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB
Motherboard, using TI's AM3352 SoC.
Most of code is derived from TI's AM335x_EVM
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Cc: trini@ti.com
Adds support for Bernecker & Rainer Industrieelektronik GmbH T-Series
Motherboard, using TI's AM3352 SoC.
Most of code is derived from TI's AM335x_EVM
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
This patch add support for the Silica Pengwyn board [1]
The board is based on a TI AM3354 CPU [2]
All jumpers removed it will boot from the SDcard, the console is on
UART1 accessible via the FDTI -> USB. The on board NAND flash is
supported and can act as boot medium, depending on jumper settings.
USB Host, USB Device and Ethernet are also provided but untested.
[1]
http://www.silica.com/product/silica-pengwyn-board.html
[2]
http://www.ti.com/product/am3354
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
[trini: Move CONFIG_BOARD_LATE_INIT into am335x_evm.h, drop unused
spi0_pin_mux from Pengwyn support]
Signed-off-by: Tom Rini <trini@ti.com>
This function has been around for powerpc. It is used for systems with
memory more than CONFIG_MAX_MEM_MAPPED. In case of non-contiguous memory,
this feature can limit U-boot to one block without going over the limit.
Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
With accepted change to DW GMAC driver -
92a190aaab (net/designware - switch driver
to phylib usage) we need to update this board because
"designware_initialize" now accepts only 2 parameters instead of 4.
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
With d6a320d we moved some clock externs out of blackfin_local.h and
into clock.h but now need to include <asm/clock.h> in more drivers to
avoid warnings.
Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Tom Rini <trini@ti.com>
Commit 5ab502cb gathered all device tree sources
to arch/$(ARCH)/dts/.
So tegra124-venice2.dts also must go to arch/arm/dts directory
to build venice2 board.
(Commit 5ab502cb had been posted before venice2 board support
was merged. So an unvisible conflict happened.)
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@ti.com>
Conflicts:
Makefile
drivers/net/npe/Makefile
These two conflicts arise from commit 0b2d3f20
("ARM: NET: Remove the IXP NPE ethernet driver") and are
resolved by deleting the drivers/net/npe/Makefile file
and removing the CONFIG_IXP4XX_NPE line from Makefile.
- When CONFIG_DISPLAY_CPUINFO is not enabled,
print_cpuinfo() should be defined as an empty function
in a header, include/common.h
- Remove #ifdef CONFIG_DISPLAY_CPUINFO .. #endif
from caller, common/board_f.c and arch/arm/lib/board.c
- Remove redundant prototypes in arch/arm/lib/board.c,
arch/arm/include/asm/arch-am33x/sys_proto.h and
board/nokia/rx51/rx51.h, keeping the one in include/common.h
- Add #ifdef CONFIG_DISPLAY_CPUINFO to the func definition
where it is missing
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Unlike Linux Kernel, U-Boot historically had *.dts files under
board/$(VENDOR)/dts/ and *.dtsi files under arch/$(ARCH)/dts/.
I think arch/$(ARCH)/dts dicretory is a better location
to store both *.dts and *.dtsi files.
For example, before this commit, board/xilinx/dts directory
had both Microblaze dts (microblaze-generic.dts) and
ARM dts (zynq-*.dts), which are totally unrelated.
This commit moves *.dts to arch/$(ARCH)/dts/ directories,
allowing us to describe nicely mutiple DTBs generation in the next commit.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
We had switched to Kbuild, so we do not need to
delete sandburst board files at every build.
U-Boot conventional build system did not check the
update of command line option, -DBUILDUSER.
Kbuild can handle it nicely and re-builds object files
when command line options are changed.
(The file ".*.cmd" stores the information how the file
was generated at the previous build.)
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This commit refactors cleaning targets such as
clean, clobber, mrpropper, distclean
with scripts/Makefile.clean.
By using scripts/Makefile.clean, we can recursively descend
into subdirectories and delete generated files there.
We do not need add a big list of generated files
to the "clean" target.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Now we are ready to switch over to real Kbuild.
This commit disables temporary scripts:
scripts/{Makefile.build.tmp, Makefile.host.tmp}
and enables real Kbuild scripts:
scripts/{Makefile.build,Makefile.host,Makefile.lib}.
This switch is triggered by the line in scripts/Kbuild.include
-build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj
+build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
We need to adjust some build scripts for U-Boot.
But smaller amount of modification is preferable.
Additionally, we need to fix compiler flags which are
locally added or removed.
In Kbuild, it is not allowed to change CFLAGS locally.
Instead, ccflags-y, asflags-y, cppflags-y,
CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o
are prepared for that purpose.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
We are going to switch over to Kbuild in upcoming commits.
Each makefile must have non-empty obj- or obj-y
to generate built-in.o on Kbuild.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This commit changes the working directory
where the build process occurs.
Before this commit, build process occurred under the source
tree for both in-tree and out-of-tree build.
That's why we needed to add $(obj) prefix to all generated
files in makefiles like follows:
$(obj)u-boot.bin: $(obj)u-boot
Here, $(obj) is empty for in-tree build, whereas it points
to the output directory for out-of-tree build.
And our old build system changes the current working directory
with "make -C <sub-dir>" syntax when descending into the
sub-directories.
On the other hand, Kbuild uses a different idea
to handle out-of-tree build and directory descending.
The build process of Kbuild always occurs under the output tree.
When "O=dir/to/store/output/files" is given, the build system
changes the current working directory to that directory and
restarts the make.
Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj=<sub-dir>"
syntax for descending into sub-directories.
(We can write it like "make $(obj)=<sub-dir>" with a shorthand.)
This means the current working directory is always the top
of the output directory.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
Some Samsung boards have their own tools under board/samsung/<board>/tools/.
This commit refactor more makefiles with "hostprogs-y".
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Add the SATA boot support for OMAP5 and dra7xx.
Renamed the omap_sata_init to the common init_sata(int dev)
for commonality in with sata stack.
Added the ROM boot device ID for SATA.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
This commit removes platform CONFIG_SYS_HZ definition for the
remainders of part1 (commit cdb23792) and part2 (commit f232950f).
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Since we use CONFIG_SKIP_LOWLEVEL_INIT for Exynos baords, we dont need to a
lowlevel_init.S file.
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
SPL is using ps7_init.c/h files which are generated
from design tools which have to be copied to
boards/xilinx/zynq folder before compilation.
BSS section is moved to SDRAM because fat support
requires more space than SRAM size.
Added:
- MMC and QSPI support
- Boot OS directly from SPL
- Enable SPL command
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
KMSUGP1 is from a u-boot perspective (almost) identical to KMNUSA.
The only difference is that the PCIe reset is connected to Kirkwood pin
MPP7_PEX_RST_OUTn, we use a dedicated config flag KM_PCIE_RESET_MPP7.
Such pin should theoretically be handled by the PCIe subsystem
automatically, but this turned out not to be the case.
So simply configure this PIN as a GPIO and issue a pulse manually.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Cc: Karlheinz Jerg <karlheinz.jerg@keymile.com>
Cc: Valentin Longchamp <valenting.longchamp@keymile.com>
Cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Add set_fdthigh subcommand to "subbootcmds" (release) so to set "fdt_high"
This is necessary on Kirkwood so that the FDT does not get relocated
above the memory limit that the kernel cannot access
(that is the memory part reserved for the switch).
This was tested on NUSA1, where it is necessary, and on ETER1, where it
doesn't seem to hurt.
We want the scripts to also work with older versions of u-boot, where:
a) set_fdthigh is not defined (will be default env for newer u-boots)
b) the fdt will not be available
For this reason, we use "set_fdthigh" to tell whether we are running
a newer (FDT-aware) u-boot or not.
So if "set_fdthigh" runs successfully or arch != arm we try loading
the fdt; otherwise we proceed normally.
Notice how, contrary to release mode, set_fdthigh will _not_ be part of
subbootcmds for develop and ramfs, but will be executed as part of
"tftpfdt".
Since this is only needed for kirkwood cards, and it prevents the kernel
from booting on QorIQ (though it seemed to work on ETER1), we change
its definition in the default env for powerpc so that the value is only
set on ARM.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
This consists of:
a) Defining the addresses, enabling fdtsupport [arm]
b) Defining "cramfsloadfdt" [arm,powerpc => common]
c) Adding the FDT address to bootm [arm,powerpc => common]
d) Defining "tftpfdt" in ramfs-,develop- [arm,powerpc >= common]
This should work with 3.10 kernels, whether loaded through TFTP
(with rootfs either through NFS or TFTP-ramfs) or from the NAND.
The machid was left unchanged, this should keep compatibility with both
older and newer kernels.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
CONFIG_BOOTCOUNT_LIMIT is used on all boards from this board series. So
remove this unneeded define.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Add a README to the board which lists the commands required to enable
booting from the eMMC boot partitions found on the board.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Add a README to the board which lists the commands required to enable
booting from the eMMC boot partitions found on the board.
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
With this change driver will benefit from existing phylib and thus
custom phy functionality implemented in the driver will go away:
* Instantiation of the driver is now much shorter - 2 parameters
instead of 4.
* Simplified phy management/functoinality in driver is replaced with
rich functionality of phylib.
* Support of custom phy initialization is now done with existing
"board_phy_config".
Note that after this change some previously used config options
(driver-specific PHY configuration) will be obsolete and they are simply
substituted with similar options of phylib.
For example:
* CONFIG_DW_AUTONEG - no need in this one. Autonegotiation is enabled
by default.
* CONFIG_DW_SEARCH_PHY - if one wants to specify attached phy
explicitly CONFIG_PHY_ADDR board config option has to be used, otherwise
automatically the first discovered on MDIO bus phy will be used
I believe there's no need now in "doc/README.designware_eth" because
user only needs to instantiate the driver with "designware_initialize"
whose prototype exists in "include/netdev.h".
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
AXS101 is a new generation of devlopment boards from Synopsys that houses
ASIC with ARC700 and lots of DesignWare peripherals:
* DW APB UART
* DW Mobile Storage (MMC/SD)
* DW I2C
* DW GMAC
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Arcangel4 is a FPGA-based development board that is used for prototyping and
verificationof of both ARC hardware (CPUs) and software running upon CPU.
This board avaialble in 2 flavours:
* Little-endian (arcangel4)
* Big-endian (arcangel4-be)
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
This patch adds variables describing platform (soc, board, vendor)
to default environment.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch sets envs that describe board information.
The following envs are set: soc_id, soc_rev, board_rev.
Based on this information, if CONFIG_OF_LIBFDT is enabled,
the 'fdtfile' env is set as:
fdtfile=${soc_family}${soc_id}-${board}.dtb
The generated envs are intenionally not saved to persistent storage.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The mv_udc is not marvell-specific anymore. The mv_udc is used to drive
generic ChipIdea CI13xxx series OTG cores, so rename the driver to ci_udc
instead.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Stefano Babic <sbabic@denx.de>
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC
files. PMIC init will be moved to pmic_common_init later.
This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display
and WB/LP0 are not supported yet.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
These are fairly complete, and near-clones of Tegra114 Venice, with an
additional I2C port, and MMC address changes for Tegra124.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
__pinmux_nand() won't compile if PERIPH_ID_NDFLASH isn't defined.
Prevent this from causing build problems on newer SoCs without NAND
support (or without SW support for NAND yet), but preventing
compilation unless the function will actually be used, i.e. when
CONFIG_TEGRA_NAND is defined.
Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, rewrote commit description, moved ifdef around whole function
rather than just body]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The PEXHC PCIe configuration mechanism ensures that the FPGA get
configured at power-up. Since all the PCIe devices should be configured
when the kernel start, u-boot has to take care that the FPGA gets
configured also in other reset scenarios, mostly because of possible
configuration change.
The used mechanism is taken from the km_kirkwood design and adapted to
the kmp204x case (slightly different HW and PCIe configuration).
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
On the previous HW revision (now unsupported), there was a need for
external DMA signals and thus the I2C3/4 signals were used
DMA1_DONE/ACK/REQ.
These signals now are configured as GPIO[16:19].
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
According to the errata, some bits of an undocumented register in the
DCSR must be set for every core in order to avoid a possible data or
instruction corruption.
This is required for the 2.0 revision of the P2041 that should be used
as soon as available in our design.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This patch adds support for using some GPIOs that are connected to the
I2C bus to force the bus lines state and perform some bus deblocking
sequences.
The KM common deblocking algorithm from board/keymile/common/common.c is
used. The GPIO lines used for deblocking the I2C bus are some external
GPIOs provided by the QRIO CPLD:
- SCL = GPIOA_20
- SDA = GPIOA_21
The QRIO GPIOs act in an open-drain-like manner, for 0 the line is
driven low and for 1 the GPIO is set as input and the line gets
pulled-up.
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The QRIO GPIO functions can be of general interest. They are thus added
to a qrio.c and their prototype are available from kmp204x.h. The QRIO
prst function are also included in this file, as well as the functions
required for the I2C deblocking support (open-drain).
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: Remove extra blank line in board/keymile/kmp204x/qrio.c]
Signed-off-by: York Sun <yorksun@freescale.com>
Make use of the QRIO1 32bit register at 0x20 as bootcounter register
Check for BOOTCOUNT_MAGIC pattern when before bootcounter value is read
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: Minor change to commit message]
Signed-off-by: York Sun <yorksun@freescale.com>
This covers only non-L2 switch ethernet interfaces i.e.
RGMII and SGMII interface for both T1040RDB and T1042RDB_PI
T1040RDB is configured as serdes protocol 0x66 which can
support following interfaces
2 RGMIIS on DTSEC4, DTSEC5
1 SGMII on DTSEC3
T1042RDB_PI is configured as serdes protocol 0x06 which can
support following interfaces
2 RGMIIS on DTSEC4, DTSEC5
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
[York Sun: Minor change in commit message]
Signed-off-by: York Sun <yorksun@freescale.com>
Due to increased size of u-boot, FMAN ucode start address has been shifted
by 256KB causing a overlap with rootfs start address.
Update rootfs start address to reflect correct memory map.
Also fix minor typo in README
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This change allows updating environment stored on MMC by dfu or thor.
New setting:
- "params.bin mmc 0x38 0x8"
File params.bin can be generated by: tools/mkenvimage.
e.g. ./mkenvimage -s 4096 -o params.bin <env_text_file>
Every new env variable in text file should start with a new line.
Sample env text file:
- board/samsung/common/dfu_sample_env.txt
Requirements:
- file name: "params.bin"
- file size: 4096 Bytes - the same as CONFIG_ENV_SIZE.
Other size will cause CRC miscalculation at boot.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
CC: Piotr Wilczek <p.wilczek@samsung.com>
CC: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This simple LCD menu allows run one of download mode on device
without writing on console or for fast and easy upgrade.
This feature check user keys combination at boot:
- power key + volume up - download menu
- power key + volume down - thor mode (without menu)
New configs:
- CONFIG_LCD_MENU
- CONFIG_LCD_MENU_BOARD
For proper effect this feature needs following definitions:
Power key:
- KEY_PWR_PMIC_NAME - (string) pmic which supports power key check
Register address:
- KEY_PWR_STATUS_REG
- KEY_PWR_INTERRUPT_REG
Register power key mask:
- KEY_PWR_STATUS_MASK
- KEY_PWR_INTERRUPT_MASK
Gpio numbers:
- KEY_PWR_INTERRUPT_MASK
- KEY_VOL_DOWN_GPIO
Functions needs to be called:
- keys_init() - for set proper gpio direction
- check_boot_mode() - menu - main function
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Changes:
- check image bpp instead of resolution when returns logo address
- remove 32bpp logo
- add 16bpp logo in two formats: bmp and gzipped bmp
- init logo address with "0" for unsupported bpp mode
- update boards configs with proper image size for gunzip
- extend structure vidinfo by two fields: logo_x_offset and logo_y_offset.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Tested-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Remove wrong and unused env variables
Trats2 is not as GT-I8800.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Old s5p gpio coding method was not clean and was not working properly
for all parts and banks. New method is clean and easy to extend.
Gpio coding mask:
0x000000ff - pin number
0x00ffff00 - bank offset
0xff000000 - part number
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Previously as a part of moving the VBUS gpio support to device tree
following patch removed this and added relevant support in driver:
4a271cb exynos: usb: Switch USB VBUS GPIOs to be device tree configured
Recent changes for common board file migration for exynos platform
added it again. So removing it now.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The gpio_*() apis require the exact gpio line number to deduce
the gpio bank and the gpio pin addresses.
So fix the gpio number for VBUS used for EHCI ports as well as
XHCI ports on exynos5250 boards.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
If CONFIG_CFI_FLASH_MTD is not defined, then we shouldn't perform the
flash early reset.
This commit fixes the following build error:
nios2-generic.c: In function `__early_flash_cmd_reset':
nios2-generic.c:23: error: `AMD_CMD_RESET' undeclared (first use in this function)
nios2-generic.c:23: error: (Each undeclared identifier is reported only once
nios2-generic.c:23: error: for each function it appears in.)
nios2-generic.c:24: error: `FLASH_CMD_RESET' undeclared (first use in this function)
which was introduced by:
commit a113fb39df
Author: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Date: Fri Dec 20 18:34:53 2013 -0300
board: nios2: Add CONFIG_CFI_FLASH_MTD guard to flash.h header include
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
MAINTAINERS file has been removed from the project.
Replace its reference with 'boards.cfg' file instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
No need to pass 'u-boot.imx' as parameter for 'make' because u-boot.imx is
built by default.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
Delete some serial.h files, whole code in which is surrounded by
#if 0 ... #endif
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Commit e5c5301f refactored the build system not to make
directories in board makefiles.
But commit 8f380381 create directories again in
board/avionic-design/tec-ng/Makefile.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Commit 643aae1406
deleted include/linux/config.h but missed to
delete _LINUX_CONFIG_H macro.
It is no longer used at all.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
If timer_init() is made a weak stub function, then it allows us to
remove several empty timer_init functions for those boards that
already have a timer initialized when u-boot starts. Architectures
that use the timer framework may also remove the need for timer.c.
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
The commit
f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls"
removed the config option aimed towards moving that stuff into kernel, which
renders some code unreachable. Remove that code.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
On BSC9131, BSC9132, P1010 : For High Capacity SD Cards (> 2 GBytes), the
32-bit source address specifies the memory address in block address
format. Block length is fixed to 512 bytes as per the SD High Capacity
specification. So we need to convert the block address format
to byte address format to calculate the envaddr.
If there is no enough space for environment variables or envaddr
is larger than 4GiB, we relocate the envaddr to 0x400. The address
relocated is in the front of the first partition that is assigned
for sdboot only.
Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
u-boot binary size for Freescale mpc85xx platforms is 512KB.
This has been reached to upper limit for some of the platforms causig
linker error.
So, Increase the u-boot binary size to 768KB.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
- Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
- Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are
unrelated to DDR3/3L.
Tested with UDIMM 9JSF25672AZ-2G1K1 and verified speed 1200/1866/2133MT/s.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Using the TPL/SPL method to booting from 8k page NAND flash.
- Add 256kB size SRAM tlb for second step booting;
- Add spl.c for TPL image boot;
- Add spl_minimal.c for minimal SPL image;
- Add C29XPCIE_NAND configure;
- Modify C29XPCIE.h for nand config and enviroment;
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
- add more serdes protocols support.
- fix some serdes lanes route.
- fix SGMII doesn't work and incorrect mdio display for XFI when serdes 0x6d.
- correct boot location info for SD/SPI boot.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Update following DDR related settings for T1040QDS
-Correct number of chip selects to two as t1040qds supports
two Chip selects.
-Update board_specific_parameters udimm structure with settings
derived via calibration.
-Reduced I2C speed to 50KHz as DDR-SPD does not get reliably
read at 400KHz.
Verified the updated settings to be working fine with dual-ranked
Micron, MT18KSF51272AZ-1G6 DIMM at data rate 833MT/s, 1333MT/s and
1600MT/s.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Send RPC commands to the VideoCore to turn on the SDHCI and USB modules.
For SDHCI this isn't needed in practice, since the firmware already
turned on the power in order to load U-Boot. However, it's best to be
explicit. For USB, this is necessary, since the module isn't powered
otherwise. This will allow the kernel USB driver to work.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Universal uses only one adapter I2C_0.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
On U-boot uses TMU0 as timer, but TMU0 does not use on linux kernel
and other.
This disables TMU0 at the request of from kernel user.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
On U-boot uses TMU0 as timer, but TMU0 does not use on linux kernel
and other.
This disables TMU0 at the request of from kernel user.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
SolidRun has designed the Hummingboard board based on mx6q/dl/solo.
Add the initial support for the mx6 solo variant.
More information about this hardware can be found at:
http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware
(Carrier-One was the previous name of Hummingboard).
Based on the work from Jon Nettleton <jon.nettleton@gmail.com>.
Signed-off-by: Jon Nettleton <jon.nettleton@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Provide an argument to enable_fec_anatop_clock() to specify the clock frequency
that will be generated.
No changes are made to mx6slevk, which uses the default 50MHz fec clock.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
The OneNAND SPL used on PXA is slightly obscure. Due to the OneNAND limitation,
where we have only the first 1KiB of the OneNAND available upon power-up as a
memory-mapped area, from which the CPU starts executing, we place only the most
essential code into this first 1KiB . This code copies the rest of the SPL into
SRAM and jumps to it. This code is stored in section .text.0 .
The rest of the SPL is stored in section .text.1 . When running the OBJCOPY on
the SPL, it will preserve only .text section, but the .text.0 and .text.1 are
stripped away from the result, thus making the SPL binary empty. The patch adds
additional -j parameters to the OBJCOPY for PXA during the SPL build, which will
preserve the .text.0 and .text.1 sections.
Moreover, this patch also adds missing functions into the .text.0 section, since
otherwise the PXA270 with 1KiB-window OneNAND won't be able to boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo
controller, connected to HSIC Phy of USB host controller via USB3503 hub.
This patch uses board specific board_usb_init function to perform reset
sequence for USB3503 hub and enables the relevant config options for
network to work.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
When U-Boot is configured for Versatile AB, it will still pass
the machine ID of Versatile PB to the kernel. After this simple
fix the system boots correctly.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be
added to include/configs/exynos5-dt.h now.
Conflicts:
include/configs/exynos5250-dt.h
Signed-off-by: Tom Rini <trini@ti.com>
This patch provides a basic fdt support for zynq u-boot.
zynq-7000.dtsi-> initial arch dts file
zynq-zed.dts -> initial zed board dts file
more devices should be added in subsequent patches.
u-boot build: once configuring of a board done
for building dtb with zynq-zed.dts as an input
zynq-uboot> make DEVICE_TREE=zynq-zed
Enabled CONFIG_OF_SEPARATE for building dtb separately.
There is a new binary called u-boot-dtb.bin which is a u-boot
with devicetree supported.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Added support to find the bootmodes by reading
slcr bootmode register. this can be helpful to
autoboot the configurations w.r.t a specified bootmode.
Added this functionality on board_late_init as it's not
needed for normal initializtion part.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Byte offset of Ethernet mac address read from e-fuse are wrong so DHCP is
not working on some boards, modifying the offset to read properly.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
The omap3_zoom2 board has not been updated for a correct CONFIG_SYS_HZ
and Tom Rix's email has long been bouncing.
Signed-off-by: Tom Rini <trini@ti.com>
CONFIG_SPL_NAND_MINIMAL should not be used as it was defined for temporary
review purpose.
So, use CONFIG_SPL_NAND_BOOT config.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
This fix is necessary after increased by one the number
of adapters in s3c24x0 driver.
Tested on Trats and Trats2.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds dts support for SMDK5420.
exynos5.dtsi created is a common file which has the nodes common
to both 5420 and 5250.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Adding the base patch for Exynos based SMDK5420.
This shall enable compilation and basic boot support for
SMDK5420.
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Create a common board.c file for all functions which are common across
all EXYNOS5 platforms.
exynos_init function is provided for platform specific code.
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
With changes to the rtl8169 ethernet to improve cache support, we have
needed additional cache functions for mpc8245. As the board maintainer
has been unresponsive, remove this board.
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Tom Rini <trini@ti.com>
GP EVM has 1GB DDR3 attached(Part no: MT41K512M8RH).
Adding details for the same.
Below is the brief description of DDR3 init sequence(SW leveling):
-> Enable VTT regulator
-> Configure VTP
-> Configure DDR IO settings
-> Disable initialization and refreshes until EMIF registers are programmed.
-> Program Timing registers
-> Program leveling registers
-> Program PHY control and Temp alert and ZQ config registers.
-> Enable initialization and refreshes and configure SDRAM CONFIG register
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
AM4372 EPOS EVM has 1GB LPDDR2(Part no: MT42L256M32D2LG-25 WT:A)
Adding LPDDR2 init sequence and register details for the same.
Below is the brief description of LPDDR2 init sequence:
-> Configure VTP
-> Configure DDR IO settings
-> Disable initialization and refreshes until EMIF registers are programmed.
-> Program Timing registers
-> Program PHY control and Temp alert and ZQ config registers.
-> Enable initialization and refreshes and configure SDRAM CONFIG register
-> Wait till initialization is complete and the configure MR registers.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Currently same value is programmed for all ioregs. This is not
the case for all SoC's like AM4372. So adding a structure for ioregs
and updating in all board files. And also return from config_cmd_ctrl()
and config_ddr_data() functions if data is not passed.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Fixup dxr2, cm_t335, adapt pcm051 rev3]
Signed-off-by: Tom Rini <trini@ti.com>
Updating the Multiplier and Dividers value for all DPLLs.
Safest OPP is read from DEV ATTRIBUTE register. Accoring to the value
returned the MPU DPLL is locked.
At different OPPs follwoing are the MPU locked frequencies.
OPP50 300MHz
OPP100 600MHz
OPP120 720MHz
OPPTB 800MHz
OPPNT 1000MHz
According to the latest DM following is the OPP table dependencies:
VDD_CORE VDD_MPU
OPP50 OPP50
OPP50 OPP100
OPP100 OPP50
OPP100 OPP100
OPP100 OPP120
So at different OPPs of MPU it is safest to lock CORE at OPP_NOM.
Following are the DPLL locking frequencies at OPP NOM:
Core locks at 1000MHz
Per locks at 960MHz
LPDDR2 locks at 266MHz
DDR3 locks at 400MHz
Touching AM33xx files also to get DPLL values specific to board but no
functionality difference.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Updating the mux data for UART, adding data for i2c0 and mmc.
And also updating pad_signals structure.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
CONFIG_ENV_VARS_UBOOT_CONFIG, CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and
CONFIG_BOARD_LATE_INIT is already set. Adding support to detect the
board. These variables are used by findfdt.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add support for reading onboard EEPROM to enable
board detection.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add support for the new Tamonten™ NG platform from Avionic Design.
Currently only I2C, MMC, USB and ethernet have been tested.
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
When DT define aliases for etherner0 and ethernet1, U-Boot
automatically patched MAC addresses using ethaddr and eth1addr
environment variables respectively.
Custom initialization is no longer needed.
Signed-off-by: Sergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>
