mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-02-27 04:47:20 +00:00
Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'
This commit is contained in:
Albert ARIBAUD
commit
f4e4aadead
5 changed files with 269 additions and 17 deletions
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@ -16,6 +16,8 @@
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/arch/rmobile.h>
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#include <netdev.h>
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#include <miiphy.h>
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#include <i2c.h>
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#include "qos.h"
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@ -207,6 +209,10 @@ void s_init(void)
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#define SMSTPCR7 0xE615014C
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#define SCIF0_MSTP721 (1 << 21)
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#define MSTPSR8 0xE61509A0
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#define SMSTPCR8 0xE6150990
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#define ETHER_MSTP813 (1 << 13)
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#define PMMR 0xE6060000
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#define GPSR4 0xE6060014
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#define IPSR14 0xE6060058
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@ -241,9 +247,16 @@ int board_early_init_f(void)
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mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721);
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/* ETHER */
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mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813);
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return 0;
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}
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/* LSI pin pull-up control */
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#define PUPR5 0xe6060114
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#define PUPR5_ETH 0x3FFC0000
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#define PUPR5_ETH_MAGIC (1 << 27)
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int board_init(void)
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{
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/* adress of boot parameters */
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@ -252,9 +265,59 @@ int board_init(void)
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/* Init PFC controller */
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r8a7791_pinmux_init();
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/* ETHER Enable */
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gpio_request(GPIO_FN_ETH_CRS_DV, NULL);
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gpio_request(GPIO_FN_ETH_RX_ER, NULL);
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gpio_request(GPIO_FN_ETH_RXD0, NULL);
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gpio_request(GPIO_FN_ETH_RXD1, NULL);
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gpio_request(GPIO_FN_ETH_LINK, NULL);
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gpio_request(GPIO_FN_ETH_REFCLK, NULL);
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gpio_request(GPIO_FN_ETH_MDIO, NULL);
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gpio_request(GPIO_FN_ETH_TXD1, NULL);
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gpio_request(GPIO_FN_ETH_TX_EN, NULL);
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gpio_request(GPIO_FN_ETH_TXD0, NULL);
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gpio_request(GPIO_FN_ETH_MDC, NULL);
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gpio_request(GPIO_FN_IRQ0, NULL);
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mstp_clrbits_le32(PUPR5, PUPR5, PUPR5_ETH & ~PUPR5_ETH_MAGIC);
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gpio_request(GPIO_GP_5_22, NULL); /* PHY_RST */
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mstp_clrbits_le32(PUPR5, PUPR5, PUPR5_ETH_MAGIC);
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gpio_direction_output(GPIO_GP_5_22, 0);
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mdelay(20);
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gpio_set_value(GPIO_GP_5_22, 1);
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udelay(1);
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return 0;
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}
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#define CXR24 0xEE7003C0 /* MAC address high register */
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#define CXR25 0xEE7003C8 /* MAC address low register */
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int board_eth_init(bd_t *bis)
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{
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#ifdef CONFIG_SH_ETHER
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int ret = -ENODEV;
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u32 val;
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unsigned char enetaddr[6];
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ret = sh_eth_initialize(bis);
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if (!eth_getenv_enetaddr("ethaddr", enetaddr))
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return ret;
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/* Set Mac address */
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val = enetaddr[0] << 24 | enetaddr[1] << 16 |
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enetaddr[2] << 8 | enetaddr[3];
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writel(val, CXR24);
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val = enetaddr[4] << 8 | enetaddr[5];
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writel(val, CXR25);
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return ret;
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#else
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return 0;
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#endif
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}
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int dram_init(void)
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{
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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@ -263,6 +326,20 @@ int dram_init(void)
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return 0;
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}
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/* koelsch has KSZ8041NL/RNL */
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#define PHY_CONTROL1 0x1E
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#define PHY_LED_MODE 0xC0000
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#define PHY_LED_MODE_ACK 0x4000
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int board_phy_config(struct phy_device *phydev)
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{
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int ret = phy_read(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1);
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ret &= ~PHY_LED_MODE;
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ret |= PHY_LED_MODE_ACK;
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ret = phy_write(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1, (u16)ret);
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return 0;
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}
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const struct rmobile_sysinfo sysinfo = {
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CONFIG_RMOBILE_BOARD_STRING
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};
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@ -280,4 +357,10 @@ int board_late_init(void)
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void reset_cpu(ulong addr)
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{
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u8 val;
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i2c_set_bus_num(2); /* PowerIC connected to ch2 */
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i2c_read(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
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val |= 0x02;
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i2c_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
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}
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@ -18,6 +18,8 @@
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/arch/rmobile.h>
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#include <miiphy.h>
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#include <i2c.h>
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#include "qos.h"
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DECLARE_GLOBAL_DATA_PTR;
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@ -207,6 +209,10 @@ void s_init(void)
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#define SMSTPCR7 0xE615014C
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#define SCIF0_MSTP721 (1 << 21)
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#define MSTPSR8 0xE61509A0
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#define SMSTPCR8 0xE6150990
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#define ETHER_MSTP813 (1 << 13)
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#define PMMR 0xE6060000
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#define GPSR4 0xE6060014
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#define IPSR14 0xE6060058
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@ -242,6 +248,9 @@ int board_early_init_f(void)
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mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721);
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/* ETHER */
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mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813);
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return 0;
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}
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@ -256,6 +265,68 @@ int board_init(void)
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/* Init PFC controller */
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r8a7790_pinmux_init();
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/* ETHER Enable */
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gpio_request(GPIO_FN_ETH_CRS_DV, NULL);
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gpio_request(GPIO_FN_ETH_RX_ER, NULL);
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gpio_request(GPIO_FN_ETH_RXD0, NULL);
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gpio_request(GPIO_FN_ETH_RXD1, NULL);
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gpio_request(GPIO_FN_ETH_LINK, NULL);
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gpio_request(GPIO_FN_ETH_REF_CLK, NULL);
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gpio_request(GPIO_FN_ETH_MDIO, NULL);
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gpio_request(GPIO_FN_ETH_TXD1, NULL);
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gpio_request(GPIO_FN_ETH_TX_EN, NULL);
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gpio_request(GPIO_FN_ETH_MAGIC, NULL);
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gpio_request(GPIO_FN_ETH_TXD0, NULL);
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gpio_request(GPIO_FN_ETH_MDC, NULL);
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gpio_request(GPIO_FN_IRQ0, NULL);
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gpio_request(GPIO_GP_5_31, NULL); /* PHY_RST */
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gpio_direction_output(GPIO_GP_5_31, 0);
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mdelay(20);
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gpio_set_value(GPIO_GP_5_31, 1);
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udelay(1);
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return 0;
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}
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#define CXR24 0xEE7003C0 /* MAC address high register */
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#define CXR25 0xEE7003C8 /* MAC address low register */
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int board_eth_init(bd_t *bis)
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{
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int ret = -ENODEV;
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#ifdef CONFIG_SH_ETHER
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u32 val;
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unsigned char enetaddr[6];
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ret = sh_eth_initialize(bis);
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if (!eth_getenv_enetaddr("ethaddr", enetaddr))
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return ret;
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/* Set Mac address */
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val = enetaddr[0] << 24 | enetaddr[1] << 16 |
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enetaddr[2] << 8 | enetaddr[3];
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writel(val, CXR24);
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val = enetaddr[4] << 8 | enetaddr[5];
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writel(val, CXR25);
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#endif
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return ret;
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}
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/* lager has KSZ8041NL/RNL */
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#define PHY_CONTROL1 0x1E
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#define PHY_LED_MODE 0xC0000
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#define PHY_LED_MODE_ACK 0x4000
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int board_phy_config(struct phy_device *phydev)
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{
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int ret = phy_read(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1);
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ret &= ~PHY_LED_MODE;
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ret |= PHY_LED_MODE_ACK;
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ret = phy_write(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1, (u16)ret);
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return 0;
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}
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@ -284,4 +355,11 @@ int board_late_init(void)
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void reset_cpu(ulong addr)
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{
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u8 val;
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i2c_set_bus_num(3); /* PowerIC connected to ch3 */
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i2c_init(400000, 0);
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i2c_read(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
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val |= 0x02;
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i2c_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
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}
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@ -2,13 +2,15 @@ Summary
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=======
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This README is about U-Boot support for Renesas's ARM Cortex-A9 based RMOBILE[1]
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family of SoCs. Renesas's RMOBILE SoC family contains an ARM Cortex-A9.
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and R-Car[2]family of SoCs. Renesas's RMOBILE/R-Car SoC family contains an ARM
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Cortex-A9.
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Currently the following boards are supported:
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* KMC KZM-A9-GT [2]
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* Atmark-Techno Armadillo-800-EVA [3]
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* KMC KZM-A9-GT [3]
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* Atmark-Techno Armadillo-800-EVA [4]
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* Renesas Electronics Lager
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* Renesas Electronics Koelsch
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Toolchain
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=========
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@ -17,7 +19,7 @@ ARM Cortex-A9 support ARM v7 instruction set (-march=armv7a).
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But currently we compile with -march=armv5 to allow more compilers to work.
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(For U-Boot code this has no performance impact.)
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Because there was no compiler which is supporting armv7a not much before.
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Currently, ELDK[4], Linaro[5], CodeSourcey[6] and Emdebian[7] supports -march=armv7a
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Currently, ELDK[5], Linaro[6], CodeSourcey[7] and Emdebian[8] supports -march=armv7a
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and you can get.
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Build
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@ -25,13 +27,26 @@ Build
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* KZM-A9-GT
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make kzm9g_config
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make
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make kzm9g_config
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make
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* Armadillo-800-EVA
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make armadillo-800eva_config
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make
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make armadillo-800eva_config
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make
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Note: Armadillo-800-EVA's U-Boot supports booting from SDcard only.
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Please see "B.2 Appendix B Boot Specifications" in hardware manual.
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* Lager
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make lager_config
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make
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* Koelsch
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make koelsch_config
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make
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Links
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=====
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@ -40,26 +55,30 @@ Links
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|||
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http://am.renesas.com/products/soc/assp/mobile/r_mobile/index.jsp
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[2] KZM-A9-GT
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[2] Renesas R-Car:
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|
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http://am.renesas.com/products/soc/assp/automotive/index.jsp
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[3] KZM-A9-GT
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|
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http://www.kmckk.co.jp/kzma9-gt/index.html
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[3] Armadillo-800-EVA
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[4] Armadillo-800-EVA
|
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|
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http://armadillo.atmark-techno.com/armadillo-800-EVA
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|
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[4] ELDK
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[5] ELDK
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|
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http://www.denx.de/wiki/view/ELDK-5/WebHome#Section_1.6.
|
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|
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[5] Linaro
|
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[6] Linaro
|
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|
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http://www.linaro.org/downloads/
|
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|
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[6] CodeSourcey
|
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[7] CodeSourcey
|
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|
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http://www.mentor.com/embedded-software/codesourcery
|
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|
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[7] Emdebian
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[8] Emdebian
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|
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http://www.emdebian.org/crosstools.html
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|
|
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|
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@ -18,13 +18,18 @@
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|
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#include <asm/arch/rmobile.h>
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#define CONFIG_CMD_EDITENV
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#define CONFIG_CMD_SAVEENV
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#define CONFIG_CMD_EDITENV
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#define CONFIG_CMD_SAVEENV
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_DFL
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#define CONFIG_CMD_SDRAM
|
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#define CONFIG_CMD_RUN
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#define CONFIG_CMD_LOADS
|
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_NFS
|
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_CMD_FLASH
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|
|
@ -123,6 +128,20 @@
|
|||
#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN)
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/* SH Ether */
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#define CONFIG_NET_MULTI
|
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#define CONFIG_SH_ETHER
|
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#define CONFIG_SH_ETHER_USE_PORT 0
|
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#define CONFIG_SH_ETHER_PHY_ADDR 0x1
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
|
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#define CONFIG_SH_ETHER_CACHE_WRITEBACK
|
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#define CONFIG_SH_ETHER_CACHE_INVALIDATE
|
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#define CONFIG_PHYLIB
|
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#define CONFIG_PHY_MICREL
|
||||
#define CONFIG_BITBANGMII
|
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#define CONFIG_BITBANGMII_MULTI
|
||||
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 10000000
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
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|
|
@ -130,4 +149,22 @@
|
|||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
/* i2c */
|
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#define CONFIG_CMD_I2C
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SH
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
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#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
|
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#define CONFIG_SYS_I2C_SH_BASE0 0xE6500000
|
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#define CONFIG_SYS_I2C_SH_SPEED0 400000
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#define CONFIG_SYS_I2C_SH_BASE1 0xE6510000
|
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#define CONFIG_SYS_I2C_SH_SPEED1 400000
|
||||
#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
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#define CONFIG_SYS_I2C_SH_SPEED2 400000
|
||||
#define CONFIG_SH_I2C_DATA_HIGH 4
|
||||
#define CONFIG_SH_I2C_DATA_LOW 5
|
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#define CONFIG_SH_I2C_CLOCK 10000000
|
||||
|
||||
#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
|
||||
|
||||
#endif /* __KOELSCH_H */
|
||||
|
|
|
|||
|
|
@ -28,6 +28,11 @@
|
|||
#define CONFIG_CMD_SDRAM
|
||||
#define CONFIG_CMD_RUN
|
||||
#define CONFIG_CMD_LOADS
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_CMD_MII
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_NFS
|
||||
#define CONFIG_CMD_BOOTZ
|
||||
#define CONFIG_CMD_FLASH
|
||||
|
||||
|
|
@ -127,12 +132,42 @@
|
|||
#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
|
||||
#define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN)
|
||||
|
||||
/* SH Ether */
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SH_ETHER
|
||||
#define CONFIG_SH_ETHER_USE_PORT 0
|
||||
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
|
||||
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
|
||||
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
|
||||
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
|
||||
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
|
||||
#define CONFIG_PHYLIB
|
||||
#define CONFIG_PHY_MICREL
|
||||
#define CONFIG_BITBANGMII
|
||||
#define CONFIG_BITBANGMII_MULTI
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_RCAR
|
||||
#define CONFIG_SYS_RCAR_I2C0_BASE 0xE6508000
|
||||
#define CONFIG_SYS_RCAR_I2C0_SPEED 400000
|
||||
#define CONFIG_SYS_RCAR_I2C1_BASE 0xE6518000
|
||||
#define CONFIG_SYS_RCAR_I2C1_SPEED 400000
|
||||
#define CONFIG_SYS_RCAR_I2C2_BASE 0xE6530000
|
||||
#define CONFIG_SYS_RCAR_I2C2_SPEED 400000
|
||||
#define CONFIG_SYS_RCAR_I2C3_BASE 0xE6540000
|
||||
#define CONFIG_SYS_RCAR_I2C3_SPEED 400000
|
||||
#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4
|
||||
|
||||
#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_BASE_CLK_FREQ 20000000u
|
||||
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_BASE_CLK_FREQ / 2) /* EXT / 2 */
|
||||
#define CONFIG_PLL1_CLK_FREQ (CONFIG_BASE_CLK_FREQ * 156 / 2)
|
||||
#define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2)
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||||
#define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
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||||
#define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12)
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||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_MP_CLK_FREQ
|
||||
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue