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ARM: atmel: add sama5d3 Xplained board support
Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC. Now it supports boot from NAND flash and SD/MMC card. Features support: - NAND flash - SD/MMC card - Two USB hosts - Ethernet (one GMAC, one EMAC) Signed-off-by: Bo Shen <voice.shen@atmel.com> [reorder boards.cfg] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This commit is contained in:
Bo Shen
Andreas Bießmann
parent
3ed7c4875d
commit
7ca6f36325
4 changed files with 350 additions and 0 deletions
15
board/atmel/sama5d3_xplained/Makefile
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15
board/atmel/sama5d3_xplained/Makefile
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@ -0,0 +1,15 @@
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#
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# (C) Copyright 2003-2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2008
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# Stelian Pop <stelian@popies.net>
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# Lead Tech Design <www.leadtechdesign.com>
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#
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# (C) Copyright 2014
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# Bo Shen <voice.shen@atmel.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += sama5d3_xplained.o
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130
board/atmel/sama5d3_xplained/sama5d3_xplained.c
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130
board/atmel/sama5d3_xplained/sama5d3_xplained.c
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/*
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* Copyright (C) 2014 Atmel Corporation
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* Bo Shen <voice.shen@atmel.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <mmc.h>
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#include <asm/io.h>
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#include <asm/arch/sama5d3_smc.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/at91_rstc.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/clk.h>
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#include <atmel_mci.h>
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#include <net.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_NAND_ATMEL
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void sama5d3_xplained_nand_hw_init(void)
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{
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
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at91_periph_clk_enable(ATMEL_ID_SMC);
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/* Configure SMC CS3 for NAND/SmartMedia */
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writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(1) |
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AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(1),
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&smc->cs[3].setup);
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writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(5) |
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AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(5),
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&smc->cs[3].pulse);
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writel(AT91_SMC_CYCLE_NWE(8) | AT91_SMC_CYCLE_NRD(8),
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&smc->cs[3].cycle);
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writel(AT91_SMC_TIMINGS_TCLR(3) | AT91_SMC_TIMINGS_TADL(10) |
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AT91_SMC_TIMINGS_TAR(3) | AT91_SMC_TIMINGS_TRR(4) |
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AT91_SMC_TIMINGS_TWB(5) | AT91_SMC_TIMINGS_RBNSEL(3)|
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AT91_SMC_TIMINGS_NFSEL(1), &smc->cs[3].timings);
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
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AT91_SMC_MODE_EXNW_DISABLE |
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#ifdef CONFIG_SYS_NAND_DBW_16
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AT91_SMC_MODE_DBW_16 |
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#else /* CONFIG_SYS_NAND_DBW_8 */
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AT91_SMC_MODE_DBW_8 |
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#endif
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AT91_SMC_MODE_TDF_CYCLE(3),
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&smc->cs[3].mode);
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}
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#endif
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#ifdef CONFIG_CMD_USB
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static void sama5d3_xplained_usb_hw_init(void)
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{
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at91_set_pio_output(AT91_PIO_PORTE, 3, 0);
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at91_set_pio_output(AT91_PIO_PORTE, 4, 0);
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}
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#endif
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#ifdef CONFIG_GENERIC_ATMEL_MCI
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static void sama5d3_xplained_mci0_hw_init(void)
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{
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at91_mci_hw_init();
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at91_set_pio_output(AT91_PIO_PORTE, 2, 0); /* MCI0 Power */
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}
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#endif
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int board_early_init_f(void)
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{
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at91_periph_clk_enable(ATMEL_ID_PIOA);
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at91_periph_clk_enable(ATMEL_ID_PIOB);
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at91_periph_clk_enable(ATMEL_ID_PIOC);
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at91_periph_clk_enable(ATMEL_ID_PIOD);
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at91_periph_clk_enable(ATMEL_ID_PIOE);
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at91_seriald_hw_init();
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return 0;
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}
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int board_init(void)
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{
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#ifdef CONFIG_NAND_ATMEL
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sama5d3_xplained_nand_hw_init();
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#endif
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#ifdef CONFIG_CMD_USB
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sama5d3_xplained_usb_hw_init();
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#endif
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#ifdef CONFIG_GENERIC_ATMEL_MCI
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sama5d3_xplained_mci0_hw_init();
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#endif
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#ifdef CONFIG_MACB
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at91_gmac_hw_init();
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at91_macb_hw_init();
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#endif
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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#ifdef CONFIG_MACB
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macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC, 0x00);
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macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
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#endif
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return 0;
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}
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#ifdef CONFIG_GENERIC_ATMEL_MCI
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int board_mmc_init(bd_t *bis)
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{
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atmel_mci_init((void *)ATMEL_BASE_MCI0);
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return 0;
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}
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#endif
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@ -278,6 +278,8 @@ Active arm armv7 am33xx ti am335x
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Active arm armv7 am33xx ti am43xx am43xx_evm am43xx_evm:SERIAL1,CONS_INDEX=1 Lokesh Vutla <lokeshvutla@ti.com>
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Active arm armv7 am33xx ti ti814x ti814x_evm - Matt Porter <matt.porter@linaro.org>
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Active arm armv7 am33xx ti ti816x ti816x_evm - -
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Active arm armv7 at91 atmel sama5d3_xplained sama5d3_xplained_mmc sama5d3_xplained:SAMA5D3,SYS_USE_MMC Bo Shen <voice.shen@atmel.com>
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Active arm armv7 at91 atmel sama5d3_xplained sama5d3_xplained_nandflash sama5d3_xplained:SAMA5D3,SYS_USE_NANDFLASH Bo Shen <voice.shen@atmel.com>
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Active arm armv7 at91 atmel sama5d3xek sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC Bo Shen <voice.shen@atmel.com>
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Active arm armv7 at91 atmel sama5d3xek sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH Bo Shen <voice.shen@atmel.com>
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Active arm armv7 at91 atmel sama5d3xek sama5d3xek_spiflash sama5d3xek:SAMA5D3,SYS_USE_SERIALFLASH Bo Shen <voice.shen@atmel.com>
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203
include/configs/sama5d3_xplained.h
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203
include/configs/sama5d3_xplained.h
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/*
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* Configuration settings for the SAMA5D3 Xplained board.
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*
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* Copyright (C) 2014 Atmel Corporation
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* Bo Shen <voice.shen@atmel.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/hardware.h>
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#define CONFIG_SYS_TEXT_BASE 0x26f00000
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_AT91FAMILY
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_OF_LIBFDT /* Device Tree support */
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/* general purpose I/O */
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#define CONFIG_AT91_GPIO
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/* serial console */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_DBGU
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/*
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* This needs to be defined for the OHCI code to work but it is defined as
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* ATMEL_ID_UHPHS in the CPU specific header files.
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*/
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#define ATMEL_ID_UHP ATMEL_ID_UHPHS
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/*
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* Specify the clock enable bit in the PMC_SCER register.
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*/
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#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
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#define CONFIG_BOOTDELAY 3
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/* No NOR flash */
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#define CONFIG_SYS_NO_FLASH
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_LOADS
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
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#define CONFIG_SYS_SDRAM_SIZE 0x10000000
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
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/* NAND flash */
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#define CONFIG_CMD_NAND
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* PMECC & PMERRLOC */
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#define CONFIG_ATMEL_NAND_HWECC
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#define CONFIG_ATMEL_NAND_HW_PMECC
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#define CONFIG_PMECC_CAP 4
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#define CONFIG_PMECC_SECTOR_SIZE 512
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#define CONFIG_CMD_NAND_TRIMFFS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#endif
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/* Ethernet Hardware */
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#define CONFIG_MACB
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#define CONFIG_RMII
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#define CONFIG_NET_MULTI
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_MACB_SEARCH_PHY
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#define CONFIG_RGMII
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#define CONFIG_CMD_MII
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#define CONFIG_PHYLIB
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/* MMC */
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#define CONFIG_CMD_MMC
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_GENERIC_ATMEL_MCI
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#define CONFIG_ATMEL_MCI_8BIT
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#endif
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/* USB */
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#define CONFIG_CMD_USB
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_DOS_PARTITION
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#define CONFIG_USB_STORAGE
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#endif
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#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
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#define CONFIG_CMD_FAT
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#define CONFIG_FAT_WRITE
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#define CONFIG_CMD_EXT4
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#define CONFIG_CMD_EXT4_WRITE
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#endif
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#if CONFIG_SYS_USE_NANDFLASH
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/* bootstrap + u-boot + env in nandflash */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET 0xc0000
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#define CONFIG_ENV_OFFSET_REDUND 0x100000
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#define CONFIG_ENV_SIZE 0x20000
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#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \
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"nand read 0x22000000 0x200000 0x600000;" \
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"bootz 0x22000000 - 0x21000000"
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#elif CONFIG_SYS_USE_MMC
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/* bootstrap + u-boot + env in sd card */
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_ENV_OFFSET 0x2000
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#define CONFIG_ENV_SIZE 0x1000
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#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91-sama5d3_xplained.dtb; " \
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"fatload mmc 0:1 0x22000000 zImage; " \
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"bootz 0x22000000 - 0x21000000"
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#else
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#define CONFIG_ENV_IS_NOWHERE
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#endif
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#ifdef CONFIG_SYS_USE_MMC
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#define CONFIG_BOOTARGS \
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"console=ttyS0,115200 earlyprintk " \
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"root=/dev/mmcblk0p2 rw rootwait"
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#else
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#define CONFIG_BOOTARGS \
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"console=ttyS0,115200 earlyprintk " \
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"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
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"256K(env),256k(evn_redundent),256k(spare)," \
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"512k(dtb),6M(kernel)ro,-(rootfs) " \
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"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
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#endif
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_PROMPT "U-Boot> "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_HUSH_PARSER
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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#endif
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