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14211 commits

Author SHA1 Message Date
Tom Rini
6d0453d889 Prepare v2021.07-rc5
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Merge tag 'v2021.07-rc5' into next

Prepare v2021.07-rc5

# gpg: Signature made Mon 28 Jun 2021 03:39:36 PM EDT
# gpg:                using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
#	configs/am64x_evm_r5_defconfig
2021-06-28 16:22:13 -04:00
Kunihiko Hayashi
534f0fbd65 arm64: Fix relocation of env_addr if POSITION_INDEPENDENT=y
If both POSITION_INDEPENDENT and SYS_RELOC_GD_ENV_ADDR are enabled,
wherever original env is placed anywhere, it should be relocated to
the right address.

Relocation offset gd->reloc_off is calculated with SYS_TEXT_BASE in
setup_reloc() and env address gd->env_addr is relocated by the offset in
initr_reloc_global_data().

gd->env_addr
  = (orig env) + gd->reloc_off
  = (orig env) + (gd->relocaddr - SYS_TEXT_BASE)

However, SYS_TEXT_BASE isn't always runtime base address when
POSITION_INDEPENDENT is enabled. So the relocated env_addr might point to
wrong address. For example, if SYS_TEXT_BASE is zero, gd->env_addr is
out of memory location and memory exception will occur.

There is a difference between linked address such as SYS_TEXT_BASE and
runtime base address. In _main, the difference is calculated as
"run-vs-link" offset. The env_addr should also be added to the offset
to fix the address.

gd->env_addr
  = (orig env) + ("run-vs-link" offset)   + gd->reloc_off
  = (orig env) + (SYS_TEXT_BASE - _start) + (gd->relocaddr - SYS_TEXT_BASE)
  = (orig env) + (gd->relocaddr - _start)

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
2021-06-28 14:47:10 -04:00
Tom Rini
4d8c21da41 Fixes for 2021.07
-----------------
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7903
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Merge tag 'u-boot-imx-20210625' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2021.07
-----------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7903
2021-06-25 13:33:47 -04:00
Adam Ford
12ef801673 ARM: rmobile: beacon: Set CONFIG_RZ_G2 on Beacon boards
The board detection is incorrectly stating it's an rcar3 variant
instead of an RZ/G2 variant on all the r8a774*1_beacon boards.
Set the flag to correctly display as RZ/G2[M/N/H]

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-06-24 20:22:31 +02:00
Tom Rini
076c7bfb1f global_data: Ensure we have <config.h> when symbols are not in Kconfig yet
All symbols that are defined in Kconfig will always be defined (or not)
prior to preprocessing due to the -include directive while building.
However, symbols which are not yet migrated will only be defined (or
not) once the board config.h is included, via <config.h>.  While the end
goal must be to migrate all symbols, today we have cases where the size
of gd will get mismatched within the build, based on include order.
Mitigate this by making sure that any <asm/global_data.h> that uses
symbols not in Kconfig does start with <config.h>.  Remove this when not
needed.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Huan Wang <alison.wang@nxp.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-23 08:45:03 -04:00
Vignesh Raghavendra
95eca8612b ARM: dts: k3-j7200-common-proc-board-u-boot.dtsi: Fix dtc warnings
Fix following dtc warning by explicitly setting up #size-cells
and #address-cells when overriding node in -u-boot.dtsi

arch/arm/dts/k3-j7200-common-proc-board.dtb: Warning (reg_format):
/bus@100000/bus@28380000/mcu-navss/ringacc@2b800000:reg: property has
invalid length (80 bytes) (#address-cells == 2, #size-cells == 1)

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-06-21 13:18:17 -04:00
Fabio Estevam
31b3829f74 o4-imx-nano: Fix dtc warnings
Remove the LED unit addresses and reg properties to
fix the following dtc build warnings:

arch/arm/dts/o4-imx-nano.dtb: Warning (reg_format): /leds/led@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
...
arch/arm/dts/o4-imx-nano.dtb: Warning (avoid_default_addr_size): /leds/led@0: Relying on default #address-cells value

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Oleh Kravchenko <oleg@kaa.org.ua>
2021-06-21 13:31:40 +02:00
Tom Rini
28afb71646 Merge tag 'u-boot-rockchip-20210618' of https://source.denx.de/u-boot/custodians/u-boot-rockchip into next
- New SoC platform support: rk3568;
- rockchip pcie Code compile issue fix;
- Board fix for rk3399 Khadas Edge;
- Add Rockchip NFC driver;
2021-06-19 08:20:12 -04:00
Michael Walle
82a3c9ef20 net: use the same alias stem for ethernet as linux
Linux uses the prefix "ethernet" whereas u-boot uses "eth". This is from
the linux tree:

$ grep "eth[0-9].*=.*&" arch/**/*dts{,i}|wc -l
0
$ grep "ethernet[0-9].*=.*&" arch/**/*dts{,i}|wc -l
633

In u-boot device trees both prefixes are used. Until recently the only
user of the ethernet alias was the sandbox test device tree. This
changed with commit fc054d563b ("net: Introduce DSA class for Ethernet
switches"). There, the MAC addresses are inherited based on the devices
sequence IDs which is in turn given by the device tree.

Before there are more users in u-boot and both worlds will differ even
more, rename the alias prefix to "ethernet" to match the linux ones.
Also adapt the test cases and rename any old aliases in the u-boot
device trees.

Cc: David Wu <david.wu@rock-chips.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-18 11:29:17 +03:00
Patrick Delaunay
1f2e3d5599 stm32mp: stm32prog: handle dfu error
Handle DFU stack error in STM32CubeProgrammer protocol.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 10:09:41 +02:00
Patrick Delaunay
d4cb402577 stm32mp: stm32prog: change one message level to debug
Move the message "Invalid or missing layout file."
to debug level as it is a normal behavior and not an error
and add the missing '\n'.

This patch avoids the strange trace :
  Boot over usb0!
  Invalid or missing layout file.DFU alt info setting: done

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 10:09:41 +02:00
Patrick Delaunay
69446dee37 stm32mp: stm32prog: use get_cpu_dev for GetID command
Use get_cpu_dev() in uart getID command and remove the defines
DEVICE_ID_BYTE1 and 2 defines.

This patch prepare the support for new SOC family.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 10:09:41 +02:00
Patrick Delaunay
b57efb24c9 stm32mp: stm32prog: correctly handle DM_PMIC
Correctly handle number of alternate when DM_PMIC is not activated.
This patch remove the last UNKNOWN partition in this case.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-06-18 10:09:41 +02:00
Patrick Delaunay
be4182bf23 stm32mp: stm32prog: handle the next phase after USB re-enumeration
Handle the second USB enumeration only when the flashlayout is received
and when phase is PHASE_FLASHLAYOUT. This patch removes the call of
stm32prog_next_phase as it is already done in stm32prog_dfu_init().

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 10:09:41 +02:00
Patrick Delaunay
90ed215dd5 stm32mp: stm32prog: solve compilation with CONFIG_FIT_SIGNATURE
When CONFIG_FIT_SIGNATURE is activated, CONFIG_LEGACY_IMAGE_FORMAT
is deactivated and the define IMAGE_FORMAT_LEGACY don't exist with
include/image.h:
  #if defined(CONFIG_LEGACY_IMAGE_FORMAT)
  #define IMAGE_FORMAT_LEGACY	0x01	/* legacy image_header based format */
  #endif

This patch adds the needed check on compilation flag
CONFIG_LEGACY_IMAGE_FORMAT to avoid the compilation error
for command stm32prog:

cmd_stm32prog.c:81:8: error: ‘IMAGE_FORMAT_LEGACY’ undeclared
(first use in this function); did you mean ‘IMAGE_FORMAT_FIT’?
   81 |    if (IMAGE_FORMAT_LEGACY ==
      |        ^~~~~~~~~~~~~~~~~~~
      |        IMAGE_FORMAT_FIT

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 10:09:41 +02:00
Patrick Delaunay
d68e53b279 stm32mp: stm32prog: add support of initrd in flashlayout
Add the support in command stm32prog of kernel load and start
with initrd file, identify by the partition Type "Binary" in
the flashlayout.tsv, for example:

- 0x01 fsbl	Binary none 0x0 tfa.stm32
- 0x03 fip	Binary none 0x0 fip.bin
P 0x10 kernel System ram0 0xC2000000 uImage.bin
P 0x11 dtb FileSystem ram0 0xC4000000 board.dtb
P 0x12 initrd Binary ram0 0xC4400000 <initrd>

The <initrd> file can be a legacy image "uInitrd", generated
with mkimage, or a RAW initrd image "initrd.gz".

After a DFU detach the bootm command with be executed
with the associated address, for example:

$> bootm 0xC2000000 0xC4400000:<size> 0xC4000000

When the "Binary" partition type is absent, the 'bootm'
command starts the kernel without ramdisk, for example:

$> bootm 0xC2000000 - 0xC4000000

With this paths, it is no more mandatory to generate FIT
including the kernel, DT and initrd:

- 0x01 fsbl Binary none 0x0 tfa.stm32
- 0x03 fip Binary none 0x0 fip.bin
P 0x10 fit System ram0 0xC2000000 fit.bin

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 10:09:41 +02:00
Patrick Delaunay
d4358a648c stm32mp: stm32prog: add timeout in stm32prog_serial_get_buffer
Handle timeout in stm32prog_serial_get_buffer to sent NACK
to STM32CubeProgrammer when the buffer is not fully received.

This patch avoids to reach the STM32CubeProgrammer timeout and
the associated unrecoverable error.

  Timeout error occurred while waiting for acknowledgment.

  Error: Write Operation fails at packet number 4165 at address 0x1044FF

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 10:09:41 +02:00
Patrick Delaunay
5f14e2fe9d stm32mp: stm32prog: remove all the header check for UART download
This patch removes the header check for UART download;
the check of checksum is not mandatory with even parity and chuck
checksum for each 256 received bytes and it is only done for
STM32 image (FSBL = TF-A BL2), not for FIT image.

This patch solve issue of duplicated 0x100 byte written with FIP header.

Fixes: 4fb7b3e108 ("stm32mp: stm32prog: add FIP header support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 10:09:41 +02:00
Joseph Chen
695693b2d0 board: rockchip: Add rk3568 evb support
Add support for rk3568 evaluation board.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-06-18 14:36:24 +08:00
Joseph Chen
2a950e3ba5 rockchip: Add rk3568 architecture core
RK3568 is a high-performance and low power quad-core application
processor designed for personal mobile internet device and AIoT
equipments.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-06-18 14:36:24 +08:00
Joseph Chen
636ffbd25c arm: dts: rockchip: Add dts for rk3568 evb
Add dts for rk3568 evb, sync from the linux kernel
upstream list [0].

[0] https://patchwork.kernel.org/project/linux-rockchip/list/?series=474969

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-06-18 14:36:24 +08:00
Joseph Chen
a4a9ce1660 arm: dts: Sync rockchip-pinconf.dtsi from kernel
Sync from linux kernel:
https://patchwork.kernel.org/project/linux-rockchip/list/?series=474969

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-06-18 14:36:24 +08:00
Elaine Zhang
4a262feba3 rockchip: rk3568: add clock driver
Add rk3568 clock driver and cru structure definition.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-06-18 14:36:06 +08:00
Grzegorz Szymaszek
95a34eb42e arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL
Enable the SDMMC2 device tree node, as well as the pins it uses, in
U-Boot SPL.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 08:34:16 +02:00
Grzegorz Szymaszek
7db3307848 arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
corresponding Linux kernel device tree.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 08:34:16 +02:00
Grzegorz Szymaszek
51a2ac966e arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply
Set the SDMMC2 VQMMC supply to vdd (buck3). Note that in the
corresponding Linux kernel device tree, the supply is set to v3v3
(buck4), which is wrong.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 08:34:16 +02:00
Grzegorz Szymaszek
b1c8ad53f5 arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes
Add the “sdmmc2_d47_pins_d” pins to the SDMMC2 pinctrls. Increase the
bus width from four to eight.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 08:34:16 +02:00
Grzegorz Szymaszek
b40a034a63 arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties
The SDMMC2 interface hosts an eMMC. Replace the interface properties
that would only apply to SD cards—“broken-cd” and “disable-wp”—with
relevant ones: “non-removable”, “no-sd” and “no-sdio”.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 08:34:16 +02:00
Tom Rini
a94b2aad05 First set of u-boot-atmel features for the 2021.10 cycle
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Merge tag 'u-boot-atmel-2021.10-a' of https://source.denx.de/u-boot/custodians/u-boot-atmel into next

First set of u-boot-atmel features for the 2021.10 cycle:

This feature set converts the boards pm9261 and pm9263 Ethernet support
to DM; enables hash command for all SAM boards; fixes the NAND pmecc
bit-flips correction; adds Falcon boot for sama5d3_xplained board; and
other minor adjustments.
2021-06-17 11:46:44 -04:00
Tom Rini
a298d4fbcd Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- fsl-qoriq: Bug fixes related pfe, eth, thermal node, vid.c, cpu release,
  mmc, usb, env, etc for Layerscape boards
- powerpc: Update Maintainers for some boards.
2021-06-17 08:44:56 -04:00
Ran Wang
390c73b417 armv8: Update erratum number to align with doc
Change the USB erratum number A-050106 to A-050204 as A-050106 is
a duplicate and never be published.

Fixes 0cfa00cdb9 (“armv8: Add workaround for USB erratum A-050106”)
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Aleksandar Gerasimovski
a7fd6fa1c2 board/km: add support for expu1 design based on nxp
The EXPU1 design is a new 40G capable ethernet service unit card for
Hitachi-Powergrids wired-com product lines.

The base SoC is same as for already added SELI8 card, consequently the
already added u-boot support for SELI8 is reused.

Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
[Fixed new line error at EOF]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Lasse Klok Mikkelsen
fb6c96f14e arm: dts: ls1021a.dtsi: Fix invalid reg on gpio nodes
Address and size cells on SOC are set to 1. But gpio nodes are specified
with 2 cells. This fixes the gpio nodes to correct cells.

Signed-off-by: Lasse Klok Mikkelsen <lkmi@prevas.dk>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Yangbo Lu
38d1a18750 arm: dts: lx2162aqds: support eMMC HS400 mode on esdhc1
Add properties related to eMMC HS400 mode for esdhc1.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Chaitanya Sakinam
ff64e9a9f0 armv8: ls1012a: Pass PPFE firmware to Linux through FDT
Read Linux PPFE firmware from flash partition and pass it to Linux through
FDT entry. So that we can avoid placing PPFE firmware in Linux rootfs.
(FDT may increase at max by 64KB)

Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Signed-off-by: Anji J <anji.jagarlmudi@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Yangbo Lu
addec3511f armv8: layerscape: enable eMMC HS400 workarounds for LX2160A/LX2162A
Enable eMMC HS400 workarounds for LX2160A/LX2162A.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Jiafei Pan
84c2e044a9 armv8: layerscape: add PSCI support for cpu release
For cpu release command, check whether PSCI is supported firstly,
if supported, use PSCI to kick off secondary cores, otherwise still
use spin table.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
[Fixed checkpatch alignment CHECKs]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Tom Rini
b2c4b7f665 u-boot-imx-20210616
-------------------
 
 - imxrt : fixes, USB, imxrt1020-evk
 - imx8m:
 	fix for verdin-imx8mm
 	Add conga-QMX8 board
 - imx6 :
 	documentation for pico-imx6:
 	Add SeeedStudio NPI-IMX6ULL Support
 	ventana: DM PCI
 - imx7d:
 	added SMEGW01 board
 
 CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7765
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Merge tag 'u-boot-imx-20210616' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20210616
-------------------

- imxrt : fixes, USB, imxrt1020-evk
- imx8m:
	fix for verdin-imx8mm
	Add conga-QMX8 board
- imx6 :
	documentation for pico-imx6:
	Add SeeedStudio NPI-IMX6ULL Support
	ventana: DM PCI
- imx7d:
	added SMEGW01 board

CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7765
2021-06-16 11:18:11 -04:00
Michael Walle
2bf4658b8c board: sl28: fix RGMII clock and voltage
It was noticed that the clock isn't continuously enabled when there is
no link. This is because the 125MHz clock is derived from the internal
PLL which seems to go into some kind of power-down mode every once in a
while. The LS1028A expects a contiuous clock. Thus enable the PLL all
the time.

Also, the RGMII pad voltage is wrong, it was configured to 2.5V (that is
the VDDH regulator). The correct voltage is 1.8V, i.e. the VDDIO
regulator.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-16 18:14:08 +05:30
Vignesh Raghavendra
2af181b53e ARM: dts: k3: Add cfg register space for ringacc and udmap
R5 SPL needs access to cfg space of Rings and UDMAP, therefore add RING
CFG, TCHAN CFG and RCHAN CFG address ranges.
Note that these registers are present within respective IPs but are
not populated in Linux DT nodes (as they are configured via TISCI APIs)
and hence are added to -u-boot.dtsi for now.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210607141753.28796-6-vigneshr@ti.com
2021-06-11 19:18:52 +05:30
Vignesh Raghavendra
00d6fc9c71 ARM: dts: j72xx-r5-common-proc-board: Add DM firmware node
Add DM firmware node which will provide DM services during R5 SPL stage.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210607141753.28796-5-vigneshr@ti.com
2021-06-11 19:18:52 +05:30
Tom Rini
c4737cd594 Xilinx changes for v2021.07-rc5
zynqmp:
 - Fix ANALOG_BUS value after powerup
 - Disable EFI_CAPSULE_ON_DISK_EARLY
 
 zynqmp-gqspi:
 - Fix write issue
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Merge tag 'xilinx-for-v2021.07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2021.07-rc5

zynqmp:
- Fix ANALOG_BUS value after powerup
- Disable EFI_CAPSULE_ON_DISK_EARLY

zynqmp-gqspi:
- Fix write issue
2021-06-11 08:29:34 -04:00
Tero Kristo
bb318d8dc8 arm: dts: k3-j72xx: correct MCU timer1 frequency
MCU timer1 is used as the tick timer for MCU R5 SPL, and the
clock-frequency defined in DT appears to be incorrect at the moment.
Actual clock source for the timer is MCU_SYSCLK0 / 4 which is 250MHz.

Earlier setup of 25MHz went unnoticed, as there was a separate issue
with omap-timer, which caused an error to the clock by a factor of 8
with j7 devices. This problem surfaced once the omap-timer was fixed.

Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Dave Gerlach
61305e00c7 arm: mach-k3: j721e_init: Force early probe of clk-k3 driver
Force the clk-k3 driver to probe early during R5 SPL boot to ensure the
default system clock configuration is completed. Many other drivers
assume a default state of the clock tree and it is currently possible
for them to probe before clk-k3 depending on the exact system
configuration.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reported-by: Keerthy <j-keerthy@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Tero Kristo
925698daac arm: mach-k3: sysfw-loader: pass boardcfg to sciserver
Copy the contents of the board config loaded from sysfw.itb into an
EXTBOOT shared memory buffer that gets passed to sciserver. This only
needs to be done if EXTBOOT area has not been populated by ROM code yet.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Dave Gerlach
7acd4d7142 arm: mach-k3: common: Drop main r5 start
Only start-up the non-linux remote cores if we are running in legacy
boot mode. HSM rearch is not yet supporting this.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Tero Kristo
0714580346 arm: mach-k3: do board config for PM only if supported
If the raw PM support is built in, we are operating in the split
firmware approach mode where PM support is not available. In this
case, skip the board config for this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Tero Kristo
547b277cd9 arm: mach-k3: add support for detecting firmware images from FIT
Add callback routines for parsing the firmware info from FIT image, and
use the data to boot up ATF and the MCU R5 firmware.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Dave Gerlach
277729eaf3 arm: mach-k3: Add platform data for j721e and j7200
Add platform clock and powerdomain data for J721e and J7200. This data
is used by the corresponding drivers to register all the required device
clocks and powerdomains.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Tero Kristo
df5363a67f tools: k3_fit_atf: add DM binary to the FIT image
Add DM (device manager) firmware image to the fit image that is loaded by
R5 SPL. This is needed with the HSM rearch where the firmware allocation
has been changed slightly.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30