Commit graph

14490 commits

Author SHA1 Message Date
Angelo Dureghello
1f15cb8f5b drivers: esdhc: add support for ColdFire mcf5441x family
This patch has been tested on the mcf54415-based stmark2
board. The eSDHC driver works reliably using DMA mode.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2019-01-26 08:13:56 -05:00
Andrew F. Davis
2d59ec8482 dfu: Make DFU support more SPL friendly
Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code.
This ensures the files and features are only built into the right build
for which they are enabled. Using the macros to simplify this patch was
made possible by the config symbol rename done in the last patch.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2019-01-26 08:13:55 -05:00
Andrew F. Davis
6536ca4d66 spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFU
The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same
meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT
to allow for cleaner use in code.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2019-01-26 08:13:54 -05:00
Fabien Parent
70dbbd7269 mmc: mtk-sd: fix SPL compilation when GPIO=y and SPL_GPIO=n
It is not possible to link the SPL image when CONFIG_GPIO is enabled
but CONFIG_SPL_GPIO is not.  Use the IS_ENABLED macro instead to
correctly check whether CONFIG_{SPL_}GPIO is enabled.

This commit fixes the following errors:
	* undefined reference to `dm_gpio_get_value
	* undefined reference to `gpio_request_by_name'

Signed-off-by: Fabien Parent <fparent@baylibre.com>
[trini: Move guard to fix warning in msdc_ops_get_wp()]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-26 08:13:54 -05:00
Fabien Parent
924ed344a7 mmc: mtk-sd: fix possible incomplete read ops
The code is checking for incomplete read when it see the INT_XFER_COMPL
flag, but it forget to first check whether there is anything left in the
FIFO to copy to the RX buffer. This means that sometimes we will get
errors because of erroneous incomplete read operation.

This commit fixes the driver re-ordering the code so that we first
check for data inside the RX fifo and only after check the status
of the INT_XFER_COMPL flag.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2019-01-26 08:13:54 -05:00
Shawn Guo
94f139a9ce mmc: hi6220_dw_mmc: add compatible for Poplar support
It adds compatible "hisilicon,hi3798cv200-dw-mshc" for Poplar SoC
Hi3798CV200 to probe this mmc driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-01-25 12:12:57 -05:00
Tom Rini
87f78478a4 Merge tag 'arc-fixes-for-2019.04-rc1' of git://git.denx.de/u-boot-arc
A couple of trivial fixes and improvements for ARC

Most notable are:
 * Move of ENV_SIZE/ENV_OFFSET to Kconfig
 * Fix with private structure allocation for arc_uart
 * Definition of CONFIG_SYS_CACHELINE_SIZE useful for building drivers
2019-01-25 10:41:24 -05:00
Alexey Brodkin
d771dd531a serial_arc: Allocate buffer for private data
Apparently we never allocated buffer for arc_serial_platdata
which for some reason never caused problems when executed in nSIM.
But in Qemu this causes expected problems.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-01-25 08:40:26 +03:00
Tom Rini
d01806a8fc Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2019-01-24 15:30:48 -05:00
Tom Rini
68489ed037 Merge branch 'master' of git://git.denx.de/u-boot-net 2019-01-24 15:30:06 -05:00
Valentin-catalin Neacsu
91c9cbabf9 net: phy: aquantia: Print information on config
Print information about Aquantia system interface and firmware loaded
on the phy.

Signed-off-by: Valentin Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:30 -06:00
Valentin-catalin Neacsu
c54bfbf96f net: phy: aquantia: Enable autoneg when on USXGMII
If System Interface protocol is USXGMII then enable USXGMII autoneg

Signed-off-by: Valentin Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:30 -06:00
Chris Packham
67bb984249 net: remove CONFIG_MCAST_TFTP
No mainline board enables CONFIG_MCAST_TFTP and there have been
compilation issues with the code for some time. Additionally, it has a
potential buffer underrun issue (reported as a side note in
CVE-2018-18439).

Remove the multicast TFTP code but keep the driver API for the future
addition of IPv6.

Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:30 -06:00
Chris Packham
1a4af5c562 net: move ether_crc to tsec driver
ether_crc was added to the core net code in commit 53a5c424bf
("multicast tftp: RFC2090") so that other drivers could use it. However
the only current user of it is tsec.c so move it there.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:29 -06:00
Carlo Caione
e57c9fdb04 net: phy: realtek: Add functions to read PHY's extended registers
According to the datasheet to access the extended registers we have to:

1. Write Register 31 Data = 0x0XYZ (Page 0xXYZ)
2. Read/Write the target Register Data
3. Write Register 31 Data = 0x0000 or 0xa42 (switch back to IEEE
   Standard Registers)

Hook the missing functions so that we can use the `mdio rx/wx` command to
easily access the extended registers.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:29 -06:00
Ramon Fried
9043c4e0fc net: macb: fix mapping of registers
Some architectures (MIPS) needs mapping to access IOMEM.
Fix that.

Fixes: f1dcc19b21 ("net: macb: Convert to driver model")

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:29 -06:00
Aditya Prayoga
18bfc8fa84 net: mvneta: Add GPIO configuration support
This patch add GPIO configuration support in mvneta driver.
Driver will handle PHY reset. GPIO pins should be set in device tree.

Ported from mvpp2x
[https://patchwork.ozlabs.org/patch/799654/]

Initial discussion to port the changes into mvneta
[https://patchwork.ozlabs.org/patch/1005765/]

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:29 -06:00
Chris Packham
92f129f4a0 net: mvgbe: fallback phy-mode to GMII
Some existing device trees don't specify a phy-mode so fallback to GMII
when a phy-mode is not provided.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:29 -06:00
Andreas Pretzsch
3b4cda34d4 net: phy: micrel: fix KSZ9031 clock skew for values greater 0ps
For KSZ9021, all skew register fields are 4-bit wide.
For KSZ9031, the clock skew register fields are 5-bit wide.

The common code in ksz90x1_of_config_group calculating the combined
register value checks if the requested value is above the maximum
and uses this maximum if so. The calculation of this maximum uses
the register width, but the check itself does not. It uses a hardcoded
value of 0xf, which is too low in case of the 5-bit clock (0x1f).
This detail was probably lost during driver unification.

Effect (only for KSZ9031 clock skews): For values greater 900 (== 0ps),
this silently results in 1860 (== +960ps) instead of the requested one.

Fix the check by using the bit width instead of hardcoded value(s).

Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:28 -06:00
Baruch Siach
21586cdd50 net: mvpp2: mdio device per port
Current code forces all ports on a given Ethernet device to use the same
mdio device. In practice different ports might be wired to separate mdio
devices. Move the mdio device from the container struct mvpp2 to the per
port struct mvpp2_port.

Cc: Ken Ma <make@marvell.com>
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:28 -06:00
Baruch Siach
acce753dfb net: mvpp2: fix lookup of mdio registers base address
Current mdio base lookup code relies on a 'reg' property at the upper CP
node. There is no 'reg' property there in current DT files of Armada
CP110. Use ofnode_get_addr() instead since it provides proper DT address
translation.

Cc: Ken Ma <make@marvell.com>
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:27 -06:00
Simon Goldschmidt
7efb75b114 net: designware: clear padding bytes
Short frames are padded to the minimum allowed size of 60 bytes.
However, the designware driver sends old data in these padding bytes.
It is common practice to zero out these padding bytes ro prevent
leaking memory contents to other hosts.

Fix the padding code to zero out the padded bytes at the end.

Tested on socfpga gen5.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:27 -06:00
Simon Goldschmidt
ae8ac8d423 net: designware: fix tx packet length
The designware driver has a bug in setting the tx length into the dma
descriptor: it always or's the length into the descriptor without
zeroing out the length mask before.

This results in occasional packets being transmitted with a length
greater than they should be (trailer). Due to the nature of Ethernet
allowing such a trailer, most packets seem to be parsed fine by remote
hosts, which is probably why this hasn't been noticed.

Fix this by correctly clearing the size mask before setting the new
length.

Tested on socfpga gen5.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-24 11:35:27 -06:00
Pankaj Bansal
b3eabd82f2 net: phy: Add clause 45 identifier to phy_device
The phy devices can be accessed via clause 22 or via clause 45.
This information can be deduced when we read phy id. if the phy id
is read without giving any MDIO Manageable Device Address (MMD), then
it conforms to clause 22. otherwise it conforms to clause 45.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 11:35:26 -06:00
Michal Simek
84de0f9188 i2c: cdns: Convert to livetree function
Update cadence i2c driver to support livetree
Similar changes were done by:
"net: zynq_gem: convert to use livetree"
(sha1: 26026e695a)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:45 +01:00
Luca Ceresoli
8df324a20b fpga: zynqmp: show an error message when FPGA programming fails
When FPGA programming fails, it does so silently, unless debugging
code is enabled. This makes it hard to detect problems in production
environments.

Print the error message unconditionally so the error doesn't go
unnoticed.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:43 +01:00
Siva Durga Prasad Paladugu
c256d3f7c5 net: phy: Move fixed link code to separate routine
This patch moves fixed-link functionality code to a separate
routine inorder to make it more modular and cleaner.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24 10:03:43 +01:00
Stefan Theil
1059858061 zynq-gem: Use appropriate cache flush/invalidate for RX and TX
The cache was only flushed before *transmitting* packets, but not
when receiving them, leading to an issue where new packets were
handed to the receive handler with old contents in cache. This
only happens when a lot of packets are received without sending
packages every now and then. Also flushing the receive buffers
in the transmit function makes no sense and can be removed.

Signed-off-by: Stefan Theil <stefan.theil@mixed-mode.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:42 +01:00
Michal Simek
25aed77f51 mmc: zynq: Remove unused pwrseq variable
This variable was incorrectly added by:
"mmc: zynq_sdhci: Add support for SD3.0"
(sha1: d1f4e39d58)
which had nothing to do with MMC power sequence provider.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:42 +01:00
T Karthik Reddy
97fca6a146 mtd: nand: arasan_nfc: Add support for nand multi chip select
This patch adds support for nand multi chip select.
Also adding CONFIG_SYS_NAND_MAX_CHIPS to Kconfig to specify maximum number
of nand chips.

Signed-off-by: Tummala Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:42 +01:00
Horatiu Vultur
5c31ce36e3 pinctrl: mscc: Add gpio and pinctrl for Serval SoC family.
The Serval SoC family has 32 pins. Currently there is no
support for Serval in Linux kernel.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23 18:28:09 +01:00
Horatiu Vultur
177c07f829 pinctrl: mscc: Add gpio and pinctrl for Servalt SoC family.
The Servalt SoC family has 36 pins. Currently there is not support
for Servalt pinctrl in Linux kernel.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23 18:27:26 +01:00
Gregory CLEMENT
c8546163fa net: add MSCC Ocelot switch support
This patch adds support for the Microsemi Ethernet switch present on
Ocelot SoCs.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23 18:26:44 +01:00
Tom Rini
e8ddbefccd Merge git://git.denx.de/u-boot-marvell
- Sync Armada-38x dts with Linux 4.20 from Chris
- Misc changes and enhancements to Turris Mox (v4) from Marek
- Reserve PSCI area for Armada 8k from Heinrich
- New Allied Telesis x530 board (Armada-385) from Chris
- Misc minor changes (defconfig etc)
2019-01-21 11:59:21 -05:00
Derald D. Woods
49ad40298c ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
This commit converts the following items to Kconfig:

CONFIG_ATMEL_NAND_HWECC
CONFIG_ATMEL_NAND_HW_PMECC
CONFIG_PMECC_CAP
CONFIG_PMECC_SECTOR_SIZE
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER

[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap

[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.html

Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment")
[trini: Make the migration be size neutral and possibly not fix the
above in all cases]
Reported-by: Daniel Evans <photonthunder@gmail.com>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-21 08:36:11 -05:00
Marek Behún
7b03e9969c watchdog: armada_37xx: Fix compliance with kernel's driver
The Armada 37xx watchdog driver was recently accepted for mainline
kernel by watchdog subsystem maintainer, but the driver works a little
different than the one in U-Boot. This patch fixes this.

In the previous implementation there was a tiny period of time when the
watchdog was disabled and the system was vulnerables - this was during
pinging, which was done by disabling, setting, and enabling the counter.

Now pinging is done without disabling the watchdog. We use 2 counters:
Counter 1 is the watchdog counter - on expiry, the system is reset.
Counter 0 is used to reset Counter 1 to start counting from the set
timeout again. So Counter 1 is set to be reset on Counter 0 expiry event
event and pinging is done by forcing an immediate expiry event on
Counter 0.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21 11:39:49 +01:00
Philipp Tomsich
2acc24fc28 Kconfig: Migrate BOUNCE_BUFFER
The bounce buffer is used by a few drivers (most of the MMC drivers)
to overcome limitations in their respective DMA implementation.

This moves the configuration to Kconfig and makes it user-selectable
(even though it will be a required feature to make those drivers
work): the expected usage is for drivers depending on this to 'select'
it unconditionally from their respective Kconfig (see follow-up
patches).

This commit includes a full migration using moveconfig.py to ensure
that each commit compiles.  To ensure bisectability we update
dependencies of various drivers to now select BOUNCE_BUFFER when needed.

[trini: Squash all patches to ensure bisectability]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion]
Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion]
Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
2019-01-19 09:49:26 -05:00
Tom Rini
77c07e7ed3 Add TFA boot flow for more boards
Add TFA boot defconfig for ls1088a and ls2088a.
 Add dts fixup for PCIe endpoint and root complex.
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Merge tag 'fsl-qoriq-for-v2019.04-rc1' of git://git.denx.de/u-boot-fsl-qoriq

Add TFA boot flow for more boards

Add TFA boot defconfig for ls1088a and ls2088a.
Add dts fixup for PCIe endpoint and root complex.
2019-01-18 23:11:51 -05:00
Jagan Teki
543049ab59 usb: host: Drop [e-o]hci-sunxi drivers
Now Allwinner platform is all set to use Generic USB
controller drivers, so remove the legacy sunxi drivers.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
29d280c88a sunxi: usb: Switch to Generic host controllers
Onc of key blocker for using USB Generic host controller
drivers in Allwinner are CLK and RESET drivers, now these
available for USB usage.

So switch sunxi USB use EHCI and OHCI Generic controllers.

Enabling USB is wisely a board choise, So Enable USB_OHCI_HCD
where it already have USB_EHCI_HCD

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
b9aa0a9332 musb-new: sunxi: Use CLK and RESET support
Now clock and reset drivers are available for respective
SoC's so use clk and reset ops on musb driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-01-18 22:19:09 +05:30
Jagan Teki
089ffd0aed phy: sun4i-usb: Use CLK and RESET support
Now clock and reset drivers are available for respective
SoC's so use clk and reset ops on phy driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-01-18 22:19:09 +05:30
Jagan Teki
6901aab8e3 clk: sunxi: Add Allwinner A80 CLK driver
Add initial clock driver for Allwinner A80.

- Implement UART bus clocks via ccu_clk_gate table for
  A80, so it can accessed in common clk enable and disable
  functions from clk_sunxi.c
- Implement UART bus resets via ccu_reset table for A80,
  so it can accessed in common reset deassert and assert
  functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
337fcdc06b clk: sunxi: Add Allwinner H6 CLK driver
Add initial clock driver for Allwinner H6.

- Implement UART bus clocks via ccu_clk_gate table for
  H6, so it can accessed in common clk enable and disable
  functions from clk_sunxi.c
- Implement UART bus resets via ccu_reset table for H6,
  so it can accessed in common reset deassert and assert
  functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
8606f960d4 clk: sunxi: Implement UART resets
Implement UART resets for all relevant Allwinner SoC
clock drivers via ccu reset table.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
4acc711930 clk: sunxi: Implement UART clocks
Implement UART clocks for all Allwinner SoC
clock drivers via ccu clock gate table.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
6239a6d092 clk: sunxi: Add Allwinner V3S CLK driver
Add initial clock driver for Allwinner V3S.

- Implement USB bus and USB clocks via ccu_clk_gate table
  for V3S, so it can accessed in common clk enable and disable
  functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
  for V3S, so it can accessed in common reset deassert
  and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
78eb2a41f3 clk: sunxi: Add Allwinner R40 CLK driver
Add initial clock driver for Allwinner R40.

- Implement USB bus and USB clocks via ccu_clk_gate
  for R40, so it can accessed in common clk enable
  and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
  for R40, so it can accessed in common reset deassert
  and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
03d87f5909 clk: sunxi: Add Allwinner A83T CLK driver
Add initial clock driver for Allwinner A83T.

- Implement USB bus and USB clocks via ccu_clk_gate table
  for A83T, so it can accessed in common clk enable and
  disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
  for A83T, so it can accessed in common reset deassert
  and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
3ab029368a clk: sunxi: Add Allwinner A23/A33 CLK driver
Add initial clock driver for Allwinner A23/A33.

- Implement USB bus and USB clocks via ccu_clk_gate table
  for A23/A33, so it can accessed in common clk enable and
  disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
  for A23/A33, so it can accessed in common reset deassert
  and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
4927e2e8d3 clk: sunxi: Add Allwinner A31 CLK driver
Add initial clock driver for Allwinner A31.

- Implement USB ahb1 and USB clocks via ccu_clk_gate table
  for A31, so it can accessed in common clk enable and disable
  functions from clk_sunxi.c
- Implement USB ahb1 and USB resets via ccu_reset table
  for A31, so it can accessed in common reset deassert
  and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
c8e743c1e8 clk: sunxi: Add Allwinner A10s/A13 CLK driver
Add initial clock driver for Allwinner A10s/A13.

- Implement USB ahb and USB clocks via ccu_clk_gate table
  for A10s/A13, so it can accessed in common clk enable and
  disable functions from clk_sunxi.c
- Implement USB resets via ccu_reset table for A10s/A13,
  so it can accessed in common reset deassert and assert
  functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:08 +05:30
Jagan Teki
6590bd8c47 clk: sunxi: Add Allwinner A10/A20 CLK driver
Add initial clock driver for Allwinner A10/A20.

- Implement USB ahb and USB clocks via ccu_clk_gate table
  for A10/A20, so it can accessed in common clk enable and
  disable functions from clk_sunxi.c
- Implement USB resets via ccu_reset table for A10/A20,
  so it can accessed in common reset deassert and assert
  functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:08 +05:30
Jagan Teki
e945816efb clk: sunxi: Add Allwinner H3/H5 CLK driver
Add initial clock driver for Allwinner H3/H5.

- Implement USB bus and USB clocks via ccu_clk_gate table for
  H3/H5, so it can accessed in common clk enable and disable
  functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table for
  H3/H5, so it can accessed in common reset deassert and assert
  functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:08 +05:30
Jagan Teki
99ba430870 reset: Add Allwinner RESET driver
Add common reset driver for all Allwinner SoC's.

Since CLK and RESET share common DT compatible, it is CLK driver
job is to bind the reset driver. So add CLK bind call on respective
SoC driver by passing ccu map descriptor so-that reset deassert,
deassert operations held based on ccu reset table defined from
CLK driver.

Select DM_RESET via CLK_SUNXI, this make hidden section of RESET
since CLK and RESET share common DT compatible and code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:08 +05:30
Jagan Teki
0d47bc7056 clk: Add Allwinner A64 CLK driver
Add initial clock driver for Allwinner A64.

Implement USB clock enable and disable functions for
OHCI, EHCI, OTG and USBPHY gate and clock registers
via ccu clk gate table.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:08 +05:30
Chris Packham
8e34c1d34a video: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-18 09:16:15 -05:00
Chris Packham
cb4d1bbe51 pinctrl: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18 09:16:15 -05:00
Chris Packham
7475145449 i2c: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2019-01-18 09:16:15 -05:00
Chris Packham
83e7a4d597 drivers: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18 09:16:15 -05:00
Tom Rini
f83ef0dac8 - MIPS: mscc: various enhancements for Luton and Ocelot platforms
- MIPS: mscc: added support for Jaguar2 platform
 - MIPS: optimised SPL linker script
 - MIPS: bcm6368: fix restart flow issues
 - MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards
 - MIPS: mt7688: small fixes and enhancements
 - mmc: compile-out write support if disabled
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Merge tag 'mips-pull-2019-11-16' of git://git.denx.de/u-boot-mips

- MIPS: mscc: various enhancements for Luton and Ocelot platforms
- MIPS: mscc: added support for Jaguar2 platform
- MIPS: optimised SPL linker script
- MIPS: bcm6368: fix restart flow issues
- MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards
- MIPS: mt7688: small fixes and enhancements
- mmc: compile-out write support if disabled
2019-01-17 19:12:55 -05:00
Xiaowei Bao
59a557f360 pci: layerscape: Add the dts fixup for EP and RC
Add the dts fixup when PCI controller work diffferent mode.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:17:40 -08:00
Xiaowei Bao
87e0d2b9ac pci: layerscape: Do not scan when PEX work in EP mode
Don't scan the bus when the PEX work in EP mode.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:17:33 -08:00
Xiaowei Bao
5bd3c9d556 pci: layerscape: Modify the EP and RC mode judge method
Modify the RC and EP mode judge method, save the mode as a variable,
the variable will be used by other function.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:17:28 -08:00
Yinbo Zhu
7a0425dd96 mmc: fsl_esdhc: make get_cd work well in dm_mmc_ops
This patch is to make get_cd work well when DM_MMC enabled

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:17:10 -08:00
Mian Yousaf Kaukab
7e96804975 fsl-layerscape: dpaa: fix fsl-mc status in fdt with bootefi
fsl-mc lazyapply command applies dpl from efi_exit_boot_services().
Status of fsl-mc node in working fdt is updated at this stage.
However, an efi application like grub may already have copied the fdt.
So the updates to fdt done at efi_exit_boot_services() may not be
visible to the OS. Fix it by updating fdt earlier if fsl-mc lazyapply
command is used.

Fixes: b7b8410a8f (ls2080: Exit dpaa only right before exiting U-Boot)
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:16:49 -08:00
Rajesh Bhagat
bf0f791087 drivers: ifc: restore the legacy flow for IFC config
Restore the legacy flow along with TFABOOT flow for
IFC configuration.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:15:53 -08:00
Stefan Agner
a38c3af868 mtd: nand: raw: allow to disable unneeded ECC layouts
Each ECC layout consumes about 2984 bytes in the .data section. Allow
to disable the default ECC layouts if a driver is known to provide its
own ECC layout.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-01-16 16:14:45 -05:00
Horatiu Vultur
051de9b3eb pinctrl: mscc: Add gpio and pinctrl for Jaguar2 SOC family
The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common
to support new numbe of pins and remove any platform dependency from
mscc-common.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16 13:56:43 +01:00
Lars Povlsen
ace9c103df mips: gpio: mscc: Obsoleted gpio-mscc-bitbang-spi.c
With the new mscc_bb_spi.c driver, there is no longer use for the
gpio-mscc-bitbang-spi.c driver.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16 13:56:43 +01:00
Lars Povlsen
fd6e0b0525 mips: spi: mscc: Add fast bitbang SPI driver
This patch add a new SPI driver for MSCC SOCs that does not sport the
designware SPI hardware controller.

Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16 13:56:43 +01:00
Ezequiel Garcia
82d5464788 mmc: jz_mmc: Compile-out write support if disabled
Do not build write support, unless it's enabled.

In the SPL case, this change will typically remove
precious bytes (as write support is most often
not needed in SPL).

This is important on this platform, where the maximum
SPL size is 14 KiB.

With gcc v7.3, this change saves 144 bytes producing:

size spl/u-boot-spl
   text	   data	    bss	    dec	    hex	filename
   9240	    752	    712	  10704	   29d0	spl/u-boot-spl

To make the code easier to compile-out and more
readable, a pair of read_data/write_data helpers are created.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16 13:56:43 +01:00
Ezequiel Garcia
2a4bb3d271 mmc: Use proper IS_ENABLED macro to check block support
Use CONFIG_IS_ENABLED(BLK) instead of CONFIG_BLK,
in order to fix the following build issues when
CONFIG_SPL_MMC_WRITE is selected:

drivers/mmc/mmc_write.c:69:7: error: conflicting types for 'mmc_berase'
 ulong mmc_berase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt)
       ^~~~~~~~~~
In file included from drivers/mmc/mmc_write.c:15:0:
drivers/mmc/mmc_private.h:39:7: note: previous declaration of 'mmc_berase' was here
 ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt);
       ^~~~~~~~~~
drivers/mmc/mmc_write.c:187:7: error: conflicting types for 'mmc_bwrite'
 ulong mmc_bwrite(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
       ^~~~~~~~~~
In file included from drivers/mmc/mmc_write.c:15:0:
drivers/mmc/mmc_private.h:37:7: note: previous declaration of 'mmc_bwrite' was here
 ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
       ^~~~~~~~~~

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16 13:56:43 +01:00
Álvaro Fernández Rojas
a4ae422570 net: bcm6368: fix restart flow issues
Correctly enable/disable bcm6368-net controller to avoid flow issues.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16 13:56:43 +01:00
Lars Povlsen
be8313feee mips: mscc_sgpio: Add the MSCC serial GPIO device (SIO)
This add support for the the MSCC serial GPIO driver in MSCC
VCoreIII-based SOCs.

By using a serial interface, the SIO controller significantly extends
the number of available GPIOs with a minimum number of additional pins
on the device. The primary purpose of the SIO controller is to connect
control signals from SFP modules and to act as an LED controller.

This adds the base driver.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2019-01-16 13:56:43 +01:00
Tom Rini
aac0c29d4b Fix recent changes to serial API for driver model
Buildman clang support and a few fixes
 Small fixes to 'dm tree' and regmap test
 Improve sandbox build compatibility
 A few other minor fixes
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Merge tag 'dm-pull-15jan19' of git://git.denx.de/u-boot-dm

Fix recent changes to serial API for driver model
Buildman clang support and a few fixes
Small fixes to 'dm tree' and regmap test
Improve sandbox build compatibility
A few other minor fixes
2019-01-15 22:05:34 -05:00
Tom Rini
f4cfd73943 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2019-01-15 22:05:28 -05:00
Tien Fong Chee
31a2cf1ca4 misc: fs_loader: Switching private data allocation to DM auto allocation
Switching private data manual allocation to driver model auto allocation
so users no longer need to deallocate themself because this would be
deallocated by driver model when the device is no longer required.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-15 15:28:54 -05:00
Marek Vasut
2e89bbefdc blk: Increase cache element size
Cache up to 4 kiB entries. 4 kiB is the default block size on ext4, yet
the underlying block layer devices usually report support for 512B . In
most cases, the 512B support is emulated (ie. SD cards, SSDs, USB sticks
etc.) and the real block size of those devices is much bigger.

To avoid performance degradation with such devices and FS setup, bump
the maximum cache entry size to 4 kiB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-01-15 15:28:53 -05:00
Simon Goldschmidt
c4448bdc4f serial: ns16550: fix debug uart putc called before init
If _debug_uart_putc() is called before _debug_uart_init(), the
ns16550 debug uart driver hangs in a tight loop waiting for the
tx FIFO to get empty.

As this can happen via a printf sneaking in before the port calls
debug_uart_init(), introduce a config option to ignore characters
before the debug uart is initialized.

This is done by reading the baudrate divisor and aborting if is zero.

The Kconfig option is required as reading the baudrate divisor does
not seem to work for all ns16500 compatibles (which is why the last
attempt on this has been reverted in 1a67969a99).

Tested on socfpga_cyclone5_socrates.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-15 15:28:52 -05:00
Simon Goldschmidt
7828e3cf70 drivers: serial: DEBUG_UART_SKIP_INIT depends on DEBUG_UART
DEBUG_UART_SKIP_INIT is used only by debug UART and thus should depend
on DEBUG_UART.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-15 15:28:52 -05:00
Marek Vasut
b9a2a0e2e9 mmc: Add support for downgrading HS200/HS400 to HS mode
The mmc_select_mode_and_width() function can be called while the card
is in HS200/HS400 mode and can be used to downgrade the card to lower
mode, e.g. HS. This is used for example by mmc_boot_part_access_chk()
which cannot access the card in HS200/HS400 mode and which is in turn
called by saveenv if env is in the MMC.

In such case, forcing the card clock to legacy frequency cannot work.
Instead, the card must be switched to HS mode first, from which it can
then be reprogrammed as needed.

However, this procedure needs additional code changes, since the current
implementation checks whether the card correctly switched to HS mode in
mmc_set_card_speed(). The check only expects that the card will be going
to HS mode from lower modes, not from higher modes, hence add a parameter
which indicates that the HS200/HS400 to HS downgrade is happening. This
makes the code send the switch command first, reconfigure the controller
next and finally perform the EXT_CSD readback check. The last two steps
cannot be done in reverse order as the card is already in HS mode when
the clock are being switched on the controller side.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2019-01-15 15:28:42 -05:00
Manivannan Sadhasivam
6240e64f92 mmc: Convert HI6220 MMC driver to driver model
Convert HiSilicon HI6220 MMC driver based on DWMMC IP to driver
model.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Enable this on poplar]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-15 15:28:10 -05:00
Michal Simek
1d7b6a5c4f i2c: Reflect correct dependency for !DM cadence driver
Setup proper DM_I2C dependency.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-15 09:06:46 +01:00
Michal Simek
58dc4a99b7 i2c: mux: Covert to livetree functions
Updates i2c muxes drivers to support livetree.
Similar changes were done by:
"net: zynq_gem: convert to use livetree"
(sha1: 26026e695a)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-15 09:06:28 +01:00
Tomasz Gorochowik
f48ef0d81a i2c: i2c-cdns: Use proper input frequency
This is needed to properly calculate i2c bus speed divisors.

Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-15 09:04:49 +01:00
Marek Vasut
ad827a500b i2c: xiic: Add Xilinx AXI I2C driver
Add Xilinx AXI I2C controller driver based on the Linux i2c-xiic driver.
This driver is stripped of all the IRQ handling and uses pure polling,
yet tries to retain most of the structure of the Linux driver to make
backporting of fixes easy.

Note that the IP has a known limitation on 255 bytes read and write,
according to xilinx this is still being worked on [1].

[1] https://forums.xilinx.com/t5/Embedded-Processor-System-Design/AXI-IIC-V2-0-I2C-Master-Reading-multiple-bytes-from-I2C-slave/m-p/854419/highlight/true#M39387

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-01-15 09:04:49 +01:00
Simon Glass
a61cbad78e dm: serial: Adjust serial_getinfo() to use proper API
All driver-model functions should have a device as the first parameter.
Update this function accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
2019-01-14 17:47:13 -07:00
Simon Glass
3de04e771c dm: serial: Adjust serial_setconfig() to use proper API
All driver-model functions should have a device as the first parameter.
Update this function accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
2019-01-14 17:47:13 -07:00
Simon Glass
67d1b05130 dm: serial: Adjust serial_getconfig() to use proper API
All driver-model functions should have a device as the first parameter.
Update this function accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
2019-01-14 17:47:13 -07:00
Simon Glass
8405452e6a net: Fix error handling in sb_eth_raw_ofdata_to_platdata()
At present this stores the error number in an unsigned int so an error is
never detected. Use the existing signed variable instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-14 17:47:13 -07:00
Simon Glass
54d2cfe6ee dm: Tidy up 'dm tree' output when there are many devices
At present the 'Index' column assumes there is only one digit. But on some
devices (e.g. snow) there are a lot of regulators and GPIO banks. Adjust
the output to allow for two digits without messing up the display.

Also capatalise the heading to match.

Fixes: 5197dafc42 (dm: core: Widen the dump tree to show more of the
driver's name.)

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Liviu Dudau <liviu.dudau@foss.arm.com>
2019-01-14 17:47:13 -07:00
Weijie Gao
23f17164d9 ethernet: MediaTek: add ethernet driver for MediaTek ARM-based SoCs
This patch adds ethernet support for Mediatek ARM-based SoCs, including
a minimum setup of the integrated switch.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mark Lee <Mark-MC.Lee@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-By: "Frank Wunderlich" <frank-w@public-files.de>
2019-01-14 17:43:18 -05:00
Weijie Gao
2dca3cc2a9 clk: MediaTek: bind ethsys reset controller
The ethsys contains not only the clock gating controller, but also the
reset controller for the whole ethernet subsystem and its components.

This patch adds binding of the reset controller so that the ethernet node
can have references on it.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-01-14 17:43:18 -05:00
Weijie Gao
3e066bcaef reset: MedaiTek: add reset controller driver for MediaTek SoCs
This patch adds reset controller driver for MediaTek SoCs.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-01-14 17:43:18 -05:00
Fabio Estevam
29c2edb42b mmc: fsl_esdhc: Avoid infinite loop in esdhc_send_cmd_common()
The following hang is observed on a Hummingboard 2 MicroSOM
i2eX iMX6D - rev 1.3 with no eMMC populated on board:

U-Boot SPL 2018.11+gf6206f8587 (Nov 16 2018 - 00:56:34 +0000)
Trying to boot from MMC1

U-Boot 2018.11+gf6206f8587 (Nov 16 2018 - 00:56:34 +0000)

CPU:   Freescale i.MX6D rev1.5 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 33C
Reset cause: POR
Board: MX6 HummingBoard2
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment

No panel detected: default to HDMI
Display: HDMI (1024x768)
In:    serial
Out:   serial
Err:   serial
---> hangs

which is caused by the following infinite loop inside esdhc_send_cmd_common()

	while (!(esdhc_read32(&regs->irqstat) & flags))
		;

Instead of looping forever, provide an exit path so that a timeout
error can be propagated in the case irqstat does not report
any interrupts, which may happen when no eMMC is populated on
board.

Reported-by: Ricardo Salveti <rsalveti@rsalveti.net>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Ricardo Salveti <rsalveti@rsalveti.net>
2019-01-14 11:26:12 -05:00
Tom Rini
7f9418688d Merge branch 'master' of git://git.denx.de/u-boot-usb 2019-01-11 10:47:41 -05:00
Lukasz Majewski
b6a6238f04 Revert "dm: pinctrl: Prevent (re-)configuring pins when already done before relocation"
This reverts commit a7f4b4b344.

As reported by Alex Kiernan the above optimization introduces a
regression in the below use case where:

1. Device has defined 'u-boot,dm-spl' property (@ eMMC DTS node)

2. The device downloads its MLO/SPL via UART (not eMMC - the eMMC pinmux
pins are NOT probed/configured in MLO/SPL).

3. The loaded via UART MLO/SPL wants to load Linux from eMMC. In this case
the DM core and pinctrl uclass checks 'u-boot,dm-spl' and don't
configure pins (as it thinks that those were initialized in MLO/SPL).

As we are very close to release - please revert this commit.

Reported-by: Alex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-11 10:03:42 -05:00
Jean-Jacques Hiblot
b3c518a882 dm: usb: gadget: Fix boot breakage on sunxi platforms
Fixes commit 0131162439 ("dm: usb: create a new UCLASS ID for USB gadget
devices")

The UCLASS_DRIVER for id UCLASS_USB_GADGET_GENERIC needs to be declared
even for platforms that do not enable DM_USB_GADGET. Otherwise the driver
for their usb peripheral controller fails to bind.

Reported-by: Priit Laes <plaes@plaes.org>
Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Priit Laes <plaes@plaes.org>
Acked-by: Jagan Teki <jagan@openedev.com>
2019-01-10 18:53:03 +01:00
Jean-Jacques Hiblot
f811e9763f Kconfig: rename CONFIG_SPL_USB_GADGET_SUPPORT as CONFIG_SPL_USB_GADGET
The SPL option for USB gadget should be named after the option for u-boot
(CONFIG_USB_GADGET)

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-01-10 18:52:55 +01:00
Jean-Jacques Hiblot
801f1fa442 dm: usb: udc: Use SEQ_ALIAS to index the USB gadget ports
dfu, fastbot and other usb gadget commands take the USB port index as a
parameter. Currently this index is assigned in the order of the driver
bindings.
Changing this behavior using the SEQ_ALIAS feature. This option assign to
the device a SEQ number based on its alias (if it exists)

To use it we must set the DM_UC_FLAG_SEQ_ALIAS flag and follow the existing
naming convention: use "usb" for the name of the gadget UCLASS_DRIVER
(same as for the UCLASS_USB).

If no alias is provided, then the index falls back to the order in which
the bindings took place.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reported-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
2019-01-10 18:52:51 +01:00
Tom Rini
64abfc9b6b Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2019-01-10 09:28:28 -05:00
Tom Rini
e5aa3f4d97 Fixes for 2019.01
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Merge tag 'u-boot-imx-20190110' of git://git.denx.de/u-boot-imx

Fixes for 2019.01
2019-01-10 09:28:16 -05:00
Jagan Teki
e8f37f4203 mmc: sunxi: Fix mmc clocks for DM_MMC
Existing clock configure code has been followed based on the
legacy MMC dt node definitions and it cannot work with recent
dts(i) sync from Linux.

So, add clock configure code for Allwinner platforms which support
DM_MMC and eventually this will drop once CLK support is in Mainline.

Fixes: 3c92cca3cd ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3")
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet
Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
2019-01-10 14:45:15 +05:30
Peng Fan
026381fc5a misc: imx8: scu: use platdata instead of priv data
priv data has not been allocated when doing bind, so it is
wrong to use dev_get_priv in bind call back.

Let's switch to use platdata in the driver to fix the issue.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-09 17:04:03 +01:00
Peng Fan
ecab65e4cd misc: imx: scu: avoid write null pointer
When boot_dev is true, fill boot device. However the original logic is when
boot_dev is false, fill boot device, this will trigger data abort.

Also fix sc_misc_get_control when using pointer val.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-09 17:03:45 +01:00
Peng Fan
224f745247 clk: imx8: fix build warning
When build clk driver in spl, met the warning:
"
drivers/clk/imx/clk-imx8.c:21:25: warning: ‘imx8_clk_names’ defined but not used [-Wunused-variable]
 static struct imx8_clks imx8_clk_names[] = {
                         ^~~~~~~~~~~~~~
"

Fix with wrapping the array with CONFIG_CMD_CLK.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-09 17:03:29 +01:00
Ye Li
8c6cc71b40 usb: xhci-mem: Fix scratchpad array issue
After updating the value of dev_context_ptrs[0], we should flush this
from cache to memory. Otherwise the xhci controller won't use it.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-01-09 16:03:56 +01:00
Patrice Chotard
4fb224638d gpio: stm32f7: Fix SPL code size
In order to keep SPL code size below the 32Kb limit,
put under CONFIG_SPL_BUILD flag all unused code in SPL.
This is needed for stm32f7xx board which are using SPL.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-01-09 07:13:33 -05:00
Patrice Chotard
39a8f0be2d gpio: stm32f7: Fix gpio bank hole management
In case "gpio-ranges" property is not present in device tree,
use default value for gpio_count and gpio_range.
This fixes an issue on stm32 F7 and H7 boards where "pinmux status -a"
command didn't return any pin status due to the fact that both stm32 F7
and H7 board DT doesn't use the gpio-ranges property.

Fixes: dbf928dd2634a6("gpio: stm32f7: Add gpio bank holes management")

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-01-09 07:13:32 -05:00
Andre Przywara
eef05fd3ba mmc: bring back partition init for non-DM MMC drivers
Commit d0851c8937 ("blk: Call part_init() in the post_probe() method")
removed the call to part_init() in mmc.c, as this is done by the DM_MMC
framework.
However Allwinner is (still) relying on a non-DM MMC driver, so we are
now missing the implicit partition init, leading to failing MMC accesses
due to the missing partition information.

Bring the call back just for non-DM MMC driver to fix this regression.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Soeren Moch <smoch@web.de>
2019-01-09 07:13:30 -05:00
Philipp Tomsich
33502f371d rockchip: rk3399: fix missing braces in full pinctrl
Braces around the error-case for rk3399_pinctrl_set_pin_pupd lead to
an unconditional (and unintended) return from the function without it
ever setting pin-configurations.

Fix it.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-06 15:26:31 +01:00
Tom Rini
5324027566 TrueType fixes and documentation
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Merge tag 'for-v2019.01' of git://git.denx.de/u-boot-video

TrueType fixes and documentation
2019-01-03 15:34:44 -05:00
Tom Rini
7436f5e54d Last-minute fixes for 2019.1:
- clamp DRAM size to below 32bit for 32bit targets to support 4GB
 - fix copyright notice on some Rockchip-contributed files
 - adjust vdd_log for the RK3399-Q7 to improve stability in some workloads
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Merge tag 'for-master-20190103' of git://git.denx.de/u-boot-rockchip

Last-minute fixes for 2019.1:
- clamp DRAM size to below 32bit for 32bit targets to support 4GB
- fix copyright notice on some Rockchip-contributed files
- adjust vdd_log for the RK3399-Q7 to improve stability in some workloads
2019-01-03 08:39:44 -05:00
Christoph Muellner
8188c83cfa rockchip: rk3399: Add Kconfig option for full pinctrl driver
This patch adds a Kconfig option to enable the full pinctrl driver
for the RK3399. This flag needs to be enabed in order to get the
features of the full pinctrl driver compiled in (i.e. a .set_state()
callback).

Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-02 22:39:12 +01:00
Christoph Muellner
600888110d rockchip: rk3399: Add improved pinctrl driver.
The current pinctrl driver for the RK3399 has a range of qulity issues.
E.g. it only implements the .set_state_simple() callback, it
does not parse the available pinctrl information from the DTS
(instead uses hardcoded values), is not flexible enough to cover
devices without 'interrupt' field in the DTS (e.g. PWM),
is not written generic enough to make code reusable among other
rockchip SoCs...

This patch addresses these issues by reimplementing the whole driver
from scratch using the .set_state() callback.
The new implementation covers all featurese of the old code
(i.e. it supports pinmuxing and pullup/pulldown configuration).

This patch has been tested on a RK3399-Q7 SoM (Puma).

Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-02 22:39:04 +01:00
Christoph Muellner
5ff7768892 dm: pinctrl: Add pinctrl_decode_pin_config_dm().
pinctrl_decode_pin_config_dm() is basically a feature-equivalent
implementation of pinctrl_decode_pin_config(), which operates
on struct udevice devices and uses the dev_read_*() API.

Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-02 22:38:44 +01:00
Christoph Muellner
ddc824f89a power: regulator: Allow PWM regulator to be omitted from SPL.
This patch allows to enable the PWM regulator driver
independent for U-Boot and SPL.

Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-02 22:38:09 +01:00
Kever Yang
c43acfdc24 rockchip: ram: update license for sdram driver
Rockchip may use this sdram copy of source code for both open source
and internal project, update the license to use both GPL2.0+ and
BSD-3 Clause.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-02 22:37:10 +01:00
Tom Rini
695f67b5b3 Merge branch 'master' of git://git.denx.de/u-boot-spi 2019-01-02 14:20:29 -05:00
Nikolai Zhubr
cdf72c188c mtd: nand: raw: Add Hynix H27UBG8T2BTR id table
This patch adds Hynix H27UBG8T2BTR id table as part of raw nand,
these chips were available in some A20-olinuxino-micro boards.

Signed-off-by: Nikolai Zhubr <n-a-zhubr@yandex.ru>
[jagan: add proper commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-02 00:58:16 +05:30
Stefan Mavrodiev
5c1a87de58 spi: sun4i: Add rx_buf NULL pointer check
Current driver doesn't check if the destination pointer is NULL.
This cause the data from the FIFO to be stored inside the internal
SDRAM ( address 0 ).

The patch add simple check if the destination pointer is NULL.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Jagan Teki <jagan@openedev.com>
[jagan: fix commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-02 00:54:05 +05:30
Tom Rini
522e035441 imx for 2019.01
- introduce support for i.MX8M
 - fix size limit for Vhybrid / pico boards
 - several board fixes
 - w1 driver for MX2x / MX5x
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Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imx

imx for 2019.01

- introduce support for i.MX8M
- fix size limit for Vhybrid / pico boards
- several board fixes
- w1 driver for MX2x / MX5x
2019-01-01 10:01:00 -05:00
Lukasz Majewski
acdf10e179 nand: vybrid: Extend the vf610 NFC NAND driver to support device tree (and DM)
This commit adds support for device tree and enumeration via device model
for the Vybrid's NFC NAND driver.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-01-01 14:12:18 +01:00
Lukasz Majewski
8a12d127d7 Kconfig: Add entry for VF610 NAND NFC device tree aware driver
This commit provides code to add proper entry to Kconfig to enable
support for VF610 device tree aware driver.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-01-01 14:12:18 +01:00
Lukasz Majewski
254409dbe8 nand: vybrid: Use calloc() instead of malloc() to allocate struct nfc
Without this change it is possible that Vybrid's NFC driver malloc() call
will obtain some memory used (and correctly free'd) by some previous
driver (in this case pinctrl for Vybrid).

As a result some fields of struct nfc - in out case mtd->_get_device - are
"pre initialized" with some random values.

On the latter stage of booting, when e.g. somebody calls 'mtdparts default'
the "data abort" is observed when __get_mtd_device() function is called.

The mtd->_get_device pointer is not NULL and wrong value is referenced.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
2019-01-01 14:12:18 +01:00
Peng Fan
e3963c0943 drivers: ddr: introduce DDR driver for i.MX8M
Introduce DDR driver for i.MX8M. The driver will be used by SPL to
initialze DDR PHY and DDR Controller.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Peng Fan
cd357ad112 imx: rename mx8m,MX8M to imx8m,IMX8M
Rename mx8m,MX8M to imx8m,IMX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
2019-01-01 14:12:18 +01:00
Lukasz Majewski
f0b73d9707 ARM: vybrid: Provide pinctrl driver for Vybrid (vf610)
This implementation comply with other iMX devices pinctrl drivers already
available in U-boot.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-01-01 14:12:18 +01:00
Martin Fuzzey
a2e99a71b2 w1: Add driver for i.MX bus master controller
Two variants of controllers are supported:
V1 (bitwise only) found in
	i.MX21, i.MX27, i.MX31, i.MX51
V2 (byte operations) found in
	i.MX25, i.MX35, i.MX50, i.MX53

Only tested on i.MX53 hardware but in both modes
(by modifying the device tree).

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
2019-01-01 14:12:18 +01:00
Xiaoliang Yang
da4918acb8 watchdog: imx: add config to disable wdog reset
Add Kconfig option WATCHDOG_RESET_DISABLE to disable watchdog reset
in imx_watchdog driver, so that the watchdog will not be fed in
u-boot if CONFIG_WATCHDOG_RESET_DISABLE is enabled.

Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
2019-01-01 14:12:18 +01:00
Xiaoliang Yang
005c1cf888 watchdog: driver support for fsl-lsch2
Support watchdog driver for fsl-lsch2. It's disabled in default.
If you want to use it, please enable CONFIG_IMX_WATCHDOG.
Define CONFIG_WATCHDOG_TIMEOUT_MSECS to set watchdog timeout.

Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
2019-01-01 14:12:18 +01:00
Masahiro Yamada
94bf34b172 clk: uniphier: add NAND 200MHz clock
The Denali NAND controller IP needs three clocks:

 - clk: controller core clock

 - clk_x: bus interface clock

 - ecc_clk: clock at which ECC circuitry is run

Currently, only the first one (50MHz) is provided.  The rest of the
two clock ports must be connected to the 200MHz clock line.  Add this.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-29 11:38:38 +09:00
Masahiro Yamada
9d43649a77 mtd: rawnand: denali: fix a race condition when DMA is kicked
Based on Linux commit cf51e4b9c34407bf0c3d9b582b7837e047e1df47

Add the register read-back, commenting why this is necessary.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-29 11:38:37 +09:00
Masahiro Yamada
8ccfbfb3e1 mtd: rawnand: denali: optimize timing parameters for data interface
Based on Linux commit 1dfac31a5a63ac04a9b5fbc3f5105a586560f191

This commit improves the ->setup_data_interface() hook.

The denali_setup_data_interface() needs the frequency of clk_x
and the ratio of clk_x / clk.

The latter is currently hardcoded in the driver, like this:

  #define DENALI_CLK_X_MULT       6

The IP datasheet requires that clk_x / clk be 4, 5, or 6.  I just
chose 6 because it is the most defensive value, but it is not optimal.
By getting the clock rate of both "clk" and "clk_x", the driver can
compute the timing values more precisely.

To not break the existing platforms, the fallback value, 50 MHz is
provided.  It is true for all upstreamed platforms.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-29 11:38:37 +09:00
Masahiro Yamada
a13fe7afe9 mtd: rawnand: denali_dt: add more clocks based on IP datasheet
Based on Linux commit 6f1fe97bec349a1fd6c5a8c7c5998d759fe721d5

Currently, denali_dt.c requires a single anonymous clock, but
the Denali User's Guide requires three clocks for this IP:

 - clk: controller core clock

 - clk_x: bus interface clock

 - ecc_clk: clock at which ECC circuitry is run

This commit supports these named clocks to represent the real hardware.

For the backward compatibility, the driver still accepts a single clock
just as before.  The clk_x_rate is taken from the clock driver again if
the named clock "clk_x" is available.  This will happen only for future
DT, hence the existing DT files are not affected.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-29 11:38:36 +09:00
Simon Glass
b093753471 video: Add a default TrueType font
At present it is possible to enable TrueType support but not include any
fonts. This results in a blank display. Select Nimbus as the default font
to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-28 12:27:53 +01:00
Lokesh Vutla
e17e0ceb83 power: regulator: Return success on attempt to disable an always-on regulator
commit 4f86a724e8 ("power: regulator: denied disable on always-on
regulator") throws an error when requested to disable an always-on
regulator. It is right that an always-on regulator should not be
attempted to be disabled. But at the same time regulator framework
should not return an error when such request is received. Instead
it should just return success without attempting to disable the
specified regulator. This is because the requesting driver will
not have the idea if the regulator is always-on or not. The
requesting driver will always try to enable/disable regulator as
per the required flow. So it is upto regulator framework to not
break such scenarios.

Fixes: 4f86a724e8 ("power: regulator: denied disable on always-on regulator")
Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-12-27 07:48:31 -05:00
Michal Simek
7b4ea2d888 phy: Fix u-boot coruption when fixed-phy is used
When fixed-link phy is used subnode offset is used as phy address. This
number is bigger then space allocated for bus structure (allocated via
mdio_alloc).
bus->phymap[] array has PHY_MAX_ADDR size (32).
That's why writing bus->phymap[addr] where addr is < 0 or > PHY_MAX_ADDR
is causing write to memory which can caused full U-Boot crash.

The patch is checking if address is in correct range.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-12-26 21:35:52 -05:00
Lukasz Majewski
a7f4b4b344 dm: pinctrl: Prevent (re-)configuring pins when already done before relocation
This commit prevents from re-configuring pins if those were configured
before relocation.

Some pins - like UART or DDR must be setup before relocation
(as they have 'u-boot,dm-pre-reloc' property set in DTS). Without this
change, those pins are re-configured after relocation (pre_reloc_only = 0,
so we do not "continue").
Such behavior may be a problem for DDR PAD configuration, as they might
be already leveled/tuned with original setup).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-12-26 21:21:07 -05:00
Tom Rini
5c676780e1 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- stratix10 updates
2018-12-21 13:37:34 -05:00
Tom Rini
fd0135e3c5 - mips: fix some DTC warnings
- bmips: bcm6348: add DMA driver
 - bmips: bcm5348: add ethernet driver
 - bmips: bcm6368: add ethernet driver
 - mips: mt76xx: fix DMA problems, disable CONFIG_OF_EMBED
 - mips: mscc: add support for Microsemi Ocelot and Luton SoCs
 - mips: mscc: add support for Ocelot and Luton evaluation boards
 - mips: jz47xx: add basic support for Ingenic JZ4780 SoC
 - mips: jz47xx: add support for Imgtec Creator CI20 board
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Merge tag 'mips-updates-for-2019.11' of git://git.denx.de/u-boot-mips

- mips: fix some DTC warnings
- bmips: bcm6348: add DMA driver
- bmips: bcm5348: add ethernet driver
- bmips: bcm6368: add ethernet driver
- mips: mt76xx: fix DMA problems, disable CONFIG_OF_EMBED
- mips: mscc: add support for Microsemi Ocelot and Luton SoCs
- mips: mscc: add support for Ocelot and Luton evaluation boards
- mips: jz47xx: add basic support for Ingenic JZ4780 SoC
- mips: jz47xx: add support for Imgtec Creator CI20 board
2018-12-21 13:36:51 -05:00
Ang, Chee Hong
877ec6ebbd arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table
Enable 'fpga' command in u-boot. User will be able to use the FPGA
command to program the FPGA on Stratix10 SoC.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2018-12-20 17:12:25 +01:00
Ang, Chee Hong
c41e660b6b arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration Driver
Enable FPGA reconfiguration support for Stratix 10 SoC.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2018-12-20 17:12:25 +01:00
Paul Burton
d77271393a mmc: Add JZ47xx SD/MMC controller driver
Add driver for the JZ47xx MSC controller.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2018-12-19 15:23:01 +01:00
Paul Burton
b5392c50bd misc: Add JZ47xx efuse driver
Add driver for the efuse block in the JZ47xx SOC.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2018-12-19 15:23:01 +01:00
Gregory CLEMENT
02aea4da1d gpio: mscc-bitbang-spi: Add a simple gpio driver for bitbgang spi
The VCore III SoCs such as the Luton but also the Ocelot can remap an SPI
flash directly in memory. However, for writing in the flash the
communication has to be done by software.

Each of the signal used for the SPI are exposed in a single register. In
order to be able to use the soft-spi driver, the management of this pin
is done through this simple gpio driver.

Even if the main purpose of this driver is to be used by soft-spi, it can
still be used as a normal gpio driver but with limitation: for example
the first pin can't be used as output.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19 15:23:01 +01:00
Gregory CLEMENT
53bdae2418 pinctrl: mscc: Add gpio and pinctrl driver for MSCC MIPS SoCs (VcoreIII based)
This driver supports the pin and gpio controller found in the Ocelot and
Luton SoCs.

The driver was inspired from the pinctrl driver in Linux, but was
simplified and was modified to allow supporting an other SoCs (Luton).

For Ocelot and Luton the controller is the same, only the pins to program
differ.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
[changed to only descend into mscc/ dependent on CONFIG_PINCTRL_MSCC]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19 15:23:01 +01:00
Gregory CLEMENT
bea91b0c9b DW SPI: Allow to overload the management of the external CS
On some platforms, as the Ocelot ones, when wanting to control the CS
through software, it is not possible to do it through the GPIO
controller. Indeed, this signal is managed through a dedicated range of
registers inside the SoC..

By declaring the external_cs_manage function as weak, it is possible to
manage the CS at platform level and then using the appropriate registers.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
9622972af4 net: add support for bcm6368-enet
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
55e55fe4a6 net: add support for bcm6348-enet
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19 15:23:00 +01:00
Álvaro Fernández Rojas
ccfd69883a dma: add bcm6348-iudma support
BCM6348 IUDMA controller is present on multiple BMIPS (BCM63xx) SoCs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19 15:23:00 +01:00
Anup Patel
e2842496ac drivers: serial: Add SiFive UART driver
This patch adds SiFive UART driver. The driver is 100% DM driver
and it determines input clock using clk framework.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-18 09:56:54 +08:00
Bin Meng
60262cd041 timer: Add generic driver for RISC-V privileged architecture defined timer
RISC-V privileged architecture v1.10 defines a real-time counter,
exposed as a memory-mapped machine-mode register - mtime. mtime must
run at constant frequency, and the platform must provide a mechanism
for determining the timebase of mtime. The mtime register has a
64-bit precision on all RV32, RV64, and RV128 systems.

Different platform may have different implementation of the mtime
block hence an API riscv_get_time() is required by this driver for
platform codes to hide such implementation details. For example,
on some platforms mtime is provided by the CLINT module, while on
some other platforms a simple 'rdtime' can be used to get the timer
counter.

With this timer driver the U-Boot timer functionalities like delay
works correctly now.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:26 +08:00
Bin Meng
833508c05c cpu: Add a RISC-V CPU driver
This adds a driver for RISC-V CPU. Note the driver will bind
a RISC-V timer driver if "timebase-frequency" property is
present in the device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:26 +08:00
Tom Rini
401c254044 Merge branch 'master' of git://git.denx.de/u-boot-usb
- Second half of the USB Gadget DM conversion
2018-12-15 17:49:57 -05:00
Patrick Delaunay
de5bab9c59 syscon: update syscon_node_to_regmap to use the DM functions
+ Update the function syscon_node_to_regmap() to force bound on
  syscon uclass and directly use the list of device from DM.
+ Remove the static list syscon_list.

This patch avoid issue (crash) when syscon_node_to_regmap() is called
before and after reallocation (list content is invalid).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-12-15 11:49:56 -05:00
Patrice Chotard
f828fa4d82 serial: serial_stm32: Add reset support
In some cases, UART is configured by early boot stage.
To be sure of the initial state of UART and to avoid
spurious chars on console, reset the serial block before
configuring it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-15 11:49:56 -05:00
Igor Opaniuk
8b1312662b tee: change return code for REE FS supplicant cmd
If OP-TEE core is compiled with support of REE FS and RPMB
at the same time (CFG_RPMB_FS ?= y; CFG_RPMB_FS ?= y), and persistent
storage API is used with TEE_STORAGE_PRIVATE storage id, it will
lead to TA panic.

E/TC:? 0 TA panicked with code 0xffff0009
.....
E/TC:? 0 Call stack:
E/TC:? 0  0x000000004002f2f8 TEE_OpenPersistentObject at
lib/libutee/tee_api_objects.c:422

In this particular case TEE_ERROR_STORAGE_NOT_AVAILABLE is more suitable
than TEE_ERROR_NOT_IMPLEMENTED, as it provides to a TA a possibility
to handle this error code [1].

>From GPD TEE Internal Core specification [2]:
TEE_ERROR_STORAGE_NOT_AVAILABLE - if the persistent object is stored in a
storage area which is currently inaccessible. It may be associated with
the device but unplugged, busy, or inaccessible for some other reason.

[1]: 94db01ef44/lib/libutee/tee_api_objects.c (L419)
[2]: https://globalplatform.org/wp-content/uploads/2018/06/GPD_TEE_Internal_Core_API_Specification_v1.1.2.50_PublicReview.pdf

Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-12-15 11:49:19 -05:00
Stefan Mavrodiev
46a3f27654 usb: musb-new: sunxi: Fix null pointer access
When the device is in peripheral mode there is no
struct usb_bus_priv allocated pointer, as the uclass driver
("usb_dev_generic") doesn't call per_device_auto_alloc_size.

This results in writing to the internal SDRAM at
	priv->desc_before_addr = true;

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
2018-12-14 17:59:10 +01:00
Siva Durga Prasad Paladugu
771e76515e usb: composite: Fix max packet size for USB3.0
For USB3.0, the max packetsize for GET_DESCRIPTOR should be
sent as exponent value for 2. This means for 512, max packet
size should be filled with 9(2^9=512). Also, fill the USB
version field with 3.0 if speed is negotiated to Superspeed.
This fixes the issue of DFU gadget download failure with
superspeed. Without this patch, the max packet size is
overflowed to zero as the bMaxPacketsize is of u8 and hence
host is not able to detect this device.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-14 17:59:10 +01:00
Jean-Jacques Hiblot
7d98dbcc3d usb: musb-new: Add support for DM_USB
Enable DM for USB peripheral in the musb-new driver.
Also make sure that the driver can be used in the SPL.
This implies that:
* the driver must work with and without the OF_CONTROL option. That
in turn, implies that the platform data can be passed in a struct
ti_musb_platdata or be read from the dtb
* usb.o is linked in the SPL if host support is enabled

Another change is that the driver does not fail to bind (and stop the boot
process) if one of the child driver does not bind. Reporting the error is
enough. This kind of error would appear if the port is configured in the
DTS but the driver is not activated in the config.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:10 +01:00
Jean-Jacques Hiblot
1594c75b3e usb: musb-new: Allow the diver not to use the set_phy_power() callback
The set_phy_power() callback is part of struct omap_musb_board_data. This
structure is part of the platform data passed to the musb-new driver. This
does not really fit with the Driver Model, so allow not to use struct
omap_musb_board_data to turn the phy on or off.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:10 +01:00
Jean-Jacques Hiblot
1ce5f1f933 dwc3-generic: Add support for the am437x
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:09 +01:00
Jean-Jacques Hiblot
512a84c444 phy: omap_usb2: Add support for am437x
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:09 +01:00
Jean-Jacques Hiblot
9a1dde58f5 spl: drivers: Link usb common library to SPL if USB gadget is enabled
Some drivers might need to access common USB functions such as
usb_get_maximum_speed() or usb_get_dr_mode().

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:09 +01:00
Jean-Jacques Hiblot
4dd76d0f96 usb: host: replace xhci-keystone driver by the generic dwc3 driver
The keystone platforms can use the generic DC3 driver. Removing the
keystone-spcecific xchi driver and add the configuration options to enable
the generic DWC3 driver on all K2 platforms.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:09 +01:00
Jean-Jacques Hiblot
4b12783c8e PHY: Add phy driver for the keystone USB PHY
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:09 +01:00
Jean-Jacques Hiblot
1c03ade328 usb: dwc3-generic: make it compatible with "ti, keystone-dwc3"
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:09 +01:00
Adam Ford
f187ace80e usb: musb: Remove legacy CONFIG_USB_DA8XX
There don't appear to be any boards enabling CONFIG_USB_DA8XX,
and there is a newer version of the MUSB driver, so let's remove
the legacy version of it.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-14 17:59:09 +01:00
Adam Ford
66c65f0a91 usb: musb: Remove Legacy CONFIG_USB_DAVINCI
This patch removes CONFIG_USB_DAVINCI.  It's a legacy option
that isn't defined anywhere, and there is a newer MUSB driver.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-14 17:59:09 +01:00
Martyn Welch
16ecb295b3 usb: Don't enable CONFIG_SPL_DM_USB for non-DM SPL
When CONFIG_SPL_DM_USB was added, it was added defaulted on without
protection to ensure it didn't get set for non-DM SPL builds.

This leads to unexpected and confusing failures when building a DM based
U-Boot but with a non-DM SPL, as the defconfig is unlikely to have
CONFIG_SPL_DM_USB actively disabled.

Tweak the Kconfig to not enable this setting unless CONFIG_SPL_DM is set.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2018-12-14 17:59:08 +01:00
Lukasz Majewski
916fa09799 usb: composite: Move bitmap related operations to ./include/linux/bitmap.h
The BITMAP related operations can now be moved to ./include/linux/bitmap.h
file to mimic the Linux kernel directory tree.

This change also allows to remove the lin_gadget_compat.h header file
(which is a legacy code only for composite U-boot layer).
It was also possible to remove #includes from several USB gadget drivers.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
2018-12-14 17:59:08 +01:00
Petr Štetiar
bb00a015d6 usb: gadget: f_sdp: Provide filesize env variable for downloaded images
Currently it's not possible to get filesize of downloaded images and
it's impossible to automate some tasks in scripts. So this patch adds
`filesize` environment variable with size (as hex number in bytes) of
the last successfully downloaded file via `sdp` command.

Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
2018-12-14 17:59:08 +01:00
Simon Glass
f987177db9 dm: sound: Use the correct number of channels for sound
At present the 'beep' sound generates a waveform for only one channel even
if two are being used. This means that the beep is twice the frequency it
should be. Correct this by making it a parameter.

The fix in a previous commit was correct for sandbox but not for other
boards.

Fixes: 03f11e87a8 ("sound: Correct data output in sound_create_square_wave()")
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:37:10 -07:00
Simon Glass
e221cdcf44 dm: sandbox: Allow selection of sample rate and channels
At present these parameters are hard-coded in the sdl interface code.
Allow them to be specified by the driver instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:37:09 -07:00
Simon Glass
bc58184ec5 dm: sound: max98095: Tidy up error codes
Return a valid error code instead of -1.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:41 -07:00
Simon Glass
e9f66f4f5b dm: sound: Fix license headers
Fix a few files whos license headers were not converted to SPDX.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:41 -07:00
Simon Glass
f2b25c9bf8 dm: sound: Complete migration to driver model
All users of sound are converted to use driver model. Drop the old code
and the CONFIG_DM_SOUND option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:41 -07:00
Simon Glass
93a98a6ff3 dm: exynos: sound: Convert to use driver model
Update snow's device tree and config to use driver model for sound. Also
update the others as best we can.

Spring does not appear to have audio support in the kernel. The smdk5250
and smdk5420 boards use a wolfson codec which I cannot test with. So the
only boards that is tested and known to work are snow, pit and pi.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:30 -07:00
Simon Glass
8cad63c74d dm: sound: exynos: Add support for max98090
Add support for this new codec which is used by pit.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:30 -07:00
Simon Glass
0ab6f0b358 dm: sound: Move common code out of maxim98095
The register-access code is useful for any maxim codec. Move it out into
its own file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:30 -07:00
Simon Glass
d6cadd5918 dm: sound: Add conversion to driver model
Move the existing hardware drivers over to use driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:29 -07:00
Simon Glass
6c986cfef4 dm: sound: Start i2c IDs from 0
The current ID enums start from 1 but there does not seem to be any reason
that they cannot start with 0. Adjust the code to avoid the +1 in
codec_init().

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
a1b17e4f4c dm: core: Add a function to read into a unsigned int
The current dev_read...() functions use s32 and u32 which are convenient
for device tree but not so useful for normal code, which often wants to
use normal integers for values.

Add a helper which supports returning an unsigned int. Also add signed
versions of the unsigned readers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
d490189865 dm: sound: Create a uclass for sound
The sound driver pulls together the audio codec and i2s drivers in order
to actually make sounds. It supports setup() and play() methods. The
sound_find_codec_i2s() function allows locating the linked codec and i2s
devices. They can be referred to from uclass-private data.

Add a uclass and a test for sound.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
e96fa6c911 dm: sound: Create a uclass for i2s
The i2s bus is commonly used with audio codecs. It provides a way to
stream digital data sychronously in both directions. U-Boot only supports
audio output, so this uclass is very simple, with a single tx_data()
method.

Add a uclass and a test for i2s.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
ce6d99a056 dm: sound: Create a uclass for audio codecs
An audio codec provides a way to convert digital data to sound and vice
versa. Add a simple uclass which just supports setting the parameters for
the codec.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
45863db5a9 dm: sound: Rename samsung_i2s_priv to i2s_uc_priv
This structure contains information that is likely needed by any i2s
driver so it seems useful to attach it to the (forthcoming) i2c uclass.
For now, just rename it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
2a04957241 dm: sound: Create an option to use driver model for sound
The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
51b06dc40b dm: sound: exynos: Correct codec bus addresses
For snow the codec is at address 0x11 on the i2c bus, in 7-bit format.
The device tree and code are in 8-bit format (i.e. shifted left one bit).
Fix both. Fix pit in a similar way.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
a1efd49ee2 dm: sound: Fix up header ordering
Tidy up the ordering of header files in the sounds files.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
9ca9f6d58b dm: sound: wm8994: Drop wm8994_i2c_init()
This function has only one line in it. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
04660d6424 dm: sound: max98095: Drop g_codec_info and g_max98095_info
These are only used in two functions so can be made local.

Also change the first argument of max98095_do_init() to suit.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
62ba831872 dm: sound: wm8994: Drop g_codec_info and g_wm8994_info
These are only used in two functions so can be made local.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
372922ca8f dm: sound: max98095: Drop global i2c-address variable
We can put this in the private structure and avoid a global.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
6ab0d25d55 dm: sound: wm8994: Drop global i2c-address variable
We can put this in the private structure and avoid a global.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
82a27d2c8c dm: sound: max98095: Split out interface setup code
With driver model we want to do a minimal probe when the device is probed
and then set up the codec interface later when a sound is actully played.

Split this setup code out into its own function to help with this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
cfbe7623d6 dm: sound: wm899c: Split out interface setup code
With driver model we want to do a minimal probe when the device is probed
and then set up the codec interface later when a sound is actully played.

Split this setup code out into its own function to help with this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
54e67e2739 dm: sound: wm8994: Create a new common init function
With driver model we cannot pass in the global struct, but instead want
to pass in the driver-private data. Split some of the code out of
wm8994_init() to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
a832a3e36f dm: sound: max98095: Pass private data to internal functions
At present the driver-private data is global. To allow this code to be
used with driver model, change it to pass the data down to each function.
Use the name 'priv' consistently throughout.

Also rename max98095_update_bits() to max98095_bic_or() which is more
descriptive and shorter, thus breaking fewer lines with the parameter
addition.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
107ab83e61 dm: sound: wm8994: Pass private data to internal functions
At present the driver-private data is global. To allow this code to be
used with driver model, change it to pass the data down to each function.
Use the name 'priv' consistently throughout.

Also rename wm8994_update_bits() to wm8994_bic_or() which is more
descriptive and shorter, thus breaking fewer lines with the parameter
addition.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
7153ad834f dm: sound: Drop codec_type
This field is not really used. It is always set to a known value. Drop it
to simplify the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
ccf0425e32 dm: sound: samsung: Rename i2stx_info to samsung_i2s_priv
This struct is only used by the Samsung I2C driver and should move into
that driver. For now, rename it so it is clear that is driver-private
info.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
d2eab333a7 dm: sound: Drop unused pre-device-tree code
CONFIG_OF_CONTROL is enabled for all boards that use sound, so remove the
dead code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
eb13350216 dm: sound: samsung: Make local function static
Several functions are not exported from this file. Make them static so
this is clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Tom Rini
d117d8f19b Merge branch 'master' of git://git.denx.de/u-boot-i2c 2018-12-13 09:36:55 -05:00
Peng Fan
cdd7486616 firmware: psci: introduce SPL_ARM_PSCI_FW
Introduce a new macro SPL_ARM_PSCI_FW

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-12-12 12:14:25 -05:00
Sekhar Nori
d50d6817b5 spl: fix build failure with !CONFIG_SPL_PCI_SUPPORT
Building U-Boot with CONFIG_PCI and CONFIG_DM_PCI enabled, but
CONFIG_SPL_PCI_SUPPORT disabled, results in following linker
error:

lib/built-in.o: In function `fdtdec_get_pci_bar32':
lib/fdtdec.c:305: undefined reference to `dm_pci_read_bar32'
fdtdec.c:305:(.text.fdtdec_get_pci_bar32+0x24): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `dm_pci_read_bar32'

This is because reference to dm_pci_read_bar32() remains in lib/fdtdec.c
while SPL build does not descend into drivers/pci directory in
drivers/Makefile if CONFIG_SPL_PCI_SUPPORT is not enabled.

Fix this by applying appropriate #define guards in lib/fdtdec.c.
It looks like ns16550.c has the same problem, so fixed that too.

To simplify this, CONFIG_SPL_PCI_SUPPORT is renamed to CONFIG_SPL_PCI
(enables use of CONFIG_IS_ENABLED() macro).

Suggested-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-12 12:14:23 -05:00
Tom Rini
91ff686562 blk: Rework guard around part_init call
The function part_init() will only be built when we have both
CONFIG_PARTITIONS and CONFIG_HAVE_BLOCK_DEVICE set.  Protect the call to
this function with both of these tests now.

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Vanessa Maegima <vanessa.maegima@nxp.com>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-12 12:14:22 -05:00
Jean-Jacques Hiblot
22ecff594d i2c: tegra: Fix regression by implementing a dummy probe_chip() callback
Commit f32a8007ef ("dm: i2c: Make i2c_get_chip_for_busnum() fail if the
chip is not detected") introduced a regression for the NVIDIA Jetson TX2.

For some reason the xfer callback of the tegra i2c driver doesn't support
probing the I2C devices with a 0-length message.
Fixing the regression by providing a dummy implementation of probe_chip()
that does nothing.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-12-12 06:06:14 +01:00
Tom Rini
d94604d558 Add TFA boot flow for some Layerscape platforms
Add support for lx2160a SoC
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Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriq

Add TFA boot flow for some Layerscape platforms
Add support for lx2160a SoC

[trini: Add a bunch of missing MAINTAINERS entries]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-10 17:19:59 -05:00
Tom Rini
8bf3c2442b Improvements:
- init DRAM for RK322x in SPL
 - add FAN53555 PMIC/regulator driver
 - update MicroCrystal RV3029 driver to Kconfig and sync from Linux
 - add bootcount uclass and first DM-driver for bootcount
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Merge tag 'for-master-20181210' of git://git.denx.de/u-boot-rockchip

Improvements:
- init DRAM for RK322x in SPL
- add FAN53555 PMIC/regulator driver
- update MicroCrystal RV3029 driver to Kconfig and sync from Linux
- add bootcount uclass and first DM-driver for bootcount
2018-12-10 10:19:09 -05:00
Tom Rini
7ff485c68b Merge branch 'master' of git://git.denx.de/u-boot-i2c
- DM_I2C_COMPAT removal for all ti platforms from Jean-Jacques Hiblot
- Fix in i2c command help output from Chirstoph Muellner.
2018-12-10 07:16:33 -05:00
Tom Rini
48d299a799 Merge branch 'master' of git://git.denx.de/u-boot-usb
- DWC3 and UDC cleanup
2018-12-10 07:15:12 -05:00
Philipp Tomsich
dfb0a70a1a power: add FAN53555 family support
This adds a driver for the FAN53555 family of regulators and wraps it
in a PMIC implementation.

While these devices support a 'normal' and 'suspend' mode (controlled
via an external pin) to switch between two programmable voltages, this
incarnation of the driver assumes that the device is always operating
in 'normal' mode.

Only setting/reading the programmed voltage is supported at this time
and the following device functionality remains unsupported:
  - switching the selected voltage (via a GPIO)
  - disabling the voltage output via software-control
This matches the functionality of the Linux driver.

Tested on a RK3399-Q7 (with 'option 5' devices): setting voltages from
the U-Boot shell and verifying output voltages on the board.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-12-10 10:04:45 +01:00
Philipp Tomsich
482734aa66 bootcount: add a DM RTC backing store for bootcount
This implements a driver using a RTC-based backing store for the DM
bootcount implementation.  The node configuring this feature will be
compatible with 'u-boot,bootcount-rtc' and the underlying RTC device
shall be reference through the property 'rtc'. An offset into the RTC
device's register space can be provided through the 'offset' property.

Tested on a RK3399-Q7 on a Flamingo carrier board using the SRAM area
of the carrier board's RV3029 RTC.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-10 10:04:45 +01:00
Philipp Tomsich
ebb73de168 bootcount: add uclass for bootcount
The original bootcount methods do not provide an interface to DM and
rely on a static configuration for I2C devices (e.g. bus, chip-addr,
etc. are configured through defines statically).  On a modern system
that exposes multiple devices in a DTS-configurable way, this is less
than optimal and a interface to DM-based devices will be desirable.

This adds a simple driver that is DM-aware and configurable via DTS.
If ambiguous (i.e. multiple bootcount-devices are present) the
/chosen/u-boot,bootcount-device property can be used to select one
bootcount device.

Initially, this provides support for the following DM devices:
 * RTC devices

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-12-10 10:04:44 +01:00
Kever Yang
f338cca1d2 rockchip: rk322x: ram: enable DRAM init in SPL instead of TPL
Patch for rk322x TPL is not merged, and only SPL is available now,
enable the sdram driver in SPL first. We should update back to TPL
after TPL is enabled for rk322x.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-10 10:04:44 +01:00
Jean-Jacques Hiblot
c483f4cec0 drivers: core: nullify gd->dm_root after dm_uninit()
To reset the DM after a new dtb is loaded, we need to call dm_uninit()
and then dm_init(). This fails however because gd->dm_root is not nullified
by dm_uninit().
Fixing it by setting gd->dm_root in dm_uninit().

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10 07:23:45 +01:00
Jean-Jacques Hiblot
85e51be9fb drivers: core: Add the option SPL_DM_DEVICE_REMOVE to the Kconfig
It is currently not possible to include the support to remove devices in
the SPL. This is however needed by platforms that re-select their dtb after
DM is initialized; they need to remove all the previously bound devices
before triggering a scan of the new DT.

Add a Kconfig option to be able to include the support for device removal
in the SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Seeries-changes:3
- update commit message
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10 07:22:30 +01:00
Jean-Jacques Hiblot
fb1b7712ad power: make most tps drivers and the twl4030 driver compatible with DM_I2C
Those driver are not DM drivers per se (not using the PMIC/regulator
framework) and are using the legacy I2C API. Make them compatible with
the DM_I2C API.

This impacts the following drivers:
- palmas (used by am57xx/dra7xx evms)
- tps65218 (used by am43xx evms)
- tps65217 and tps65910 (used by am335x evms and am335x boneblack vboot)
- twl4030 (used by omap3_logicpd)
- tps65217 (used by brppt1)
- twl6030

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10 06:17:30 +01:00
Jean-Jacques Hiblot
5f97ae6814 i2c: omap24xx_i2c: Use platdata to probe the device
This allows the driver to be used without OF_CONTROL.
AM335x support DM_SPL but does not use SPL_OF_CONTROL. Enabling DM_I2C in
SPL thus requires that the omap I2C can be passed platdata.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10 06:11:18 +01:00
Vignesh R
bca09ce4b0 i2c: omap24xx_i2c: Move away from SoC specific headers for reg offset
Move away from SoC specific headers to handle different register layout.
Instead use driver data to get appropriate register layouts like in the
kernel. While at it, perform some mostly cosmetic alignment/cleanup in
the functions being updated.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10 06:09:34 +01:00
Jean-Jacques Hiblot
3542ff29e4 dm: device: Allow using uclass_find_device_by_seq() without OF_CONTROL
If OF_CONTROL is not enabled and DM_SEQ_ALIAS is enabled, we must
assign an alias (requested sequence number) to devices that belongs to a
class with the DM_UC_FLAG_SEQ_ALIAS flag. Otherwise
uclass_find_device_by_seq() cannot be used to get/probe a device. In
particular i2c_get_chip_for_busnum() cannot be used.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10 06:05:32 +01:00
Jean-Jacques Hiblot
f32a8007ef dm: i2c: Make i2c_get_chip_for_busnum() fail if the chip is not detected
i2c_get_chip_for_busnum() really should check the presence of the chip on
the bus. Most of the users of this function assume that this is done.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10 06:03:45 +01:00
Chris Packham
cde578ff36 ARM: mvebu: restore license information in mv_ddr_plat.{c,h}
This was unintentionally removed when syncing with upstream.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-12-09 17:10:13 -05:00
Tom Rini
8cb8c0c6a8 Merge git://git.denx.de/u-boot-marvell
- Sync DDR training with Marvell code for Armada 38x by Chris
- Misc updates to Armada 38x Helios4 board by Aditya
2018-12-09 08:40:49 -05:00
Philipp Tomsich
a740ee913e lib: merge CRC16-CCITT into u-boot/crc.h
This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for
rolling CRC16 into the hash infrastructure.  Given that CRC8, CRC32
and CRC32-C already have their prototypes in a single header file, it
seems a good idea to also include CRC16-CCITT in the same.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-08 20:18:32 -05:00
Chris Packham
ebb1a59325 ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-18.09 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
Specifically this syncs with commit 99d772547314 ("Bump mv_ddr to
release armada-18.09.2").

The complete log of changes is best obtained from the mv-ddr-marvell.git
repository but some relevant highlights are:

  ddr3: add missing txsdll parameter
  ddr3: fix tfaw timimg parameter
  ddr3: fix trrd timimg parameter
  merge ddr3 topology header file with mv_ddr_topology one
  mv_ddr: a38x: fix zero memory size scrubbing issue

The upstream code is incorporated omitting the portions not relevant to
Armada-38x and DDR3. After that a semi-automated step is used to drop
unused features with unifdef

    find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
        xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
                 -UCONFIG_APN806 -UCONFIG_MC_STATIC \
                 -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
                 -UCONFIG_64BIT -UCONFIG_A3700 -UA3900 -UA80X0 \
                 -UA70X0

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08 16:19:40 +01:00
Tom Rini
c49aff3e66 Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- Various axp209 fixes
- Fixes for OLinuXino-A20-Lime2 / OLinuXino-A20-Lime2-eMMC
2018-12-07 19:02:01 -05:00
Tom Rini
10d3e90f46 Two fixes for the Amlogic Pinctrl driver :
- bad usage of clrsetbits_le32
 - bad pin definition for AXG Family
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Merge tag 'u-boot-amlogic-20181207' of git://git.denx.de/u-boot-amlogic

Two fixes for the Amlogic Pinctrl driver :
- bad usage of clrsetbits_le32
- bad pin definition for AXG Family
2018-12-07 19:01:09 -05:00
Olliver Schinagl
ef52605ebe power: axp209: Limit inrush current for broken boards
Some boards feature a capacitance on LDO3's output that is too large,
causing inrush currents which as a result, shut down the AXP209. This
has been reported before, without knowing the actual cause.

A fix appeared to be done with
commit 0e6e34ac8d ("sunxi: Olimex A20 boards: Enable LDO3 and LDO4 regulators").

The description there is a bit misleading, the kernel does not hang
during AXP209 initialization, the PMIC shuts down, causing voltages to
drop and thus the whole system freezes.

While the AXP209 does have the ability to ramp up the voltage slowly, to
reduce these inrush currents, the voltage rate control (VRC) however is
not applicable when switching on the LDO3 output. Only when going from
an enabled lower voltage setting, to a higher voltage setting is the VRC
in effect.

To work around this problem, we set LDO3 to the lowest possible setting
of 0.7 V if it was not yet enabled, and then let the VRC (if enabled) do
its thing. It should be noted, that for some undocumented reason, there
is a short delay needed between setting the LDO3 voltage register and
enabling the power. One would expect that this delay ought to be just
after enabling the output power at 0.7 V, but this did not work.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
61436d502b power: axp209: Add support for voltage rate control on LDO3
The AXP209 LDO3 regulator supports voltage rate control, or can set a
slew rate.

This allows for the power to gradually rise up to the desired voltage,
instead of spiking up as fast as possible. Reason to have this can be
to reduce the inrush currents for example.

There are 3 slopes to choose from, the default, 'none' is a voltage rise
of 0.0167 V/uS, a 1.6 mV/uS and a 0.8 mV/uS voltage rise.

In ideal world (where vendors follow the recommended design guidelines)
this setting should not be enabled by default. Unless of course AXP209
crashes instead of reporting overcurrent condition as it normally should
do in this case.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
3f7d76a7ed power: axp209: Reduce magic values by adding defines for LDO[234]
The AXP209 has a few 'magisc-ish' values that are better served with
clear defines.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
f5eebc7925 power: axp209: Define the chip version mask
Use a define for the chip version mask on the axp209.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Jean-Jacques Hiblot
d66e54ac80 dwc3-generic: Add support for the TI DWC3 glue
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:46 +01:00
Jean-Jacques Hiblot
668257e023 phy: Add a new driver for OMAP's USB2 PHYs
This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:46 +01:00
Vignesh R
0752d7013a phy: ti-pip3-phy: Add support for USB3 PHY
Add support to handle USB3 PHYs present on AM57xx/DRA7xx SoCs. This is
needed to move AM57xx to DM_USB.

Signed-off-by: Vignesh R <vigneshr@ti.com>

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:46 +01:00
Jean-Jacques Hiblot
6c3af1f24e syscon: dm: Add a new method to get a regmap from DTS
syscon_regmap_lookup_by_phandle() can be used to get the regmap of a syscon
device from a reference in the DTS. It operates similarly to the linux
version of the namesake function.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
4d3825c191 usb: dwc3: Fix a compilation error with the edison defconfig
The error is:
In file included from include/part.h:10:0,
                 from include/usb.h:18,
                 from include/linux/usb/gadget.h:22,
                 from drivers/usb/dwc3/ep0.c:20:
include/ide.h:62:14: error: unknown type name ‘uchar’
 void ide_led(uchar led, uchar status);

Fixing it by including common.h that defines the uchar type.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
93991cf196 dwc3-generic: Add select_dr_mode operation
The select_dr_mode operation is executed when the glue driver is probed.
The role of this optional function is to configure the operating mode
of the controller at the glue level.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
446e3a205b dwc3-generic: Handle the PHYs, the clocks and the reset lines
This make the driver more generic. At this point this driver can replace
the dwc3-of-simple implementation.
Make the description in the Kconfig more generic too.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
0131162439 dm: usb: create a new UCLASS ID for USB gadget devices
UCLASS_USB_DEV_GENERIC was meant for USB devices connected to host
controllers, not gadget devices.
Adding a new UCLASS for gadget devices alone.

Also move the generic DM code for USB gadgets in a separate file for
clarity.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
d648a50c0a dwc3: move phy operation to core.c
Those operations can be used for peripheral operation as well as host
operation.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>

# Conflicts:
#	drivers/usb/dwc3/core.c
#	drivers/usb/host/xhci-dwc3.c
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
20bebd8666 dwc3_generic: do not probe the USB device driver when it's bound
The driver will be probed when usb_gadget_initialize() is called.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
ff8d755834 usb: udc: implement DM versions of usb_gadget_initialize()/_release()/_handle_interrupt()
When DM_USB_GADGET the platform code for the USB device must be replaced by
calls to a USB device driver.

usb_gadget_initialize() probes the USB device driver.
usb_gadget_release() removes the USB device driver.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
687ab54560 usb: introduce a separate config option for DM USB device
Using CONFIG_DM_USB for this purpose prevents using DM_USB for host and not
for device.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
a06955ae1e usb: gadget: Do not call board_usb_xxx() directly in USB gadget drivers
Add 2 functions to wrap the calls to board_usb_init() and
board_usb_cleanup().
This is a preparatory work for DM support for UDC drivers (DM_USB_GADGET).

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-12-07 16:31:45 +01:00
Felix Brack
5eca073ae6 serial: omap: Add code for early debugging
This patch adds code missing when CONFIG_DEBUG_UART_OMAP is enabled as
early debugging UART. The code is basically copied from the ns16550
driver.

Signed-off-by: Felix Brack <fb@ltec.ch>
2018-12-07 08:13:49 -05:00
Patrice Chotard
530b63c228 pinctrl: stm32: Update stm32_pinctrl_get_gpio_dev()
Due to gpio holes management, stm32_pinctrl_get_gpio_dev() must
be updated.

stm32_pinctrl_get_gpio_dev() returns from a given pin selectors
the corresponding bank gpio device and the gpio_offset inside this
gpio bank.

Update also all functions which makes usage of stm32_pinctrl_get_gpio_dev.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:48 -05:00
Patrice Chotard
8b6d45ab64 gpio: stm32f7: Remove CONFIG_CLK flag.
As all STM32 SoCs supports CONFIG_CLK flag,
it becomes useless in this driver, remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:48 -05:00
Patrice Chotard
b2f84e37e2 gpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.h
To allow access to this define by other driver, move
it into gpio.h

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:47 -05:00
Patrice Chotard
dbf928dd26 gpio: stm32f7: Add gpio bank holes management
In some STM32 SoC packages, GPIO bank has not always 16 gpios.
Several cases can occur, gpio hole can be located at the beginning,
middle or end of the gpio bank or a combination of these 3
configurations.

For that, gpio bindings offer the gpio-ranges DT property which
described the gpio bank mapping.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:47 -05:00
Patrice Chotard
043550415b pinctrl: stm32: Move gpio_dev list filling outside probe()
Move gpio_dev list filling outside probe() to speed-up U-boot
boot sequence execution. This list is populated only when needed.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:47 -05:00
Álvaro Fernández Rojas
e9e8d80d8c serial: bcm6858: remove driver and switch to bcm6345
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-07 08:13:46 -05:00
Álvaro Fernández Rojas
09ace9161b serial: bcm6345: switch to raw I/O functions
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-07 08:13:46 -05:00
Grygorii Strashko
b330991874 test: dma: add dma-uclass test
Add a sandbox DMA driver implementation (provider) and corresponding DM
test.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-07 08:13:45 -05:00
Álvaro Fernández Rojas
27ab27f850 dma: add channels support
This adds channels support for dma controllers that have multiple channels
which can transfer data to/from different devices (enet, usb...).

DMA channle API:
 dma_get_by_index()
 dma_get_by_name()
 dma_request()
 dma_free()
 dma_enable()
 dma_disable()
 dma_prepare_rcv_buf()
 dma_receive()
 dma_send()

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
[grygorii.strashko@ti.com: drop unused dma_get_by_index_platdata(),
 add metadata to send/receive ops, add dma_prepare_rcv_buf(),
 minor clean up]
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-07 08:13:45 -05:00
Álvaro Fernández Rojas
10b4dc5208 dma: move dma_ops to dma-uclass.h
Move dma_ops to a separate header file, following other uclass
implementations. While doing so, this patch also improves dma_ops
documentation.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-12-07 08:13:45 -05:00
Carlo Caione
139ebe9eb9 pinctrl: meson: axg: Fix GPIO pin offsets
The pin number (first and last) in the bank definition is missing the
pin base offset shifting. This is causing a miscalculation when
retrieving the register and pin offsets in the GPIO driver causing the
'gpio' command to drive the wrong pins / GPIOs in the second GPIO chip
(the AO bank is driven correctly because the shifting is already 0).

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-12-07 11:01:09 +01:00
Benjamin Gaignard
075b0185b6 pinctrl: stm32: make pinctrl use hwspinlock
Protect configuration registers with a hardware spinlock.

If a hwspinlock is defined in the device-tree node used it
to be sure that none of the others processors on the SoC could
change the configuration at the same time.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06 23:26:33 -05:00
Benjamin Gaignard
9119f547d3 hwspinlock: add stm32 hardware spinlock support
Implement hardware spinlock support for STM32MP1.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06 23:26:33 -05:00
Benjamin Gaignard
283bcd9a34 clk: stm32: add hardware spinlock clock
Add hardware spinlock in the list of the clocks.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06 23:26:32 -05:00
Benjamin Gaignard
7f84fc670b dm: Add Hardware Spinlock class
This is uclass for Hardware Spinlocks.
It implements two mandatory operations: lock and unlock
and one optional relax operation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06 23:26:32 -05:00
Philipp Tomsich
291da96b8e clk: Allow clock defaults to be set during re-reloc state for SPL only
In commit e5e06b65ad ("clk: Allow clock defaults to be set also
during re-reloc state") the earlier guard against setting clock
defaults in pre-reloc state was removed.  While it is easy to filter
'assigned-clocks' properties for SPL using CONFIG_OF_SPL_REMOVE_PROPS,
no such mechanism exists for the pre-reloc stage of the full U-Boot.

With the default defconfig for the RK3399-Q7 (which filter the
'assigned-clocks' property for the DTS used by SPL anyway), this
caused a pause during startup of the full U-Boot stage that lasted for
almost 10s (due to the CPU not having been clocked up yet).

This reintroduces the guard from commit f4fcba5c5b ("clk: Allow
clock defaults to be set also during re-reloc state") and extends it
to only apply outside of a TPL/SPL build: i.e. clk_set_defaults will
now run in pre-reloc state for SPL, but only after reloc for the full
U-Boot.

References: commit f4fcba5c5b ("clk: implement clk_set_defaults()")
References: commit e5e06b65ad ("clk: Allow clock defaults to be set
also during re-reloc state")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-06 23:26:31 -05:00
Priyanka Jain
4909b89ec7 armv8: lx2160a: Add LX2160A SoC Support
LX2160A Soc is based on Layerscape Chassis Generation 3.2
architecture with features:
 16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC,
 2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers,
 3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs,
 4 TZASC instances, etc.

SoC personalites:
LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs
LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs

Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Peng Ma
1039d1ac63 scsi: ceva: add ls2080a soc support
Add ahci compatible support for ls2080a soc.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
[YS: add fallthrough comment]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:38:03 -08:00
Peng Ma
aaaffe9050 scsi: ceva: add ls1088a soc support
Add ahci compatible support for ls1088a soc.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Peng Ma
5fcae59741 scsi: ceva: add ls1046a soc support
Add ahci compatible support for ls1046a soc.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Rajesh Bhagat
c5e6637f68 drivers: qe: add TFABOOT support
Adds TFABOOT support and allows to pick QE firmware
on basis of boot source.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: remove line continuation in quoted string]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:51 -08:00
Rajesh Bhagat
382c53f946 net: fm: add TFABOOT support
Adds TFABOOT support and allows to pick FMAN firmware
on basis of boot source.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix checkpatch issues]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:42 -08:00
Pankit Garg
9bd5fe7027 drivers: ifc: dynamic chipselect mapping support
IFC driver changes to implement the chipselect mappings at run time.

Defines init_early_memctl_regs and init_final_memctl_regs with
chipselect dynamic mapping for nor and nand boot.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix checkpatch issues]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Martin Fuzzey
b95938117c w1: fix occasional enumeration failure
Sometimes enumeration fails (about 1 in 50 times on my custom board).

The underlying reason is probably electrical but Linux does not have
the problem.

Comparing the Linux / u-boot implementations shows that Linux
retries the error case whereas u-boot aborts early.

Removing the early abort in u-boot fixes the problem.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
2018-12-06 17:15:15 -05:00
Tom Rini
2a055ea532 Minor sandbox enhancements / fixes
tpm improvements to clear up v1/v2 support
 buildman toolchain fixes
 New serial options to set/get config
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Merge tag 'dm-pull-5dec18' of git://git.denx.de/u-boot-dm

Minor sandbox enhancements  / fixes
tpm improvements to clear up v1/v2 support
buildman toolchain fixes
New serial options to set/get config
2018-12-05 20:32:25 -05:00
Tom Rini
9450ab2ba8 Merge branch 'master' of git://git.denx.de/u-boot-spi
- Various MTD fixes from Boris
- Zap various unused / legacy paths.
- pxa3xx NAND update from Miquel

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-05 15:06:24 -05:00
Boris Brezillon
08898e8b22 mtd: sf: Make sf_mtd.c more robust
SPI flash based MTD devs can be registered/unregistered at any time
through the sf probe command or the spi_flash_free() function.

This commit does not try to fix the root cause as it would probably
require rewriting most of the code and have an mtd_info object
instance per spi_flash object (not to mention that the the spi-flash
layer is likely to be replaced by a spi-nor layer ported from Linux).

Instead, we try to be as safe as can be by checking the code returned
by del_mtd_device() and complain loudly when there's nothing we can
do about the deregistration failure. When that happens we also reset
sf_mtd_info.priv to NULL, and check for NULL pointer in the mtd hooks
so that -ENODEV is returned instead of hitting a NULL pointer
dereference exception when the MTD instance is later accessed by a user.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
7371944a71 mtd: sf: Unregister the MTD device prior to removing the spi_flash obj
The DM implementation of spi_flash_free() does not unregister the MTD
device before removing the spi dev object. This leads to a use-after-free
bug when the MTD device is later accessed by a MTD user (observed when
attaching the device to UBI after env_sf_load() has called
spi_flash_free()).

Implement ->remove() and call spi_flash_mtd_unregister() from there.

Fixes: 9fe6d8716e ("mtd, spi: Add MTD layer driver")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-12-06 00:45:36 +05:30
Boris Brezillon
4a5594fa20 mtd: Don't stop MTD partition creation when it fails on one device
MTD partition creation code is a bit tricky. It tries to figure out
when things have changed (either MTD dev list or mtdparts/mtdids vars)
and when that happens it first deletes all the partitions that had been
previously created and then creates the new ones based on the new
mtdparts/mtdids values.
But before deleting the old partitions, it ensures that none of the
currently registered parts are being used and bails out when that's
not the case. So, we end up in a situation where, if at least one MTD
dev has one of its partitions used by someone (UBI for instance), the
partitions update logic no longer works for other devs.

Rework the code to relax the logic and allow updates of MTD parts on
devices that are not being used (we still refuse to updates parts on
devices who have at least one of their partitions used by someone).

Fixes: 5db66b3aee ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
2428d9160b mtd: Make sure we don't parse MTD partitions belonging to another dev
The mtdparts variable might contain partition definitions for several
MTD devices. Each partition layout is separated by a ';', so let's
make sure we don't pick a wrong name when mtdparts is malformed.

Fixes: 5db66b3aee ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
772aa97993 mtd: Make sure the name passed in mtdparts fits in mtd_name[]
The local mtd_name[] variable is limited in size. Return an error if
the name passed in mtdparts does not fit in this local var.

Fixes: 5db66b3aee ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
429e048e41 mtd: Be more strict on the "mtdparts=" prefix check
strstr() does not guarantee that the string we're searching for is
placed at the beginning. Use strncmp() instead.

Fixes: 5db66b3aee ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
96b06434e5 mtd: Use get_mtdids() instead of env_get("mtdids") in mtd_search_alternate_name()
The environment is not guaranteed to contain a valid mtdids variable
when called from mtd_search_alternate_name(). Call get_mtdids() instead
of env_get("mtdids").

Fixes: ff4afa8a98 ("mtd: uboot: search for an equivalent MTD name with the mtdids")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
492151b209 mtd: sf: Make sure we don't register the same device twice
spi_flash_mtd_register() can be called several times and each time it
will register the same mtd_info instance like if it was a new one.
The MTD ID allocation gets crazy when that happens, so let's track the
status of the sf_mtd_info object to avoid that.

Fixes: 9fe6d8716e ("mtd, spi: Add MTD layer driver")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-12-06 00:45:36 +05:30
Boris Brezillon
a02820fca9 mtd: Delete partitions attached to the device when a device is deleted
If we don't do that, partitions might still be exposed while the
underlying device is gone.

Fixes: 2a74930da5 ("mtd: mtdpart: implement proper partition handling")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
779c9c0565 mtd: Parse mtdparts/mtdids again when the MTD list has been updated
Updates to the MTD device list should trigger a new parsing of the
mtdids/mtdparts vars even if those vars haven't changed.

Fixes: 5db66b3aee ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
4c47fd0b6b mtd: Add a function to report when the MTD dev list has been updated
We need to parse mtdparts/mtids again everytime a device has been
added/removed from the MTD list, but there's currently no way to know
when such an update has been done.

Add an ->updated field to the idr struct that we set to true every time
a device is added/removed and expose a function returning the value
of this field and resetting it to false.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Andy Shevchenko
50bf7d03c2 serial: ns16550: Provide ->getinfo() implementation
New callback will supply necessary information, for example,
to ACPI SPCR table.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 07:23:15 -07:00
Tom Rini
9649c5343f video, bmp and cls command updates
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Merge tag 'video-updates-for-2019.01-rc2' of git://git.denx.de/u-boot-video

video, bmp and cls command updates
2018-12-05 08:24:14 -05:00
Andy Shevchenko
4e7207791c serial: ns16550: Read reg-io-width from device tree
Cache the value of the reg-io-width property for the future use.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:08:35 -07:00
Andy Shevchenko
d5bb4f862b dm: serial: Introduce ->getinfo() callback
New callback will give a necessary information to fill up ACPI SPCR table,
for example. Maybe used later for other purposes.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change ADR_SPACE_SYSTEM_IO to SERIAL_ADDRESS_SPACE_IO to fix build error:
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:08:31 -07:00
Andy Shevchenko
ac7f5db9dc dm: serial: Add ->getconfig() callback
In some cases it would be good to know the settings, such as parity,
of current serial console. One example might be an ACPI SPCR table
to generate using these parameters.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:06:44 -07:00
Patrick Delaunay
4f86a724e8 power: regulator: denied disable on always-on regulator
Don't disable regulator which are tagged as "regulator-always-on" in DT.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jack Mitchell <jack@embed.me.uk>
Tested-by: Jack Mitchell <jack@embed.me.uk>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Richard Röjfors <richard@puffinpack.se>
Tested-by: Richard Röjfors <richard@puffinpack.se>
Reviewed-by: Felix Brack <fb@ltec.ch>
Tested-by: Felix Brack <fb@ltec.ch>
2018-12-05 06:06:44 -07:00
Álvaro Fernández Rojas
7959882049 dm: core: add functions to get/remap I/O addresses by name
This functions allow us to get and remap I/O addresses by name, which is useful when there are multiple reg addresses indexed by reg-names property.
This is needed in bmips dma/eth patch series, but can also be used on many
other drivers.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:06:44 -07:00
Simon Glass
4a978e86d7 video: backlight: Fix log message in enable_sequence()
This has an extra argument. Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
2018-12-05 06:01:35 -07:00
Simon Glass
165be50f5a input: i8042: Use remove() instead of exported functions
We should not have exported functions in a driver. The i8042_disable()
function is used to disable the keyboard. Provide a remove() method
instead, which is the standard way of disabling a device.

We could potentially add a method to flush input but that does not seem
necessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:35 -07:00
Simon Glass
eafb4a59db cros_ec: Adjust to use v1 vboot context only
At present there are no users of the 64-byte v2 context. The v1 context is
only 16 bytes long and currently an error is raised if too much data is
returned from the EC.

Update the code to limit the size to 16 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
a749c09a1e cros: Correct a printf() string and comment
Correct a warning that occurs on sandbox. Also fix the comment style in
cros_ec_set_lid_shutdown_mask().

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
2a07269062 sandbox: sysreset: Update to support power-on reset
If U-Boot is started from SPL or TPL, then those earlier phases deal with
the reset cause. On real hardware this cause may be lost once it is read.
Emulate that behaviour in sandbox by reporting a warm reset when a
previous phase has run since start-up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
e628bba785 sandbox: net: Correct name copy in eth_raw_bus_post_bind()
We cannot be sure that the interface name takes up the full length of the
space available to it. Use strcpy() instead of memcpy() in this case. This
corrects a valgrind warning.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00