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arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table

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Enable 'fpga' command in u-boot. User will be able to use the FPGA
command to program the FPGA on Stratix10 SoC.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
This commit is contained in:
Ang, Chee Hong 2018-12-19 18:35:15 -08:00 • committed by Marek Vasut
parent c41e660b6b
commit 877ec6ebbd
7 changed files with 79 additions and 28 deletions
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4
arch/arm/mach-socfpga/include/mach/misc.h
View file

@ -18,9 +18,9 @@ struct bsel {
extern struct bsel bsel_str[];
#ifdef CONFIG_FPGA
void socfpga_fpga_add(void);
void socfpga_fpga_add(void *fpga_desc);
#else
static inline void socfpga_fpga_add(void) {}
inline void socfpga_fpga_add(void *fpga_desc) {}
#endif
#ifdef CONFIG_TARGET_SOCFPGA_GEN5

26
arch/arm/mach-socfpga/misc.c
View file

@ -88,33 +88,11 @@ int overwrite_console(void)
#endif
#ifdef CONFIG_FPGA
/*
* FPGA programming support for SoC FPGA Cyclone V
*/
static Altera_desc altera_fpga[] = {
{
/* Family */
Altera_SoCFPGA,
/* Interface type */
fast_passive_parallel,
/* No limitation as additional data will be ignored */
-1,
/* No device function table */
NULL,
/* Base interface address specified in driver */
NULL,
/* No cookie implementation */
0
},
};
/* add device descriptor to FPGA device table */
void socfpga_fpga_add(void)
void socfpga_fpga_add(void *fpga_desc)
{
int i;
fpga_init();
for (i = 0; i < ARRAY_SIZE(altera_fpga); i++)
fpga_add(fpga_altera, &altera_fpga[i]);
fpga_add(fpga_altera, fpga_desc);
}
#endif

23
arch/arm/mach-socfpga/misc_arria10.c
View file

@ -30,6 +30,27 @@
static struct socfpga_system_manager *sysmgr_regs =
(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
/*
* FPGA programming support for SoC FPGA Arria 10
*/
static Altera_desc altera_fpga[] = {
{
/* Family */
Altera_SoCFPGA,
/* Interface type */
fast_passive_parallel,
/* No limitation as additional data will be ignored */
-1,
/* No device function table */
NULL,
/* Base interface address specified in driver */
NULL,
/* No cookie implementation */
0
},
};
#if defined(CONFIG_SPL_BUILD)
static struct pl310_regs *const pl310 =
(struct pl310_regs *)CONFIG_SYS_PL310_BASE;
@ -73,7 +94,7 @@ void socfpga_sdram_remap_zero(void)
int arch_early_init_r(void)
{
/* Add device descriptor to FPGA device table */
socfpga_fpga_add();
socfpga_fpga_add(&altera_fpga[0]);
return 0;
}

22
arch/arm/mach-socfpga/misc_gen5.c
View file

@ -34,6 +34,26 @@ static struct nic301_registers *nic301_regs =
static struct scu_registers *scu_regs =
(struct scu_registers *)SOCFPGA_MPUSCU_ADDRESS;
/*
* FPGA programming support for SoC FPGA Cyclone V
*/
static Altera_desc altera_fpga[] = {
{
/* Family */
Altera_SoCFPGA,
/* Interface type */
fast_passive_parallel,
/* No limitation as additional data will be ignored */
-1,
/* No device function table */
NULL,
/* Base interface address specified in driver */
NULL,
/* No cookie implementation */
0
},
};
/*
* DesignWare Ethernet initialization
*/
@ -221,7 +241,7 @@ int arch_early_init_r(void)
socfpga_sdram_remap_zero();
/* Add device descriptor to FPGA device table */
socfpga_fpga_add();
socfpga_fpga_add(&altera_fpga[0]);
#ifdef CONFIG_DESIGNWARE_SPI
/* Get Designware SPI controller out of reset */

22
arch/arm/mach-socfpga/misc_s10.c
View file

@ -24,6 +24,26 @@ DECLARE_GLOBAL_DATA_PTR;
static struct socfpga_system_manager *sysmgr_regs =
(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
/*
* FPGA programming support for SoC FPGA Stratix 10
*/
static Altera_desc altera_fpga[] = {
{
/* Family */
Intel_FPGA_Stratix10,
/* Interface type */
secure_device_manager_mailbox,
/* No limitation as additional data will be ignored */
-1,
/* No device function table */
NULL,
/* Base interface address specified in driver */
NULL,
/* No cookie implementation */
0
},
};
/*
* DesignWare Ethernet initialization
*/
@ -125,6 +145,8 @@ int arch_misc_init(void)
int arch_early_init_r(void)
{
socfpga_fpga_add(&altera_fpga[0]);
return 0;
}

6
drivers/fpga/altera.c
View file

@ -39,6 +39,9 @@ static const struct altera_fpga {
#if defined(CONFIG_FPGA_STRATIX_V)
{ Altera_StratixV, "StratixV", stratixv_load, NULL, NULL },
#endif
#if defined(CONFIG_FPGA_STRATIX10)
{ Intel_FPGA_Stratix10, "Stratix10", stratix10_load, NULL, NULL },
#endif
#if defined(CONFIG_FPGA_SOCFPGA)
{ Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
#endif
@ -154,6 +157,9 @@ int altera_info(Altera_desc *desc)
case fast_passive_parallel_security:
printf("Fast Passive Parallel with Security (FPPS)\n");
break;
case secure_device_manager_mailbox:
puts("Secure Device Manager (SDM) Mailbox\n");
break;
/* Add new interface types here */
default:
printf("Unsupported interface type, %d\n", desc->iface);

4
include/altera.h
View file

@ -39,6 +39,8 @@ enum altera_iface {
fast_passive_parallel,
/* fast passive parallel with security (FPPS) */
fast_passive_parallel_security,
/* secure device manager (SDM) mailbox */
secure_device_manager_mailbox,
/* insert all new types before this */
max_altera_iface_type,
};
@ -54,6 +56,8 @@ enum altera_family {
Altera_StratixII,
/* StratixV Family */
Altera_StratixV,
/* Stratix10 Family */
Intel_FPGA_Stratix10,
/* SoCFPGA Family */
Altera_SoCFPGA,