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mtd: rawnand: denali_dt: add more clocks based on IP datasheet
Based on Linux commit 6f1fe97bec349a1fd6c5a8c7c5998d759fe721d5 Currently, denali_dt.c requires a single anonymous clock, but the Denali User's Guide requires three clocks for this IP: - clk: controller core clock - clk_x: bus interface clock - ecc_clk: clock at which ECC circuitry is run This commit supports these named clocks to represent the real hardware. For the backward compatibility, the driver still accepts a single clock just as before. The clk_x_rate is taken from the clock driver again if the named clock "clk_x" is available. This will happen only for future DT, hence the existing DT files are not affected. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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parent
b32aa9ebc5
commit
a13fe7afe9
1 changed files with 35 additions and 3 deletions
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@ -62,7 +62,7 @@ static int denali_dt_probe(struct udevice *dev)
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{
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struct denali_nand_info *denali = dev_get_priv(dev);
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const struct denali_dt_data *data;
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struct clk clk;
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struct clk clk, clk_x, clk_ecc;
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struct resource res;
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int ret;
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@ -87,15 +87,47 @@ static int denali_dt_probe(struct udevice *dev)
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denali->host = devm_ioremap(dev, res.start, resource_size(&res));
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ret = clk_get_by_index(dev, 0, &clk);
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ret = clk_get_by_name(dev, "nand", &clk);
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if (ret)
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ret = clk_get_by_index(dev, 0, &clk);
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if (ret)
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return ret;
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ret = clk_get_by_name(dev, "nand_x", &clk_x);
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if (ret)
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clk_x.dev = NULL;
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ret = clk_get_by_name(dev, "ecc", &clk_ecc);
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if (ret)
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clk_ecc.dev = NULL;
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ret = clk_enable(&clk);
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if (ret)
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return ret;
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denali->clk_x_rate = clk_get_rate(&clk);
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if (clk_x.dev) {
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ret = clk_enable(&clk_x);
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if (ret)
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return ret;
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}
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if (clk_ecc.dev) {
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ret = clk_enable(&clk_ecc);
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if (ret)
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return ret;
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}
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if (clk_x.dev) {
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denali->clk_x_rate = clk_get_rate(&clk_x);
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} else {
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/*
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* Hardcode the clock rates for the backward compatibility.
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* This works for both SOCFPGA and UniPhier.
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*/
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dev_notice(dev,
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"necessary clock is missing. default clock rates are used.\n");
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denali->clk_x_rate = 200000000;
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}
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return denali_init(denali);
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}
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