commit 0543a1ed27 ("imx8m: fixup thermal trips") moved updating the
thermal trip points to all IMX8M so we can remove it from our board
specific dt config.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add support for the MSC SM2S-IMX8PLUS SMARC Module. Tested in conjunction
with the MSC SM2-MB-EP1 Mini-ITX Carrier Board.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
In order to boot over USB, the device tree needs to enable
a few extra nodes in SPL. Since the USB driver has the
ability to detect host/device, the dr_mode can be removed
from the device tree since it needs to act as a device when
booting and OTG is the default mode. Add USB boot support
to spl_board_boot_device and enable the corresponding config
options.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
There are a few functions which are not essential for use in
SPL, but they take up enough space to make other preferred
features not fit. Remove the extras.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
The DDR is configured for LPDDR4 running at 1.6GHz which requires
the voltage on the PMIC to rise a bit before initializing LPDDR4
or it will be running out of spec.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The RD-AC5X-32G16HVG6HLG-A0 development board main components and
features include:
* Main 12V/54V power supply
* 270 Gbps throughput packet processor on the main board
* DDR4:
* SR1: 2GB DDR4 2400MT/S(1GB x 2 pcs ) with ECC(1GB x 1 pcs)
* SR2: 4GB DDR4 2400MT/S(2GB x 2 pcs ) with ECC(2GB x 1 pcs)
* PCB co-layout with 4GB device to support 8GB (Dual CS) requirement
* 16GB eMMC (Samsung KLMAG1JETD-B041006)
* 16MB SPI NOR(GD25Q127C)
* 32 x 1000 Base-T interfaces
* 16 x 2500 Base-T interfaces
* SR1: 88E2540*4
* SR2: 88E2580*1+88E2540*2
* Six (6) x 25G Base-R SFP28 interfaces
* One (1) x RJ-45 console connector, interfacing to the on board UART
* One (1) x USB Type-A connector, interfacing to the USB 2.0 port (0)
* One (1) x USB Type-mini B connector, interfacing to the USB 2.0 port (1)
* One (1) x RJ-45 1G Base-T Management port, interfacing to the host
port (shared with PCIe) Connected to 88E1512 Gigabit Ethernet Phy
* One (1) x Oculink port, interfacing to the PCIe port for external CPU
connection
* POE 802.3AT support on Port 1 ~ Port 32, 802.3BT support on Port 33 ~
Port 48 (Microsemi PD69208T4, PD69208M or TI TPS2388,TPS23881
solution)
* POE total power budget 780W
* LED interfaces per network port/POE
* LED interfaces (common) showing system status
* PTP TC mode Supported (Reserved M.2 connector to support BC mode)
Signed-off-by: Chris Packham <judge.packham@gmail.com>
File name with pattern u-boot-spl* is used on all places except in kwb
image for binary with SPL-only code. Combined binary with both SPL and
proper U-Boot in other places has file name pattern u-boot-with-spl*.
Make it consistent also for kwb image and rename u-boot-spl.kwb to
u-boot-with-spl.kwb as this image contains both SPL and proper U-Boot code.
Also update documentation about file name changes.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch updates Microchip MPFS Icicle Kit support. For now,
add Microchip QSPI driver and a small 4MB reservation is
made at the end of 32-bit DDR to provide some memory for
the HSS to use.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Resolve all uses of CONFIG_SYS_MHZ with the currently defined value.
Remove code which depends on CONFIG_SYS_MHZ but where no board configs
actually use that code.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The DT used for Calxeda Highbank and Midway systems exposes a "system
registers" block, modeled as a DT subnode.
This includes several clocks, including the two fixed clocks for the
main oscillator and timer.
So far U-Boot was ignorant of this special construct (a "clocks" node
within the "hb-sregs" node), as it didn't need the PLL clocks in there.
But that also meant we lost the fixed clocks, which form the base for
the UART baudrate generator and also the SP804 timer.
To allow the generic PL011 and SP804 driver to read the clock rate,
add a simple bus driver, which triggers the DT node discovery inside this
special node. As we only care about the fixed clocks (we don't have
drivers for the PLLs anyway), just ignore the address translation (for
now).
The binding is described in bindings/arm/calxeda/hb-sregs.yaml, the DT
snippet in question looks like:
=======================
sregs@fff3c000 {
compatible = "calxeda,hb-sregs";
reg = <0xfff3c000 0x1000>;
clocks {
#address-cells = <1>;
#size-cells = <0>;
osc: oscillator {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <33333000>;
};
....
};
};
=======================
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Add test cases for accessing the FWU Metadata on the sandbox
platform. The sandbox platform also uses the metadata access driver
for GPT partitioned block devices.
The FWU feature will be tested on the sandbox64 variant with a raw
capsule. Remove the FIT capsule testing from sandbox64 defconfig --
the FIT capsule test will be run on the sandbox_flattree variant.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The FWU Multi Bank Update feature allows the platform to boot the
firmware images from one of the partitions(banks). The first stage
bootloader(fsbl) passes the value of the boot index, i.e. the bank
from which the firmware images were booted from to U-Boot. On the
STM32MP157C-DK2 board, this value is passed through one of the SoC's
backup register. Add a function to read the boot index value from the
backup register.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Enabling capsule update functionality on the platform requires
populating information on the images that are to be updated using the
functionality. Do so for the DK2 board.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().
Rename it to resolve this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
BCM6753 is essentially same as the main chip BCM6855 but with different
SKU number. Now that BCM6855 is supported under CONFIG_ARCH_BCMBCA and
CONFIG_BCM6855, remove the original ARCH_BCM6753 support and migrate its
configuration and dts settings. This includes:
- Remove the bcm96753ref board folder. It is replaced by the
generic bcmbca board folder.
- Merge the 6753.dtsi setting to the new 6855.dtsi file. Update
96753ref board dts with the new compatible string.
- Delete broadcom_bcm96763ref.h and merge its setting to the new
bcm96855.h file.
- Delete bcm96753ref_ram_defconfig and use a basic config version of
bcm96855_defconfig
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM6855 is a Broadcom ARM A7 based PON Gateway SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family. Like other
broadband SoC, this patch adds it under CONFIG_BCM6855 chip config and
CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and ARM PL101 uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Now that BCM6858 is supported under CONFIG_ARCH_BCMBCA and
CONFIG_BCM6858, remove the original ARCH_BCM6858 support and migrate its
configuration and dts settings. This includes:
- Remove the bcm968580xref board folder. It is replaced by the generic
bcmbca board folder.
- Update bcm968580xref board dts with the new compatible string.
- Delete broadcom_bcm968580xref.h and merge its setting to the new
bcm96858.h file.
- Remove bcm968580xref_ram_defconfig as a basic config version of
bcm96858_defconfig is now added.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM6858 is a Broadcom B53 based PON Gateway SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family. Like other broadband
SoC, this patch adds it under CONFIG_BCM6858 chip config and
CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and the
original dts is updated with the one from linux next git repository.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM68360 is a variant within the BCM6856 chip family. Now that BCM6856
is supported under CONFIG_ARCH_BCMBCA and CONFIG_BCM6856, remove the
original ARCH_BCM68360 support and migrate its configuration and dts
settings. This includes:
- Remove the bcm968360bg board folder. It is replaced by the generic
bcmbca board folder.
- Merge the 68360.dtsi setting to the new 6856.dtsi file. Update board
dts with the new compatible string.
- Merge broadcom_bcm968360bg.h setting to the new bcm96856.h file.
- Remove bcm968360bg_ram_defconfig as a basic config version of
bcm96856_defconfig is now added.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM6856 is a Broadcom B53 based PON Gateway SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family. Like other Broadband
SoC, this patch adds it under CONFIG_BCM6856 chip config and
CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and Broadcom uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from
linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM63158 carries the CONFIG_SYSRESET from the original configuration. It
provide reset_cpu function already so need to define weak version of the
dummy reset_cpu for other BCMBCA SoCs to avoid linking error.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Now that BCM63158 is supported under CONFIG_ARCH_BCMBCA and
CONFIG_BCM63158, remove the original ARCH_BCM63158 support and migrate
configuration settings.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM63158 is a Broadcom B53 based DSL Gateway SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family. Like other
Broadband SoC, this patch adds it under CONFIG_BCM63158 chip
config and CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and ARM PL011 uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from
linux.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM4908 is a Broadcom B53 based WLAN AP router SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added
under ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and Broadcom uart.
This SoC is supported in the linux git repository so the dts and dtsi
files are stripped down version of linux copies with mininum blocks
needed by u-boot.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
BCM6813 is a Broadcom B53 based PON and WLAN AP router SoC. It is part
of the BCA (Broadband Carrier Access origin) chipset family so it's
added under ARCH_BCMBCA platform. This initial support includes a
bare-bone implementation and dts with CPU subsystem, memory and ARM
PL011 uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
BCM4912 is a Broadcom B53 based WLAN AP router SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011 uart.
This SoC is supported in the linux-next git repository so the dts
and dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
BCM63146 is a Broadcom B53 based DSL Broadband SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011 uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
BCM63138 is an ARM A9 based DSL Broadband SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory, ARM A9 global timer
and Broadcom uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are stripped down version of linux copies with mininum blocks
needed by u-boot.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
This patch applies on top of the my previous patch [1].
[1] https://lists.denx.de/pipermail/u-boot/2022-August/490570.html
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM63148 is an Broadcom B15 based DSL Broadband SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and Broadcom uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
BCM6756 is an ARM A7 based WLAN Gateway and Access Point Broadband SoC.
It is part of the BCA(Broadband Carrier Access origin) chipset family so
it's added under ARCH_BCMBCA platform. This initial support includes a
bare-bone implementation and dts with CPU subsystem, memory and ARM
PL011 uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
BCM6878 is an ARM A7 based PON Broadband SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011
uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux with minor fix-up that needs to be
upstreamed to linux as well.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
BCM6846 is an ARM A7 based PON Broadband SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and Broadcom uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux with minor fix-up that needs to be
upstreamed to linux as well.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
BCM63178 is an ARM A7 based DSL Broadband SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011 uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux with minor fix-up that needs to be
upstreamed to linux as well.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
- simplefb rotation support
- support splash as raw image from MMC
- enhancements to Truetype console (multiple fonts and sizes)
- drop old LCD support
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Merge tag 'video-20221030' of https://source.denx.de/u-boot/custodians/u-boot-video
- fix [hv]sync active vs back porch in dw_mipi_dsi
- simplefb rotation support
- support splash as raw image from MMC
- enhancements to Truetype console (multiple fonts and sizes)
- drop old LCD support
This option should not have the SYS_ in it. Drop it so it fits in with the
other video options.
Also simplify the alignment code in gunzip_bmp(), since malloc() always
returns a 32-bit-aligned pointer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Layerscape update
- support sysreset,
- de-select FSL_IFC when booting from SD
- disable unused parts of ICID tables
- reduce ns_dev size for csu
- enable dma snooping for ls104x
- nand driver fixups for ls1043ardb rev 7.0 boards.
The GW7904 is based on the i.MX 8M Mini SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- microSD connector with UHS support
- LIS2DE12 3-axis accelerometer
- Gateworks System Controller
- IMX8M FEC
- 2x RS232 off-board connectors
- PMIC
- 10x bi-color LED's
- 1x miniPCIe socket with PCIe and USB2.0
- 802.3at Class 4 PoE
- 10-30VDC input via barrel-jack
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam.
i.Core MX8M Plus needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
The GW7903 has a BD71847 PMIC on I2C1. Adjust the model compare strings
to add it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Building with GCC 12.2 results in an error
board/gateworks/gw_ventana/gw_ventana.c:636:68: error: the comparison
will always evaluate as 'true' for the address of 'pwm_padmux' will
never be NULL [-Werror=address]
636 | } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") &&
| ^~
Remove the superfluous check.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
There are no platforms that have not migrated to using DM_KEYBOARD,
remove the legacy option.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix the MMC env device for boards with eMMC by adding a
board_mmc_get_env_dev override to return the boot device as the
MMC env device.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add an entry for USB boot so that U-Boot could be loaded via
the Serial Download Protocol.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The current implementation of spl_board_init() USB boot handling is
not correct, the MX8MM BootROM v1 does not support SDP load when
re-entered from U-Boot SPL, it is up to U-Boot to perform the next
stage load using its own internal CI gadget driver and SDP protocol
implementation. Drop the spl_board_init() to let SPL continue with
normal load in case the SDP support is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The current implementation of spl_board_init() is not correct,
the MX8MM BootROM v1 does not support SDP load when re-entered
from U-Boot SPL, it is up to U-Boot to perform the next stage
load using its own internal CI gadget driver and SDP protocol
implementation. Drop the spl_board_init() to let SPL continue
with normal load in case the SDP support is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Instead of duplicating code implemented by i.MX8M version of arch_misc_init()
in every board, enable CONFIG_ARCH_MISC_INIT and call arch_misc_init() from
spl_board_init(). This removes the duplication. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
- dts update and sync for rk356x, rk3288, rk3399 from Linux;
- Add rk3399 EAIDK-610 board support;
- Update for puma-rk3399 board;
- some fix and typo fix in different drivers;
The first production revision of the MX8M Mini Menlo board implements
a hardware change which swaps console UART and another UART connector.
Implement the swap, which maps the console UART back to the way Verdin
console is mapped.
Signed-off-by: Marek Vasut <marex@denx.de>
Update the GW74xx PMIC configuration:
- increase VDD_SOC DVS1 to 0.85V per datasheet
- increase VDD_SOC DVS0 to 0.95V before first DRAM access
- increase VDD_ARM DVS0 to 0.95V to support kernel overdrive voltage (OD)
- remove unnecessary changes to VDD_DRAM as we don't use 3GHz DRAM
- remove unnecessary change to LDO2 as it is unused
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
v2: update commit log with more detail
Add RAM auto-sizing, without this change memory size for all SKU is set
to 8GB and the system will crash on SKU with less memory as soon as the
non existent memory addresses are accessed.
Fixes: 2bc2f817ce ("board: toradex: add verdin imx8m plus support")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
With this call the following attributes get set to the device-tree
and are then accessible from linux in /proc/device-tree/
serial-number: The serial number that is stored in config-block
toradex,board-rev: The version of the module (e.g. V1.1A)
toradex,product-id: The SKU number of the module runnin
Fixes: commit 2bc2f817ce ("board: toradex: add verdin imx8m plus support")
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
With this call the following attributes get set to the device-tree
and are then accessible from linux in /proc/device-tree/
serial-number: The serial number that is stored in config-block
toradex,board-rev: The version of the module (e.g. V1.1A)
toradex,product-id: The SKU number of the module running
Fixes: commit 14d5aeff77 ("board: toradex: Add Verdin iMX8M Mini support")
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Enable the I2C bus and set a env variable for the reset GPIO of the touch
controller. This allows us to probe the panel in a script.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This adds support for the Kontron Electronics SoM SL i.MX8MM OSM-S
and the matching baseboard BL i.MX8MM OSM-S.
The SoM hardware complies to the Open Standard Module (OSM) 1.0
specification, size S (https://sget.org/standards/osm).
The existing board configuration for the non-OSM SoM is reused and
allows to detect the SoM variant at runtime.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Refactor the code a bit without any functional changes.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This adjusts the names of the boards and SoMs to the official naming
used by Kontron marketing. These changes also affect devicetree
names and compatibles. The same changes have been submitted to the
Linux kernel.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This sets an env variable 'som_type' from the board code. It can
later be used by environment scripts, e. g. to select the proper
devicetree for the board.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
These parameters are needed for stable performance on new hardware
with Nanya LPDDR4 chips.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
The new stable configuration is missing the 100mt setpoint, remove
it before updating the config to make sure the changes are separated
cleanly.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Fix the spaces and alignment for easier tracking of changes and comparing
with configs generated by the tools.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Move the environment from the board header to a separate text file
and also drop those variables that are already set in env_default.h
from the Kconfig options.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
In case we boot from SD card or eMMC, we also want to load
the environment from the according boot device.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Nowadays detecting the SPI NOR as boot device from the ROMAPI is
fixed and works even if the SPI NOR is used as fallback boot device.
Therefore we don't need this workaround anymore.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
The display isn't and won't be used in U-Boot. Also the display setup
is not yet supported in mainline Linux, so even for cases where the
U-Boot devicetree is passed to the kernel there is currently no use
for this configuration.
Selecting the proper configuration in the kernel FIT image automatically
depending on the detected hardware can be handled by a script in the
environment.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Move the environment from the board header to a separate text file
and also drop those variables that are already set in env_default.h
from the Kconfig options or are not needed anymore.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Instead of checking both, SPI NOR and MMC for loading U-Boot proper
and the environment, implement a way to detect the actual boot
device even if the BootROM doesn't report it and we can't rely
solely on the fuse settings, as by default we use MMC as primary
boot device and boot from SPI NOR via the secondary fallback device
(EEPROM Recovery Mode).
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Beside some rather unexciting sync of the DTs from the kernel tree, and
some Kconfig cleanup, there are some improvements for the ARMv5 Allwinner
family, to support boards with the F1C200s (64MB DRAM) better. We will
get actual board support as soon as the DTs have passed the Linux review
process.
There is also support for the X96 Mate TV Box, featuring the H616 SoC and
a full 4GB of DRAM.
Also we found the secret to enable SPI booting on the H616 (pin PC5 must
be pulled to GND), so the SPI boot support patch is now good to go.
Passed the gitlab CI, plus briefly tested on Pine64-LTS, LicheePi Nano,
X96 Mate and OrangePi Zero.
Check firmware_fdt_addr header to see if it
is a valid fdt blob.
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Since OpenSBI commit bf3ef53bb7f5 ("firmware: Enable FW_PIC by default"),
OpenSBI runs directly at the load address without any code movement.
This causes the SPL version of QEMU 'virt' U-Boot does not boot Linux
kernel anymore. In that case, OpenSBI is loaded and runs at 0x81000000,
and it creates a 512KiB PMP window from that address. When booting
the Linux kernel, moving kernel to its linking address 0x80200000
overlaps the PMP window, and a PMP access failure is raised.
Update SPL_OPENSBI_LOAD_ADDR to load OpenSBI to a safe address.
Reported-by: Yangjie Zhang <pyjmstr@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Yangjie Zhang <pyjmstr@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The X96 Mate TV box is a TV box with the Allwinner H616 SoC. It is
available with up to 4GB of DRAM and 64GB eMMC.
The DRAM chips require a different configuration when compared to the
OrangePi Zero2, we must not use read/write training and write leveling.
Add a defconfig for the box, so that we can easily build U-Boot for it.
We synced the .dts file already from the kernel tree.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Now that a single binary containing TPL/SPL correctly formatted for SPI
flashes and U-Boot proper, can be generated by binman, let's do it.
Also update the documentation to tell the user to use this newly
generated file instead of manually generating and flashing the binaries.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The offset of the SPL payload on Puma is different than for other
Rockchip devices in that it is stored at offset 256K instead of much
further away in the MMC.
Flashing one binary instead of two at different offsets is much more
user friendly so let's migrate to it by modifying the offset in the Puma
specific Device Tree.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Depending on the toolchain used to compile the SPL for Puma RK3399-Q7
module, the board does not boot because the resulting binary is too big
to fit in SRAM.
Let's add a TPL so that there's no need to fiddle with or hack the
defconfig to have a working bootloader.
This follows what's been done for the majority of other RK3399-based
boards.
See the original commit for the first migrations:
bdc0008011 "rockchip: rk3399: update defconfig for TPL"
Unfortunately, the offset in SPI-NOR for U-Boot proper needs to be
modified, since the move from SPL to TPL+SPL for idbloader.img (and the
"only the first 2KB per 4KB blocks are written" "hack" for rkspi format)
increased the size above 256KB. Let's move it to 512KB to, hopefully, be
safe.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chances are when one boots U-Boot proper from a given storage medium,
they want the same medium to be used to load and store the environment.
This basically allows to have completely separate U-Boot (TPL/SPL/U-Boot
proper/environment) per storage medium which is convenient when working
with recovery from SD-Card as one would just need to insert a properly
configured SD-Card into the device to have access to their whole debug
setup.
No fallback mechanism is provided as to not dirty other storage medium
environment by mistake. However, since arch_env_get_location() is called
by env_init() which is part of the pre-relocation process, a valid,
non-ENVL_UNKNOWN, value shall be returned otherwise the relocation fails
with the following message:
initcall sequence 00000000002866c0 failed at call 0000000000256b34 (err=-19)
This valid, non-ENVL_UNKNOWN, value is ENVL_NOWHERE which requires to
always select CONFIG_ENV_IS_NOWHERE otherwise this work-around does not
work.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Automatically detect which MMC device (SD-Card or eMMC) was used to load
U-Boot proper and load the environment from that MMC device instead of
a hardcoded one.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
CONFIG_ENV_OFFSET is set in the defconfig to a different value already
so this isn't used. Let's remove it as to not confuse users.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
distroboot should try first on the same MMC medium as the one the SPL
loaded U-Boot proper from. This was the case when the introducing commit
was merged because the default order was eMMC first and then SD card.
The check was therefore made only on whether we booted from SD card,
because otherwise the order was the expected one.
However, in commit b212ad24a6 ("rockchip: Fix MMC boot order"), the
order was swapped. Meaning our simple check is now useless.
Let's fix that by accounting for all scenarii: default boot_targets has
mmc0 first but booting from SD Card, mmc1 first but booting from eMMC.
Fixes: b212ad24a6 ("rockchip: Fix MMC boot order")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Specification
- Rockchip RK3399
- LPDDR3 4GB
- TF sd scard slot
- eMMC
- AP6255 for WiFi + BT
- Gigabit ethernet
- HDMI out
- 40 pin header
- USB 2.0 x 2
- USB 3.0 x 1
- USB 3.0 Type-C x 1 work in otg mode
- 12V DC Power supply
The dts file is sync from linux-next[0].
[0]:https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
CONFIG_SERIAL_TAG is not selectable for ARM64 machines. While
get_board_serial is weakly defined if ENV_VARS_UBOOT_RUNTIME_CONFIG is
defined, it is only called when CONFIG_SUPPORT_PASSING_ATAGS is defined,
which also is not selectable for ARM64 machines. Therefore this is dead
code so let's remove it.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The phycore_rk3288 board has a SPL size problem,
so remove phycore_init() function to stay within the limits.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For some unknown reason GNU assembler version 2.31.1 (arm-linux-gnueabi-as
from Debian Buster) cannot compile following code from located in file
board/nokia/rx51/lowlevel_init.S:
kernoffs:
.word KERNEL_OFFSET - (. - CONFIG_SYS_TEXT_BASE)
when CONFIG_SYS_TEXT_BASE is set to 0x80008000. It throws strange compile
error which is even without line number:
AS board/nokia/rx51/lowlevel_init.o
{standard input}: Assembler messages:
{standard input}: Error: attempt to get value of unresolved symbol `L0'
make[2]: *** [scripts/Makefile.build:293: board/nokia/rx51/lowlevel_init.o] Error 1
I have no idea about this error and my experiments showed that ARM GNU
assembler is happy with negation of that number. So changing code to:
kernoffs:
.word . - CONFIG_SYS_TEXT_BASE - KERNEL_OFFSET
and then replacing mathematical addition by substraction of "kernoffs"
value (so calculation of address does not change) compiles assembler file
without any error now.
There should be not any functional change.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Support VBE OS requests / fixups
Minor error-handling tweaks to bootm command
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Merge tag 'dm-pull-18oct22' of https://source.denx.de/u-boot/custodians/u-boot-dm
Update uclass iterators to work better when devices fail to probe
Support VBE OS requests / fixups
Minor error-handling tweaks to bootm command
Fix the compilation issue when CONFIG_DEBUG_UART is activated
drivers/serial/serial_stm32.o: in function `debug_uart_init':
drivers/serial/serial_stm32.c:291: undefined reference to \
`board_debug_uart_init'
The board_debug_uart_init is needed for SPL boot, called in
cpu.c::mach_cpu_init(); it is defined in board/st/stm32mp1/spl.c.
But with the removal #ifdefs patch, the function debug_uart_init() is
always compiled even if not present in the final U-Boot image.
This patch adds a file to provided this function when DEBUG_UART and SPL
are activated.
Fixes: c8b2eef52b ("stm32mp15: tidy up #ifdefs in cpu.c")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add DT for DHCOR Testbench board, which is a testbench for testing of
DHCOR SoM during manufacturing. This is effectively a trimmed down
version of AV96 board with CSI-2 bridge, HDMI bridge, WiFi, Audio and
LEDs removed and used as GPIOs instead. Furthermore, the PMIC Buck3
is always configured from PMIC NVM to cater for both 1V8 and 3V3 SoM
variant.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In case the regulator-always-on is present in regulator DT node,
the regulator is always reconfigured to the voltage set in DT on
probe, even if regulator_set_value() has been called before. Drop
the property from AV96 U-Boot DT and enable the regulator manually
in code, as the board already reconfigures the Buck3 regulator in
code per PMIC NVM content instead.
Fixes: 0adf10a87b ("ARM: dts: stm32: Configure Buck3 voltage per PMIC NVM on Avenger96")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In a later patch sysinfo_get will be changed to return the device in cae
of an error. Set sysinfo to NULL on error to preserve previous behavior.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are a couple users of uclass_next_device return value that get the
first device by other means and use uclass_next_device assuming the
following device in the uclass is related to the first one.
Use uclass_next_device_err because the return value from
uclass_next_device will be removed in a later patch.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is a number of users that use uclass_first_device to access the
first and (assumed) only device in uclass.
Some check the return value of uclass_first_device and also that a
device was returned which is exactly what uclass_first_device_err does.
Some are not checking that a device was returned and can potentially
crash if no device exists in the uclass. Finally there is one that
returns NULL on error either way.
Convert all of these to use uclass_first_device_err instead, the return
value will be removed from uclass_first_device in a later patch.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The LS1043ARDB rev v7.0 board replace nand device MT29F4G08ABBDAH4-AITX:D
with MT29F4G08ABBFAH4-AIT:F. Reflecting this change in board_fix_fdt().
CPLD V3.0 is needed for nandboot as the nand device changed.
A new macro CPLD_CFG_RCW_SRC_NAND_4K(4Kpage) is added to distinguish from
CPLD_CFG_RCW_SRC_NAND(2Kpage) to support nandboot on rev v7.0 board.
Signed-off-by: Wei Lu <w.lu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Space key is indicated by two different bits. Some HW models indicate press
of space key only by the first bit. Qemu indicates it by both bits at the
same time, which is currently interpreted by u-boot as double key press.
Fix this issue by setting first bit when only second is set (to support HW
models which indicate press only by second bit) and always clearing second
bit before processing to not report double space key press.
Signed-off-by: Pali Rohár <pali@kernel.org>
Before this patch you could see in the log:
U-Boot SPL 2022.10-rc5 (Sep 29 2022 - 15:29:27 +0200)
PMUFW: v1.1
Loading new PMUFW cfg obj (32 bytes)
PMUFW: No permission to change config object
Loading new PMUFW cfg obj (2032 bytes)
where it is visible that permission is check before sending PMUFW
configuration (big size).
When this patch is applied it is visible that order is correct.
U-Boot SPL 2022.10-rc5 (Sep 29 2022 - 15:47:08 +0200)
Loading new PMUFW cfg obj (2032 bytes)
PMUFW: v1.1
Loading new PMUFW cfg obj (32 bytes)
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a0bf4f46d670023da4f848790eece6fff22090c2.1664962765.git.michal.simek@amd.com
Compiling with GCC-12 leads to an error:
+board/xilinx/common/board.c:479:37: error: the comparison will always
evaluate as 'true' for the address of 'mac_addr' will never be NULL
[-Werror=address]
+ 479 | if (!desc->mac_addr[i])
+ | ^
Remove the redundant check.
Fixes: a03b594738 ("xilinx: board: Add support for additional card detection")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
In function ‘set_dfu_alt_info’ a comparison of a u8 value against
0 is done. Since it is always false, change the signature of this
function to use an `int` instead, which match the type used in caller:
`multi_boot()`.
Fix the following warning triggered with W=1:
board/xilinx/zynqmp/zynqmp.c:651:23:
warning: comparison is always false due to limited range of data type
[-Wtype-limits]
651 | if (multiboot < 0)
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20221004055254.26246-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
cpu-info.c defines print_cpuinfo(), but neglected to
include its declaration, causing the following sparse and
compile time warnings:
board/xilinx/common/cpu-info.c:10:5:
warning: no previous prototype for 'print_cpuinfo'
[-Wmissing-prototypes]
Include init.h, which includes the missing declaration.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20221004055053.26047-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
dram_init() can't modify global/static variables, so
move the mem_map setup later when bss is available.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
These boards are out of maintenance and can be removed.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This is not needed and we should avoid typedefs. Use the struct instead
and rename it to indicate that it really is a legacy struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
The situation is similar to commit bf6376642f ("board: ti: common:
board_detect: Fix EEPROM read quirk"). This is seen on a variant of
eeproms seen on some BeagleBone-AI64 which now has a mix of both 1 byte
addressing and 2 byte addressing eeproms.
Unlike the am335x (ti_i2c_eeprom_am_get) and dra7
(ti_i2c_eeprom_dra7_get) which use constant data structure which allows
us to do a complete read of the data, the
am6(ti_i2c_eeprom_am6_get) eeprom parse operation is dynamic.
This removes the option of being able to read the complete eeprom data
in one single shot.
Fortunately, on the I2C bus, we do see the following behavior: In 1
byte mode, if we attempt to read the first header data yet again, the
misbehaving 2 byte addressing device acts in constant addressing mode
which results in the header not matching up and follow on attempt at 2
byte addressing scheme grabs the correct data.
This costs us an extra ~3 milliseconds, which is a minor penalty
compared to the consistent image support we need to have.
Reported-by: Jason Kridner <jkridner@beagleboard.org>
Fixes: a58147c2db ("board: ti: common: board_detect: Do 1byte address checks first.")
Signed-off-by: Nishanth Menon <nm@ti.com>
Commit c0fce929564f("vexpress64: fvp: enable OF_CONTROL") added code to
consider a potential DTB address being passed in the x0 register, or
revert to the built-in DTB otherwise.
The former case was used when using the boot-wrapper, to which we sell
U-Boot as a Linux kernel. The latter was meant for TF-A, for which we
couldn't find an easy way to use the DTB it uses itself. We have some
quirk to filter for a valid DTB, as TF-A happens to pass a pointer to
some special devicetree blob in x0 as well.
Now the TF-A case is broken, when enabling proper emulation of secure
memory (-C bp.secure_memory=1). TF-A carves out some memory at the top
of the first DRAM bank for its own purposes, and configures the
TrustZone DRAM controller to make this region secure-only. U-Boot will
then hang when it tries to relocate itself exactly to the end of DRAM.
TF-A announces this by carving out that region of the /memory node, in
the DT it passes on to BL33 in x1, but we miss that so far.
Instead of repeating this carveout in our DT copy, let's try to look for
a DTB at the address x1 points to as well. This will let U-Boot pick up
the DTB provided by TF-A, which has the correct carveout in place,
avoiding the hang.
While we are at it, make the detection more robust: the length test (is
the DT larger than 256 bytes?) is too fragile, in fact the TF-A port for
a new FVP model already exceeds this. So we test x1 first, consider 0
an invalid address, and also require a /memory node to detect a valid DTB.
And for the records:
Some asking around revealed what is really going on with TF-A and that
ominous DTB pointer in x0: TF-A expects EDK-2 as its non-secure payload
(BL33), and there apparently was some long-standing ad-hoc boot protocol
defined just between the two: x0 would carry the MPIDR register value of
the boot CPU, and the hardware DTB address would be stored in x1.
Now the MPIDR of CPU 0 is typically 0, plus bit 31 set, which is defined
as RES1 in the ARMv7 and ARMv8 architectures. This gives 0x80000000,
which is the same value as the address of the beginning of DRAM (2GB).
And coincidentally TF-A put some DTB structure exactly there, for its
own purposes (passing it between stages). So U-Boot was trying to use
this DTB, which requires the quirk to check for its validity.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Peter Hoyes <peter.hoyes@arm.com>
- SPL fixes for STM32F7 MCUs
- Device tree alignement with kernelv6.0-rc4 for MCU's board
- Device tree alignement with kernelv6.0-rc3 for MPU's board
- Update DDR node for STM32MP15
- Cleanup config file for STM32MP1
- Update for cmd_stm32key command
- Fix compatible string to add partitions for STM32MP1
- Update for stm32programmer tool
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Merge tag 'u-boot-stm32-20220927' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
- Increase SYS_MALLOC_F_LEN for STM32 MCU's board
- SPL fixes for STM32F7 MCUs
- Device tree alignement with kernelv6.0-rc4 for MCU's board
- Device tree alignement with kernelv6.0-rc3 for MPU's board
- Update DDR node for STM32MP15
- Cleanup config file for STM32MP1
- Update for cmd_stm32key command
- Fix compatible string to add partitions for STM32MP1
- Update for stm32programmer tool
xilinx:
- Add support for new Versal NET SOC
zynqmp:
- Use mdio bus for ethernet phy description
- Wire ethernet phy reset via i2c-gpio
versal:
- Config cleanup
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Merge tag 'xilinx-for-v2023.01-rc1-v2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2023.01-rc1 (round 2)
xilinx:
- Add support for new Versal NET SOC
zynqmp:
- Use mdio bus for ethernet phy description
- Wire ethernet phy reset via i2c-gpio
versal:
- Config cleanup
Versal NET platform is based on Versal chip which is reusing a lot of IPs.
For more information about new IPs please take a look at DT which describe
currently supported devices.
The patch is adding architecture and board support with soc detection
algorithm. Generic setting should be very similar to Versal but it will
likely diverge in longer run.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/320206853dc370ce290a4e7b6d0bb26b05206021.1663589964.git.michal.simek@amd.com
Commit 37dc958947 ("global_data.h: Change ram_top type to phys_addr_t")
changed type of ram_top member from ulong to phys_addr_t but did not
changed types in board_get_usable_ram_top() function which returns value
for ram_top.
So change ulong to phys_addr_t type also in board_get_usable_ram_top()
signature and implementations.
Fixes: 37dc958947 ("global_data.h: Change ram_top type to phys_addr_t")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds general board files based on MT7981 SoCs.
MT7981 uses one mmc controller for booting from both SD and eMMC, and the
pins of mmc controller are also shared with spi controller.
So three configs are need for these boot types:
1. mt7981_rfb_defconfig - SPI-NOR and SPI-NAND
2. mt7981_emmc_rfb_defconfig - eMMC only
3. mt7981_sd_rfb_defconfig - SD only
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Add general board files based on MT7986 SoCs.
MT7986 uses one mmc controller for booting from both SD and eMMC.
Both MT7986A and MT7986B use the same pins for spi controller.
Configs for various boot types:
1. mt7986_rfb_defconfig - SPI-NOR and SPI-NAND for MT7986A/B
2. mt7986a_bpir3_emmc_defconfig - eMMC for MT7986A only
3. mt7986a_bpir3_sd_defconfig - SD for MT7986A only
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Current compatible string used to update SPI NAND and SPI NOR devices
can lead to a wrong partitions update (for example, SPI NAND partitions
added to SPI NOR node in the device tree). To avoid this wrong behavior,
use jedec,spi-nor compatible string for SPI NOR devices and spi-nand
compatible string for SPI NAND devices.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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Merge tag 'u-boot-at91-2023.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2023.01 cycle:
This feature set includes the important update on PIO4 pinctrl driver
that solves a long time mismatch between Linux and U-boot, related on
the unification of pinctrl and gpio driver support, now respecting the
pinctrl bindings ABI; and also support for pinctrl subnodes. The feature
set also adds support for PDA screen detection for sam9x60_curiosity
board , one fix for SD-Card reinsertion and one fix for sam9x60 clocks.
Call the PDA detection mechanism at boot time so that we can
have the pda environment variable ready for use.
Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
Adjust the DRAM timing settings for this board per ones provided
by hardware department. The change is applied to the LPDDR4 MR11
register CA ODT configuration, from RZQ/6 to RZQ/3, which fixes
stability issues on subset of boards. The DDR PHY PIE block has
been updated accordingly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This code part is broken, remove it.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
This code part is broken, remove it.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
