Commit graph

7564 commits

Author SHA1 Message Date
Jörg Krause
2c171a2a5f net: phy: fix data type of phy_id
phy_id is declared as u32 in create_phy_by_mask and in struct phy_device.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
2015-08-11 13:47:15 -05:00
Daniel Inderbitzin
466f775e02 qoriq eth.c bugfix: handle received corrupted frames correctly
The rxbd is not correctly handled in case of a frame physical error
(FPE) or frame size error (FSE). The rxbd must be cleared and
advanced in case of an error to avoid receive stall.

Signed-off-by: Daniel Inderbitzin <daniel.inderbitzin@gmail.com>
2015-08-11 13:46:16 -05:00
Vladimir Zapolskiy
1a791892dc net: lpc32xx: add RMII phy mode support
LPC32xx MAC and clock control configuration requires some minor quirks
to deal with a phy connected by RMII.

It's worth to mention that the kernel and legacy BSP from NXP sets
SUPP_RESET_RMII == (1 << 11) bit, however the description of this bit is
missing in shared LPC32x0 User Manual UM10326 Rev. 3, July 22, 2011
and in LPC32x0 Draft User Mannual Rev. 00.27, November 20, 2008, also
in my tests an SMSC LAN8700 phy device connected over RMII seems to
work correctly without touching this bit.

Add support of RMII, if CONFIG_RMII is defined, this option is aligned
with a number of boards, which already define the same config value.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
2015-08-11 13:43:04 -05:00
Vladimir Zapolskiy
23f5db0e26 net: lpc32xx: improve MAC configuration on reset and initialization
This change rearranges general MAC configuration and PHY specific
configuration of MAC registers (duplex mode and speed), before this
change set bits related to PHY configuration in MAC2 and COMMAND
registers are rewritten by the following writing to the registers.

Without the change auto negotiation on boot quite often is not
completed in reasonable time:

  Waiting for PHY auto negotiation to complete......... TIMEOUT !

Additionally MAC1_SOFT_RESET clear bit is removed since it is done in
preceding lpc32xx_eth_initialize() and in lpc32xx_eth_halt(), instead
added missing MCFG_RESET_MII_MGMT on device initialization.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-08-11 13:42:34 -05:00
Vladimir Zapolskiy
fe0596cac3 net: lpc32xx: connect MAC to phy with CONFIG_PHY_ADDR id
The lpc32xx_eth_phylib_init() function is capable to connect LPC32XX
MAC to some specified phy by phy id, by chance the single user of
lpc32xx_eth has CONFIG_PHY_ADDR set to 0, however other boards may
have non-zero CONFIG_PHY_ADDR value, fix it.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-08-11 13:38:51 -05:00
Vladimir Zapolskiy
6e039b4c62 net: lpc32xx: correct command register reset value
According to LPC32x0 User Manual the following bits in Command
register 0x3106_0100 are defined:

  Bit    Symbol
    2  - Unused
    3  RegReset
    4   TxReset
    5   RxReset

Fix wrong (1-bit shifted right) COMMAND_RESETS value, which sets
an unused bit, but neglects RxReset.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-08-11 13:37:17 -05:00
Jeroen Hofstee
0b830198fb net: davinci_emac: don't teardown inactive rx channel
Tearing down an unitialized rx channel causes a pending address hole
event to be queued. When booting linux it will report this pending
as something like "Address Hole seen by USB_OTG  at address 57fff584",
since u-boot did not handled this interrupt. Prevent that by not
tearing down the rx channel, when not receiving.

Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2015-08-11 13:35:45 -05:00
Clemens Gruber
8396d0ab8b net: Add support for Marvell 88E1510 PHY
Support the 88E1510 PHY which is very similar to the 88E1518.
I also set the INTn output and configured the LEDs.

Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Hao Zhang <hzhang@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-08-11 13:29:01 -05:00
Clemens Gruber
90a94ef652 net: Improve 88E151x PHY initialization
- The EEE fixup magic should also be enabled for RGMII
- Improved comments

Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Hao Zhang <hzhang@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-08-11 13:28:59 -05:00
Wu, Josh
ade4ea4d71 net: macb: add gmac multi-queue support
This patch refer to linux kernel commit: d8b763e1e79f
  net/macb: add TX multiqueue support for gem
  by: Cyrille Pitchen

1. macb driver will check the register to find how many queues support for
this chip.

2. Then as we only use queue0 for tx, so we will set up all other queues
use a dummy descriptor, which USED bit is set. So those queues are not used.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-08-11 13:27:15 -05:00
Shengzhou Liu
90712741c9 net/phy: set led for rtl8211f phy
Initialize LCR rigister to configure
green LED for Link, yellow LED for Active.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2015-08-11 13:20:34 -05:00
Tim Harvey
48b168bbfa e1000: remove unnecessary clearing of SWSM.SWSM_SMBI
remove unnecessary clearing of SWSM.SWSM_SMBI when obtaining the SW
semaphore. This was introduced in 951860634f
while adding i210 support and should be now resolved by releasing the
semaphore when no longer needed.

Cc: Marcel Ziswiler <marcel@ziswiler.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Aneesh Bansal <aneesh.bansal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2015-08-11 13:17:07 -05:00
Tim Harvey
3c63dd5302 Revert "e1000: fix sw fw sync on igb i210/i211"
This reverts commit 17da712024.

The i210/i211 do have the SW_FW_SYNC (0x5b5c) register and this is what should
be used when acquiring the semaphore.

I believe the issue that this patch was trying to resolve is now resolved
by properly releasing the semaphore once no longer needed.

Cc: Marcel Ziswiler <marcel@ziswiler.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Aneesh Bansal <aneesh.bansal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2015-08-11 13:17:02 -05:00
Tim Harvey
7e2d991d63 e1000: releasing semaphore once no longer needed
Once the hwsw semaphore is acquired, it must be released when access to the
hw is completed. Without this subsequent calls to acquire will timeout
obtaining the semaphore.

Cc: Marcel Ziswiler <marcel@ziswiler.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Aneesh Bansal <aneesh.bansal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2015-08-11 13:10:01 -05:00
Marek Vasut
9042d974d2 mmc: dw_mmc: Improve handling of data transfer failure
In case the data transfer failure happens, instead of returning
immediatelly, make sure the DMA is disabled, status register is
cleared and the bounce buffer is stopped.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
2015-08-11 20:44:30 +03:00
Marek Vasut
d9dbb97be0 mmc: dw_mmc: Zap endless timeout
Endless timeouts are bad, since if we get stuck in one, we have no
way out. Zap this one by implementing proper timeout.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
2015-08-11 20:44:21 +03:00
Marek Vasut
603b2f3a74 mmc: dw_mmc: Stop bounce buffer even in case of failure
The driver didn't stop the bounce buffer in case a data transfer
failed. This would lead to memory leakage if the communication
between the CPU and the card is unreliable. Add the missing call
to stop the bounce buffer.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
2015-08-11 20:43:34 +03:00
Tom Rini
e2c1c5bae6 Merge git://git.denx.de/u-boot-dm 2015-08-10 10:06:07 -04:00
Hans de Goede
8c4585881d dm: serial: Add a REQUIRE_SERIAL_CONSOLE option for boards with no serial port
Currently the serial code assumes that there is always at least one serial
port (and panics / crashes due to null pointer dereferences when there is
none).

This makes it impossible to use u-boot on boards where there is no (debug)
serial port, because e.g. all uart pins are muxed to another function.

This commit adds a CONFIG_REQUIRE_SERIAL_CONSOLE Kconfig option, which
defaults to y (preserving existing behavior), which can be set to n on
such boards to make them work.

This commit only implements this for CONFIG_DM_SERIAL=y configs, as allowing
running without a serial port for CONFIG_DM_SERIAL=n configs is non trivial,
and is not necessary at this moment.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-10 07:01:28 -06:00
Tom Rini
15f8876b1d Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2015-08-08 20:20:17 -04:00
Hans de Goede
39920c81ce sunxi: display: Add composite video out support
Add composite video out support.

This only gets enabled on the Mele M3 for now, since that is were it
was tested. It will be enabled on more boards after testing.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-08-08 16:26:20 +02:00
Hans de Goede
f6d9d32462 sunxi: display: Add support for interlaced modes
Add support for interlaced modes, this is a preparation patch for adding
composite out support.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-08-08 16:26:20 +02:00
Hans de Goede
0ecb43a8d0 sunxi: display: Add a few extra register and constant defines
Add a few extra sunxi display registers and constant defines.

Also rename some existing defines (e.g. dropping _GCTRL) and make
some more generic (e.g. dropping the 2x scaling from
SUNXI_LCDC_TCON1_TIMING_V_TOTAL).

This is a preparation patch for adding composite video out support.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-08-08 16:26:20 +02:00
Hans de Goede
ab2a2be988 sunxi: display: Correct clk_delay calculations for lcd displays
We should only subtract 2 from the vblank time when using tcon1.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-08-08 16:26:20 +02:00
Hans de Goede
bf689342a3 sunxi: display: Replace #ifdef-ery with helper functions
All the #ifdef-ery in selecting the default and fallback monitor type is
becoming unyielding and makes the code hard to read, replace it with a few
helper functions.

This will also be useful with the upcoming CHIP board which has display
adapter daughterboards which should be runtime detectable.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-08-08 16:26:20 +02:00
Hans de Goede
c9f8947e66 sunxi: usb-phy: Never power off the usb ports
USB devices are not really designed to get the power bounced off and on
at them. Esp. USB powered harddisks do not like this.

Currently we power off the USB ports both on a "usb reset" and when
booting the kernel, causing the usb-power to bounce off and then back
on again.

This patch removes the powering off calls, fixing the undesirable power
bouncing.

Note this requires some special handling for the OTG port:
1) We must skip the external vbus check if we've already enabled our own
vbus to avoid false positives
2) If on an usb reset we no longer detect that the id-pin is grounded, turn
off vbus as that means an external vbus may be present now

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-08-08 16:26:19 +02:00
Piotr Zierhoffer
960caeba8f sunxi: nand: Add board configuration options
When SPL_NAND_SUNXI option is selected in config, set some configuration
options for sunxi NAND.

This commit also introduces the configurable options in Kconfig.

Signed-off-by: Peter Gielda <pgielda@antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-08-08 16:26:19 +02:00
Piotr Zierhoffer
aeb4b0d3b3 sunxi: nand: Add basic sunxi NAND driver for SPL with DMA support
This driver adds NAND support to SPL.
It was tested on Allwinner A20.

Signed-off-by: Peter Gielda <pgielda@antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-08-08 16:26:19 +02:00
Marek Vasut
139823ecb2 ddr: altera: sequencer: Clean checkpatch issues
Fix most of the dangling checkpatch issues, no functional change.
There are still 7 warnings, 1 checks , but those are left in place
for the sake of readability of the code.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:30 +02:00
Marek Vasut
5ded7320c8 ddr: altera: sequencer: Clean data types
Replace uintNN_t with uNN. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
96fd4362cf ddr: altera: sequencer: Pluck out misc macros from code
Actually convert the sequencer code to use socfpga_sdram_misc_config
instead of the various macros. This is just an sed exercise here, no
manual coding needed.

This patch actually removes the need to include any board-specific
files in sequencer.c , so sequencer.c namespace is now no longer
poluted by QTS-generated macros.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
3cd0906cc2 ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VAL
This is another macro used to obfuscate the real code. The
T(INIT|RESET)_CNTR._VAL is always defined, so this indirection
is unnecessary. Get rid of this.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
98cfc9058b ddr: altera: sequencer: Zap VFIFO_SIZE
Just use READ_VALID_FIFO_SIZE directly, no need for this macro obfuscation.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
042ff2d0fa ddr: altera: sequencer: Wrap misc remaining macros
Introduce structure socfpga_sdram_misc_config to wrap the remaining
misc configuration values in board file. Again, introduce a function,
socfpga_get_sdram_misc_config(), which returns this the structure. This
is almost the final step toward wrapping the nasty QTS generated macros
in board files and reducing the pollution of the namespace.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
160695d886 ddr: altera: sequencer: Pluck out IO_* macros from code
Actually convert the sequencer code to use socfpga_sdram_io_config
instead of the IO_* macros. This is just an sed excercise here, no
manual coding needed.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
10c14261f3 ddr: altera: sequencer: Wrap IO_* macros
Introduce structure socfpga_sdram_io_config to wrap the IO configuration
values in board file. Introduce socfpga_get_sdram_io_config() function,
which returns this the structure. This is another step toward wrapping
the nasty QTS generated macros in board files and reducing the pollution
of the namespace.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
1fa0c8c4e3 ddr: altera: sequencer: Pluck out RW_MGR_* macros from code
Actually convert the sequencer code to use socfpga_sdram_rw_mgr_config
instead of the RW_MGR_* macros. This is just an sed exercise here, no
manual coding needed.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
d718a26b0c ddr: altera: sequencer: Wrap RW_MGR_* macros
Introduce structure socfpga_sdram_rw_mgr_config to wrap the RW manager
configuration values in board file. Introduce a complementary function,
socfpga_get_sdram_rwmgr_config(), which returns this the structure.
This is another step toward wrapping the nasty QTS generated macros
in board files and reducing the pollution of the namespace.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
04955cf247 ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_init
Introduce two wrapper functions, socfpga_get_seq_ac_init() and
socfpga_get_seq_inst_init() to avoid direct inclusion of the
sequencer_auto_ac_init.h and sequencer_auto_inst_init.h QTS
generated files. This reduces namespace pollution again.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:28 +02:00
Marek Vasut
499b7a7c88 ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKS
This is defined in the QTS-generated headers, so it must not be
re-defined in sequencer.h .

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:28 +02:00
Marek Vasut
f085ac3b14 ddr: altera: sequencer: Zap unused params and macros
These parameters are not used in the code, zap them and the
macros which are used by them as well.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:28 +02:00
Marek Vasut
9c76df518c ddr: altera: sequencer: Move qts-generated files to board dir
Move the files generated by QTS into the board directory, they should not
be part of the driver files at all.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:28 +02:00
Marek Vasut
08eb947004 ddr: altera: sdram: Make sdram_start and sdram_end into u32
Originally, both sdram_start and sdram_end were 64b values. The
sdram_start had no reason for being so, since our address space
is only 32b, so switching sdram_start to u32 is simple.

The sdram_end is a bit more complex, since it can actually be
set to (1 << 32) if someone really wanted to use an SoCFPGA with
4 GiB of DRAM and fixed the code around a little. But, the code
handling the protection rules internally decrements the sdram_end
variable anyway. Thus, instead of calling the code and passing in
the address of the SDRAM end, pass in the address already decremented
by one. This lets the sdram_end be 32b as well.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:28 +02:00
Marek Vasut
6d01595f63 ddr: altera: sdram: Minor cleanup in sdram_get_rule()
Fix the data types and zap unnecessary type change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:28 +02:00
Marek Vasut
a003740aec ddr: altera: sdram: Minor cleanup in sdram_set_rule()
Zap an obscure unneeded cast and clean other minor nits in this function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:28 +02:00
Marek Vasut
96b869b6e3 ddr: altera: sdram: Add missing kerneldoc
Add kerneldoc to functions which are missing it, but are already
cleaned up.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:28 +02:00
Marek Vasut
269de4f0ab ddr: altera: sdram: Clean up sdram_write_verify()
Clean the function up so that it's obvious what it is doing,
fix the formating strings in debug outputs, add kerneldoc.
Make the function return proper errno-compliant return values
and propagate this change throughout sdram.c

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:28 +02:00
Marek Vasut
f97606f237 ddr: altera: sdram: Clean up sdram_calculate_size() part 2
Clean up coding style, mostly clean up comments, add kerneldoc.
Also, zap assignment of the "cs" variable, which is outright
dead code, so just remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
bb056d9c07 ddr: altera: sdram: Clean up sdram_calculate_size() part 1
Pluck out all of the CONFIG_HPS_SDR_CTRLCFG_* macros. This change
makes sdram.c completely clear of these macros and allows removing
of the ugly include of sdram.h . The namespace is now a much nicer
place!

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
5af914189e ddr: altera: sdram: Introduce socfpga_sdram_get_config()
Introduce socfpga_sdram_get_config() function implement in a board file,
which returns the socfpga_sdram_config structure. This is the last step
in cleaning up the socfpga_mmr_init_full(), but not the last step which
allows removing the inclusion of sdram.h from drivers/ddr/altera/sdram.c
thus far.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
99f453e953 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 8
Fix the return value so that standard errno return values can be used.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
1e8a85f8c5 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 7
Add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
1a302a4525 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 6
Pull out the block of register programming into a separate function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
9d6b012c72 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 5
Rework remaining two register setting functions such that they only
return the final register value. Move the register setting into the
block of register I/O in sdram_mmr_init_full().

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
076470eecd ddr: altera: sdram: Clean up sdram_mmr_init_full() part 4
Merge sdr_set_*() functions which are just setting registers among
the sea of register setting in sdram_mmr_init_full(). There is no
need to keep them separate this way, there is nothing special about
them.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
764aa9a974 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 3
Pluck out the remaining CONFIG_HPS_SDR_CTRLCFG_ and put it into
the socfpga_sdram_config structure.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
dc3b91d9b6 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 2
Suck out all the CONFIG_HPS_SDR_CTRLCFG_* from sdram_mmr_init_full()
into the socfpga_sdram_config structure. There is still one ugly
macro left behind, but this will be taken care of in subsequent patch.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
be9a9fc5e6 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 1
Zap all the ad-hoc readbacks from the registers and other useless
and broken debug output. This is really not useful and is only
confusing.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
04ae448997 ddr: altera: sdram: Introduce socfpga_sdram_config() structure
Introduce this seemingly massive structure, which holds required values
of all the registers of the SDRAM controller. The idea here is to avoid
including the sdram.h header file, which is full of ad-hoc macros that
polute the global namespace. Once the cleanup of sdram.c would be complete
and all registers would be loaded from this new socfpga_sdram_config, a
board file will only pass this structure into the sdram.c . This will
hide all the horrors generated by QTS in the board directory.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
9a48a9ac6c ddr: altera: sdram: Clean up set_sdr_mp_threshold()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
ad2ba5d607 ddr: altera: sdram: Clean up set_sdr_mp_pacing()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
a5ba929671 ddr: altera: sdram: Clean up set_sdr_mp_weight()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
1009e396dd ddr: altera: sdram: Clean up set_sdr_fifo_cfg()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
b3bdb2204e ddr: altera: sdram: Clean up set_sdr_static_cfg()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
0ef8830037 ddr: altera: sdram: Clean up set_sdr_addr_rw()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
60bd0df018 ddr: altera: sdram: Clean up set_sdr_dram_timing*()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
Merge set_sdr_dram_timing{1,2,3,4,lowpwr}() into single function
set_sdr_dram_timing() , since there's no point in keeping all this
stuff separate anymore.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
067c853fe6 ddr: altera: sdram: Clean up set_sdr_ctrlcfg()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
The big plan here is to remove all the CONFIG_HPS_SDR_ macros, hide
them in QTS compatibility layer in board implementation and pass only
a small structure into the driver.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:25 +02:00
Marek Vasut
f36716971d ddr: altera: sdram: Clean up compute_errata_rows() part 2
Remove all parameters of this function, since they are only constants
passed in from another function, so make them local. Also, rename the
function to get_errata_rows() as this is closer to what it does.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:25 +02:00
Marek Vasut
791d20e13d ddr: altera: sdram: Clean up compute_errata_rows() part 1
Clean up weird parenthesis and odd type casts from the function.
Fix comment style.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:25 +02:00
Marek Vasut
58d86144d4 ddr: altera: sdram: Switch to generic_hweight32()
Use generic function instead of CPU-specific one.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:25 +02:00
Marek Vasut
3de9622e97 ddr: altera: Clean up of delay_for_n_mem_clocks() part 5
Add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:24 +02:00
Marek Vasut
0c1b81bdf3 ddr: altera: Clean up of delay_for_n_mem_clocks() part 4
Simplify the loop code, optimizing compiler can deal with this.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:24 +02:00
Marek Vasut
6a39be6ca9 ddr: altera: Clean up of delay_for_n_mem_clocks() part 3
Clean up the computation of c_loop, outer and inner variables.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:24 +02:00
Marek Vasut
cbcaf46043 ddr: altera: Clean up of delay_for_n_mem_clocks() part 2
Factor out (afi_clocks - 1) into a single place instead of having it
all around the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:24 +02:00
Marek Vasut
90a584b763 ddr: altera: Clean up of delay_for_n_mem_clocks() part 1
Fix data types, clean up comments a bit and fix coding style a bit.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:24 +02:00
Marek Vasut
f1f22f7204 ddr: altera: Minor clean up of rw_mgr_mem_handoff()
Add kerneldoc and perform a minor comment cleanup.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:24 +02:00
Marek Vasut
c984278a66 ddr: altera: Clean up rw_mgr_mem_calibrate_lfifo()
Minor coding style cleanup, add kerneldoc. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
78cdd7d0c8 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_end()
This function is implementing the DDR calibration Stage 3 as
described in Altera EMI_RM 2015.05.04 . The main body of this
function is almost identical to Stage 1.3 (DQ/DQS centering)
for all but two flags -- use_read_test and update_fom. Convert
this function to call rw_mgr_mem_calibrate_dq_dqs_centering()
with the correct flags set to trim down the code duplication.

Moreover, reorder the remnants in the function a little and
convert the function to return either 0 or -EIO in case of
success and failure respectively, to match the common return
value convention.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
8371c2ee68 ddr: altera: Clean up rw_mgr_mem_calibrate_write_test_issue()
Brief clean, add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
4a82854b07 ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 3
Add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
b9452ea09f ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 2
Clean up coding style, mostly broken multiline formatting strings
in debug output. Also clean up data types and constify where applicable.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
ad64769ce0 ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 1
Move code around to get rid of the forward declaration. No change
to the actual code.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
a386a50eb2 ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 5
Add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
d043ee5b49 ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 4
Fix return values to match the common return value convention.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
c654087206 ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 3
Zap the useless addr variable.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
c8570afa04 ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 2
Factor out common code for searching best DM/DQS window.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
3b44f55c3b ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 1
Fix data types and constify where applicable, fix broken multiline
debug strings and fix comments. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
ac63b9ada5 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 11
Add kerneldoc, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
9866824794 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 10
Fix the return value of the function to match common convention
where 0 means success and negative means error. Fix the return
values in case of an error to use errno.h codes.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
0113c3e1fe ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 9
The read_group and write_group arguments are the same in all
cases when this function is invoked, just merge them into one
rw_group argument. Also, clean up the function argument data
types and constify them.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
0c4be198f4 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 8
The search_stop_check() always resets the bit_chk to a new value,
so bit_chk will never survive between search_left_edge() and
search_right_edge() invocation. There is thus no need to pass
it into these functions, so make bit_chk local to them.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
5d6db44485 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 7
Perform minor reordering of the function to make the code more
organised, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
ffb8b66ea8 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 6
Factor out center_dq_windows(), which is common code between
stage 2 and stage 3 of the calibration again and cater for
the minor differences.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
afb3eb84b8 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 5
Factor out the get_window_mid_index() for finding the best DQ
window centering. This is again code common to two stages, so
pull it out.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
f0712c3502 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 4
First of all, don't break strings in the debug_cond() calls across
multiple lines. Next, zap a couple of really odd casts in the code.
Finally, make i into a signed variable, so it is possible to avoid
constructs of the form:
    for (i = FOO;; i--) { <code>; if (i == 0) break; }.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
901dc36e7a ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 3
Factor out common code from search_left_edge() and search_right_edge()
which checks whether searching for the window edge should stop. The
code is almost identical, so pull it into separate function and cater
for the minor differences.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
71120773bf ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 2
Factor out common code from rw_mgr_mem_calibrate_writes_center()
and rw_mgr_mem_calibrate_vfifo_center() for searching for the
left edge of the window. The code is almost identical, so pull
it into separate function and cater for the minor differences.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
c4907898a1 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 1
Factor out common code from rw_mgr_mem_calibrate_writes_center()
and rw_mgr_mem_calibrate_vfifo_center() for searching for the
right edge of the window. The code is almost identical, so pull
it into separate function and cater for the minor differences.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
db3a606158 ddr: altera: Clean up rw_mgr_mem_calibrate_writes()
Reorder the content of the function a little and fix the comments
so they at least become full sentences. Constify function args.
Fix the return value to match the common convention of 0 meaning
success.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
783fcf59bd ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 5
Make the function documentation into kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
ba522c769e ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 4
Clean up the inner loop a bit. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
7ce23bb6ef ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 3
The C language has signed types, so make use of them. Fix this
obscene loop, which tries to do away with unsigned type, but
just makes the code more cryptic.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
3cb8bf3fc5 ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 2
Clean up data types and constify where applicable. No function change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
3853d65e20 ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 1
Clean up the debug output handling at the end of the function
and factor out common function call from the condition.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
96df60364d ddr: altera: Clean up rw_mgr_mem_calibrate_read_test_all_ranks()
Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:20 +02:00
Marek Vasut
33756893ad ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 7
Add kerneldoc, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:20 +02:00
Marek Vasut
914546e7f0 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 6
Fix the return value to match common conventions and propagate
this change through the code.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:20 +02:00
Marek Vasut
5735540fd9 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 5
Fix the data types, constify where applicable.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:20 +02:00
Marek Vasut
52e8f217f9 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 4
Implement common sdr_find_phase_delay() function and convert all
places which use such code to this unified function. No functional
change to the code.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:20 +02:00
Marek Vasut
37b7b13d48 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 3
Clean up odd multiline loop, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:20 +02:00
Marek Vasut
23e8ea901a ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 2
If d != 0 after sdr_working_phase() finishes, the else branch
of the condition has no impact on anything at all, since work_end
was already set independently of the value of "d" . Zap this
useless code.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:20 +02:00
Marek Vasut
2f3589ca54 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 1
Fix broken multiline debug strings, fix comments.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:20 +02:00
Marek Vasut
d145ca9fc3 ddr: altera: Clean up find_vfifo_read()
Fix data types, constify where applicable, fix comments and debug
strings. In case enough failing reads are detected, just return
right away instead of breaking from the loop. This lets us make
the error handling at the end much simpler.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:20 +02:00
Marek Vasut
8c887b6ec3 ddr: altera: Clean up rw_mgr_*_vfifo() part 2
Pluck out all this VFIFO value counting, which turns out to be
completely unused. Thus, remove it to simplify the code.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:19 +02:00
Marek Vasut
60bb8a8a7e ddr: altera: Clean up rw_mgr_*_vfifo() part 1
Perform minor cleanup, fix data types and constify where applicable.
Add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:19 +02:00
Marek Vasut
4c5e584b2d ddr: altera: Clean up sdr_*_phase() part 10
Clean up data types, constify where applicable and document the
functions with kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:19 +02:00
Marek Vasut
49891df661 ddr: altera: Clean up sdr_*_phase() part 9
The "d" variable is set to 0 in sdr_backup_phase() and is not used
at all in sdr_nonworking_phase(). Make it local and zap it respectively.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:19 +02:00
Marek Vasut
a80f45346e ddr: altera: Clean up sdr_*_phase() part 8
The work_bgn parameter of sdr_nonworking_phase() is unused, zap it.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:19 +02:00
Marek Vasut
35ee867fc2 ddr: altera: Clean up sdr_*_phase() part 7
Wrap dtaps_per_ptap into the sdr_working_phase() function to trim
down the number of params. It's a constant too.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:19 +02:00
Marek Vasut
86a39dc76e ddr: altera: Clean up sdr_*_phase() part 6
It is now clear that the max_working_cnt variable is totally unused.
Zap the variable and zap other variables which became unused due to
this change too.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:19 +02:00
Marek Vasut
192d6f9fa3 ddr: altera: Clean up sdr_*_phase() part 5
Pull out the loop for eaching working/non-working DQS enable phase
into a separate function, as this is mostly common code between.
Clean up sdr_working_phase() and sdr_nonworking_phase() while switching
these two functions to the common sdr_find_phase().

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:19 +02:00
Marek Vasut
38ed692238 ddr: altera: Clean up sdr_*_phase() part 4
Get rid of found_{begin,end} variables. Instead of breaking out
through all of the loops, just return when the begin/end of the
window is found and be done with it. Also clean up the trailing
conditional expression, which is now much easier.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:18 +02:00
Marek Vasut
36edef3c98 ddr: altera: Clean up sdr_*_phase() part 3
Fix the arguments passed to these functions. The bit_chk is
overriden by rw_mgr_mem_calibrate_read_test_all_ranks() which
is invoked by all three sdr_*_phase() functions, so just make
this into local variable.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:18 +02:00
Marek Vasut
521fe39c5f ddr: altera: Clean up sdr_*_phase() part 2
Fix the arguments passed to these functions. The grp argument
does not have to be passed via reference, it's never modified
within either of those functions, so make it into a value.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:18 +02:00
Marek Vasut
0d304ce553 ddr: altera: Clean up sdr_*_phase() part 1
Rename find_working_phase() to sdr_working_phase() for the
sake of consistency.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:18 +02:00
Marek Vasut
0a13a0fb7a ddr: altera: Clean up sdr_find_window_centre() part 3
Reorder the end of the function a little by moving the conditional
debug output around a little. Rename the function from _centre() to
_center(). Document the function in kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:18 +02:00
Marek Vasut
cbb0b7e036 ddr: altera: Clean up sdr_find_window_centre() part 2
This function is a treasure trove of ad-hoc iterative
implementations of mathematical functions. Replace all
of those with their non-iterative counterpart.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:18 +02:00
Marek Vasut
28fd242a18 ddr: altera: Clean up sdr_find_window_centre() part 1
Clean up the arguments of this function. Most of the pointers
passed into the function are either not needed at all, or can
be passed as value instead of reference. Also fix the broken
multiline debug strings. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:18 +02:00
Marek Vasut
28ea827d9c ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 4
This function is only invoked from rw_mgr_mem_calibrate_dqs_enable_calibration()
and at this point, it is just one level of indirection, so wrap the
rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() into
rw_mgr_mem_calibrate_dqs_enable_calibration() to get rid of the level
of indirection.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:18 +02:00
Marek Vasut
25fefe8bf8 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 3
Replace at least one of the loops in this function with call of a
standard function call instead of the ad-hoc implementation. The
other one cannot be replaced, since the delay is incremented for
each group.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:18 +02:00
Marek Vasut
9da1d8f5b4 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 2
The read_group and write_group params have the same value for all (one)
invocations of this function, just merge them into a single param.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:18 +02:00
Marek Vasut
9059009185 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 1
Start cleaning up this function. In the first part, just fix
the incorrectly broken debug strings and fix return value to
respect the common convention.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:17 +02:00
Marek Vasut
d844c7d434 ddr: altera: Clean up rw_mgr_mem_calibrate_read_test_patterns()
Rework this function such that the code is more readable. Zap
unused parameter "num_tries" while at it. Also wrap parameter
"bit_chk" into this function as it's value is not used outside.
Finally, fix the return value from this function to match the
common expectation, where 0 means success.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:17 +02:00
Marek Vasut
93dcfd8982 ddr: altera: Zap rw_mgr_mem_calibrate_read_test_patterns_all_ranks()
This function is called from one single place and it's sole purpose
is to call one single function with slightly modified arguments.
Zap this function to skip this useless intermediate step.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:17 +02:00
Marek Vasut
b6cb7f9edd ddr: altera: Minor rw_mgr_mem_calibrate_read_load_patterns() cleanup
Just do an easy data type cleanup of this function, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:17 +02:00
Marek Vasut
16cfc4b987 ddr: altera: Extract Centering DQ/DQS from rw_mgr_mem_calibrate_vfifo()
Just extract this piece of functionality into separate function
to make the code better separated. This matches the division in
Altera documentation, Altera EMI_RM 2015.05.04 , section 1, the
UniPHY Calibration Stages.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:17 +02:00
Marek Vasut
f09da11e6b ddr: altera: Extract DQS enable calibration from rw_mgr_mem_calibrate_vfifo()
Just extract this piece of functionality into separate function
to make the code better separated. This matches the division in
Altera documentation, Altera EMI_RM 2015.05.04 , section 1, the
UniPHY Calibration Stages.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:17 +02:00
Marek Vasut
04372fb897 ddr: altera: Extract guaranteed write from rw_mgr_mem_calibrate_vfifo()
Just extract this piece of functionality into separate function
to make the code better separated. This matches the division in
Altera documentation, Altera EMI_RM 2015.05.04 , section 1, the
UniPHY Calibration Stages.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:17 +02:00
Marek Vasut
7c0a9df365 ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 7
Mildly reorder the function so that the reg_file_set*() calls are
in the same place. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:17 +02:00
Marek Vasut
c336ca3e5b ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 6
This is kind of microseries-within-series indent cleanup.
It is clear that the read_group and write_group variables
have the same value, to just make them into one variable
called rw_group. While doing this, constify the variables
as they are constant.

It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.

No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:17 +02:00
Marek Vasut
1e04db4c94 ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 5
This is kind of microseries-within-series indent cleanup.
This patch fixes the broken formatting strings in debug_cond()
invocations.

It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.

No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:16 +02:00
Marek Vasut
fe2d0a2da1 ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 4
This is kind of microseries-within-series indent cleanup.
This patch cleans up the handling of grp_calibrated such
that the variable isn't used all over the place, but just
very localy. This allows trimming down the indent issues.

It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.

No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:16 +02:00
Marek Vasut
ac70d2f387 ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 3
This is kind of microseries-within-series indent cleanup.
This patch just tweaks the indentation so it is visible
what to do with the grp_calibrated variable.

It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.

No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:16 +02:00
Marek Vasut
d2ea49508a ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 2
This is kind of microseries-within-series indent cleanup.
This patch just tweaks the indentation so it is visible
what is supposed to go where.

It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.

No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:16 +02:00
Marek Vasut
bce24efa1d ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 1
This patch just adds an expanded documentation header to the
aforementioned function. This is needed to make it easier to
match the purpose of this function with the documentation.

No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:16 +02:00
Marek Vasut
8e9d7d04b0 ddr: altera: Minor clean up of rw_mgr_mem_initialize()
Add kerneldoc and do a minor comment cleanup. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:16 +02:00
Marek Vasut
3589fbfbc3 ddr: altera: Internal mem_calibrate() cleanup part 6
Add kerneldoc to this function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:16 +02:00
Marek Vasut
c452dcd0b7 ddr: altera: Internal mem_calibrate() cleanup part 5
This is kind of microseries-within-series indent cleanup.
Rework the code for the the middle-loop of the mega-loop
this time and deal with the group_failed variable. Instead
of checking if the group failed in the previous calibration
part, just jump to the end of the loop if calibration did
fail and increment the counter. This shaves away one more
level of indent while making the code slightly more readable.

It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.

No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:16 +02:00
Marek Vasut
c50ae30341 ddr: altera: Internal mem_calibrate() cleanup part 4
This is kind of microseries-within-series indent cleanup.
Rework the code for the last loop within the mega-loop
to make it actually readable and not an insane cryptic pile
of indent failure.

It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.

No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:16 +02:00
Marek Vasut
8213609e68 ddr: altera: Internal mem_calibrate() cleanup part 3
This is kind of microseries-within-series indent cleanup.
Rework the code for the third loop within the middle-loop
of the mega-loop to make it actually readable and not an
insane cryptic pile of indent failure.

It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.

No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:15 +02:00
Marek Vasut
4ac2161014 ddr: altera: Internal mem_calibrate() cleanup part 2
This is kind of microseries-within-series indent cleanup.
Rework the code for the second loop within the middle-loop
of the mega-loop to make it actually readable and not an
insane cryptic pile of indent failure.

It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.

No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:15 +02:00
Marek Vasut
33c42bb88c ddr: altera: Internal mem_calibrate() cleanup part 1
This is kind of microseries-within-series indent cleanup.
Rework the code for the first loop within the middle-loop
of the mega-loop to make it actually readable and not an
insane cryptic pile of indent failure.

It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.

No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:15 +02:00
Marek Vasut
722c968570 ddr: altera: Trivial mem_calibrate() indent cleanup
Redo the mega-condition such that if the calibration is to be skipped,
the positive branch of the condition does all the work and returns.
The negative branch, which is in fact the default behavior, is then
converted to a code which is no longer conditional. This trims down
the indent by one level.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:15 +02:00
Marek Vasut
51cea0b6c0 ddr: altera: Minor clean up of mem_skip_calibrate()
Perform minor coding style cleanup of the mem_skip_calibrate() function,
clean up comments and add kerneldoc. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:15 +02:00
Marek Vasut
080bf64ef1 ddr: altera: Clean up set_rank_and_odt_mask() part 3
Clean up comments and add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:15 +02:00
Marek Vasut
287cdf6be7 ddr: altera: Clean up set_rank_and_odt_mask() part 2
Turn the big inner if (RW_MGR_MEM_NUMBER_OF_RANKS == ...) conditional
into a switch {} statement instead. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:15 +02:00
Marek Vasut
b2dfd100bc ddr: altera: Clean up set_rank_and_odt_mask() part 1
First, invert the logic of the if (odt_mode == ...) conditional to make
the OFF mode harder to miss. It is a short piece of code right at the
end, so move it up.

Also, clean up data types and constify where applicable and clean up
the cs_and_odt_mask assignment. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:15 +02:00
Marek Vasut
4b0ac26a15 ddr: altera: Clean up mem_precharge_and_activate()
Perform minor cleanup of this function, fix datatype and add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:15 +02:00
Marek Vasut
16502a0b2b ddr: altera: Clean up mem_config()
Clean mem_config() function. First, reorder the math done in the
function such that WLAT and RLAT computation is together. Then,
scrap contradictory comments which do not match the result of the
math at all. Next, extract the mem_precharge_and_activate() call
from the end of the function as it is completely unrelated here.
Finally, rename the function to mem_init_latency().

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:14 +02:00
Marek Vasut
7c89c2d9ce ddr: altera: Clean up phy_mgr_initialize()
Zap the cryptic casts and rework the code into a slightly more
readable form. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:14 +02:00
Marek Vasut
23a040c047 ddr: altera: Clean up run_mem_calibrate()
Clean the function up slightly by using clrsetbits_le32() to flip
bits in registers instead of cryptic bitmasks. Zap condition checking
for PHY_DEBUG_IN_DEBUG_MODE flag, which is never set. Split the
calibration report into separate debug_mem_calibrate() function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:14 +02:00
Marek Vasut
9fa9c90e70 ddr: altera: Rename initialize() to phy_mgr_initialize()
Just perform the rename to make the name more descriptive,
no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:14 +02:00
Marek Vasut
84e0b0cf2b ddr: altera: Init my_param and my_gbl
Init both structures with zeroes and zap all those zeroing shenanigans
further down in the sdram_calibration_full().

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:14 +02:00
Marek Vasut
880e46f2d3 ddr: altera: Rework initialize_tracking()
Clean the function up by getting rid of all the insane XOR-leftshift
combos when assembling register values. While at it, remove all the
ad-hoc variables necessary for this XOR-leftshift voodoo. Finally,
get rid of the iterative division implementation of two constants
and replace it with a DIV_ROUND_UP() macro :-)

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:14 +02:00
Marek Vasut
d32badbd80 ddr: altera: Fix ad-hoc iterative division implementation
Contemporary CPUs can perform division just fine, use this
functionality and zap another implementation of iterative
division :-)

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:14 +02:00
Marek Vasut
f936f94f80 ddr: altera: Minor clean up of set_jump_as_return()
Add kerneldoc and do a minor comment cleanup.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:14 +02:00
Marek Vasut
ecd2334a17 ddr: altera: Factor out common code
Factor out almost common code from rw_mgr_mem_handoff() and
rw_mgr_mem_initialize() into separate rw_mgr_mem_load_user().
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:14 +02:00
Marek Vasut
944fe7193e ddr: altera: Factor out instruction loading from rw_mgr_mem_initialize()
Pull the duplicate code out into a separate function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:13 +02:00
Marek Vasut
f51a7d3592 ddr: altera: Clean up scc_mgr_apply_group_all_out_delay_add_all_ranks()
Zap unused group_bgn parameter, fix and constify data types.
Document in kerneldoc. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:13 +02:00
Marek Vasut
5cb1b50870 ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup part 2
Clean the DQS and OCT parts of the function, clean up the chopped
formatting strings in debug_cond() and slightly improve the code.
Zap group_bgn argument as it is used only in debug messages. Document
the function using kerneldoc. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:13 +02:00
Marek Vasut
8eccde3ebb ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup part 1
Apparently, in case of the DQ and DM, the value if the new_delay variable
is calculated, but the value is not used. Zap the entire code which does
calculate the value.

It is not clear to me whether or not the code is doing the right thing
in the first place. Right now, it calls scc_mgr_load_dq() and
scc_mgr_load_dm() respectively, but I suspect it might need to call
scc_mgr_apply_group_dq_out1_delay() and scc_mgr_apply_group_dm_out1_delay()
instead. This is something Altera must investigate.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:13 +02:00
Marek Vasut
d41ea93a33 ddr: altera: Clean up scc_mgr_zero_group()
First, zap unused argument of the function. Next, clean up
the data types, constify where applicable, clean up comments
and add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:13 +02:00
Marek Vasut
f42af35bdc ddr: altera: Clean up scc_mgr_zero_all()
Add kerneldoc, clean up datatypes and fix minor indentation issue.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:13 +02:00
Marek Vasut
fa5d821b6b ddr: altera: Extract scc_mgr_set_hhp_extras()
Move scc_mgr_set_hhp_extras() out of scc_set_bypass_mode() as it
has nothing to do in there. Instead, invoke it from mem_calibrate()
just before invoking scc_set_bypass_mode().

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:13 +02:00
Marek Vasut
37a37ca7f8 ddr: altera: Clean up scc_mgr_set_hhp_extras()
Minor coding style cleanup for this function. Furthermore, move
ad-hoc debug_cond() calls from the only location from where this
function is invoked into this actual function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:13 +02:00
Marek Vasut
3267524960 ddr: altera: Clean up scc_mgr_*_delay() args
Zap args which are not used by these functions, in particular
the write_group is often passed, but unused.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:13 +02:00
Marek Vasut
300c2e6263 ddr: altera: Clean up scc_mgr_apply_group_dq_out1_delay()
Remove unused write_group and group_bgn argument from this function.
Document the function using kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:12 +02:00
Marek Vasut
5be355c102 ddr: altera: Clean up scc_mgr_set_oct_out1_delay()
Make this function more readable, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:12 +02:00
Marek Vasut
c5c5f5378f ddr: altera: Clean up scc_set_bypass_mode()
The mode argument of this function is not used at all, zap it.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:12 +02:00
Marek Vasut
5e83789634 ddr: altera: Clean up scc_mgr_load_dqs_for_write_group()
Make this function more readable, no functional change. Also, zap the
forward declaration, which is no longer needed.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:12 +02:00
Marek Vasut
0b69b807d8 ddr: altera: Implement universal scc_mgr_set_all_ranks()
Implement universal scc_mgr_set_all_ranks() function and convert
various ad-hoc implementations of similar functionality to use
this single function. Document the function in kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:12 +02:00
Marek Vasut
162d60ef73 ddr: altera: Shuffle around scc_mgr_set_*all_ranks()
Shuffle the code around a bit, but without any functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:12 +02:00
Marek Vasut
e893f4dc2f ddr: altera: Clean up scc_mgr_initialize()
Clean up the comments and add kerneldoc. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:12 +02:00
Marek Vasut
c76976d98f ddr: altera: Implement universal scc manager config function
Implement unified scc_mgr_set() function and convert all those
9 scc_mgr_set_*() ad-hoc functions to call this one function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:12 +02:00
Marek Vasut
5ff825b853 ddr: altera: Reorder scc manager functions
This patch just puts functions which look similar next to each
other, so they can be sorted out. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:12 +02:00
Marek Vasut
07aee5bd98 ddr: altera: Clean up scc manager function args
Clean up the unused args of the functions used to configure the
SCC manager.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:11 +02:00
Marek Vasut
2c0d2d9c40 ddr: altera: Clean up reg_file_set*()
Turn the insides of these functions into trivial clrsetbits_le32()
and fix the data type of their argument to reflect it's actual size.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:11 +02:00
Marek Vasut
2ca151f86c ddr: altera: Clean up initialize_hps_phy()
Add brief kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:11 +02:00
Marek Vasut
9c1ab2ca19 ddr: altera: Clean up initialize_reg_file()
Add brief kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:11 +02:00
Marek Vasut
bb06434bb2 ddr: altera: Clean up hc_initialize_rom_data()
Clean the function up, fix data types, add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:11 +02:00
Marek Vasut
1273dd9ea3 ddr: altera: Massage addr into I/O accessors
Get rid of invocations of this sort:
  addr = (u32)&base->reg;
  writel(val, addr);

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:11 +02:00
Marek Vasut
6cb9f16781 ddr: altera: Stop using SDR_CTRLGRP_ADDRESS directly
Use the proper structure which describes these registers,
especially since this is already in place.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:11 +02:00
Marek Vasut
17fdc9167f ddr: altera: Wrap SOCFPGA_SDR_ADDRESS into SDR_PHYGRP.*ADDRESS
Just trim down the constant SOCFPGA_SDR_ADDRESS + SDR_PHYGRP.*ADDRESS
in the code.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:11 +02:00
Marek Vasut
c4815f7671 ddr: altera: Pluck out remaining sdr_get_addr() calls
Remove the remaining invocations of sdr_get_addr() and the function
itself. This makes the code a bit less cryptic.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:11 +02:00
Marek Vasut
1bc6f14a61 ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_mgr_.*->.*)
Instead of this indirection, just adjust the register pointer and
directly use the register base address.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:10 +02:00
Marek Vasut
6afb4fe2a0 ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_rw_load.*->.*)
Instead of this indirection, just adjust the register pointer and
directly use the register base address.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:10 +02:00
Marek Vasut
e79025a774 ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_scc_mgr->.*)
Instead of this indirection, just adjust the register pointer and
directly use the register base address.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:10 +02:00
Marek Vasut
a1c654a893 ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_reg_file->.*)
Instead of this indirection, just adjust the register pointer and
directly use the register base address.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:10 +02:00
Marek Vasut
a4bfa463e0 ddr: altera: Zap invocation of sdr_get_addr((u32 *)BASE_RW_MGR)"
Instead of this indirection, just adjust the register pointer and
directly use the register base address.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:10 +02:00
Marek Vasut
23f62b36da ddr: altera: Clean up ugly casts in sdram_calibration_full()
Use the correct formating string in those debug_cond() invocations
and zap those unnecessary ugly casts.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:10 +02:00
Marek Vasut
963bca63b6 ddr: altera: Minor indent fix in set_rank_and_odt_mask()
Fix the position of the } else { statement to make it correctly
indented.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:10 +02:00
Marek Vasut
7ac40d25cf ddr: altera: Fix debug message format in sequencer
The debug messages missed proper newlines and/or spaces in them.
Fix the formatting.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@konsulko.com>
2015-08-08 14:14:06 +02:00
Marek Vasut
452a81e078 ddr: altera: Fix typo in mp_threshold1 programming
It is the configuration data that should go into the register,
not the register mask, just like the surrounding code does it.
Fix this typo.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@konsulko.com>
2015-08-08 14:14:05 +02:00
Marek Vasut
42f7ebb82b ddr: altera: Move struct sdram_prot_rule prototype
Move the structure prototype from sdram.h header file into sdram.c
source file, since it is used only there and for local purpose only.
There is no point in having it global.

While at this move, fix the data types in the structure from uintNN_t
to uNN and fix the coding style a bit.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:05 +02:00
Marek Vasut
d04941cf33 arm: socfpga: Move sdram_config.h to board dir
This file is absolutelly positively board specific, so move it
into the correct place.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:05 +02:00
Dinh Nguyen
3da428595e driver/ddr/altera: Add the sdram calibration portion
This patch adds the DDR calibration portion of the Altera SDRAM driver.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:05 +02:00
Dinh Nguyen
9bbd2132e3 driver/ddr/altera: Add DDR driver for Altera's SDRAM controller
This patch enables the SDRAM controller that is used on Altera's SoCFPGA
family. This patch configures the SDRAM controller based on a configuration
file that is generated from the Quartus tool, sdram_config.h.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:05 +02:00
Marek Vasut
9f76f105c7 net: designware: Rename the driver var name to eth_designware
The driver variable name is eth_sandbox, which is probably a copy-paste
mistake. Fix it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-08-08 14:14:05 +02:00
Marek Vasut
b9628595b4 net: designware: Add SoCFPGA GMAC DT compatible string
Add the OF compatible property to match the SoCFPGA GMAC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-08-08 14:14:05 +02:00
Marek Vasut
bfa89d2ba8 arm: socfpga: Fix FPGA bitstream programming routine
In case the FPGA bitstream is aligned to 4 bytes, skip the
part of the assembler which handles unaligned bitstream.
Otherwise, that part will loop indefinitelly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:04 +02:00
Tom Rini
ae27120c31 Merge git://git.denx.de/u-boot-dm 2015-08-06 19:56:03 -04:00
Simon Glass
f5c67ea036 dm: core: Add a way to set a device name
Some devices are bound entirely by probing and do not have the benefit of
a device tree to give them a name. This is very common with PCI and USB. In
most cases this is fine, but we should add an official way to set a device
name. This should be called in the device's bind() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-06 07:44:29 -06:00
Masahiro Yamada
40b6f2d020 devres: add debug command to dump device resources
This new command can dump all device resources associated to
each device.  The fields in every line shows:
  - The address of the resource
  - The size of the resource
  - The name of the release function
  - The stage in which the resource has been acquired (BIND/PROBE)

Currently, there is no driver using devres, but if such drivers are
implemented, the output of this command should look like this:

=> dm devres
- root_driver
- soc
- extbus
- serial@54006800
    bfb541e8 (8 byte) devm_kmalloc_release  BIND
    bfb54440 (4 byte) devm_kmalloc_release  PROBE
    bfb54460 (4 byte) devm_kmalloc_release  PROBE
- serial@54006900
    bfb54270 (8 byte) devm_kmalloc_release  BIND
- gpio@55000000
- i2c@58780000
    bfb5bce8 (12 byte) devm_kmalloc_release  PROBE
    bfb5bd10 (4 byte) devm_kmalloc_release  PROBE
- eeprom
    bfb54418 (12 byte) devm_kmalloc_release  BIND

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:29 -06:00
Masahiro Yamada
e2282d7076 devres: make Devres optional with CONFIG_DEVRES
Currently, Devres requires additional 16 byte for each allocation,
which is not so insignificant in some cases.

Add CONFIG_DEVRES to make this framework optional.
If the option is disabled, devres functions fall back to
non-managed variants.  For example, devres_alloc() to kzalloc(),
devm_kmalloc() to kmalloc(), etc.

Because devres_head is also surrounded by an ifdef conditional,
there is no memory overhead when CONFIG_DEVRES is disabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:29 -06:00
Masahiro Yamada
2b07f6859a devres: add devm_kmalloc() and friends (managed memory allocators)
devm_kmalloc() is identical to kmalloc() except that the memory
allocated with it is managed and will be automatically released
when the device is removed/unbound.

Likewise for the other variants.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:29 -06:00
Masahiro Yamada
608f26c51b devres: introduce Devres (Managed Device Resource) framework
In U-Boot's driver model, memory is basically allocated and freed
in the core framework.  So, low level drivers generally only have
to specify the size of needed memory with .priv_auto_alloc_size,
.platdata_auto_alloc_size, etc.  Nevertheless, some drivers still
need to allocate/free memory on their own in case they cannot
statically know the necessary memory size.  So, I believe it is
reasonable enough to port Devres into U-boot.

Devres, which originates in Linux, manages device resources for each
device and automatically releases them on driver detach.  With devres,
device resources are guaranteed to be freed whether initialization
fails half-way or the device gets detached.

The basic idea is totally the same to that of Linux, but I tweaked
it a bit so that it fits in U-Boot's driver model.

In U-Boot, drivers are activated in two steps: binding and probing.
Binding puts a driver and a device together.  It is just data
manipulation on the system memory, so nothing has happened on the
hardware device at this moment.  When the device is really used, it
is probed.  Probing initializes the real hardware device to make it
really ready for use.

So, the resources acquired during the probing process must be freed
when the device is removed.  Likewise, what has been allocated in
binding should be released when the device is unbound.  The struct
devres has a member "probe" to remember when the resource was
allocated.

CONFIG_DEBUG_DEVRES is also supported for easier debugging.
If enabled, debug messages are printed each time a resource is
allocated/freed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:29 -06:00
Masahiro Yamada
aed1a4dd88 dm: add DM_FLAG_BOUND flag
Currently, we only have DM_FLAG_ACTIVATED to indicate the device
status, but we still cannot know in which stage is in progress,
binding or probing.

This commit introduces a new flag, DM_FLAG_BOUND, which is set when
the device is really bound, and cleared when it is unbound.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:29 -06:00
Simon Glass
f33017716e dm: Support address translation for simple-bus
The 'ranges' property can be used to specify a translation from the system
address to the bus address. Add support for this using the dev_get_addr()
function, which devices should use to find their address.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:28 -06:00
Simon Glass
0990fcb772 net: smsc95xx: Add driver-model support
Add support for driver model, so that CONFIG_DM_ETH can be defined and used
with this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:28 -06:00
Simon Glass
527298c4b5 net: smsc95xx: Prepare for conversion to driver model
At present struct eth_device is passed around all over the place. This does
not exist with driver model. Add explicit arguments instead, so that with
driver model we can pass the correct things.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:27 -06:00
Simon Glass
25a9e98038 net: smsc95xx: Correct the error numbers
Instead of returning -1 on error, we should use a proper error number. Fix
the code to conform to this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:40:45 -06:00
Simon Glass
d62a1dc6bc net: smsc95xx: Rename AX_RX_URB_SIZE to RX_URB_SIZE
The AX_ prefix comes from the Asix driver. Since this is not that, we should
avoid this confusing prefix.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:37 -06:00
Simon Glass
a26925913c net: smsc95xx: Sort the include files
Tidy up the include file order before adding more.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:37 -06:00
Simon Glass
f58a41e001 dm: usb: Add driver-model support to dwc2
Add driver model support to this driver so it can be used with the new USB
stack.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:37 -06:00
Simon Glass
cc3e3a9e0e dm: usb: Prepare dwc2 driver for driver-model conversion
Put all global data in a structure and move (what will be) common code into
common functions. This will make the driver-model conversion much easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:37 -06:00
Simon Glass
2e5350fee0 dm: usb: Add an errno.h header to usb_ether.c
This is required on some platforms, so add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:36 -06:00
Simon Glass
12dc8e7522 dm: Make regmap and syscon optional
Not all boards use garbage collection in their link step, so we should avoid
adding options that rely on this for prevention of code bloat. Add separate
Kconfig options for syscon and regmap uclasses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:36 -06:00
York Sun
fdb9f349be lib/fdtdec: Fix compiling warning caused by changing fdt_addr_t type
fdt_addr_t is changed to phys_addr_t. The format in debug should be updated
to %pa to match the type.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:13 -06:00
Simon Glass
a7a73ef85f exynos: video: Remove non-device-tree code
We always use device tree on exynos, so remove the unused code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:17 -06:00
Simon Glass
68964dbc83 video: Remove the old parade driver
We have a new one which uses driver model and device tree configuration.
Remove the old one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:16 -06:00
Simon Glass
24696e2f21 cros_ec: Remove the old tunnel code
This is not needed with driver mode. Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:16 -06:00
Simon Glass
05bccbcd76 power: Remove old TPS65090 drivers
Remove the old drivers (both the normal one and the cros_ec one) now that
we have new drivers that use driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:16 -06:00
Simon Glass
eca4866586 dm: gpio: Check a GPIO is valid before using it
Since a gpio_desc is allowed to be invalid we should return an error
indicating that the operation cannot be completed. This can happen if the
GPIO is optional - e.g. some devices may have a reset line and some may
not.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:14 -06:00
Simon Glass
129c942f32 exynos: video: Correct debug output
We should not print a message from the driver when the display is set up.
This is normal behaviour. Change this message to use debug().

Also remove the double newline on another debug message.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:14 -06:00
Simon Glass
c95ed7d9e7 exynos: Correct return value in exynos_mmc_init()
This function should return 0 on success, not 1. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:14 -06:00
Simon Glass
c7d50e7fb9 exynos: spi: Convert the timeout to debug()
Since the timeout is reported through normal channels, and is sometimes
expected (e.g. if the bus is being probed for a non-existent device),
don't display the message in the driver.

In general, drivers should not write to the console as this limits their
usefulness in error conditions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:14 -06:00
Simon Glass
048dba0191 dm: video: Add support for the NXP PTN3460 bridge
This chip provides an eDP to LVDS bridge which is useful for SoCs that don't
support LVDS displays (or it would waste scarce pins). There is no setup
required by this chip, other than to adjust power-down and reset pins, and
those are managed by the uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:13 -06:00
Simon Glass
bcd5dfffe6 dm: video: Add support for the Parade PS8622/625 bridge
This chip provides an eDP to LVDS bridge which is useful for SoCs that don't
support LVDS displays (or it would waste scarce pins). The setup is included
in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:13 -06:00
Simon Glass
5eaeadaa3a video: Work around lack of pinctrl
We haven't quite got pinctrl ready to apply to mainline. We don't want to
GPIO pull-up/down support to the driver model GPIO layer either. So work
around this for now.

We can address this when pinctrl is complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:13 -06:00
Simon Glass
801ab9e93c dm: video: Add support for video bridges
A video bridge typically converts video from one format to another, e.g.
DisplayPort to LVDS. Add driver model support for these with a simple
interface to control activation and backlight. The uclass supports GPIO
control of power and reset lines.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:13 -06:00
Simon Glass
d08504d18a dm: power: Don't return an error when regulators are not autoset
Not all regulators can be set up automatically. Adjust the code so that
regulators_enable_boot_on() will return success when some are skipped.
Only genuine errors are reported.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05 21:06:13 -06:00
Simon Glass
75a429f1a2 dm: pmic: max77686: Support all BUCK regulators
Add support for all BUCK regulators, now that the correct register is
accessed for each.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:13 -06:00
Simon Glass
8c4287090c dm: power: max77686: Correct BUCK register access
Some regulators use the wrong voltage register and thus it is not possible
to control them. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05 21:06:12 -06:00
Simon Glass
cd367d8997 dm: pmic: Correct the pmic_reg_write() implementation
This should write the register, not read it. Fix this bug.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05 21:06:12 -06:00
Simon Glass
b5ffa4fdcb dm: pmic: max77686: Correct a few nits
The driver name should not have a space in it. Also the regulator names
should match the case of the device tree. Fix these problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05 21:06:12 -06:00
Simon Glass
f615e6a64d dm: power: Add support for S5M8767 regulators
This PMIC is used with SoCs which need a combination of BUCKs and LDOs. The
driver supports changing voltage and enabling/disabling each regulator. It
supports the standard device tree binding and supports driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05 21:06:12 -06:00
Simon Glass
d308c0136d dm: power: Add support for the S5M8767 PMIC
This PMIC is used with SoCs which need a combination of BUCKs and LDOs. The
driver supports probing and basic register access. It supports the standard
device tree binding and supports driver model. A regulator driver can be
provided also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05 21:06:12 -06:00
Simon Glass
1c88b67ec8 dm: power: Add support for TPS65090 FETs
The TPS65090 has 7 FETs which are modelled as regulators. This allows them
to be controlled by drivers easier, accessed through the 'regulator' command
and used by other drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05 21:06:12 -06:00
Simon Glass
151b223b9c dm: power: Add a new driver for the TPS65090 PMIC
The existing TPS65090 driver does not support driver model. Add a new one
that does. This can be used as a base for a regulator driver also. It uses
the standard device tree binding.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05 21:06:12 -06:00
Simon Glass
7fb57396e6 exynos: Enable the debug UART in SPL
As a debugging aid, allow UART3 to be used as a debug UART in SPL. This
is a precursor to proper UART support, which requires a substantial
refactor.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:11 -06:00