The 8544 DS doesn't have any cacheable Local Bus memories set up. By mapping
space for some anyway, we were allowing speculative loads into unmapped space,
which would cause an exception (annoying, even if ultimately harmless).
Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the
problem.
Signed-off-by: Andy Fleming <afleming@freescale.com>
This patch removes some ft_board_setup() functions from some 4xx boards.
This can be done since we now have a default weak implementation for this
in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
implementation like canyonlands need their own version.
Signed-off-by: Stefan Roese <sr@denx.de>
On the at91sam9260ep development board there is an EEPROM
connected to the TWI interface (PA23, PA24 Peripheral A
multiplexing), so we cannot use these pins as ETX2, ETX3.
This patch configures PA10, PA11 pins for ETX2, ETX3
instead of PA23, PA24 pins.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Manuel Sahm <Manuel.Sahm@feig.de>
The DIU_DIV register is 8 bit not 5 bit. This prevented large DIV values
so it was not possible to set a slow pixel clock and thus prevented
display on small screens.
Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
Acked-by: John Rigby <jrigby@freescale.com>
board/ads5121/iopin.c
Replace bit fields in struct iopin_t with a single
field and intialize it via plain old macros.
This fixes the type pun warnings and makes the code
more readable.
board/ads5121/ads5121.c
Add include iopin.h to ads5121.c for the iopin_initialize
prototype.
Add an extern void ads5121_diu_init(void)
Signed-off-by: John Rigby <jrigby@freescale.com>
This patch cleans up the 440SPe PCIe register usage. Now only defines
from the include/asm-ppc/4xx_pcie.h are used.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch reworks the 440GX interrupt handling so that the common 4xx
code can be used. The 440GX is an exception to all other 4xx variants
by having the cascading interrupt vectors not on UIC0 but on a special
UIC named UICB0 (UIC Base 0). With this patch now, U-Boot references
the 440GX UICB0 when UIC0 is selected. And the common 4xx interrupt
handling is simpler without any 440GX special cases.
Also some additional cleanup to cpu/ppc4xx/interrupt.c is done.
Signed-off-by: Stefan Roese <sr@denx.de>
This 2nd patch now removes all UIC mask bit definition. They should be
generated from the vectors by using the UIC_MASK() macro from now on.
This way only the vectors need to get defined for new PPC's.
Also only the really used interrupt vectors are now defined. This makes
definitions for new PPC versions easier and less error prone.
Another part of this patch is that the 4xx emac driver got a little
cleanup, since now the usage of the interrupts is clearer.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch is the first step to consolidate the UIC related defines in the
4xx headers. Move header from asm-ppc/ppc4xx-intvec.h to
asm-ppc/ppc4xx-uic.h as it will hold all UIC related defines in the next
steps.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes some ft_board_setup() functions from some 4xx boards.
This can be done since we now have a default weak implementation for this
in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
implementation like canyonlands need their own version.
Signed-off-by: Stefan Roese <sr@denx.de>
Add AMCC Redwood reference board that uses the latest
PPC 464 CPU processor combined with a rich mix of peripheral
controllers. The board will support PCIe, mutiple Gig ethernet
ports, advanced hardware RAID assistance and IEEE 1588.
Signed-off-by: Feng Kan <fkan@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
ADS5121 Rev 3 board is now the default config
config targets are now
ads5121_config
Rev 3 board with
PCI
M41T62 on board RTC
512MB DRAM
ads5121_rev2_config
Rev 2 board with
No PCI
256MB DRAM
Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Rigby <jrigby@freescale.com>
This patch fixes ppc4xx related printf format warning. Those warnings are
now visible since patch dc4b0b38d4
[Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
really helpful.
Signed-off-by: Stefan Roese <sr@denx.de>
ARM: Fix for incorrect version of patch applied when
adding support for the Lyrtech SFF-SDR board.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Philip Balister, OpenSDR <philip@opensdr.com>
By Cleanup out-or-tree building for some boards (.depend)
(commit:c8a3b109f07f02342d097b30908965f7261d9f15)
because filse ware changed, some SH-boards have compile error.
I revised this problem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Fix NAND FLASH timings for at91sam9x evaluation kits.
New timings are based on application note
"NAND Flash Support on AT91SAM9 Microcontrollers" available at
http://atmel.com/dyn/resources/prod_documents/doc6255.pdf
Signed-off-by: Patrice Vilchez <patice.vilchez@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Stelian Pop <stelian@popies.net>
AT91 RSTC registers are battery-backuped, so their values
are not reset across power cycles. One of those registers,
the AT91_RSTC_MR register, is being modified by U-Boot, in
the ethernet initialisation routine, to generate a 500ms
user reset.
Unfortunately, this value is not being restored afterwards,
causing subsequent resets to also last for 500ms.
This long reset sequence causes problems (at least) in the
boot sequence from NOR: by the time the CPU tries to load
a program from the NOR flash, the latter is still in reset
and not yet available.
Additionaly, this patch fixes a bug in the original code which
caused the reset delay to last for 2s instead of 500ms.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
update mvBL-M7 config file to use UBOOT_VERSION.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds support for the Lyrtech SFF-SDR board,
based on the TI DaVinci architecture (ARM926EJS).
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Philip Balister <philip@balister.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch includes <asm/types.h> before <asm/u-boot.h> in some 4xx
board specific files where it has been missing.
Signed-off-by: Stefan Roese <sr@denx.de>
The ATNGW100 has 8MB DataFlash on board. Give users access to it through
the new SPI flash framework.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch is based on the following patch sent a few minutes ago:
"NAND FSL UPM: driver re-write using the hwcontrol callback"
It is untested, of course. Anton, could you please give it a try.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
This patch disables the square wave output of the M41T62 RTC used on
Canyonlands & Glacier. Here the explanation:
The serial real-time clock part used in the design is an
STMicro M41T62. This part has a full-time 32KHz square wave
output that is connected to the TmrClk input to the
processor. The default state for this square wave output is
enabled so the output runs continuously when the board is
powered normally and also from the battery. The TmrClk input
to the processor goes to ground when the power is removed
from the board/processor, and therefore the running square
wave output is driving ground which drains the battery quickly.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory. phys_size_t is defined as an unsigned long on almost
all current platforms.
This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram). It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.
Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Currently, both are defined as an unsigned long, but
should be phys_size_t. This should result in no real change,
since phys_size_t is currently an unsigned long for all the
default configs. Also add print_lnum to cmd_bdinfo to deal
with the potentially wider memsize.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
With the new LAW interface (set_next_law) we can move to letting the
system allocate which LAWs are used for what purpose. This makes life
a bit easier going forward with the new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
A number of board ports have empty version of board_early_init_f
for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove unused and unconfigured DDR test code from FSL 85xx boards.
Besides, other common code exists.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some TQM85xx boards could be equipped with up to 1 GiB (NOR) Flash
memory. The current memory map only supports up to 128 MiB Flash.
This patch adds the configuration option CONFIG_TQM_BIGFLASH. If
set, up to 1 GiB flash is supported. To achieve this, the memory
map has to be adjusted in great parts (for example the CCSRBAR is
moved from 0xE0000000 to 0xA0000000).
If you want to boot Linux with CONFIG_TQM_BIGFLASH set, the new
memory map also has to be considered in the kernel (changed
CCSRBAR address, changed PCI IO base address, ...). Please use
an appropriate Flat Device Tree blob (tqm8548.dtb).
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch adds support for NAND FLASH on the TQM8548. It is disabled by
default and can be enabled for the TQM8548 modules. It is now based on
the re-written FSL NAND UPM driver. A patch has been posted earlier today
with the subject:
"NAND FSL UPM: driver re-write using the hwcontrol callback"
Note that the R/B pin is not supported by that module requiring to use
the specified maximum delay time.
Note: With NAND support enabled the size of the U-Boot image exceeds
256 KB and TEXT_BASE must therefore be set to 0xfff80000 in config.mk,
doubling the image size :-(.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch adds support for PCI express cards. The board support
now uses common FSL PCI init code, for both, PCI and PCIe on all
TQM85xx modules.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch adds basic support for the TQM8548 module from TQ-Components
(http://www.tqc.de/) including DDR2 SDRAM initialisation and support for
eTSEC 3 and 4
Furthermore Flash buffer write has been enabled to speed up output to
the Flash by approx. a factor of 10.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch adds support for Linux kernels using the Flat Device Tree.
It also re-defines the default environment settings for booting Linux
with the FDT blob.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch adds initialization of the UPMC RAM to support up to two
Intel 82527 compatible CAN controller on the TQM85xx modules.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch fixes the re-calculation of the automatic chip select
configuration for boards with two populated FLASH banks.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Do not configure port pins PD30/PD31 as SCC1 TxD/RxD except for the TQM8560
board. On the other TQM85xx boards (TQM8541 and TQM8555) SCC1 is not used
as serial interface anyway. Worse, on some board variants configuring the
pins for SCC1 leads to short circuits (for example on the TQM8541-BG).
Signed-off-by: Martin Krause <martin.krause@tqs.de>
The submitted patch seems to have been more up-to-date, but an older patch was
already in the repository. This patch encompasses the differences
Taken entirely from Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Move all TQM board directories to the vendor specific directory "tqc"
for modules from TQ-Components GmbH (http://www.tqc.de).
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Add MPC8343 based board mvBlueLYNX-M7.
It's a single board stereo camera system.
Please read doc/README.mvblm7 for details.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Use CONFIG_OF_LIBFDT instead to support flattened device trees. It is
cleaner, has better functionality, and is better supported.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
to CONFIG_OF_LIBFDT.
WARNING: This conversion is untested because I do not have a board to
test it on.
NOTE: The FDT blob (DTS) must have an /aliases/ethernet0 and (optionally)
/aliases/ethernet1 property for the ethernet to work.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
SH7763RDP has SCIF, NOR Flash, Ethernet, USB host, LCDC and MMC.
In this patch, support SCIF, NOR Flash, and Ethernet.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This patch series unifies the AMCC eval board ports by introducing
a common include header for all AMCC eval boards:
include/configs/amcc-common.h
This header now includes all common configuration options/defines which
are removed from the board specific headers.
The reason for this is ease of maintenance and unified look and feel
of all AMCC boards.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
Historically the 405 U-Boot port had a dram_init() call in early init
stage. This function was still called from start.S and most of the time
coded in assembler. This is not needed anymore (since a long time) and
boards should implement the common initdram() function in C instead.
This patch now removed the dram_init() call from start.S and removes the
empty implementations that are scattered through most of the 405 board
ports. Some older board ports really implement this dram_init() though.
These are:
csb272
csb472
ERIC
EXBITGEN
W7OLMC
W7OLMG
I changed those boards to call this assembler dram_init() function now
from their board specific initdram() instead. This *should* work, but please
test again on those platforms. And it is perhaps a good idea that those
boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
some time. So further patches welcome here.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the kilauea and kilauea_nand (for NAND booting)
board port to not use a board specific DDR2 init routine anymore. Now
the common code from cpu/ppc4xx is used.
Thanks to Grant Erickson for all his basic work on this 405EX early
bootup.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch (Part 2 of 2):
* Rolls up a suite of changes to enable correct primordial stack and
global data handling when the data cache is used for such a purpose
for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
* Related to the first, unifies DDR2 SDRAM and ECC initialization by
eliminating redundant ECC initialization implementations and moving
redundant SDRAM initialization out of board code into shared 4xx
code.
* Enables MCSR visibility on the 405EX(r).
* Enables the use of the data cache for initial RAM on
both AMCC's Kilauea and Makalu and removes a redundant
CFG_POST_MEMORY flag from each board's CONFIG_POST value.
- Removed, per Stefan Roese's request, defunct memory.c file for
Makalu and rolled sdram_init from it into makalu.c.
With respect to the 4xx DDR initialization and ECC unification, there
is certainly more work that can and should be done (file renaming,
etc.). However, that can be handled at a later date on a second or
third pass. As it stands, this patch moves things forward in an
incremental yet positive way for those platforms that utilize this
code and the features associated with it.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This cleans up the SDRAM initialization and related code a bit, and
allows faster booting.
* Add definitions for EBI and internal SRAM to asm/arch/memory-map.h
* Remove memory test from sdram_init() and make caller responsible
for verifying the SDRAM and determining its size.
* Remove base_address member from struct sdram_config (was sdram_info)
* Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT
* Add support for a common STK1000 hack: 16MB SDRAM instead of 8.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Since the reset vector is always aligned to a very large boundary, we
can save a couple of KB worth of alignment padding by placing the
exception vectors at the same address.
Deciding which one it is is easy: If we're handling an exception, the
CPU is in Exception mode. If we're starting up after reset, the CPU is
in Supervisor mode. So this adds a very minimal overhead to the reset
path (only executed once) and the exception handling path (normally
never executed at all.)
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Rework the HMATRIX configuration interface so that it becomes easier
to configure the HMATRIX for boards with special needs, and add new
parts.
The HMATRIX header file has been split into a general,
chip-independent part with register definitions, etc. and a
chip-specific part with SFR bitfield definitions and master/slave
identifiers.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This is a replacement for ATSTK1002 with 64MB SDRAM and NAND flash on
board. It's currently in production and will be available soon.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The .flashprog section was only needed back when we were running
directly from flash, and it's even more useless on NGW100 since it
uses the CFI flash driver which never used this workaround in the
first place.
Remove it on STK1000 as well, and get rid of all the associated code and
annotations.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Add DIU and cfb console support to FSL 5121ADS board.
Use #define CONFIG_VIDEO in config file to enable fb console.
Signed-off-by: York Sun <yorksun@freescale.com>
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).
Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
When SATA is selected (via jumper J6) we need to disable the first PCIe
node in the device tree, so that Linux doesn't initialize it. Otherwise
the Linux SATA driver will fail to detect the devices.
The same goes the other way around too. So if PCIe is selected we need
to disable the SATA node in the device tree.
This is because PCIe port 0 and SATA on 460EX share the same pins
(multiplexed) and we have to configure in U-Boot which peripheral is
enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Several board/<...>/config.mk files include dynamically built (by
the Makefile) config files but used the wrong file name of
$(TOPDIR)/board/$(BOARDDIR)/config.tmp
instead if the correct
$(OBJTREE)/board/$(BOARDDIR)/config.tmp
The bug is nasty because the build result is correct for the (normal)
in-tree builds, and because 'sinclude' is used no errors get raised
even for out-of-tree build tests. But out-of-tree builds use an
incomplete and thus usually incorrect configuration...
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch fixes the canyonlands config.mk file to enable correct
out-of-tree builds. Thanks to Wolfgang Denk for spotting this.
Signed-off-by: Stefan Roese <sr@denx.de>
The AT91CAP9 revC CPU has a few differences over the previous,
revB CPU which was distributed in small quantities only (revA was
an internal Atmel product only).
The revC silicon needs a special initialisation sequence to
switch from the internal (imprecise) RC oscillator to the
external 32k clock.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch makes the necessary adaptations (PIO configurations and
defines in config header file) to hook up the Atmel LCD driver to the
AT91SAM9RLEK board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch makes the necessary adaptations (PIO configurations and
defines in config header file) to hook up the Atmel LCD driver to the
AT91SAM9263EK board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch makes the necessary adaptations (PIO configurations and
defines in config header file) to hook up the Atmel LCD driver to the
AT91SAM9261EK board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch makes the necessary adaptations (PIO configurations and
defines in config header file) to hook up the Atmel LCD driver to the
AT91CAP9ADK board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adds support for the AT91SAM9RL chip and the AT91SAM9RLEK
board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adds support for the AT91SAM9263 chip and the AT91SAM9263EK
board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adds support for the AT91SAM9261 chip and the AT91SAM9261EK
board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The Atmel boards can handle 8 or 16 bit NAND memories. This patch
makes the support configurable in the board config header file
(CFG_NAND_DBW_8 or CFG_NAND_DBW_16).
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The Atmel boards can handle 8 or 16 bit NAND memories. This patch
makes the support configurable in the board config header file
(CFG_NAND_DBW_8 or CFG_NAND_DBW_16).
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
All the AT91CAP9/AT91SAM9 boards have the same linker script. The patch
below avoids the duplication of u-boot.lds by putting the file in the
cpu directory instead of the board one.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The Makefiles for the AT91CAP9/AT91SAM9 boards have an incomplete
copyright notice. This patch adds the missing pieces.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
When Ulf did the dataflash.c cleanup, he didn't add his copyright on
the new created files. This patch fixes the problem.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
When doing the AT91CAP9/AT91SAM9 port, a number of header files were
copied from the Linux kernel sources. This patch explicitly specifies
this origin for all the copied headers, and for those missing copyright
information, adds it.
Additionaly, the header file 'at91sam926x_mc.h' has been superceeded
in the latest kernel sources by 'at91sam9_smc.h'.
The copyright information has been confirmed by the AT91 Linux kernel
maintainer, Andrew Victor <avictor.za@gmail.com>.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
When applying the AT91CAP9 patches upstream, something transformed
the '@' character into the ' <at> ' sequence.
The patch below restores the original form in all the places where
it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
were copied from AT91CAP9, and a couple of other files where the
' <at> ' sequence was present).
Signed-off-by: Stelian Pop <stelian@popies.net>
When doing the AT91CAP9/AT91SAM9 port, a number of header files were
copied from the Linux kernel sources. This patch explicitly specifies
this origin for all the copied headers, and for those missing copyright
information, adds it.
Additionaly, the header file 'at91sam926x_mc.h' has been superceeded
in the latest kernel sources by 'at91sam9_smc.h'.
The copyright information has been confirmed by the AT91 Linux kernel
maintainer, Andrew Victor <avictor.za@gmail.com>.
Signed-off-by: Stelian Pop <stelian@popies.net>
When Ulf did the dataflash.c cleanup, he didn't add his copyright on
the new created files. This patch fixes the problem.
Signed-off-by: Stelian Pop <stelian@popies.net>
According to schematics and to RedBoot sources, the MX31ADS uses a 32768Hz
oscillator as a SKIL source. Fix previously wrongly assumed 32000Hz value.
Also fix a typo when verifying a jumper configuration. While at it, make
two needlessly global functions static.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
When applying the AT91CAP9 patches upstream, something transformed
the '@' character into the ' <at> ' sequence.
The patch below restores the original form in all the places where
it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
were copied from AT91CAP9, and a couple of other files where the
' <at> ' sequence was present).
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adds fdt (flattened device tree) support to the AMCC
Acadia eval board. This increases the image size and it doesn't
fit anymore into 256kByte. Since we didn't want to remove features
from the configuration, we decided to increase the U-Boot image size
(add one flash sector).
Also changed the default environment definition to make it
independent of such changes.
Signed-off-by: Stefan Roese <sr@denx.de>
Add support for booting with a device tree blob. This is needed to boot
ARCH=powerpc kernels. Also add support for setting the eth0 mac address
via the ethaddr variable.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Stefan Roese <sr@denx.de>
Since the current dflush() implementation is know to have some problems
(as seem on lwmon5 ECC init) this patch removes it completely and replaces
it by using clean_dcache_range().
Tested on Katmai with ECC DIMM.
Signed-off-by: Stefan Roese <sr@denx.de>
As it seems the "old" ECC initialization routine by using dflush() didn't
write all lines in the dcache back to memory on lwmon5. This could lead
to ECC error upon Linux booting. This patch changes the program_ecc()
routine to now use clean_dcache_range() instead of dflush().
clean_dcache_range() uses dcbst which is exactly what we want in this
case.
Since dflush() is known is cause problems, this routine will be
removed completely and replaced by clean_dcache_range() with an
additional patch.
Signed-off-by: Stefan Roese <sr@denx.de>
out_8 wants a pointer to an unsigned as the first argument. Add a
maintainer for Linkstation boards.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Since we didn't want to remove features from the configuration, we
decided to increase the U-Boot image size (add one flash sector).
Also changed the default environment definition to make it
independent of such changes.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
As suggested by Wolfgang Denk:
- image printing functions:
- remove wrappers
- remove indentation prefix from functions' signatures
- merge getenv_verify and getenv_autostart into one parametrized function
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Update MX31ADS default environment to better match the flash layout and
the memory map, support SPI and RTC.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Limit the rate of h/w watch-dog triggering on the LWMON5 board by
the CONFIG_WD_MAX_RATE value.
Note that an earlier version of this patch which used microseconds
instead of ticks dis not work. The problem was that we used
usec2ticks() to convert microseconds into ticks. usec2ticks() uses
get_tbclk(), which in turn calls get_sys_info(). It turns out that
this function does a lot of prolonged operations (like divisions)
which take too much time so we do not trigger the watchdog in time,
and it resets the system.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
