Commit graph

2669 commits

Author SHA1 Message Date
Rafal Jaworowski
dec99558b9 [ppc4xx] Separate settings for PCIe bus numbering on 440SPe rev.A
This brings back separate settings for PCIe bus numbers depending on chip
revision, which got eliminated in 2b393b0f0a
commit. 440SPe rev. A does NOT work properly with the same settings as for
the rev. B (no devices are seen on the bus during enumeration).

Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2007-08-02 08:25:18 +02:00
Eugene OBrien
d2f6800662 ppc4xx: Update AMCC Bamboo 440EP support
Changed storage type of cfg_simulate_spd_eeprom to const
Changed storage type of gpio_tab to stack storage
(Cannot access global data declarations in .bss until afer code relocation)

Improved SDRAM tests to catch problems where data is not uniquely addressable
(e.g. incorrectly programmed SDRAM row or columns)

Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules
Fixed AM29LV320DT (OpCode Flash) sector map

Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-31 10:24:56 +02:00
Stefan Roese
ea9f6bce38 ppc4xx: Update 440EPx lwmon5 board support
- Clear ECC status regs after ECC POST test
- Set dcbz for ECC generation with caches enabled as default
- Code cleanup

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-31 08:37:01 +02:00
Stefan Roese
27a528fb41 ppc4xx: Only print ECC related info when the error bis are set
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-30 11:04:57 +02:00
Matthias Fuchs
e36220a4ba new FPGA image for PLU405 board
new FPGA image for PLU405 board with improved CompactFlash timing

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-07-28 07:15:00 +02:00
Anatolij Gustschin
b66091de6c ppc4xx: lwmon5: Update Lime initialization
Change Lime SDRAM initialization to now support 100MHz and
133MHz (if enabled). Also the framebuffer is initialized to
display a blue rectangle with a white border.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-26 15:08:01 +02:00
Stefan Roese
9f24a808f1 ppc4xx: lwmon5: Support for 128 MByte NOR FLASH added
The used Intel NOR FLASH chips have internally two dies, and are now
treated as two seperate chips.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-24 09:52:52 +02:00
Stefan Roese
aedf5bde17 ppc4xx: Fix lwmon5 interrupt controller setup (polarity, trigger...)
As suggested by Hakan Eryigit, here an updated setup for the lwmon5
interrupt controller.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-24 07:44:12 +02:00
Stefan Roese
a71d96eac8 ppc4xx: Fix bug with default GPIO output value
As spotted by Matthias Fuchs, the default output values for all GPIO1
outputs were not setup correctly. This patch fixes this issue.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-20 15:03:44 +02:00
Pavel Kolesnikov
531e3e8b83 POST: Add ECC POST for the lwmon5 board
This patch adds ECC Post test for the Lwmon5 board based
on PPC440EPx to U-Boot.

Signed-off-by: Pavel Kolesnikov <concord@emcraft.com>
Acked-by: Yuri Tikhonov <yur@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
2007-07-20 15:03:03 +02:00
Stefan Roese
8f085e324a Merge with git://www.denx.de/git/u-boot.git 2007-07-16 13:28:47 +02:00
Stefan Roese
8848ec858f ppc4xx: Code cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 10:02:12 +02:00
Stefan Roese
2a49fc17d0 ppc4xx: AMCC Luan uses the new boardspecific DDR2 controller setup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 10:01:38 +02:00
Stefan Roese
df3f17422a ppc4xx: Support for Yucca board with 440SPe Rev A added to 44x_spd_ddr2.c
The new boardspecific DDR2 controller configuration is used for the Yucca
board. Now the Yucca board with 440SPe Rev. A chips is also supported.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 10:00:43 +02:00
Stefan Roese
6ed14addf9 ppc4xx: Add new weak functions to support boardspecific DDR2 configuration
The new "weak" functions ddr_wrdtr() and ddr_clktr() are added to better
support non default, boardspecific DDR(2) controller configuration.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 09:57:00 +02:00
Stefan Roese
5743a9207a ppc4xx: Add remove_tlb() function to remove a mem area from TLB setup
The new function remove_tlb() can be used to remove the TLB's used to
map a specific memory region. This is especially useful for the DDR(2)
setup routines which configure the SDRAM area temporarily as a cached
area (for speedup on auto-calibration and ECC generation) and later
need this area uncached for normal usage.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 08:53:51 +02:00
Wolfgang Denk
3a6cab844c Update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-14 22:51:02 +02:00
Heiko Schocher
5da91f6ca9 Merge with /home/hs/Atronic/u-boot-dev-new 2007-07-14 01:07:51 +02:00
Heiko Schocher
0115953077 [PCS440EP] - fix compile error, if BUILD_DIR is used 2007-07-14 01:06:58 +02:00
Heiko Schocher
fad6340715 make show_boot_progress () weak.
Signed-off-by: Heiko Schocher <hs@denx.de>
2007-07-13 09:54:17 +02:00
Heiko Schocher
9079024723 [PCS440EP] - The DIAG LEDs are now blinking, if an error occur
- fix compile error, if BUILD_DIR is used

Signed-off-by: Heiko Schocher <hs@denx.de>
2007-07-13 08:26:05 +02:00
Stefan Roese
a2e1c7098c ppc4xx: Change receive buffer handling in the 4xx emac driver
This change fixes a bug in the receive buffer handling, that
could lead to problems upon high network traffic (broadcasts...).

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-12 16:32:08 +02:00
Wolfgang Denk
239f05ee4d Update CHANGELOG, minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-12 01:45:34 +02:00
Wolfgang Denk
fd3635190b Merge with /home/tur/git/u-boot#cm1_qp1 2007-07-12 01:42:41 +02:00
Bartlomiej Sieka
fa1df30892 CM1.QP1: Support for the Schindler CM1.QP1 board.
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2007-07-11 20:11:07 +02:00
Heiko Schocher
96e1d75be8 [PCS440EP] - Show on the DIAG LEDs, if the SHA1 check failed
- now the Flash ST M29W040B is supported (not tested)
            - fix the "led" command
            - fix compile error, if BUILD_DIR is used

Signed-off-by: Heiko Schocher <hs@denx.de>
2007-07-11 18:39:11 +02:00
Stefan Roese
53629f439c Merge with git://www.denx.de/git/u-boot.git 2007-07-11 12:16:04 +02:00
Wolfgang Denk
4ef218f6fd Coding style cleanup; update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-10 00:01:28 +02:00
Wolfgang Denk
bf6a9ca9b2 Merge with /home/hs/Atronic/u-boot 2007-07-09 23:41:45 +02:00
Stefan Roese
334043f601 ppc4xx: Update lwmon5 default environment
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-06 12:26:51 +02:00
Stefan Roese
5d187430a0 ppc4xx: Update lwmon5 board
Add unlock=yes environment variable to default variables to unlock
the CFI flash by default.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-06 11:48:24 +02:00
Wolfgang Denk
e80955f07d Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx 2007-07-06 02:50:34 +02:00
Wolfgang Denk
f1152f8c28 Code cleanup and default config update for STC GP3 SSA board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-06 02:50:19 +02:00
Sergei Poselenov
b44896215a Merged POST framework with the current TOT.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2007-07-05 08:17:37 +02:00
Niklaus Giger
f780b83316 resubmit: ppc4xx: Remove sequoia/sequioa.h. Cleanup ppc440.h for PPC440EPX
Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
2007-07-04 10:14:07 +02:00
Stefan Roese
04e6c38b76 ppc4xx: Update lwmon5 board
- Add optional ECC generation routine to preserve existing
  RAM values. This is needed for the Linux log-buffer support
- Add optional DDR2 setup with CL=4
- GPIO50 not used anymore
- Lime register setup added

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-04 10:06:30 +02:00
Wolfgang Denk
98c440bee6 Merge with /home/wd/git/u-boot/custodian/u-boot-testing 2007-07-03 15:07:56 +02:00
Mushtaq Khan
1f2a058986 Fix S-ATA support.
Signed-off-by: mushtaq khan <mushtaqk_921@yahoo.co.in>
2007-06-30 18:50:48 +02:00
Stefan Roese
e4feb7638c Merge with git://www.denx.de/git/u-boot.git 2007-06-25 20:20:30 +02:00
Heiko Schocher
a5d71e290f [PCS440EP] get rid of CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG
Signed-off-by: Heiko Schocher <hs@denx.de>
2007-06-25 19:11:37 +02:00
Niklaus Giger
a1bd6200ec ppc4xx: PPC440EPx Emit DDR0 registers on machine check interrupt
This patch prints the DDR status registers upon machine check
interrupt on the 440EPx/GRx. This can be useful especially when
ECC support is enabled.

I added some small changes to the original patch from Niklaus to
make it compile clean.

Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-25 17:03:13 +02:00
Niklaus Giger
807018fb7f ppc4xx: Fix O=buildir builds
This patch fixes the problem to assemble cpu/ppc4xx/start.S
experienced last week where building failed having specified
O=../build.sequoia.

Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
2007-06-25 16:50:55 +02:00
Stefan Roese
466fff1a7b ppc4xx: Add pci_pre_init() for 405 boards
This patch removes the CFG_PCI_PRE_INIT option completely, since
it's not needed anymore with the patch from Matthias Fuchs with
the "weak" pci_pre_init() implementation.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-25 15:57:39 +02:00
Matthias Fuchs
6f35c53166 ppc4xx: Maintenance patch for esd's CPCI405 derivats
-add pci_pre_init() for pci interrupt fixup code
-disable phy sleep mode via reset_phy() function
-use correct io accessors
-cleanup

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-06-25 11:58:46 +02:00
Matthias Fuchs
5a1c9ff0c4 ppc4xx: Add pci_pre_init() for 405 boards
This patch adds support for calling a plattform dependant
pci_pre_init() function for 405 boards. This can be used to
move the current pci_405gp_fixup_irq() function into the
board code.

This patch also makes the CFG_PCI_PRE_INIT define obsolete.
A default function with 'weak' attribute is used when
a board specific pci_pre_init() is not implemented.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-06-25 11:57:50 +02:00
Wolfgang Denk
1636d1c852 Coding stylke cleanup; rebuild CHANGELOG 2007-06-22 23:59:00 +02:00
Igor Lisitsin
2dc64451b4 Adapt log buffer code to support Linux 2.6
A new environment variable, "logversion", selects the log buffer
behaviour. If it is not set or set to a value other than 2, then the
old, Linux 2.4.4, behaviour is selected.

Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
2007-06-22 23:25:25 +02:00
Igor Lisitsin
a11e06965e Extend POST support for PPC440
Added memory, CPU, UART, I2C and SPR POST tests for PPC440.

Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
2007-06-22 23:21:01 +02:00
Heiko Schocher
566a494f59 [PCS440EP] upgrade the PCS440EP board:
- Show on the Status LEDs, some States of the board.
                - Get the MAC addresses from the EEProm
                - use PREBOOT
                - use the CF on the board.
                - check the U-Boot image in the Flash with a SHA1
                  checksum.
                - use dynamic TLB entries generation for the SDRAM

Signed-off-by: Heiko Schocher <hs@denx.de>
2007-06-22 19:11:54 +02:00
Stefan Roese
3a1f5c81b0 ppc4xx: Fix problem with extended program_tlb() funtion
The recently extended program_tlb() function had a problem when
multiple TLB's had to be setup (for example with 512MB of SDRAM). The
virtual address was not incremented. This patch fixes this issue
and is tested on Katmai with 512MB SDRAM.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-22 16:58:40 +02:00