Commit graph

2812 commits

Author SHA1 Message Date
Sean Anderson
1485d64923 net: bcm6368: Fix not calling dev_info with a device
Remove the pdev indirection.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30 08:53:04 -04:00
Biju Das
9275a963d4 net: ravb: Remove writeext function call
The micrel phy driver is already configuring this values from
device tree. So remove the redundant phy configuration call from
this driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26 17:25:44 +02:00
Kuldeep Singh
6fe7743d05 net: pfe_eth: Remove non-DM code check from pfe_spi_flash_init
CONFIG_DM_SPI_FLASH is only supported now with passing of driver
conversion deadline from non-DM to DM model. Hence, it's safe to remove
non-DM code check from pfe_spi_flash_init.

Also use CONFIG_ENV_SPI_MODE and CONFIG_ENV_SPI_MAX_HZ instead of
reading reading values from DT.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Kuldeep Singh
63d5344615 net: pfe_eth: Fix resoure leak in pfe_spi_flash_init
Fix Coverity issue: RESOURCE_LEAK.
leaked_storage: Variable addr going out of scope leaks the storage it
points to.

Fixes: e0152dbed6 ("net: pfe_eth: Use spi_flash_read API to access
flash memory")
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Madalin Bucur
858056b0e0 driver: net: fm: add support for XFI
All the 10G ports that were working in XFI mode were described as
using XGMII (as PHY_INTERFACE_MODE_XFI was not added at the time).
Add the minimal changes required for the FMan code to support XFI.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Chaitanya Sakinam
ad8277270a ls1012a, pfe_eth: Update probe to avoid resource leak
PFE DDR addresses are now stored on to a stack varaiable rather
dynamic allocation.

Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Chaitanya Sakinam
0649ab496a ls1012a, pfe_eth: correction in delay implementation
correction in delay implementation before we exit out of tx timeout.

Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Madalin Bucur
b750695ac9 drivers: net: phy: Use Aquantia driver for AQR113C
Add support for AQR113C PHY

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Grigore Popescu
479cfd1fa6 drivers: net: ldpaa_eth: lx2160a: fix bug in checking if a DPMAC is enabled
The next DPMAC was always verified if it is enabled.  In case of
DPMAC@6, the DPMAC@7 is verified.  As DPMAC@7 is disabled, DPMAC@6 will
be considered disabled and not detected by uboot.

Signed-off-by: Grigore Popescu <grigore.popescu@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Tom Rini
67ece26d8b Xilinx changes for v2021.01
arm64:
 - Support for bigger U-Boot images compiled with PIE
 
 microblaze:
 - Extend support for LE/BE systems
 
 zynqmp:
 - Refactor silicon ID detection code with using firmware interface
 - Add support for saving variables based on bootmode
 
 zynqmp-r5:
 - Fix MPU mapping and defconfig setting.
 
 xilinx:
 - Minor driver changes: names alignment
 - Enable UBIFS
 - Minor DT and macros fixes
 - Fix boot with appended DT
 - Fix distro boot
 
 cmd:
 - pxe: Add fixing for platforms with manual relocation support
 
 clk:
 - fixed_rate: Add DM flag to support early boot on r5
 
 fpga:
 - zynqmppl: Use only firmware interface and enable SPL build
 
 serial:
 - uartlite: Enable for ARM systems and support endians
 
 mmc:
 - zynq: Fix indentation
 
 net:
 - gem: Support for multiple phys
 - emac: Fix 64bit support and enable it for arm64
 
 kconfig:
 - Setup default values for Xilinx platforms
 - Fix dependecies for Xilinx drivers
 - Source board Kconfig only when platform is enabled
 - Fix FPGA Kconfig entry with SPL
 - Change some defconfig values
 
 bindings:
 - Add binding doc for vsc8531
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Merge tag 'xilinx-for-v2021.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2021.01

arm64:
- Support for bigger U-Boot images compiled with PIE

microblaze:
- Extend support for LE/BE systems

zynqmp:
- Refactor silicon ID detection code with using firmware interface
- Add support for saving variables based on bootmode

zynqmp-r5:
- Fix MPU mapping and defconfig setting.

xilinx:
- Minor driver changes: names alignment
- Enable UBIFS
- Minor DT and macros fixes
- Fix boot with appended DT
- Fix distro boot

cmd:
- pxe: Add fixing for platforms with manual relocation support

clk:
- fixed_rate: Add DM flag to support early boot on r5

fpga:
- zynqmppl: Use only firmware interface and enable SPL build

serial:
- uartlite: Enable for ARM systems and support endians

mmc:
- zynq: Fix indentation

net:
- gem: Support for multiple phys
- emac: Fix 64bit support and enable it for arm64

kconfig:
- Setup default values for Xilinx platforms
- Fix dependecies for Xilinx drivers
- Source board Kconfig only when platform is enabled
- Fix FPGA Kconfig entry with SPL
- Change some defconfig values

bindings:
- Add binding doc for vsc8531
2020-09-24 08:33:47 -04:00
Hou Zhiqiang
7fb568de53 net: tsec: Add the compatible string "gianfar" support
Add compatible string "gianfar" support and update the
device-tree-bindings doc.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 08:27:44 -04:00
Hou Zhiqiang
25a2e24e94 net: tsec: Add fixed-link PHY support
The info of fixed-link PHY is described in DT node instead of
getting from MII, so detect the fixed-link PHY DT node first,
if it doesn't exist then probe the MII.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 08:27:44 -04:00
Hou Zhiqiang
b4eb9cfc09 net: tsec: convert to use DM_MDIO when DM_ETH enabled
For the platforms on which the eTSEC driver uses DM_ETH, convert its
MDIO controller code to also use DM_MDIO.

Note that for handling the TBI PHY (the MAC PCS for SGMII), we still
don't register a udevice for it, since we can drive it locally and there
is no point in doing otherwise.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Reworked to fix gazerbeam config]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 08:27:44 -04:00
Hou Zhiqiang
16c53ce712 net: fsl_mdio: Correct the MII management register block address
The MII management register block offset is different between
gianfar and etsec2 compatible devices, this patch is to fix
this issue by adding driver data for different compatible
string.

Fixes: 2932c5a802 ("net: tsec: fsl_mdio: add DM MDIO support")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 08:27:44 -04:00
Hou Zhiqiang
c54f6139ed net: fsl_mdio: Change to use virtual address
Use virtual address to access the MII block registers instead
of physical address.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 08:27:44 -04:00
Vladimir Oltean
15c49df8d4 phy: make phy_connect_fixed work with a null mdio bus
It is utterly pointless to require an MDIO bus pointer for a fixed PHY
device. The fixed.c implementation does not require it, only
phy_device_create. Fix that.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 08:27:44 -04:00
Ashok Reddy Soma
315a3c3377 net: xilinx: axi_emac: Typecast flush_cache arguments
flush_cache() arguments are not type casted to take care of 64 bit
systems. Use phys_addr_t to type cast for it to work properly for 32 bit
and 64 bit systems.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2020-09-23 10:31:40 +02:00
Ashok Reddy Soma
f9d3b31883 net: xilinx: axi_emac: Fix dma descriptors for 64bit and compilation warnings
There are compilation warnings showing up when we compile AXI ethernet
driver for 64bit architectures. Fix them, so that it works on both 32
and 64 bit architectures.

DMA descriptors are not taking care of 64bit addresses. To fix it,
change axidma_bd members as below:

next		==>	next_desc
reserverd1	==>	next_desc_msb
phys		==>	buf_addr
reserverd2	==>	buf_addr_msb

and update next_desc and buf_addr with lower 32 bits of the addresses,
update next_desc_msb and buf_addr_msb with upper 32 bits of the 64bit
addresses.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2020-09-23 10:31:40 +02:00
Michal Simek
8c40e07aab net: gem: Add support for more PHYs on MDIO bus
Find out MDIO bus and enable MDIO access to it if this is done via
different GEM controller. Only works across GEM instances.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Tom Rini
751b18b8a1 Merge branch 'master' into next
Merge in v2020.10-rc5
2020-09-21 14:25:37 -04:00
Heiko Schocher
6e31c62a17 net, qe: add DM support for QE UEC ethernet
add DM/DTS support for the UEC ethernet on QUICC Engine
Block.

Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Patch-cc: Madalin Bucur <madalin.bucur@oss.nxp.com>

Series-changes: 3
- revert:
  commit "3374264df97b" ("drivers: net: qe: deselect QE when DM_ETH is enabled")
  as now qe works with DM and DM_ETH support.
- fix mailaddress from Holger

Series-changes: 2
- add comments from Qiang Zhao:
  - add device node documentation
  - I did not drop the dm_qe_uec_phy.c and use drivers/net/fsl_mdio.c
    because using drivers/net/fsl_mdio.c leads in none existent
    udevice mdio@3320
    instead boards with DM ETH support should use now this
    driver.
- remove RFC tag

Commit-notes:

- I let the old none DM based implementation in code
  so boards should work with old implementation.
  This Code should be removed if all boards are converted
  to DM/DTS.

- add the DM based qe uec driver under drivers/net/qe

- Therefore copied the files uccf.c uccf.h uec.h from
  drivers/qe. So there are a lot of Codingstyle problems
  currently. I fix them in next version if this RFC
  patch is OK or it needs some changes.

- The dm based driver code is now under drivers/net/qe/dm_qe_uec.c
  Used a lot of functions from drivers/qe/uec.c

- seperated the PHY specific code into seperate file
  drivers/net/qe/dm_qe_uec_phy.c

END
2020-09-17 06:09:53 +02:00
Jason Wessel
34873f46ba bcmgenet: Add support for rgmii-rxid
The commit 57805f2270 ("net: bcmgenet: Don't set ID_MODE_DIS when
not using RGMII") needed to be extended for the case of using the
rgmii-rxid.  The latest version of the Rasbperry Pi4 dtb files for the
5.4 now specify the rgmii-rxid.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Tested-by: Petr Tesarik <ptesarik@suse.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08 16:43:48 +02:00
Jason Wessel
ac458dc823 bcmgenet: fix DMA buffer management
This commit fixes a serious issue occurring when several network
commands are run on a raspberry pi 4 board: for instance a "dhcp"
command and then one or several "tftp" commands. In this case,
packet recv callbacks were called several times on the same packets,
and send function was failing most of the time.

note: if the boot procedure is made of a single network
command, the issue is not visible.

The issue is related to management of the packet ring buffers
(producer / consumer) and DMA.
Each time a packet is received, the ethernet device stores it
in the buffer and increments an index called RDMA_PROD_INDEX.
Each time the driver outputs a received packet, it increments
another index called RDMA_CONS_INDEX.

Between each pair of network commands, as part of the driver
'start' function, previous code tried to reset both RDMA_CONS_INDEX
and RDMA_PROD_INDEX to 0. But RDMA_PROD_INDEX cannot be written from
driver side, thus its value was actually not updated, and only
RDMA_CONS_INDEX was reset to 0. This was resulting in a major
synchronization issue between the driver and the device. Most
visible behavior was that the driver seemed to receive again the
packets from the previous commands (e.g. DHCP response packets
"received" again when performing the first TFTP command).

This fix consists in setting RDMA_CONS_INDEX to the same
value as RDMA_PROD_INDEX, when resetting the driver.

The same kind of fix was needed on the TX side, and a few variables
had to be reset accordingly (c_index, tx_index, rx_index).

The rx_index and tx_index have only 256 entries so the bottom 8 bits
must be masked off.

Originated-by: Etienne Dublé <etienne.duble@imag.fr>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Tested-by: Petr Tesarik <ptesarik@suse.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08 16:43:02 +02:00
Michal Simek
664e16ce99 xilinx: kconfig: Change Kconfig dependencies for Xilinx drivers
Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in
PL and vice versa. That's why change dependencies and do not limit enabling
just for some platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-08-20 09:46:55 +02:00
Patrick Delaunay
a08f2f7b94 net: dwc_eth_qos: add Kconfig option to select supported configuration
Add configuration flag to select the supported dwc driver configuration:
- CONFIG_DWC_ETH_QOS_TEGRA186
- CONFIG_DWC_ETH_QOS_IMX
- CONFIG_DWC_ETH_QOS_STM32

See Linux driver ethernet/stmicro/stmmac and associated glue layers
for other configuration examples.

This patch removes the not-selected compatibles and lets the linker remove
the unused functions to reduce the size of the driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-08-04 23:30:02 -04:00
Simon Glass
41ba040e16 net: Drop duplicate include of dm.h in pcnet.c
This file includes the header twice. Drop the second one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
MarkLee
f0236b7015 eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver
The sgmii mode init flow is almost the same for all mediatek SoC, the
only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028
in the old chip(mt7622) but changed to 0x128 for the newer chip(mt7629
and the following chips).

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-07-28 22:44:00 -04:00
Adam Ford
bc3cff9453 Convert CONFIG_DRIVER_TI_EMAC_USE_RMII to Kconfig
This converts the following to Kconfig:
   CONFIG_DRIVER_TI_EMAC_USE_RMII

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-28 16:18:10 -04:00
Tom Rini
8d1fc6fb89 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a
- lx2-watchdog support
- layerscape: pci-endpoint support, spin table relocation fixes and
  cleanups
- fsl-crypto: RNG support and bug fixes
2020-07-27 15:18:15 -04:00
Tom Rini
4e05c167a7 binman support for FIT
new UCLASS_SOC
 patman switch 'test' command
 minor fdt fixes
 patman usability improvements
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Merge tag 'dm-pull-20jul20-take2a' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

binman support for FIT
new UCLASS_SOC
patman switch 'test' command
minor fdt fixes
patman usability improvements
2020-07-27 11:15:37 -04:00
Chaitanya Sakinam
cb1de6067a armv8: ls1012a: RGMII ports require internal delay
The correct setting for the RGMII ports on LS1012ARDB is to
enable delay on both Rx and Tx so the interface mode used should
be PHY_INTERFACE_MODE_RGMII_ID

Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Signed-off-by: Anji J <anji.jagarlmudi@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
Kuldeep Singh
e0152dbed6 net: pfe_eth: Use spi_flash_read API to access flash memory
Current PFE firmware access spi-nor memory directly. New spi-mem
framework does not support direct memory access. So, let's use
spi_flash_read API to access memory instead of directly using it.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:27 +05:30
Masahiro Yamada
2548493ab4 treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25 14:46:57 -06:00
Masahiro Yamada
cf081a52ad treewide: remove (phys_addr_t) casts from devfdt_get_addr()
This cast is unneeded.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25 14:46:57 -06:00
Marek Vasut
f23a785cfb net: dc2114x: Add DM support
With all the changes in place, add support for DM into the
dc2114x driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 14:20:56 +02:00
Marek Vasut
bc4666acf3 net: dc2114x: Split common parts of non-DM functions out
Split the common code from the non-DM code, so it can be reused by
the DM code later. As always, the recv() function had to be split
into the actual receiving part and free_pkt part to fit with the
DM.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
05c4917958 net: dc2114x: Split RX path
Split the RX data check from the rest of the RX function, so that
the check can be performed separately from the processing of the
packet and the release of the received packet once the processing
is finished.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
32d8d11800 net: dc2114x: Add RX/TX rings into the private data
The RX/TX DMA descriptor rings are per-device-instance private data,
so move them into the private data.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
8a5c6f158d net: dc2114x: Pass PCI BDF into phys_to_bus()
This is a trick in preparation for adding DM support. By passing in
the PCI BDF into the phys_to_bus() macros and calling that dev, we
can substitute dev with udevice when DM support lands and do minor
adjustment to the macros to support both DM and non-DM operation.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
fcd6217813 net: dc2114x: Pass private data around
This patch replaces the various uses of struct eth_device for accessing
device private data with struct dc2114x_priv, which is compatible both
with DM and non-DM operation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
2301a4be6c net: dc2114x: Introduce private data
Introduce dc2114x_priv, which is a super-structure around eth_device
and tracks per-device state and the device IO address.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
02b95a4b41 net: dc2114x: Use standard I/O accessors
The current dc21x4x driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
some systems as the accesses can get out of order. So convert the direct
volatile dereferences to use the normal in/out macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
9b98f20494 net: dc2114x: Drop update_srom()
This code is never used, remove it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
a410f13dfe net: dc2114x: Add Kconfig entries
Add Kconfig entries for the dc2114x driver and convert various boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:02 +02:00
Marek Vasut
777aa71531 net: dc2114x: Support all DC2114x
For the usage in this driver, the chips are identical,
so support all of them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:01 +02:00
Marek Vasut
75e375b0a9 net: dc2114x: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25 11:24:01 +02:00
Tom Rini
7208396bbf Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
This reverts commit 5d3a21df66, reversing
changes made to 56d37f1c56.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-24 08:42:06 -04:00
Masahiro Yamada
60e7fa8b3b treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20 11:37:47 -06:00
Masahiro Yamada
6f25e274da treewide: remove (phys_addr_t) casts from devfdt_get_addr()
This cast is unneeded.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20 11:37:47 -06:00
Masahiro Yamada
bb5a2cf9f9 treewide: convert bd_t to struct bd_info manually
Some code was not converted by coccinelle, somehow.

I manually fixed up the remaining, and comments, README docs.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
[trini: Add arch/arm/mach-davinci/include/mach/sdmmc_defs.h and
        include/fdt_support.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-17 10:46:44 -04:00
Masahiro Yamada
b75d8dc564 treewide: convert bd_t to struct bd_info by coccinelle
The Linux coding style guide (Documentation/process/coding-style.rst)
clearly says:

  It's a **mistake** to use typedef for structures and pointers.

Besides, using typedef for structures is annoying when you try to make
headers self-contained.

Let's say you have the following function declaration in a header:

  void foo(bd_t *bd);

This is not self-contained since bd_t is not defined.

To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h>

  #include <asm/u-boot.h>
  void foo(bd_t *bd);

Then, the include direcective pulls in more bloat needlessly.

If you use 'struct bd_info' instead, it is enough to put a forward
declaration as follows:

  struct bd_info;
  void foo(struct bd_info *bd);

Right, typedef'ing bd_t is a mistake.

I used coccinelle to generate this commit.

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  typedef bd_t;
  @@
  -bd_t
  +struct bd_info
  </smpl>

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-07-17 09:30:13 -04:00
Vignesh Raghavendra
84228940c3 net: ti: am65-cpsw-nuss: Update driver to use kernel DT
Kernel DT has CPSW ports under ethernet-ports subnode. Update the driver
to look for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
9eab6fd526 net: ti: am65-cpsw-nuss: Set ALE default thread enable
Force default thread to be used for RX as ALE is anyways set to Bypass
mode.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
cf9b9942bf net: ti: am65-cpsw-nuss: Remove dead code
MDIO node is not referenced further, therefore drop the dead code.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Sven Auhagen
3078e03516 net: mvpp2: fix second cp110 initialization
Since the mdio code got upstreamed it is not possible
to activate network ports on CP110 Master and Slave.

The problem is in mvpp2_base_probe which is called for each
CP110 and it initializes the buffer area for descs and rx_buffers.

This should only happen once though and the bd space is actually
set to 0 after the first run of the function.

This leads to an error when the second CP110 tries the initialization
again and disables all network ports on this CP110.

This patch adds a static variable to check if the buffer area is
initialized only once globally.

Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-09 06:52:20 +02:00
Andre Przywara
117a52e238 net: smc911x: Properly handle EEPROM MAC address
When compiled as a DM_ETH driver, the scm911x driver was reading the MAC
address from the optional EEPROM storage, but failed to copy this to the
platdata struct. Since it was also missing a definition of the
read_rom_hwaddr() function, the generic Ethernet code was dismissing
this MAC address, falling back to a random address or denying to start
at all.

Add an implementation of .read_rom_hwaddr, and refactor the function
reading the ROM address to be called by all interested parties.

This fixes MAC address issues when using the driver in DM_ETH "mode".

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Amit Singh Tomar
3c5c4ee35f net: designware: s700: Add glue code for S700 mac
This patchs adds glue logic to enable designware mac present on
Action Semi based S700 SoC, Configures SoC specific bits.

Undocumented bit that programs the PHY interface select register
comes from vendor source.

It has been tested on Cubieboard7-lite based on S700 SoC.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07 17:11:58 -04:00
Amit Singh Tomar
fa6539a3dc net: phy: realtek: Introduce PHY_RTL8201F_S700_RMII_TIMINGS to adjust rx/tx timings
RTL8201F PHY module found on Actions Semi Cubieboard7 seems to have
specific Rx/Tx interface timings requirement for proper PHY operations.
These timing values are not documented anywhere and picked from vendor
code.

This commits lets proper packets to be transmitted over the network.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07 16:09:22 -04:00
Amit Singh Tomar
b0778d9c2c net: phy: realtek: Add support for RTL8201F PHY module.
This patch adds support for Realtek PHY RTL8201F 10/100Mbs
(with variants: RTL8201FN and RTL8201FL) PHYceiver. It is
present on Actions Semi Cubieboard7 board.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07 16:09:22 -04:00
Patrick Delaunay
a718a5d0f4 net: dwc_eth_qos: update the compatible supported for STM32
Update the compatible associated with the STM32 MPU glue
in the DWC ethernet driver.

The supported compatible is the specific "st,stm32mp1-dwmac"
as indicated in Linux binding
Documentation/devicetree/bindings/net/stm32-dwmac.txt
and not the "snps,dwmac-4.20a" only used to the select IP
version.

This glue is implemented in Linux kernel in:
drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

For information in stm32mp151.dtsi, the 2 compatibles are
supported:

ethernet0: ethernet@5800a000 {
	compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
	...
};

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-07-07 16:01:23 +02:00
Tom Rini
5fdb3c0e7e - net: pcnet: cleanup and add DM support
- Makefile: add rule to build an endian-swapped U-Boot image
   used by MIPS Malta EL variants
 - CI: add Qemu tests for MIPS Malta
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Merge tag 'mips-pull-2020-06-29' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips into next

- net: pcnet: cleanup and add DM support
- Makefile: add rule to build an endian-swapped U-Boot image
  used by MIPS Malta EL variants
- CI: add Qemu tests for MIPS Malta
2020-06-30 11:43:18 -04:00
Marek Vasut
d8553d6ee3 net: pcnet: Add Kconfig entries
Add Kconfig entries for the pcnet driver and convert MIPS malta
to use those.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
53019cf35b net: pcnet: Add DM support
With all the changes in place, add support for DM into the
pcnet driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
f5e7df58e0 net: pcnet: Split common and non-DM functions
Pull the common parts of functions out so they can be reused by both
DM and non-DM code paths. The recv() function had to be reworked to
fit into this scheme and this means it now only receives one packet
at a time instead of spinning in an endless loop.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
6d76c9f1e6 net: pcnet: Wrap name and enetaddr into private data
Instead of using the non-DM-only name and enetaddr in struct eth_device,
add pointers into the private data which can either point to that non-DM
name or a DM one later on.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
deca773821 net: pcnet: Wrap iobase into private data
Instead of using the non-DM-only iobase in struct eth_device, add
one into the private data to make DM and non-DM operation possible.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
834d5cebe5 net: pcnet: Pass private data through dev->priv
Get rid of the global point to private data, and rather pass it
thought dev->priv. Also remove the unnecessary check for lp being
non-NULL, since it is always NULL at this point.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
ab6ecbdc3c net: pcnet: Wrap devbusfn into private data
Instead of using eth_device priv for this PCI devbusfn, free it
so it could be used for driver private data, and wrap devbusfn
into those driver private data.

Note that using the name dev for the variable is a trick left for
later, when DM support is in place, so dm_pci_virt_to_mem() can be
used with minimal ifdeffery.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
553286a63c net: pcnet: Drop useless forward declarations
Remove those as they are not needed anymore.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
54c6067486 net: pcnet: Move initialize function at the end
Move the function at the end of the driver, so we could drop
various forward declarations later. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
ada6a2cea5 net: pcnet: Move private data allocation to initialize
The private data allocation does not have to be done every time the
NIC is initialized at run time, move the allocation to initialize
function, which means it will be done only once when the driver
starts.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
0e11d79a53 net: pcnet: Replace memset+malloc with calloc
This combination of functions can be replaced with calloc(),
make it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
89369b0ac2 net: pcnet: Simplify private data allocation
The current code is horribly complex. Both the RX and TX buffer
descriptors are 16 bytes in size, the init block is 32 bytes in
size, so simplify the code such that the entire private data of
the driver are allocated cache aligned and the RX and TX buffer
descriptors are part of the private data.

This removes multiple malloc calls and cache flushes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
d3b1df0f39 net: pcnet: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
b92b8f48fb net: pcnet: Drop PCNET_HAS_PROM
All of one PCNET users has this option set, make this default
and drop this config option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
b9c52c5090 net: pcnet: Drop typedef struct pcnet_priv_t
Use struct pcnet_priv all over the place instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Lukasz Majewski
56c4046038 spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI*
This change allows more fine tuning of driver model based SPI support in
SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI
support in SPL and TPL via Kconfig option.

Before this change it was necessary to use:
    /* SPI Flash Configs */
    #if defined(CONFIG_SPL_BUILD)
    #undef CONFIG_DM_SPI
    #undef CONFIG_DM_SPI_FLASH
    #undef CONFIG_SPI_FLASH_MTD
    #endif

in the ./include/configs/<board>.h, which is error prone and shall be
avoided when we strive to switch to Kconfig.

The goal of this patch:

Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL).
Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must
still support non DM driver.

Another use case is the conversion of non DM/DTS SPI driver to support
DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the
distinction is needed in Kconfig (also if SPL version of the driver
supports OF_PLATDATA).

In the end of the day one would have to support following use cases (in
single driver file - e.g. mxs_spi.c):

- U-Boot proper driver supporting DT/DTS
- U-Boot proper driver without DT/DTS support (deprecated)
- SPL driver without DT/DTS support
- SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to
  run full blown DT/DTS)
- SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained
  environment with no fitImage and OF_LIBFDT support).

Some boards do require SPI support (with DM) in SPL (TPL) and some only
have DM_SPI{_FLASH} defined to allow compiling SPL.

This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI)
and provides corresponding defines in Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[trini: Fixup a few platforms]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-29 13:34:43 -04:00
Tom Rini
f0e236c8d6 Xilinx changes for v2020.10
Versal:
 - xspi bootmode fix
 - Removing one clock from clk driver
 - Align u-boot memory setting with OS by default
 - Map TCM and OCM by default
 
 ZynqMP:
 - Minor DT improvements
 - Reduce console buffer for mini configurations
 - Add fix for AMS
 - Add support for XDP platform
 
 Zynq:
 - Support for AES engine
 - Enable bigger memory test by default
 - Extend documentation for SD preparation
 - Use different freq for Topic miami board
 
 mmc:
 - minor GD pointer removal
 
 net:
 - Support fixed-link cases by zynq gem
 - Fix phy looking loop in axi enet driver
 
 spi:
 - Cleanup global macros for xilinx spi drivers
 
 firmware:
 - Add support for pmufw reloading
 
 fpga:
 - Improve error status reporting
 
 common:
 - Remove 4kB addition space for FDT allocation
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Merge tag 'xilinx-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2020.10

Versal:
- xspi bootmode fix
- Removing one clock from clk driver
- Align u-boot memory setting with OS by default
- Map TCM and OCM by default

ZynqMP:
- Minor DT improvements
- Reduce console buffer for mini configurations
- Add fix for AMS
- Add support for XDP platform

Zynq:
- Support for AES engine
- Enable bigger memory test by default
- Extend documentation for SD preparation
- Use different freq for Topic miami board

mmc:
- minor GD pointer removal

net:
- Support fixed-link cases by zynq gem
- Fix phy looking loop in axi enet driver

spi:
- Cleanup global macros for xilinx spi drivers

firmware:
- Add support for pmufw reloading

fpga:
- Improve error status reporting

common:
- Remove 4kB addition space for FDT allocation
2020-06-25 09:33:39 -04:00
Patrick van Gelder
945a55050d net: xilinx: axi_emac: Fix endless loop when no PHYs are connected
The index used to iterate over the possible PHYs in axiemac_phy_init was an
unsigned int and decremented. Therefor it was always >= 0 and never exited
the loop.

Signed-off-by: Patrick van Gelder <patrick.vangelder@nl.bosch.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Michal Simek
26e62cc971 net: gem: Disable PCS autonegotiation in case of fixed-link
Disable PCS autonegotiation if fixed-link node is present in device tree.
This way systems with multiple GEM instances with a combination of
SGMII-fixed and SGMII-PHY will work.

Reported-by: Goran Marinkovic <goran.marinkovic@psi.ch>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:06 +02:00
Fabio Estevam
89b5bd54c1 net: fec: Allow the PHY node to be retrieved
As we move towards driver model, it is required to let the FEC driver
know how to properly deal with an Ethernet PHY subnode in the device tree.

For example:

 &fec {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
	phy-handle = <&phy>;
 	phy-mode = "rgmii-id";
 	phy-reset-duration = <2>;
 	phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
 	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		phy: ethernet-phy@0 {
			reg = <0>;
			qca,clk-out-frequency = <125000000>;
		};
	};
 };

Currently the PHY node pointer is incorrectly associated with the
Ethernel controller instead of the PHY node itself.

This causes the PHY properties, such as "qca,clk-out-frequency" in
the example above to not get parsed.

Fix this problem by populating the phy_of_node node.

Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Tom Rini <trini@konsulko.com>
2020-06-22 17:40:49 +02:00
Fabio Estevam
338d9b032a phy: atheros: ar8035: Fix clock output calculation
The clock ouput frequency is calculated incorrectly for AR8035 due to
wrong masking of priv->clk_25m_reg and priv->clk_25m_mask.

This same issue has been already fixed in the kernel by:

commit b1f4c209d84057b6d40b939b6e4404854271d797
Author: Oleksij Rempel <o.rempel@pengutronix.de>
Date:   Wed Apr 1 11:57:32 2020 +0200

    net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035

    The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set
    for the values that comprise the fields, not zero-bits-set.

    This patch fixes the clock frequency configuration for ATH8030 and
    ATH8035 Atheros PHYs by removing the erroneous "~".

    To reproduce this bug, configure the PHY  with the device tree binding
    "qca,clk-out-frequency" and remove the machine specific PHY fixups.

    Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding")
    Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
    Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
    Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk>
    Tested-by: Russell King <rmk+kernel@armlinux.org.uk>
    Signed-off-by: David S. Miller <davem@davemloft.net>

Apply the same fix in the U-Boot driver.

Tested on a i.MX6 Hummingboard.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Tested-by: Tom Rini <trini@konsulko.com>
2020-06-22 17:40:41 +02:00
Tom Rini
6ccbd1590f Merge branch 'net' of https://gitlab.denx.de/u-boot/custodians/u-boot-sh into next
- Convert pcnet and eepro100 ethernet drivers to DM
2020-06-20 18:52:51 -04:00
Marek Vasut
d789a8259e net: pcnet: Add Kconfig entries
Add Kconfig entries for the pcnet driver and convert MIPS malta
to use those.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:41 +02:00
Marek Vasut
59edb2668e net: pcnet: Add DM support
With all the changes in place, add support for DM into the
pcnet driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:41 +02:00
Marek Vasut
dea9b6014b net: pcnet: Split common and non-DM functions
Pull the common parts of functions out so they can be reused by both
DM and non-DM code paths. The recv() function had to be reworked to
fit into this scheme and this means it now only receives one packet
at a time instead of spinning in an endless loop.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:41 +02:00
Marek Vasut
1023a1e6a9 net: pcnet: Wrap name and enetaddr into private data
Instead of using the non-DM-only name and enetaddr in struct eth_device,
add pointers into the private data which can either point to that non-DM
name or a DM one later on.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:41 +02:00
Marek Vasut
3b2d63a739 net: pcnet: Wrap iobase into private data
Instead of using the non-DM-only iobase in struct eth_device, add
one into the private data to make DM and non-DM operation possible.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
fdf6cbe54d net: pcnet: Pass private data through dev->priv
Get rid of the global point to private data, and rather pass it
thought dev->priv. Also remove the unnecessary check for lp being
non-NULL, since it is always NULL at this point.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
60074d9d3e net: pcnet: Wrap devbusfn into private data
Instead of using eth_device priv for this PCI devbusfn, free it
so it could be used for driver private data, and wrap devbusfn
into those driver private data.

Note that using the name dev for the variable is a trick left for
later, when DM support is in place, so dm_pci_virt_to_mem() can be
used with minimal ifdeffery.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
d20e857e6b net: pcnet: Drop useless forward declarations
Remove those as they are not needed anymore.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
69e08bd735 net: pcnet: Move initialize function at the end
Move the function at the end of the driver, so we could drop
various forward declarations later. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
246d2bfcf2 net: pcnet: Move private data allocation to initialize
The private data allocation does not have to be done every time the
NIC is initialized at run time, move the allocation to initialize
function, which means it will be done only once when the driver
starts.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
ae38e96c23 net: pcnet: Replace memset+malloc with calloc
This combination of functions can be replaced with calloc(),
make it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
1c38c36eb9 net: pcnet: Simplify private data allocation
The current code is horribly complex. Both the RX and TX buffer
descriptors are 16 bytes in size, the init block is 32 bytes in
size, so simplify the code such that the entire private data of
the driver are allocated cache aligned and the RX and TX buffer
descriptors are part of the private data.

This removes multiple malloc calls and cache flushes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
e4797c3161 net: pcnet: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
1524e409ef net: pcnet: Drop PCNET_HAS_PROM
All of one PCNET users has this option set, make this default
and drop this config option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
97d5c14559 net: pcnet: Drop typedef struct pcnet_priv_t
Use struct pcnet_priv all over the place instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
6463b73e0b net: eepro100: Add Kconfig entries
Add Kconfig entries for the eepro100 driver and convert various boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
af8ecdf7e5 net: eepro100: Add DM support
Add support for driver model to the driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
8835103e24 net: eepro100: Split common parts of non-DM functions out
Split the common code from the non-DM code, so it can be reused by
the DM code later. As always, the recv() function had to be split
into the actual receiving part and free_pkt part to fit with the
DM.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
43b738350c net: eepro100: Drop bd_t pointer from read_hw_addr()
The pointer is unused, so drop it. Rename the function to start
with the eepro100_ prefix.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
fb8307e52a net: eepro100: Add RX/TX rings into the private data
The RX/TX DMA descriptor rings are per-device-instance private data,
so move them into the private data.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
39daab2376 net: eepro100: Pass device private data into mdiobus
Instead of doing ethernet device lookup by name every time there
is an MDIO access, pass the driver private data via mdiobus priv
to the MDIO bus accessors.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
389da9743c net: eepro100: Pass device private data around
This patch replaces the various uses of struct eth_device for accessing
device private data with struct eepro100_priv, which is compatible both
with DM and non-DM operation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
bd159c6185 net: eepro100: Introduce device private data
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
fa9e12102d net: eepro100: Pass PCI BDF into bus_to_phys()/phys_to_bus()
This is a trick in preparation for adding DM support. By passing in
the PCI BDF into the bus_to_phys()/phys_to_bus() macros and calling
that dev, we can substitute dev with udevice when DM support lands
and do minor adjustment to the macros to support both DM and non-DM
operation. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
acdf5d8882 net: eepro100: Drop inline keyword
Drop the inline keyword from the static functions, the compiler has a
much better overview and can decide how to inline those functions much
better.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
a6c06ec8f6 net: eepro100: Fix EE_*_CMD macros
Those macros depended on specific variable names to be declared
at their usage sites, fix this by adding an argument to those
macros and also protect the argument with braces.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
66fed7300d net: eepro100: Factor out MII registration
Pull the MII registration code into a separate function. Moreover,
properly free memory in case any of the registration or allocation
functions fail, so this fixes an existing memleak.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
6c7d3f6b3f net: eepro100: Switch from malloc()+memset() to calloc()
Replace malloc()+memset() combination with calloc(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
3a15684dc6 net: eepro100: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
047a800dd6 net: eepro100: Reorder functions in the driver
Move the functions around in the driver to prepare it for DM conversion.
Drop forward declarations which are not necessary anymore. No functional
change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
d47cf87db9 net: eepro100: Remove volatile misuse
Remove all the remaining use of the 'volatile' keyword, as this is
no longer required. All the accesses which might have needed this
use of 'volatile' have been repaired properly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
5116aae111 net: eepro100: Add cache management
Add cache invalidation and flushes wherever the DMA descriptors are
written or read, otherwise this driver cannot work reliably on any
systems where caches are enabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
95655b921b net: eepro100: Factor out tx_ring command issuing
This code is replicated in the driver thrice almost verbatim, factor
it out into a separate function and clean it up. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
46df32ef2f net: eepro100: Replace purge_tx_ring() with memset()
This function zeroes-out all the descriptors in the TX ring,
use memset() instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
81bdeea2fe net: eepro100: Use standard I/O accessors
The current eepro100 driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
some systems as the accesses can get out of order. So convert the direct
volatile dereferences to use the normal in/out macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
f3878f5c28 net: eepro100: Fix camelcase
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types INDENTED_LABEL -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
b013173079 net: eepro100: Fix remaining checkpatch issues
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl -f --fix --fix-inplace drivers/net/eepro100.c

This fixes all the remaining errors except a couple of comments which
are longer than 80 characters, all the volatile misuse and all the
camelcase, that needs a separate patch.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
614e95152d net: eepro100: Fix indented label
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types INDENTED_LABEL -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
7a30873585 net: eepro100: Fix pointer location
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types POINTER_LOCATION -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
773af836da net: eepro100: Fix parenthesis alignment
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types PARENTHESIS_ALIGNMENT -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
9b12ff9911 net: eepro100: Fix braces
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types BRACES -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
db9f1818bf net: eepro100: Fix spacing
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types SPACING -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
e5352c6bbe net: eepro100: Use plain debug()
Convert all the ifdef DEBUG to plain debug(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:39 +02:00
Marek Vasut
aba283d838 net: eepro100: Clean up comments
Clean the comments up to they trigger fewer checkpatch warnings,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:39 +02:00
Marek Vasut
0a5be6c5fd net: eepro100: Remove EEPRO100_SROM_WRITE
This code is never enabled, last board that used it was ELPPC which
was removed some 5 years ago, so just remove this code altogether.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:39 +02:00
Tom Rini
83fdb43882 Merge tag 'ti-v2020.10-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next
- DM conversion for OMAP4, OMAP5 platforms.
- Other minor fixes for Nokia RX51, am33, am57, am654.
2020-06-18 10:07:49 -04:00
Tom Rini
eab48865f9 net: cpsw: Add __maybe_unused to generated inlines
We generate a number of helper inline functions to make accesses easier.
However not all permutations of each function will be used and clang
will warn about unused ones.  Decorate all of them with __maybe_unused
because of this.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-06-16 17:00:02 +05:30
Marek Vasut
46c8b18734 net: rtl8139: Add DM support
Add support for driver model to the driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
d8afb8b28e net: rtl8139: Read HW address from EEPROM only on probe
Do not re-read the HW address from the EEPROM on every start of
transfer, otherwise the user will not be able to adjust ethaddr
as needed. Read the address only once, when the card is detected.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
2df3a51510 net: rtl8139: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
6a4a5c194d net: rtl8139: Split out common and non-DM functions
Split the driver into common and non-DM functionality, so that the
DM support can later re-use the common code, while we retain the
non-DM code until all the platforms are converted.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
26f59c28bd net: rtl8139: Pass private data into rtl8139_eeprom_delay()
Instead of always calling rtl8139_eeprom_delay() with priv->ioaddr,
call it with priv and let the function access priv->ioaddr. This
reduces code duplication and has no impact, since the compiler will
inline this as needed anyway.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
3feb6f7ff6 net: rtl8139: Introduce device private data
Introduce rtl8139_pdata, which is a super-structure around eth_device
and tracks per-device state, here the device IO address, PCI BDF, RX
and TX ring position. Pass this structure around instead of the old
non-DM eth_device in preparation for DM conversion.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
8ff1d4a9c8 net: rtl8139: Clean up bus_to_phys()/phys_to_bus() macros
These macros depended on the dev variable being declared wherever
they were used. This is wrong and will not work with DM anyway, so
pass only the PCI BFD into these macros, which fixes the dependency
and prepares them for DM support as well.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
f4385539f1 net: rtl8139: Use dev->iobase instead of custom ioaddr
Replace the use of custom static ioaddr variable with common dev->iobase,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
1ba8d98445 net: rtl8139: Switch from malloc()+memset() to calloc()
Replace malloc()+memset() combination with calloc(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
9962dd25b1 net: rtl8139: Factor out device name assignment
Pull the device name setting into a separate function, as this
will be shared between DM/non-DM variants.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Dan Murphy
8882238cc4 net: phy: Add DP8382x phy registration to TI PHY init
Add the DP8382X generic PHY registration to the TI PHY init file.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-06-12 13:17:23 -04:00
Dan Murphy
bc0e578f90 net: phy: Add support for TI PHY init
ti_phy_init function was allocated to the DP83867 PHY.  This function
name is to generic for a specific PHY.  The function can be moved to a
TI specific file that can register all TI PHYs that are defined in the
defconfig.  The ti_phy_init file will contain all TI PHYs initialization
so that only phy_ti_init can be called from the framework.

In addition to the above the config flag for the DP83867 needs to be changed
in the Kconfig and dependent defconfig files. The config flag that was
used for the DP83867 was also generic in nature so a more specific
config flag for the DP83867 was created.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-06-12 13:17:23 -04:00
Florin Chiculita
9c6de508a6 net: phy: add phyid search in vendor specific space
There are devices accesible through mdio clause-45, such as
retimers, that do not have PMA or PCS blocks.
This patch adds MDIO_MMD_VEND1 on the list of device addresses
where phyid is searched. Previous order of devices was kept.

Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
2020-06-12 13:17:23 -04:00
Tom Warren
a7a435e7d4 net: rt8169: WAR for DHCP not getting IP after kernel boot/reboot
This is a WAR for DHCP failure after rebooting from the L4T kernel. The
r8169.c kernel driver is setting bit 19 of the rt816x HW register 0xF0,
which goes by FuncEvent and MISC in various driver source/datasheets.
That bit is called RxDv_Gated_En in the r8169.c kernel driver. Clear it
here at the end of probe to ensure that U-Boot can get an IP assigned
via DHCP.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-06-12 13:17:23 -04:00
Bryan O'Donoghue
baafd99d13 net: phy: micrel: ksz8061 implement errata 80000688A fix
Linux commit 232ba3a51cc2 ('net: phy: Micrel KSZ8061: link failure after
cable connect') implements a fix for the above errata.

This patch replicates that errata fix in an ksz8061 specific init routine.

Signed-off-by: Bryan O'Donoghue <bod@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Tom Rini
08649c3d50 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- DM_ETH support for P2041RDB, T1024RDB, P5040DS, P3041DS, P4080DS, bug
  fixes
- Add TBI PHY access through MII
- DDR: Rework errata workaround for A008109, A008378, 009942
2020-06-08 08:51:59 -04:00
Hou Zhiqiang
a0f47e012f net: tsec: Access TBI PHY through the corresponding MII
When an eTSEC is configured to use TBI, configuration of the
TBI is done through the MIIM registers for that eTSEC.
For example, if a TBI interface is required on eTSEC2, then
the MIIM registers starting at offset 0x2_5520 are used to
configure it.

Fixes: 9a1d6af55e ("net: tsec: Add driver model ethernet support")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04 18:53:20 +05:30
Hou Zhiqiang
bf67eb325b net: tsec: Access eTSEC registers using virtual address
The current code accesses eTSEC registers using physical
address directly, it's not correct, though no problem on
current platforms. It won't work on platforms, which does
not support 1:1 virtual-physical address map.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04 18:53:20 +05:30
Madalin Bucur
2932c5a802 net: tsec: fsl_mdio: add DM MDIO support
Allow the MDIO devices to be probed based on the device tree.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04 18:53:14 +05:30
Madalin Bucur
94472223c6 drivers: net: e1000: with DM_ETH needs DM_PCI too
Compilation error occur when DM_ETH is enabled without DM_PCI.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-03 12:14:27 +05:30
Samuel Holland
99ac86187d net: sun8i_emac: Add support for the H6 variant
The H6 EMAC is very similar to the H3 variant, except that it uses the
same pinmux as R40. Add support for it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 22:38:37 +05:30
Samuel Holland
abdbefba2a net: sun8i_emac: Use consistent clock bitfield definitions
While the R40 uses a different register for EMAC clock configuration
than other chips, the register has a very similar layout. Reuse the
existing bitfield definitions in this file, since they match.

This allows the driver to compile on the H6 platform, where the
CCM_GMAC_CTRL definitions are not present.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 22:38:22 +05:30
Marek Vasut
df4c4834fc net: ks8851: Add Kconfig entries
Convert CONFIG_KS8851_MLL and CONFIG_KS8851_MLL_BASEADDR to Kconfig

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
1d476de7c8 net: ks8851: Add DM support
Add support for U-Boot DM and DT probing.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
9c9f3fc162 net: ks8851: Receive one packet per recv call
Instead of reading out the entire FIFO and possibly overwriting U-Boot
memory, read out one packet per recv call, pass it to U-Boot network
stack, and repeat. It is however necessary to cache RXFC value, because
reading that one out clears it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
f725912624 net: ks8851: Split non-DM specific bits from common code
Split network handling functions into non-DM specific parts and
common code in preparation for conversion to DM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
b7c6ae2e82 net: ks8851: Pass around driver private data
Introduce a private data structure for this driver with embedded
struct eth_device and pass it around. This prepares the driver to
work with both DM and non-DM systems.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
8ec27b01bc net: ks8851: Checkpatch cleanup
Fix various checkpatch complaints.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
eb69d8bf3c net: ks8851: Clean up chip ID readout
There is only one chip ID in the table of chip IDs for this chip.
Read out the chip ID instead and mask off the last "revision" bit
to check the chip ID, this works for all chips in the family. Then
drop the chip ID passing around.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
63f22f5998 net: ks8851: Remove type_frame_head
The packet status and length information should be extracted from the
FIFO per-packet. Adjust the code such that it reads the packet meta
data and then the packet afterward, if applicable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
b043597673 net: ks8851: Trim down struct ks_net
Most of the entries in the structure are useless, remove them. Inline
the rest of uses where applicable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
6a45731364 net: ks8851: Use 16bit RXQCR access
Per KS8851-16MLL, the RXQCR is a 16bit register. Use 16bit accessors
to it consistently and drop the ks_wrreg8() function altogether, as
it is not used anymore.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
8b41a16711 net: ks8851: Remove RXQCR cache
The cached RXQCR value is never updated, remove the cache and just use
the bits in the cache directly in the code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
e3b54cda68 net: ks8851: Replace malloc()+memset() with calloc()
Replace combination of malloc()+memset() with calloc() as the behavior
is exactly the same and the amount of code is reduced. Moreover, remove
printf() in the fail path, as it is useless, and return proper -ENOMEM
return code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Tom Rini
b0b13f4114 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add DM_ETH support for lx2160aqds, ls2080aqds, ls1088aqds
- QSI related fixes on ls1012a, ls2080a, ls1046a, ls1088a, ls1043a based
  platforms
- Bug-fixes/updtaes related to ls1046afrwy, fsl-mc, msi-map property
2020-05-20 08:46:56 -04:00
Razvan Ionut Cirjan
d5b0af047a net: fsl-mc: fixup DPC: add /board/ports node if missing
The DPC fixup for MAC address and enet_if is not made if
/board/ports node is missing in DPC file.
Add /board/ports or /ports nodes if them are missing.

Signed-off-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Reviewed-by: Ioana Ciornei <Ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:08 +05:30
Laurentiu Tudor
21a00d130e drivers: net: fsl-mc: fixup msi-map property
Similarly to iommu-map, the msi-map property must also be fixed up
in the device tree, in order for the icid -> streamid translation
be possible in the MSI case as well.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Diana Craciun <diana.craciun@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:07 +05:30
Madalin Bucur
9b2e892eb6 driver: net: fm: minor fix in DM ETH support
Bus callback functions for read/write/reset need to be set only for
DM_ETH, moving endif a bit lower.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:07 +05:30
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
07e1114671 Fix some checkpatch warnings in calls to udelay()
Fix up some incorrect code style in calls to functions in the linux/time.h
header, mostly udelay().

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
eb41d8a1be common: Drop linux/bug.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
0914011310 command: Remove the cmd_tbl_t typedef
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 18:36:55 -04:00
Simon Glass
4d72caa5b9 common: Drop image.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
e6f6f9e648 common: Drop part.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
90526e9fba common: Drop net.h from common header
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:31 -04:00
Trevor Woerner
bb0fb4c0f4 rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
Have this symbol follow the pattern of all other such symbols.
This patch also removes a TODO from the code.

Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
b16a331697 rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
Have this symbol follow the pattern of all other such symbols.
This patch removes a TODO from the code.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Nicolas Saenz Julienne
57805f2270 net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII
As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is
RGMII. Don't enable it for the rest of setups.

This has been seen to misconfigure RPi4's PHY when booting Linux.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-12 10:59:11 +02:00
Tom Rini
bb488ac34d Merge tag 'ti-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix boot issues on Nokia RX-51
- Configure AM6 CPSW for 10Mbps in rgmii mode.
- Minor changes for J721e
2020-05-11 12:04:54 -04:00
Ye Li
580fab4a82 eQos: Implement the read_rom_hwaddr callback
Implement the read_rom_hwaddr callback to load MAC address from fuse
for imx8m platforms.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
9d4194f179 fec: Move imx_get_mac_from_fuse declare to imx file
imx_get_mac_from_fuse is used to load MAC address from fuse. On imx8mp,
we have two different ENET controllers and both need to call this
function. So decouple its declare from fec driver.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Fugang Duan
0e9d23945c net: eqos: implement callbaks to get interface and set txclk rate
Implement the callbacks to get phy mode interface and txclk
rate configuration.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Fugang Duan
3a97da12ee net: dwc_eth_qos: add dwc eqos for imx support
Add dwc eqos for imx support.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:10 +02:00
Fugang Duan
e32e4d0f58 net: phy: realtek: add rx delay support for RTL8211F
Add RX delay enable support for RTL8211F PHY.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:25:02 +02:00
Ye Li
6a895d039b net: Update eQos driver and FEC driver to use eth phy interfaces
Update eQoS and fec ethernet drivers to support shared MDIO framework

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:24:54 +02:00
Ye Li
5fe419ef2a net: Add eth phy generic driver for shared MDIO
For dual ethernet controllers, the HW design may connect ETH phys to
one MDIO ports. So two different ethernet drivers have to share MDIO bus.
Since two ethernet drivers are independent, we can't ensure their probe
order.

To resolve this problem, introduce an eth phy generic driver and uclass.

After eth-uclass binds, we search the mdio node and binds the phy node
with the eth-phy-generic driver.

When one eth driver get its phy device, the parent of phy device will
probe prior than phy device. So this ensure the eth driver ownes the
MDIO bus will be probed before using its MDIO.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:24:48 +02:00
Peng Fan
3b26d527d3 net: fec: add fuse check
Add fuse check for fec. If the fuse indicates the module
will not work in the SoC, let's fail the initialization.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-10 13:21:34 +02:00
Murali Karicheri
39821d58c9 net: ethernet: ti: am65-cpsw-nuss: enable 10Mbps link speed in rgmii mode
In RGMII mode the 10Mbps link speed is supported only when CPSW2G MAC SL is
configured for External Control ("in band") mode
CPSW_PN_MAC_CONTROL_REG.CTL_EN(18) = 1

Hence update am65_cpsw_update_link() to follow documentation.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-05-09 19:58:58 +05:30
Michael Walle
8737c65fe4 phy: atheros: consolidate {ar8031|ar8035}_config()
The two functions are now exactly the same, remove one of them.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:01 -04:00
Michael Walle
6333cbb381 phy: atheros: ar8035: remove static clock config
We can configure the clock output in the device tree. Disable the
hardcoded one in here. This is highly board-specific and should have
never been enabled in the PHY driver.

If bisecting shows that this commit breaks your board it probably
depends on the clock output of your Atheros AR8035 PHY. Please have a
look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set
"clk-out-frequency = <125000000>" because that value was the hardcoded
value until this commit.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:01 -04:00
Michael Walle
fe6293a809 phy: atheros: add device tree bindings and config
Add support for configuring the CLK_25M pin as well as the RGMII I/O
voltage by the device tree.

By default the AT803x PHYs outputs the 25MHz clock of the XTAL input.
But this output can also be changed by software to other frequencies.
This commit introduces a generic way to configure this output.

Also the PHY supports different RGMII I/O voltages: 1.5V, 1.8V and 2.5V.
An internal LDO is able to provide 1.5V (default) and 1.8V. The 2.5V
option needs an external supply voltage. This commit adds support to
switch the internal LDO to 1.8V.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Michael Walle
2b7721552a phy: atheros: move delay config to common function
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Michael Walle
f6ae47be1a phy: atheros: introduce debug read and write functions
Provide functions to read and write the Atheros debug registers.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Michael Walle
30e3193128 phy: atheros: use defines for PHY IDs
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Michael Walle
f4d48f43b2 phy: atheros: fix AR8021 PHY ID mask
The upper bits are all the OUI.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Vladimir Oltean
4d4e4cf779 phy: atheros: Clarify the intention of ar8021_config
Debug register 5 contains TX_CLK DELAY at bit 8 and reserved values at
the other bit positions, just like the other PHYs in the family do.
Therefore, it is not necessary to hardcode the reserved values, but
instead simply follow the read-modify-write procedure from the common
function.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Vladimir Oltean
13114f38e2 phy: atheros: Explicitly disable RGMII delays
To eliminate any doubts about the out-of-reset value of the PHY, that
the driver previously relied on.

If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Vladimir Oltean
a234ae863a phy: atheros: Clarify the configuration of the CLK_25M output pin
Also take the opportunity to use the phy_read_mmd and phy_write_mmd
convenience functions.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Vladimir Oltean
29602f9c4b phy: atheros: Use common functions for RGMII internal delays
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Vladimir Oltean
4346df3392 phy: atheros: Make RGMII Tx delays actually configurable for AR8035
Delete the extraneous write to debug reg 5 that enables Tx delay

When the driver was originally introduced in commit "6027384a phylib:
Add Atheros AR8035 GETH PHY support", the Tx delay was being
unconditionally enabled.

Then during "2ec4d10b phy: atheros: add support for RGMII_ID, RGMII_TXID
and RGMII_RXID", the author did not notice that code for enabling Tx
delay code was already. Therefore, the if condition for Tx delay has
always been useless for this PHY since this commit introduced it.

Prior to this patch, every AR8035 PHY in U-boot had Tx delay enabled.
After this patch, only those who define the interface as RGMII_TXID or
RGMII_ID will. This is to be expected, but will nonetheless break the
setups of those who didn't know they rely on Tx delay implicitly.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Tom Rini
143414c03f i.MX for 2020.07
----------------
 
 - imxrt: fix LCD clock, fix doc
 - new board: Coral Dev
 - imx8: enable Cache in SPL. SNVS, update SCFW API
 - imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading
 - MX6ULL : is_imx6ull to include i.MX6ULZ
 - Net: add config to enable TXC delay
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
 -----BEGIN PGP SIGNATURE-----
 
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 bnguZGUACgkQ9PVl5Jpo76azngCdG7iFIXq3kg47qliAr44jIa4s/DUAnRzmSTut
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 =MoOz
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Merge tag 'u-boot-imx-20200502' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2020.07
----------------

- imxrt: fix LCD clock, fix doc
- new board: Coral Dev
- imx8: enable Cache in SPL. SNVS, update SCFW API
- imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading
- MX6ULL : is_imx6ull to include i.MX6ULZ
- Net: add config to enable TXC delay

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
2020-05-04 09:29:42 -04:00
Daniel Schwierzeck
8510580f2e net: pcnet: fix I/O primitives for memory access
Commit 69529c9120 ("net: pcnet: Switch to PCI memory access")
switched from PCI IO access to PCI memory access without updating
the I/O primitives. Contrary to SH, the primitives for memory
access and IO access are implemented differently. Thus doing
memory access with IO port primitives breaks the driver on
MIPS Malta board.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-05-04 08:57:50 -04:00
Marek Vasut
8148693b98 net: smc911x: Add DM support
Add support for U-Boot DM and DT probing. Furthermore, build the
SMC911x standalone EEPROM example only for the non-DM case, as it
is not converted yet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 15:37:48 +02:00
Philippe Schenker
a1a34faef2 net: fec: Add possibility to enable TXC delay
This patch enables the possibility to set FEC_ENET_ENABLE_TXC_DELAY or
FEC_ENET_ENABLE_RXC_DELAY so one can via a define enable the RXC or TXC
delay in the MAC.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-05-01 13:46:22 +02:00
Philippe Schenker
c51eef5924 net: phy: micrel: Add basic support for KSZ9131
This adds basic support for the new Micrel KSZ9131 phy.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
2020-05-01 13:46:22 +02:00
Philippe Schenker
0861aa8fed net: phy: micrel: Use defines for PHY_IDs and MASK
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
2020-05-01 13:46:22 +02:00
Marek Vasut
8eb4fef11b net: smc911x: Split non-DM specific bits from common code
Split network handling functions into non-DM specific parts and
common code in preparation for conversion to DM.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
b11c8bbfaf net: smc911x: Clean up the status handling in smc911x_recv()
Invert the status handling logic in smc911x_recv(), to make the
function easier to read, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
3dbab92603 net: smc911x: Pass around driver private data
Introduce a private data structure for this driver with embedded
struct eth_device and pass it around. This prepares the driver to
work with both DM and non-DM systems.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
ba267c781d net: smc911x: Convert IO accessors to {read,write}{w,l}()
Convert the IO accessors to standard ones instead of using volatile
void pointers, as those do not cover all the bus access details.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
f0d73f5cd0 net: smc911x: Drop weak alias from 32bit accessors
These accessors are not overridden by any board, and even if they were,
this is something which should be handled via DM now, so remove the
weak alias option. Moreover, drop the inline keyword, as the compiler
can decide better.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
eb46efa381 net: smc911x: Inline all functions from header file
Inline all the functions from the header file, as they are not used
outside of the driver or the standalone EEPROM example.

Note that this does introduce considerable amount of duplication in
the standalone EEPROM example, however that one has to be rewritten
anyway, roughly such that the SMC911x driver would expose DM EEPROM
interface and the standalone example would use that.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
f51a2f8496 net: smc911x: Pull MII registration into separate function
Pull the MII interface registration into separate function to avoid the
ifdeffery in smc911x_initialize(). Moreover, adjust the fail path such
that we use goto labels.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
9741795408 net: smc911x: Fix potential memleak() in init fail path
Fix memleak in the init fail path, where if allocation or registration
of MDIO bus fails, then ethernet interface is not unregistered and the
private data are not freed, yet the probe function reports a failure.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
6f6cf0083f net: smc911x: Invert the logic in smc911x_miiphy_{read,write}()
Invert the logic in the aforementioned functions to reduce indent,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
49af0cb5a6 net: smc911x: Rename smc911x_rx() to smc911x_recv()
Rename the function to keep the naming scheme consistent,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
882d5f6983 net: smc911x: Replace malloc()+memset() with calloc()
Replace combination of malloc()+memset() with calloc() as the behavior
is exactly the same and the amount of code is reduced.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
9c211e3b05 net: smc911x: Remove pkt_data_{push,pull}
These functions are never used and are likely a pre-DM remnant
from times long past, just remove them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
e7ab86d9b2 net: rtl8139: Fill in SPDX tag
The rtl8139 driver is derived from Etherboot driver, which is in
turn derived from Linux 8139too driver added in Linux 2.2.18pre14.
An undocumented change in Linux 2.4.10.2 added a new field to the
driver, MODULE_LICENSE("GPL"); . According to current Linux kernel
licensing rules, Documentation/process/license-rules.rst, quote:

	"GPL"	Module is licensed under GPL version 2. This
		does not express any distinction between
		GPL-2.0-only or GPL-2.0-or-later. The exact
		license information can only be determined
		via the license information in the
		corresponding source files.

And since the code does not contain any "future" clause, the tag
is therefore GPL-2.0 only.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
6ee6caaf03 net: rtl8139: Move functions around
Just move functions around in preparation for easy DM conversion,
rename rtl_bcast_addr() to rtl8139_bcast_addr(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
0e5a4117a5 net: rtl8139: Finish cleanup
Finish the checkpatch cleanup of the driver, fix the remaining issues
in probe and init function and in global variables, rename the probe
function to rtl8139_init(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
38b306db23 net: rtl8139: Factor out hardware reset
This hardware reset and reset-wait implementation was twice in the
driver, factor it out into a separate function. This really should
use wait_for_bit() eventually and return -ETIMEDOUT, but thus far,
handling of any of this is missing from the driver. This must be
added later. Thus far, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
661479ffc1 net: rtl8139: Minor cleanup of rtl_disable()
Rename the function to rtl8139_stop(), clean up checkpatch errors in
the stop polling function. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
468fd95562 net: rtl8139: Minor cleanup of rtl_poll()
Rename the function to rtl8139_recv(), clean up various checkpatch errors,
line-over-80 conditions, and malformed comments. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
67fdbc06be net: rtl8139: Minor cleanup of rtl_transmit()
Rename the function to rtl8139_send(), clean up the TX polling, the TX
OK condition at the end, overuse of typecasts, and various line-over-80
problems. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
c7a3e35d76 net: rtl8139: Minor cleanup of rtl_reset()
Rename the function to rtl8139_reset(), clean up the reset polling
and various line-over-80 problems. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
89f3facffb net: rtl8139: Minor cleanup of set_rx_mode()
Rename the function to rtl8139_set_rx_mode(), use unsigned variables
where applicable and inline mc_filter[] values. No functional chanage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
198e6b571b net: rtl8139: Consistently use rtl8139_rx_config
This string of macros is exactly the same thing as rtl8139_rx_config,
so just use rtl8139_rx_config. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
17dc95e527 net: rtl8139: Minor cleanup of read_eeprom()
Rename the function to rtl8139_read_eeprom() to keep the naming
consistent, keep the variables sorted in reverse xmas tree. No
functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
f80f4e4d72 net: rtl8139: Rework eeprom_delay() macro
The macro assumes ee_addr variable to be present when it's being
used. Rework the macro into a function instead and pass it an
argument specifying the register base address, to make it future
proof for DM conversion.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
a5e66e515b net: rtl8139: Register macro cleanup
Clean up the horrible register definitions in the RTL8139 driver.
This does create a couple of checkpatch errors, but the driver is
full of them anyway, and those will be cleaned up later.

No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
24891dd8d4 net: dwc_eth_qos: Prevent DMA from writing updated RX DMA descriptor
The DMA may attempt to write a DMA descriptor in the ring while it is
being updated. By writing the DMA descriptor buffer address to 0, it
is assured the DMA will not use such a buffer and the buffer can be
updated without any interference.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
a83ca0c280 net: dwc_eth_qos: Invalidate RX packet DMA buffer
This patch prevents an issue where the RX packet might have been
accessed by the CPU, which now has cached data from the packet in
the caches and possibly various write buffers, and these data may
be evicted from the caches into the DRAM while the buffer is also
written by the DMA.

By invalidating the buffer after the CPU accessed it and before the
DMA populates the buffer, it is assured that the buffer will not be
corrupted.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
738ee270fe net: dwc_eth_qos: Invalidate RX descriptor before reading
The current code polls the RX desciptor ring for new packets by reading
the RX descriptor status. This works by accident, as the RX descriptors
are often in non-cacheable memory. However, the driver does support use
of RX descriptors in cacheable memory.

This patch adds a missing RX descriptor invalidation, which assures the
CPU will read a fresh copy of the RX descriptor instead of a cached one.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
dd90c2e1ea net: dwc_eth_qos: Flush the RX descriptors on init
Currently the code only flushes the first RX descriptor, not every entry
in the RX descriptor ring. Fix this, to make sure the DMA engine can pick
the RX descriptors correctly.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
83858d8795 net: dwc_eth_qos: Correctly wrap around TX descriptor tail pointer
This code programs the next descriptor in the TX descriptor ring into
the hardware as the last valid TX descriptor. The problem is that if
the currenty descriptor is the last one in the array, the code will
not wrap around correctly and use TX descriptor 0 again, but instead
will use TX descriptor at address right past the TX descriptor ring,
which is the first descriptor in the RX ring.

Fix this by adding the necessary wrap-around.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
4332d80617 net: dwc_eth_qos: Fully rewrite RX descriptor field 3
The RX descriptor field 3 should contain only OWN and BUF1V bits before
being used for receiving data by the DMA engine. However, right now, if
the descriptor was already used for receiving data and is being cleared,
the field 3 is only modified and the aforementioned two bits are ORRed
into the field. This could lead to a residual dirty bits being left in
the field 3 from previous transfer, and it generally does. Fully set the
field 3 instead to clear those residual dirty bits.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
c2abfca9be net: dc2114x: Switch DEBUG_SROM{,2} to debug_cond()
Replace the adhoc debugging ifdeffery with debug_cond() and an
internal SROM_DEBUG macro to select the debug level.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
dbe9c0c145 net: dc2114x: Reorganize driver
Move the functions in the driver around to better fit future DM
conversion, drop function forward declarations. No functional
change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
3b7b9e2e71 net: dc2114x: Clean up INL/OUTL functions
Rename these functions to dc2114x_{inl,outl}(), use u32 values in
them instead of plain signed integers as all those values are in
fact register values and the driver code does bitwise operations
on them. No functional change intended.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
04da061209 net: dc2114x: Clean up DE4X5 macros
Replace these macros with static functions to permit the compiler to
do type checking on the functions. The INL()/OUTL() functions have to
be moved in this patch as well, as those DE4X5 macros are using them.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
eb216f1e00 net: dc2114x: Clean up remaining driver code
Clean up the remaining driver code, macro space alignment, function
declaration indent, replace __attribute__((aligned(32))) with plain
__aligned(32). No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
2e5c2a103e net: dc2114x: Clean up SROM operations
Clean up the SROM accessors to bring them up to standards with
U-Boot coding style. Sort variable into reverse xmas tree. No
functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
5a0c332a8a net: dc2114x: Clean up send_setup_frame()
Clean up the send_setup_frame() to bring it up to standards with
U-Boot coding style, invert the loops where applicable to cut
down the level of indent. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
5b4e7dfb87 net: dc2114x: Clean up dc21x4x_halt()
Clean up the driver halt code to bring it up to standards with
U-Boot coding style. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
9308df81a2 net: dc2114x: Clean up dc21x4x_recv()
Clean up the driver recv code to bring it up to standards with
U-Boot coding style. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
7c53e3364e net: dc2114x: Clean up dc21x4x_send()
Clean up the driver send code to bring it up to standards with
U-Boot coding style, invert the loops where applicable to cut
down the level of indent. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
ca5cb04b7f net: dc2114x: Clean up init code
Clean up the driver init code to bring it up to standards with
U-Boot coding style, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00