Commit graph

15110 commits

Author SHA1 Message Date
Bin Meng
08337cd648 riscv: bootm: Support booting VxWorks
Register the 'bootm' function for booting VxWorks kernel for
RISC-V architecture.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-31 08:08:51 -05:00
Masahiro Yamada
2001a81cba ARM: uniphier: dts: sync with Linux 4.20
Currently, the DWC3 USB node is out of sync because the bindings
for the UniPhier DWC3 PHY diverged between Linux and U-Boot.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-29 11:50:30 +09:00
Masahiro Yamada
6bc50a8f69 ARM: uniphier: do not modify bootcmd environment variable at run-time
Some users might want to modify 'bootcmd' at compile-time by editing
include/configs/uniphier.h, but overwriting it at run-time makes it
impossible.

Instead, set 'bootdev' at run-time, which contains the boot device the
system is booting from, then indirectly reference it from 'bootcmd'.

It is up to users whether to override 'bootcmd'.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-29 11:38:33 +09:00
Weijie Gao
1f5a3cd0aa mt7629: use linux kernel compatible SMP initialization
This patch changes mt7629 to use the compatible platform SMP initialization
method of linux kernel.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2018-12-26 21:35:53 -05:00
Lokesh Vutla
adc702e229 arm: K3: Fix usage of CONFIG_SYS_K3_KEY
For signing the tiboot3.bin image, an optional KEY file can be passed
using CONFIG_SYS_K3_KEY. Right now, Makefile scripts directly takes
the config value and uses it for signing. This is okay if the build
directory is a sub-directory of source tree, otherwise it fails.
Fix it by using the path relative to the source tree.

Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-12-26 21:35:52 -05:00
Adam Ford
a1702746df ARM: mach-omap2: omap3: Fix GPIO clocking in SPL
OMAP3_GPIO_x is needed to enable each GPIO bank on the OMAP3
boards. At one point, the #ifdef's were replaced with
if CONFIG_IS_ENABLED but this won't work for people who need
OMAP3_GPIO_x in SPL since the SPL prefix for this option isn't
used in Kconfig.  This patch moves the check to #if defined and
also makes Kconfig select the banks if CMD_GPIO is used which
makes the checks in the code less cumbersome.

Fixes: bd8a9c14c9 ("arm: mach-omap2/omap3/clock.c: Enable
all GPIO with CMD_GPIO")

Reported-by: Liam O'Shaughnessy <liam.o.shaughnessy@gumstix.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Migrate omap3_igep00x0.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-26 21:20:48 -05:00
Guillaume GARDET
c96d90367a exynos: imply SYS_THUMB_BUILD
This patch allows smaller binaries.
This is needed for and has been tested on Arndale board, as u-boot.bin is
now bigger than the 512K load limit, with GCC8, without thumb mode.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-12-26 11:57:48 +09:00
Tom Rini
562a63e86b Merge git://git.denx.de/u-boot-marvell
- Fix breakage in helios4: Change U-Boot offset on SPI Flash
- Enable CONFIG_BLK for db-88f6820-amc
2018-12-21 13:38:09 -05:00
Tom Rini
5c676780e1 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- stratix10 updates
2018-12-21 13:37:34 -05:00
Tom Rini
b7702158fb A single fix to properly enable eMMC on the AXG S400 board.
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Merge tag 'u-boot-amlogic-20181219' of git://git.denx.de/u-boot-amlogic

A single fix to properly enable eMMC on the AXG S400 board.
2018-12-21 13:37:09 -05:00
Tom Rini
fd0135e3c5 - mips: fix some DTC warnings
- bmips: bcm6348: add DMA driver
 - bmips: bcm5348: add ethernet driver
 - bmips: bcm6368: add ethernet driver
 - mips: mt76xx: fix DMA problems, disable CONFIG_OF_EMBED
 - mips: mscc: add support for Microsemi Ocelot and Luton SoCs
 - mips: mscc: add support for Ocelot and Luton evaluation boards
 - mips: jz47xx: add basic support for Ingenic JZ4780 SoC
 - mips: jz47xx: add support for Imgtec Creator CI20 board
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Merge tag 'mips-updates-for-2019.11' of git://git.denx.de/u-boot-mips

- mips: fix some DTC warnings
- bmips: bcm6348: add DMA driver
- bmips: bcm5348: add ethernet driver
- bmips: bcm6368: add ethernet driver
- mips: mt76xx: fix DMA problems, disable CONFIG_OF_EMBED
- mips: mscc: add support for Microsemi Ocelot and Luton SoCs
- mips: mscc: add support for Ocelot and Luton evaluation boards
- mips: jz47xx: add basic support for Ingenic JZ4780 SoC
- mips: jz47xx: add support for Imgtec Creator CI20 board
2018-12-21 13:36:51 -05:00
Chris Packham
1670a154f5 ARM: mvebu: remove out of date comment
The Marvell DDR3 training code is now part of the U-Boot SPL so the
comment saying it needs porting is no longer correct.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-21 08:59:05 +01:00
Ang, Chee Hong
bd5581716d arm: socfpga: stratix10: Enable Stratix10 FPGA Reconfiguration
Select CONFIG_FPGA_STRATIX10 for CONFIG_TARGET_SOCFPGA_STRATIX10.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2018-12-20 17:12:25 +01:00
Ang, Chee Hong
877ec6ebbd arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table
Enable 'fpga' command in u-boot. User will be able to use the FPGA
command to program the FPGA on Stratix10 SoC.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2018-12-20 17:12:25 +01:00
Ang, Chee Hong
8b36ba27ad arm: socfpga: stratix10: Add macros for mailbox's arguments
Add macros for specifying number of arguments in mailbox command.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2018-12-20 17:12:25 +01:00
Ang, Chee Hong
d99f1e92a2 arm: socfpga: stratix10: Add generic FPGA reconfig mailbox API for S10
Add a generic mailbox API for FPGA reconfig status which can be
called by others. This new function accepts 2 different mailbox
commands: CONFIG_STATUS or RECONFIG_STATUS.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2018-12-20 17:12:25 +01:00
Neil Armstrong
53904dc7c1 arm: dts: s400: Fix status for eMMC and SDIO ports
Under U-boot, the WiFi SDIO Module should be disabled and the
eMMC modules should be enabled, so this patch adds an s400-u-boot.dtsi
include file specific for U-Boot that will be included by the build system.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
2018-12-19 16:20:50 +01:00
Paul Burton
25c7de2255 mips: jz47xx: Add Creator CI20 platform
Add support for the Creator CI20 platform based on the JZ4780 SoC.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2018-12-19 15:23:02 +01:00
Paul Burton
cd71b1d5d2 mips: jz47xx: Add JZ4780 SoC support
Add initial support for the Ingenic JZ47xx MIPS SoC.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2018-12-19 15:23:01 +01:00
Paul Burton
b325c4dcd7 mips: Add SPL header
Add header with SPL boot mode and type definitions.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2018-12-19 15:23:01 +01:00
Gregory CLEMENT
f8c8cedd7a MSCC: add board support for the Luton based evaluation board
Adding the support for the Luton boards PCB91 which share common code with
the Ocelots boards, including board code, device tree and configuration.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-12-19 15:23:01 +01:00
Gregory CLEMENT
6787c1ece0 MSCC: add board support for the Ocelots based evaluation boards
Adding the support for 2 boards sharing common code for Ocelot chip:
PCB120 and PCB123

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-12-19 15:23:01 +01:00
Gregory CLEMENT
6bd8231a6d MSCC: add support for Luton SoCs
As the Ocelots SoCs, this family of SoCs are found in the Microsemi
Switches solution.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-12-19 15:23:01 +01:00
Gregory CLEMENT
dd1033e4e0 MSCC: add support for Ocelot SoCs
This family of SoCs are found in the Microsemi Switches solution and have
already a support in the linux kernel.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-12-19 15:23:01 +01:00
Gregory CLEMENT
464b96bb80 MIPS: Allow to prefetch and lock instructions into cache
This path add a new helper allowing to prefetch and lock instructions
into cache. This is useful very early in the boot when no RAM is
available yet.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-12-19 15:23:01 +01:00
Gregory CLEMENT
48ee7b6853 MIPS: move create_tlb() in an proper header: mipsregs.h
Export create_tlb() as an inline function in mipsregs.h. It allows to
remove the declaration of the function from the board files.

Then it will allow also to use this function very early in the boot when
the stack is not usable.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-12-19 15:23:01 +01:00
Daniel Schwierzeck
a0abb52c5a MIPS: remove local_irq_[save|restore] from CP0 macros
With moving write_on_tlb() to arch/mips/include/asm/mipsregs.h
there are now compiler warnings when some generic code includes
asm/io.h. This happens for example when enabling OF live tree.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19 15:23:01 +01:00
Stefan Roese
a5f50e0114 mips: mt76xx: Flush d-cache in arch_misc_init() to solve d-cache issues
It has been noticed, that sometimes the d-cache is not in a
"clean-state" when U-Boot is running on MT7688. This was detected when
using the ethernet driver (which uses d-cache) and a TFTP command does
not complete. Flushing the complete d-cache (again?) here seems to fix
this issue.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19 15:23:01 +01:00
Daniel Schwierzeck
8da7495299 mips: xilfpga: fix DTC warnings
This fixes following DTC warning:

arch/mips/dts/nexys4ddr.dtb: Warning (compatible_is_string_list): /ethernet@10e00000/mdio/phy@1:compatible: property is not a string list

As upstream DTS in Linux doesn't have the offending property,
simply remove it to fix the warning.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19 15:23:01 +01:00
Daniel Schwierzeck
d2f02586fd mips: ath79: fix DTC warnings
Remove all interrupt nodes that cause warnings regarding a missing
interrupt parent. There are no interrupt controller nodes defined
and the device trees don't match the ones in Linux anymore.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
a4bfa0e969 bmips: enable ar-5315u enet support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
93bd64bf05 bmips: bcm6318: add support for bcm6368-enet
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
173e3aec81 bmips: enable vr-3032u enet support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
b07f2dc6a0 bmips: bcm63268: add support for bcm6368-enet
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
ba329fd1f2 bmips: enable dgnd3700v2 enet support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
4518a24c29 bmips: bcm6362: add support for bcm6368-enet
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
54468f5853 bmips: enable ar-5387un enet support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
45934ed846 bmips: bcm6328: add support for bcm6368-enet
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
2e498f23ac bmips: enable wap-5813n enet support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
d9c1f0c23f bmips: bcm6368: add support for bcm6368-enet
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
9c0c7e8487 bmips: enable nb4-ser enet support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
15591a9ae1 bmips: enable hg556a enet support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
4f88720e6a bmips: bcm6358: add support for bcm6348-enet
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
eb4bdc7cc2 bmips: enable ct-5361 enet support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
9dc07b9493 bmips: bcm6348: add support for bcm6348-enet
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
ec96de3b66 bmips: enable f@st1704 enet support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:01 +01:00
Álvaro Fernández Rojas
d7f5bc1aea bmips: bcm6338: add support for bcm6348-enet
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:00 +01:00
Álvaro Fernández Rojas
6e0faa22dd bmips: bcm6318: add bcm6348-iudma support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:00 +01:00
Álvaro Fernández Rojas
83eae02462 bmips: bcm63268: add bcm6348-iudma support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:00 +01:00
Álvaro Fernández Rojas
b2bf5a2243 bmips: bcm6362: add bcm6348-iudma support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:00 +01:00
Álvaro Fernández Rojas
85132221e2 bmips: bcm6328: add bcm6348-iudma support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:00 +01:00
Álvaro Fernández Rojas
0417eb5590 bmips: bcm6368: add bcm6348-iudma support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:00 +01:00
Álvaro Fernández Rojas
487250e6df bmips: bcm6358: add bcm6348-iudma support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:00 +01:00
Álvaro Fernández Rojas
c225d6619e bmips: bcm6348: add bcm6348-iudma support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:00 +01:00
Álvaro Fernández Rojas
9ab403d0dd bmips: bcm6338: add bcm6348-iudma support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-19 15:23:00 +01:00
Bin Meng
dcad9b8d66 riscv: Remove ae350.dts
This is not used by any board. Remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
3c85099aa3 riscv: bootm: Change to use boot_hart from global data
Avoid reading mhartid CSR directly, instead use the one we saved
in the global data structure before.

With this patch, BBL no longer needs to be hacked to provide the
mhartid CSR emulation for S-mode U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
51ab4570f3 riscv: Save boot hart id to the global data
At present the hart id passed via a0 in the U-Boot entry is saved
to s0 at the beginning but does not preserve later. Save it to the
global data structure so that it can be used later.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
7f5d35a547 riscv: Adjust the _exit_trap() position to come before handle_trap()
With this change, we can avoid a forward declaration.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
10753ef8fd riscv: Return to previous privilege level after trap handling
At present the trap handler returns to hardcoded M-mode/S-mode.
Change to returning to previous privilege level instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
496262cca6 riscv: Fix context restore before returning from trap handler
sp cannot be loaded before restoring other registers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
4b3f5ed5ac riscv: Move trap handler codes to mtrap.S
Currently the M-mode trap handler codes are in start.S. For future
extension, move them to a separate file mtrap.S.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
485e822346 riscv: Do some basic architecture level cpu initialization
In arch_cpu_init_dm() do some basic architecture level cpu
initialization, like FPU enable, etc.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
57fe5c64cb riscv: Add indirect stringification to csr_xxx ops
With current csr_xxx ops, we cannot pass a macro to parameter
'csr', hence we need add another level to allow the parameter
to be a macro itself, aka indirect stringification.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
aef59e5cc4 riscv: Update supports_extension() to use desc from cpu driver
This updates supports_extension() implementation to use the desc
string from the cpu driver whenever possible, which avoids the
reading of misa CSR for S-mode U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
3967156464 riscv: Add exception codes for xcause register
This adds all exception codes in encoding.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
ea53f1c742 riscv: Add CSR numbers
The standard RISC-V ISA sets aside a 12-bit encoding space for up
to 4096 CSRs. This adds all known CSR numbers as defined in the
RISC-V Privileged Architecture Version 1.10.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
3c276b2703 riscv: Remove non-DM version of print_cpuinfo()
With DM CPU driver, the non-DM version of print_cpuinfo() is no
longer needed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
39cad5bc0b riscv: Probe cpus during boot
This calls cpu_probe_all() to probe all available cpus.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
92b64fef05 riscv: Enlarge the default SYS_MALLOC_F_LEN
Increase the heap size for the pre-relocation stage, so that CPU
driver can be loaded.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Bin Meng
84304d4866 riscv: qemu: Add platform-specific Kconfig options
Add the QEMU RISC-V platform-specific Kconfig options, to include
CPU and timer drivers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:27 +08:00
Anup Patel
511107d85d riscv: Implement riscv_get_time() API using rdtime instruction
This adds an implementation of riscv_get_time() API that is using
rdtime instruction.

This is the case for S-mode U-Boot, and is useful for processors
that support rdtime in M-mode too.

Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-12-18 09:56:27 +08:00
Bin Meng
644a3cd77e riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
This adds U-Boot syscon driver for SiFive's Core Local Interruptor
(CLINT). The CLINT block holds memory-mapped control and status
registers associated with software and timer interrupts.

This driver implements the riscv_get_time() API as required by
the generic RISC-V timer driver, as well as some other APIs that
are needed for handling IPI.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:26 +08:00
Anup Patel
3cfc825261 riscv: Introduce a Kconfig option for machine mode
So far we have a Kconfig option for supervisor mode. This adds an
option for the machine mode.

Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-12-18 09:56:26 +08:00
Bin Meng
44fe795c14 riscv: ax25: Hide the ax25-specific Kconfig option
There is no need to expose RISCV_NDS to the Kconfig menu as it is
an ax25-specific option. Introduce a dedicated Kconfig option for
the cache ops of ax25 platform and use that to guard the cache ops.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-12-18 09:56:26 +08:00
Bin Meng
27dc2c130e riscv: qemu: Create a simple-bus driver for the soc node
To enumerate devices on the /soc/ node, create a "simple-bus"
driver to match "riscv-virtio-soc".

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:26 +08:00
Lukas Auer
8176ea4d58 riscv: add Kconfig entries for the code model
RISC-V has two code models, medium low (medlow) and medium any (medany).
Medlow limits addressable memory to a single 2 GiB range between the
absolute addresses -2 GiB and +2 GiB. Medany limits addressable memory
to any single 2 GiB address range.

By default, medlow is selected for U-Boot on both 32-bit and 64-bit
systems.

The -mcmodel compiler flag is selected according to the Kconfig
configuration.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
[bmeng: adjust to make medlow the default code model for U-Boot]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18 09:56:26 +08:00
Tom Rini
d597b26d51 Improvements and fixes or u-boot-rockchip:
- new board: adds rv1108-elgin-r1 board support
 - rk3288-evb: dts: remove 'vmmc' from emmc node
 - rk3399-puma: dts: remove obsolete DTS node 'vcc5v0_host'
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Merge tag 'for-master-20181216' of git://git.denx.de/u-boot-rockchip

Improvements and fixes or u-boot-rockchip:
- new board: adds rv1108-elgin-r1 board support
- rk3288-evb: dts: remove 'vmmc' from emmc node
- rk3399-puma: dts: remove obsolete DTS node 'vcc5v0_host'
2018-12-16 20:49:46 -05:00
Otavio Salvador
e11ef3d26e ARM: rockchip: Add rv1108-elgin-r1 board support
Add the initial support for Elgin R1 board, which is based on the
RV1108 SoC and has the following features currently supported in
U-Boot:

- UART
- eMMC
- USB

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-16 01:30:11 +01:00
Tom Rini
401c254044 Merge branch 'master' of git://git.denx.de/u-boot-usb
- Second half of the USB Gadget DM conversion
2018-12-15 17:49:57 -05:00
Kever Yang
9af1d5ef2f rockchip: rk3288-evb: dts: remove 'vmmc' from emmc node
This is a sync with kernel mainline dts.

The U-Boot eMMC does not need to care about the power for Rockchip
SoCs, because if the board is using eMMC, the power will default on
(for bootrom), so the 'vmmc', 'vqmmc' is only useful for SD in U-Boot.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-15 20:56:46 +01:00
Christoph Muellner
1ae5cd0226 rockchip: rk3399-puma: Remove obsolete DTS node 'vcc5v0_host'.
vcc5v0_host and usbhub_enable share gpio4 RK_PA3,
which is a problem during probing (the second probe
will trigger a -EBUSY, when trying to get the gpio handle).

An analysis of the situation shows, that both regulators
are actually describing the same supply.

This patch removes the (currenlty not successful probing)
regulator vcc5v0_host from the DTS and adds the pinctrl-*
setting to usbhub_enable.

Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Phiilipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-15 20:56:26 +01:00
Shawn Guo
655c6d997d poplar: fix boot failure caused by serial driver change
Commit 4687919684 ("serial: Remove DM_FLAG_PRE_RELOC flag in various
drivers") essentially drops flag DM_FLAG_PRE_RELOC from serial_pl01x
driver for Poplar platform, because the platform falls into the
following strategy category made by the commit.

  Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check, for
  drivers that support both statically declared devices and
  configuration from device tree

Before the commit lands, Poplar platform works by statically declaring
pl011 serial device via U_BOOT_DEVICE() with DM_FLAG_PRE_RELOC flag set
in the driver.  But since Poplar also supports device configuration from
device tree, the commit practically drops the flag for Poplar, and hence
breaks the platform from booting.

This patch changes platform code and device tree to initiate pl011
serial device from device tree rather than static declaration, so that
above strategy about DM_FLAG_PRE_RELOC applies to Poplar, and therefore
the reported boot failure gets fixed.

Reported-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Fixes: 4687919684 ("serial: Remove DM_FLAG_PRE_RELOC flag in various drivers")
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-15 11:49:56 -05:00
Jean-Jacques Hiblot
7a43dd7aa6 arm: am33xx: Register USB controllers if DM_USB is used but not OF_CONTROL
When DM_USB is used, either the USB controllers are bound when the DTB
is parsed (when OF_CONTROL is enabled) or they are bound using the
U_BOOT_DEVICES() macro.
In the later case, the platform data is passed in a struct ti_musb_platdata
because it cannot be read from the DTB.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:10 +01:00
Jean-Jacques Hiblot
7d98dbcc3d usb: musb-new: Add support for DM_USB
Enable DM for USB peripheral in the musb-new driver.
Also make sure that the driver can be used in the SPL.
This implies that:
* the driver must work with and without the OF_CONTROL option. That
in turn, implies that the platform data can be passed in a struct
ti_musb_platdata or be read from the dtb
* usb.o is linked in the SPL if host support is enabled

Another change is that the driver does not fail to bind (and stop the boot
process) if one of the child driver does not bind. Reporting the error is
enough. This kind of error would appear if the port is configured in the
DTS but the driver is not activated in the config.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:10 +01:00
Jean-Jacques Hiblot
4ea0711104 dts: am4372: Enable USB1 in SPL
USB1 can be used by the romboot on all am4372 platforms to download a
firmware (SPL in our case).
It makes sense to enable USB1 in the SPL to download u-boot.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:10 +01:00
Jean-Jacques Hiblot
894f002f20 dts: Add a u-boot specific dtsi file for the am4372
This file is used to override the values found in am4372.dtsi
Use it to fix the "compatible" options for the controllers used
to support the USB (parent bus and syscons).

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:09 +01:00
Jean-Jacques Hiblot
d53653f3f9 ARM: dts: k2g-evm: enable USB0 and USB1
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:09 +01:00
Simon Glass
e221cdcf44 dm: sandbox: Allow selection of sample rate and channels
At present these parameters are hard-coded in the sdl interface code.
Allow them to be specified by the driver instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:37:09 -07:00
Simon Glass
f2b25c9bf8 dm: sound: Complete migration to driver model
All users of sound are converted to use driver model. Drop the old code
and the CONFIG_DM_SOUND option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:41 -07:00
Simon Glass
282e29eb47 dm: sandbox: sound: Convert to use driver model
Update sandbox's device tree and config to use driver model for sound. Use
the double buffer for sound output so that we don't need to wait for the
sound to complete before returning.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:30 -07:00
Simon Glass
93a98a6ff3 dm: exynos: sound: Convert to use driver model
Update snow's device tree and config to use driver model for sound. Also
update the others as best we can.

Spring does not appear to have audio support in the kernel. The smdk5250
and smdk5420 boards use a wolfson codec which I cannot test with. So the
only boards that is tested and known to work are snow, pit and pi.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:30 -07:00
Simon Glass
482e585bdf exynos: Add support for exynos5420 i2s pinmux
Allow setting the i2s pinmux correctly on exyno5420 so that i2c can be
used on that SoC. Also rename EXYNOS_AUDSS to something consistent with
other naming.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:30 -07:00
Simon Glass
cf9007ce88 exynos: Add proid_is_exynos542x() for common 542x
Add a convenience function for any Exynos 542x chip.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:30 -07:00
Simon Glass
d6cadd5918 dm: sound: Add conversion to driver model
Move the existing hardware drivers over to use driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:36:29 -07:00
Simon Glass
a1b17e4f4c dm: core: Add a function to read into a unsigned int
The current dev_read...() functions use s32 and u32 which are convenient
for device tree but not so useful for normal code, which often wants to
use normal integers for values.

Add a helper which supports returning an unsigned int. Also add signed
versions of the unsigned readers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
d490189865 dm: sound: Create a uclass for sound
The sound driver pulls together the audio codec and i2s drivers in order
to actually make sounds. It supports setup() and play() methods. The
sound_find_codec_i2s() function allows locating the linked codec and i2s
devices. They can be referred to from uclass-private data.

Add a uclass and a test for sound.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
e625b68b04 dm: sandbox: Update sound to use two buffers
At present we use a single buffer for sound which means we cannot be
playing one sound while queueing up the next. This wouldn't matter except
that a long sound (more than a second) has to be created as a single
buffer, thus using a lot of memory. To better mimic what real sound
drivers do, add support for double buffering in sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
e96fa6c911 dm: sound: Create a uclass for i2s
The i2s bus is commonly used with audio codecs. It provides a way to
stream digital data sychronously in both directions. U-Boot only supports
audio output, so this uclass is very simple, with a single tx_data()
method.

Add a uclass and a test for i2s.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00
Simon Glass
ce6d99a056 dm: sound: Create a uclass for audio codecs
An audio codec provides a way to convert digital data to sound and vice
versa. Add a simple uclass which just supports setting the parameters for
the codec.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13 16:32:49 -07:00