mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
ARM: uniphier: dts: sync with Linux 4.20
Currently, the DWC3 USB node is out of sync because the bindings for the UniPhier DWC3 PHY diverged between Linux and U-Boot. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada
parent
94bf34b172
commit
2001a81cba
13 changed files with 992 additions and 16 deletions
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@ -116,6 +116,28 @@
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#size-cells = <1>;
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ranges = <0 0 0 0xffffffff>;
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spi0: spi@54006000 {
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compatible = "socionext,uniphier-scssi";
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status = "disabled";
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reg = <0x54006000 0x100>;
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interrupts = <0 39 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0>;
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clocks = <&peri_clk 11>;
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resets = <&peri_rst 11>;
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};
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spi1: spi@54006100 {
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compatible = "socionext,uniphier-scssi";
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status = "disabled";
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reg = <0x54006100 0x100>;
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interrupts = <0 216 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1>;
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clocks = <&peri_clk 11>;
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resets = <&peri_rst 11>;
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};
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serial0: serial@54006800 {
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compatible = "socionext,uniphier-uart";
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status = "disabled";
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@ -432,6 +454,8 @@
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<&mio_clk 12>;
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resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
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<&mio_rst 12>;
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phy-names = "usb";
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phys = <&usb_phy0>;
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has-transaction-translator;
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};
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@ -446,6 +470,8 @@
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<&mio_clk 13>;
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resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
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<&mio_rst 13>;
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phy-names = "usb";
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phys = <&usb_phy1>;
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has-transaction-translator;
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};
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@ -460,6 +486,8 @@
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<&mio_clk 14>;
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resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
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<&mio_rst 14>;
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phy-names = "usb";
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phys = <&usb_phy2>;
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has-transaction-translator;
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};
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@ -488,6 +516,27 @@
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pinctrl: pinctrl {
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compatible = "socionext,uniphier-ld11-pinctrl";
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};
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usb-phy {
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compatible = "socionext,uniphier-ld11-usb2-phy";
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#address-cells = <1>;
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#size-cells = <0>;
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usb_phy0: phy@0 {
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reg = <0>;
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#phy-cells = <0>;
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};
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usb_phy1: phy@1 {
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reg = <1>;
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#phy-cells = <0>;
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};
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usb_phy2: phy@2 {
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reg = <2>;
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#phy-cells = <0>;
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};
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};
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};
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soc-glue@5f900000 {
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@ -571,7 +620,8 @@
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interrupts = <0 65 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand>;
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clocks = <&sys_clk 2>;
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clock-names = "nand", "nand_x", "ecc";
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clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
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resets = <&sys_rst 2>;
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};
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};
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@ -145,6 +145,10 @@
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};
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};
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&usb {
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status = "okay";
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};
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&nand {
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status = "okay";
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};
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@ -75,3 +75,7 @@
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drive-strength = <9>;
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};
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};
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&usb {
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status = "okay";
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};
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@ -224,6 +224,50 @@
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#size-cells = <1>;
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ranges = <0 0 0 0xffffffff>;
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spi0: spi@54006000 {
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compatible = "socionext,uniphier-scssi";
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status = "disabled";
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reg = <0x54006000 0x100>;
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interrupts = <0 39 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0>;
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clocks = <&peri_clk 11>;
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resets = <&peri_rst 11>;
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};
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spi1: spi@54006100 {
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compatible = "socionext,uniphier-scssi";
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status = "disabled";
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reg = <0x54006100 0x100>;
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interrupts = <0 216 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1>;
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clocks = <&peri_clk 11>;
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resets = <&peri_rst 11>;
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};
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spi2: spi@54006200 {
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compatible = "socionext,uniphier-scssi";
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status = "disabled";
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reg = <0x54006200 0x100>;
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interrupts = <0 229 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi2>;
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clocks = <&peri_clk 11>;
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resets = <&peri_rst 11>;
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};
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spi3: spi@54006300 {
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compatible = "socionext,uniphier-scssi";
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status = "disabled";
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reg = <0x54006300 0x100>;
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interrupts = <0 230 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi3>;
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clocks = <&peri_clk 11>;
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resets = <&peri_rst 11>;
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};
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serial0: serial@54006800 {
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compatible = "socionext,uniphier-uart";
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status = "disabled";
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@ -567,6 +611,50 @@
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efuse@200 {
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compatible = "socionext,uniphier-efuse";
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reg = <0x200 0x68>;
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#address-cells = <1>;
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#size-cells = <1>;
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/* USB cells */
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usb_rterm0: trim@54,4 {
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reg = <0x54 1>;
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bits = <4 2>;
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};
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usb_rterm1: trim@55,4 {
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reg = <0x55 1>;
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bits = <4 2>;
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};
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usb_rterm2: trim@58,4 {
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reg = <0x58 1>;
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bits = <4 2>;
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};
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usb_rterm3: trim@59,4 {
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reg = <0x59 1>;
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bits = <4 2>;
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};
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usb_sel_t0: trim@54,0 {
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reg = <0x54 1>;
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bits = <0 4>;
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};
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usb_sel_t1: trim@55,0 {
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reg = <0x55 1>;
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bits = <0 4>;
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};
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usb_sel_t2: trim@58,0 {
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reg = <0x58 1>;
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bits = <0 4>;
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};
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usb_sel_t3: trim@59,0 {
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reg = <0x59 1>;
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bits = <0 4>;
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};
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usb_hs_i0: trim@56,0 {
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reg = <0x56 1>;
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bits = <0 4>;
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};
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usb_hs_i2: trim@5a,0 {
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reg = <0x5a 1>;
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bits = <0 4>;
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};
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};
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};
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@ -634,6 +722,157 @@
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};
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};
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_usb: usb@65a00000 {
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compatible = "socionext,uniphier-dwc3", "snps,dwc3";
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status = "disabled";
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reg = <0x65a00000 0xcd00>;
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interrupt-names = "host";
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interrupts = <0 134 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>,
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<&pinctrl_usb2>, <&pinctrl_usb3>;
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clock-names = "ref", "bus_early", "suspend";
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clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>;
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resets = <&usb_rst 15>;
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phys = <&usb_hsphy0>, <&usb_hsphy1>,
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<&usb_hsphy2>, <&usb_hsphy3>,
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<&usb_ssphy0>, <&usb_ssphy1>;
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dr_mode = "host";
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};
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usb-glue@65b00000 {
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compatible = "socionext,uniphier-ld20-dwc3-glue",
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"simple-mfd";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x65b00000 0x400>;
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usb_rst: reset@0 {
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compatible = "socionext,uniphier-ld20-usb3-reset";
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reg = <0x0 0x4>;
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#reset-cells = <1>;
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clock-names = "link";
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clocks = <&sys_clk 14>;
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reset-names = "link";
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resets = <&sys_rst 14>;
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};
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usb_vbus0: regulator@100 {
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compatible = "socionext,uniphier-ld20-usb3-regulator";
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reg = <0x100 0x10>;
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clock-names = "link";
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clocks = <&sys_clk 14>;
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reset-names = "link";
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resets = <&sys_rst 14>;
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};
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usb_vbus1: regulator@110 {
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compatible = "socionext,uniphier-ld20-usb3-regulator";
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reg = <0x110 0x10>;
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clock-names = "link";
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clocks = <&sys_clk 14>;
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reset-names = "link";
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resets = <&sys_rst 14>;
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};
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usb_vbus2: regulator@120 {
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compatible = "socionext,uniphier-ld20-usb3-regulator";
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reg = <0x120 0x10>;
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clock-names = "link";
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clocks = <&sys_clk 14>;
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reset-names = "link";
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resets = <&sys_rst 14>;
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};
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usb_vbus3: regulator@130 {
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compatible = "socionext,uniphier-ld20-usb3-regulator";
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reg = <0x130 0x10>;
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clock-names = "link";
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clocks = <&sys_clk 14>;
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reset-names = "link";
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resets = <&sys_rst 14>;
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};
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usb_hsphy0: hs-phy@200 {
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compatible = "socionext,uniphier-ld20-usb3-hsphy";
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reg = <0x200 0x10>;
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#phy-cells = <0>;
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clock-names = "link", "phy";
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clocks = <&sys_clk 14>, <&sys_clk 16>;
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reset-names = "link", "phy";
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resets = <&sys_rst 14>, <&sys_rst 16>;
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vbus-supply = <&usb_vbus0>;
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nvmem-cell-names = "rterm", "sel_t", "hs_i";
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nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>,
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<&usb_hs_i0>;
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};
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usb_hsphy1: hs-phy@210 {
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compatible = "socionext,uniphier-ld20-usb3-hsphy";
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reg = <0x210 0x10>;
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#phy-cells = <0>;
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clock-names = "link", "phy";
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clocks = <&sys_clk 14>, <&sys_clk 16>;
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reset-names = "link", "phy";
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resets = <&sys_rst 14>, <&sys_rst 16>;
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vbus-supply = <&usb_vbus1>;
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nvmem-cell-names = "rterm", "sel_t", "hs_i";
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nvmem-cells = <&usb_rterm1>, <&usb_sel_t1>,
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<&usb_hs_i0>;
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};
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usb_hsphy2: hs-phy@220 {
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compatible = "socionext,uniphier-ld20-usb3-hsphy";
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reg = <0x220 0x10>;
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#phy-cells = <0>;
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clock-names = "link", "phy";
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clocks = <&sys_clk 14>, <&sys_clk 17>;
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reset-names = "link", "phy";
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resets = <&sys_rst 14>, <&sys_rst 17>;
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vbus-supply = <&usb_vbus2>;
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nvmem-cell-names = "rterm", "sel_t", "hs_i";
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nvmem-cells = <&usb_rterm2>, <&usb_sel_t2>,
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<&usb_hs_i2>;
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};
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usb_hsphy3: hs-phy@230 {
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compatible = "socionext,uniphier-ld20-usb3-hsphy";
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reg = <0x230 0x10>;
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#phy-cells = <0>;
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clock-names = "link", "phy";
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clocks = <&sys_clk 14>, <&sys_clk 17>;
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reset-names = "link", "phy";
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resets = <&sys_rst 14>, <&sys_rst 17>;
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vbus-supply = <&usb_vbus3>;
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nvmem-cell-names = "rterm", "sel_t", "hs_i";
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nvmem-cells = <&usb_rterm3>, <&usb_sel_t3>,
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<&usb_hs_i2>;
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};
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usb_ssphy0: ss-phy@300 {
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compatible = "socionext,uniphier-ld20-usb3-ssphy";
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reg = <0x300 0x10>;
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#phy-cells = <0>;
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clock-names = "link", "phy";
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clocks = <&sys_clk 14>, <&sys_clk 18>;
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reset-names = "link", "phy";
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resets = <&sys_rst 14>, <&sys_rst 18>;
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vbus-supply = <&usb_vbus0>;
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};
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usb_ssphy1: ss-phy@310 {
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compatible = "socionext,uniphier-ld20-usb3-ssphy";
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reg = <0x310 0x10>;
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#phy-cells = <0>;
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clock-names = "link", "phy";
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clocks = <&sys_clk 14>, <&sys_clk 19>;
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reset-names = "link", "phy";
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resets = <&sys_rst 14>, <&sys_rst 19>;
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vbus-supply = <&usb_vbus1>;
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};
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};
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/* FIXME: U-Boot own node */
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usb: usb@65b00000 {
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compatible = "socionext,uniphier-ld20-dwc3";
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reg = <0x65b00000 0x1000>;
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@ -660,7 +899,8 @@
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interrupts = <0 65 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand>;
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clocks = <&sys_clk 2>;
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clock-names = "nand", "nand_x", "ecc";
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clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
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resets = <&sys_rst 2>;
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};
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};
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@ -63,6 +63,17 @@
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cache-level = <2>;
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};
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spi: spi@54006000 {
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compatible = "socionext,uniphier-scssi";
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status = "disabled";
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reg = <0x54006000 0x100>;
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interrupts = <0 39 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0>;
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clocks = <&peri_clk 11>;
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resets = <&peri_rst 11>;
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};
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serial0: serial@54006800 {
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compatible = "socionext,uniphier-uart";
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status = "disabled";
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@ -381,7 +392,8 @@
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interrupts = <0 65 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand2cs>;
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clocks = <&sys_clk 2>;
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clock-names = "nand", "nand_x", "ecc";
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clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
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resets = <&sys_rst 2>;
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};
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};
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@ -131,6 +131,26 @@
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function = "sd1";
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};
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pinctrl_spi0: spi0 {
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groups = "spi0";
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function = "spi0";
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};
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pinctrl_spi1: spi1 {
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groups = "spi1";
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function = "spi1";
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};
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pinctrl_spi2: spi2 {
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groups = "spi2";
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function = "spi2";
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};
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pinctrl_spi3: spi3 {
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groups = "spi3";
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function = "spi3";
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};
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pinctrl_system_bus: system-bus {
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groups = "system_bus", "system_bus_cs1";
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function = "system_bus";
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@ -73,11 +73,11 @@
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status = "okay";
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};
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&usb0 {
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&usb2 {
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status = "okay";
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};
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&usb1 {
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&usb3 {
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status = "okay";
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};
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@ -92,10 +92,10 @@
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};
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};
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&usb2 {
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&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -68,11 +68,11 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
&usb2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
&usb3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
@ -87,10 +87,10 @@
|
|||
};
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -71,6 +71,17 @@
|
|||
cache-level = <2>;
|
||||
};
|
||||
|
||||
spi0: spi@54006000 {
|
||||
compatible = "socionext,uniphier-scssi";
|
||||
status = "disabled";
|
||||
reg = <0x54006000 0x100>;
|
||||
interrupts = <0 39 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
clocks = <&peri_clk 11>;
|
||||
resets = <&peri_rst 11>;
|
||||
};
|
||||
|
||||
serial0: serial@54006800 {
|
||||
compatible = "socionext,uniphier-uart";
|
||||
status = "disabled";
|
||||
|
|
@ -317,6 +328,8 @@
|
|||
<&mio_clk 12>;
|
||||
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
|
||||
<&mio_rst 12>;
|
||||
phy-names = "usb";
|
||||
phys = <&usb_phy0>;
|
||||
has-transaction-translator;
|
||||
};
|
||||
|
||||
|
|
@ -331,6 +344,8 @@
|
|||
<&mio_clk 13>;
|
||||
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
|
||||
<&mio_rst 13>;
|
||||
phy-names = "usb";
|
||||
phys = <&usb_phy1>;
|
||||
has-transaction-translator;
|
||||
};
|
||||
|
||||
|
|
@ -342,6 +357,34 @@
|
|||
pinctrl: pinctrl {
|
||||
compatible = "socionext,uniphier-pro4-pinctrl";
|
||||
};
|
||||
|
||||
usb-phy {
|
||||
compatible = "socionext,uniphier-pro4-usb2-phy";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
usb_phy0: phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
usb_phy1: phy@1 {
|
||||
reg = <1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
usb_phy2: phy@2 {
|
||||
reg = <2>;
|
||||
#phy-cells = <0>;
|
||||
vbus-supply = <&usb0_vbus>;
|
||||
};
|
||||
|
||||
usb_phy3: phy@3 {
|
||||
reg = <3>;
|
||||
#phy-cells = <0>;
|
||||
vbus-supply = <&usb1_vbus>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
soc-glue@5f900000 {
|
||||
|
|
@ -434,6 +477,60 @@
|
|||
};
|
||||
};
|
||||
|
||||
_usb0: usb@65a00000 {
|
||||
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
|
||||
status = "disabled";
|
||||
reg = <0x65a00000 0xcd00>;
|
||||
interrupt-names = "host", "peripheral";
|
||||
interrupts = <0 134 4>, <0 135 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb0>;
|
||||
clock-names = "ref", "bus_early", "suspend";
|
||||
clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
|
||||
resets = <&usb0_rst 4>;
|
||||
phys = <&usb_phy2>, <&usb0_ssphy>;
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
usb-glue@65b00000 {
|
||||
compatible = "socionext,uniphier-pro4-dwc3-glue",
|
||||
"simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x65b00000 0x100>;
|
||||
|
||||
usb0_vbus: regulator@0 {
|
||||
compatible = "socionext,uniphier-pro4-usb3-regulator";
|
||||
reg = <0 0x10>;
|
||||
clock-names = "gio", "link";
|
||||
clocks = <&sys_clk 12>, <&sys_clk 14>;
|
||||
reset-names = "gio", "link";
|
||||
resets = <&sys_rst 12>, <&sys_rst 14>;
|
||||
};
|
||||
|
||||
usb0_ssphy: ss-phy@10 {
|
||||
compatible = "socionext,uniphier-pro4-usb3-ssphy";
|
||||
reg = <0x10 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "gio", "link";
|
||||
clocks = <&sys_clk 12>, <&sys_clk 14>;
|
||||
reset-names = "gio", "link";
|
||||
resets = <&sys_rst 12>, <&sys_rst 14>;
|
||||
vbus-supply = <&usb0_vbus>;
|
||||
};
|
||||
|
||||
usb0_rst: reset@40 {
|
||||
compatible = "socionext,uniphier-pro4-usb3-reset";
|
||||
reg = <0x40 0x4>;
|
||||
#reset-cells = <1>;
|
||||
clock-names = "gio", "link";
|
||||
clocks = <&sys_clk 12>, <&sys_clk 14>;
|
||||
reset-names = "gio", "link";
|
||||
resets = <&sys_rst 12>, <&sys_rst 14>;
|
||||
};
|
||||
};
|
||||
|
||||
/* FIXME: U-Boot own node */
|
||||
usb0: usb@65b00000 {
|
||||
compatible = "socionext,uniphier-pro4-dwc3";
|
||||
status = "disabled";
|
||||
|
|
@ -452,6 +549,49 @@
|
|||
};
|
||||
};
|
||||
|
||||
_usb1: usb@65c00000 {
|
||||
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
|
||||
status = "disabled";
|
||||
reg = <0x65c00000 0xcd00>;
|
||||
interrupt-names = "host", "peripheral";
|
||||
interrupts = <0 137 4>, <0 138 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb1>;
|
||||
clock-names = "ref", "bus_early", "suspend";
|
||||
clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
|
||||
resets = <&usb1_rst 4>;
|
||||
phys = <&usb_phy3>;
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
usb-glue@65d00000 {
|
||||
compatible = "socionext,uniphier-pro4-dwc3-glue",
|
||||
"simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x65d00000 0x100>;
|
||||
|
||||
usb1_vbus: regulator@0 {
|
||||
compatible = "socionext,uniphier-pro4-usb3-regulator";
|
||||
reg = <0 0x10>;
|
||||
clock-names = "gio", "link";
|
||||
clocks = <&sys_clk 12>, <&sys_clk 15>;
|
||||
reset-names = "gio", "link";
|
||||
resets = <&sys_rst 12>, <&sys_rst 15>;
|
||||
};
|
||||
|
||||
usb1_rst: reset@40 {
|
||||
compatible = "socionext,uniphier-pro4-usb3-reset";
|
||||
reg = <0x40 0x4>;
|
||||
#reset-cells = <1>;
|
||||
clock-names = "gio", "link";
|
||||
clocks = <&sys_clk 12>, <&sys_clk 15>;
|
||||
reset-names = "gio", "link";
|
||||
resets = <&sys_rst 12>, <&sys_rst 15>;
|
||||
};
|
||||
};
|
||||
|
||||
/* FIXME: U-Boot own node */
|
||||
usb1: usb@65d00000 {
|
||||
compatible = "socionext,uniphier-pro4-dwc3";
|
||||
status = "disabled";
|
||||
|
|
@ -478,7 +618,8 @@
|
|||
interrupts = <0 65 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
clocks = <&sys_clk 2>;
|
||||
clock-names = "nand", "nand_x", "ecc";
|
||||
clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
|
||||
resets = <&sys_rst 2>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -156,6 +156,28 @@
|
|||
cache-level = <3>;
|
||||
};
|
||||
|
||||
spi0: spi@54006000 {
|
||||
compatible = "socionext,uniphier-scssi";
|
||||
status = "disabled";
|
||||
reg = <0x54006000 0x100>;
|
||||
interrupts = <0 39 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
clocks = <&peri_clk 11>;
|
||||
resets = <&peri_rst 11>;
|
||||
};
|
||||
|
||||
spi1: spi@54006100 {
|
||||
compatible = "socionext,uniphier-scssi";
|
||||
status = "disabled";
|
||||
reg = <0x54006100 0x100>;
|
||||
interrupts = <0 216 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
clocks = <&peri_clk 11>;
|
||||
resets = <&peri_rst 11>;
|
||||
};
|
||||
|
||||
serial0: serial@54006800 {
|
||||
compatible = "socionext,uniphier-uart";
|
||||
status = "disabled";
|
||||
|
|
@ -475,7 +497,8 @@
|
|||
interrupts = <0 65 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand2cs>;
|
||||
clocks = <&sys_clk 2>;
|
||||
clock-names = "nand", "nand_x", "ecc";
|
||||
clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
|
||||
resets = <&sys_rst 2>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -167,6 +167,28 @@
|
|||
cache-level = <2>;
|
||||
};
|
||||
|
||||
spi0: spi@54006000 {
|
||||
compatible = "socionext,uniphier-scssi";
|
||||
status = "disabled";
|
||||
reg = <0x54006000 0x100>;
|
||||
interrupts = <0 39 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
clocks = <&peri_clk 11>;
|
||||
resets = <&peri_rst 11>;
|
||||
};
|
||||
|
||||
spi1: spi@54006100 {
|
||||
compatible = "socionext,uniphier-scssi";
|
||||
status = "disabled";
|
||||
reg = <0x54006100 0x100>;
|
||||
interrupts = <0 216 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
clocks = <&peri_clk 11>;
|
||||
resets = <&peri_rst 11>;
|
||||
};
|
||||
|
||||
serial0: serial@54006800 {
|
||||
compatible = "socionext,uniphier-uart";
|
||||
status = "disabled";
|
||||
|
|
@ -557,6 +579,103 @@
|
|||
};
|
||||
};
|
||||
|
||||
_usb0: usb@65a00000 {
|
||||
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
|
||||
status = "disabled";
|
||||
reg = <0x65a00000 0xcd00>;
|
||||
interrupt-names = "host", "peripheral";
|
||||
interrupts = <0 134 4>, <0 135 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
|
||||
clock-names = "ref", "bus_early", "suspend";
|
||||
clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>;
|
||||
resets = <&usb0_rst 15>;
|
||||
phys = <&usb0_hsphy0>, <&usb0_hsphy1>,
|
||||
<&usb0_ssphy0>, <&usb0_ssphy1>;
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
usb-glue@65b00000 {
|
||||
compatible = "socionext,uniphier-pxs2-dwc3-glue",
|
||||
"simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x65b00000 0x400>;
|
||||
|
||||
usb0_rst: reset@0 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-reset";
|
||||
reg = <0x0 0x4>;
|
||||
#reset-cells = <1>;
|
||||
clock-names = "link";
|
||||
clocks = <&sys_clk 14>;
|
||||
reset-names = "link";
|
||||
resets = <&sys_rst 14>;
|
||||
};
|
||||
|
||||
usb0_vbus0: regulator@100 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-regulator";
|
||||
reg = <0x100 0x10>;
|
||||
clock-names = "link";
|
||||
clocks = <&sys_clk 14>;
|
||||
reset-names = "link";
|
||||
resets = <&sys_rst 14>;
|
||||
};
|
||||
|
||||
usb0_vbus1: regulator@110 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-regulator";
|
||||
reg = <0x110 0x10>;
|
||||
clock-names = "link";
|
||||
clocks = <&sys_clk 14>;
|
||||
reset-names = "link";
|
||||
resets = <&sys_rst 14>;
|
||||
};
|
||||
|
||||
usb0_hsphy0: hs-phy@200 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-hsphy";
|
||||
reg = <0x200 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy";
|
||||
clocks = <&sys_clk 14>, <&sys_clk 16>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 14>, <&sys_rst 16>;
|
||||
vbus-supply = <&usb0_vbus0>;
|
||||
};
|
||||
|
||||
usb0_hsphy1: hs-phy@210 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-hsphy";
|
||||
reg = <0x210 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy";
|
||||
clocks = <&sys_clk 14>, <&sys_clk 16>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 14>, <&sys_rst 16>;
|
||||
vbus-supply = <&usb0_vbus1>;
|
||||
};
|
||||
|
||||
usb0_ssphy0: ss-phy@300 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-ssphy";
|
||||
reg = <0x300 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy";
|
||||
clocks = <&sys_clk 14>, <&sys_clk 17>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 14>, <&sys_rst 17>;
|
||||
vbus-supply = <&usb0_vbus0>;
|
||||
};
|
||||
|
||||
usb0_ssphy1: ss-phy@310 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-ssphy";
|
||||
reg = <0x310 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy";
|
||||
clocks = <&sys_clk 14>, <&sys_clk 18>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 14>, <&sys_rst 18>;
|
||||
vbus-supply = <&usb0_vbus1>;
|
||||
};
|
||||
};
|
||||
|
||||
/* FIXME: U-Boot own node */
|
||||
usb0: usb@65b00000 {
|
||||
compatible = "socionext,uniphier-pxs2-dwc3";
|
||||
status = "disabled";
|
||||
|
|
@ -575,6 +694,91 @@
|
|||
};
|
||||
};
|
||||
|
||||
_usb1: usb@65c00000 {
|
||||
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
|
||||
status = "disabled";
|
||||
reg = <0x65c00000 0xcd00>;
|
||||
interrupt-names = "host", "peripheral";
|
||||
interrupts = <0 137 4>, <0 138 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
|
||||
clock-names = "ref", "bus_early", "suspend";
|
||||
clocks = <&sys_clk 15>, <&sys_clk 15>, <&sys_clk 15>;
|
||||
resets = <&usb1_rst 15>;
|
||||
phys = <&usb1_hsphy0>, <&usb1_hsphy1>, <&usb1_ssphy0>;
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
usb-glue@65d00000 {
|
||||
compatible = "socionext,uniphier-pxs2-dwc3-glue",
|
||||
"simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x65d00000 0x400>;
|
||||
|
||||
usb1_rst: reset@0 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-reset";
|
||||
reg = <0x0 0x4>;
|
||||
#reset-cells = <1>;
|
||||
clock-names = "link";
|
||||
clocks = <&sys_clk 15>;
|
||||
reset-names = "link";
|
||||
resets = <&sys_rst 15>;
|
||||
};
|
||||
|
||||
usb1_vbus0: regulator@100 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-regulator";
|
||||
reg = <0x100 0x10>;
|
||||
clock-names = "link";
|
||||
clocks = <&sys_clk 15>;
|
||||
reset-names = "link";
|
||||
resets = <&sys_rst 15>;
|
||||
};
|
||||
|
||||
usb1_vbus1: regulator@110 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-regulator";
|
||||
reg = <0x110 0x10>;
|
||||
clock-names = "link";
|
||||
clocks = <&sys_clk 15>;
|
||||
reset-names = "link";
|
||||
resets = <&sys_rst 15>;
|
||||
};
|
||||
|
||||
usb1_hsphy0: hs-phy@200 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-hsphy";
|
||||
reg = <0x200 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy";
|
||||
clocks = <&sys_clk 15>, <&sys_clk 20>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 15>, <&sys_rst 20>;
|
||||
vbus-supply = <&usb1_vbus0>;
|
||||
};
|
||||
|
||||
usb1_hsphy1: hs-phy@210 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-hsphy";
|
||||
reg = <0x210 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy";
|
||||
clocks = <&sys_clk 15>, <&sys_clk 20>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 15>, <&sys_rst 20>;
|
||||
vbus-supply = <&usb1_vbus1>;
|
||||
};
|
||||
|
||||
usb1_ssphy0: ss-phy@300 {
|
||||
compatible = "socionext,uniphier-pxs2-usb3-ssphy";
|
||||
reg = <0x300 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy";
|
||||
clocks = <&sys_clk 15>, <&sys_clk 21>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 15>, <&sys_rst 21>;
|
||||
vbus-supply = <&usb1_vbus0>;
|
||||
};
|
||||
};
|
||||
|
||||
/* FIXME: U-Boot own node */
|
||||
usb1: usb@65d00000 {
|
||||
compatible = "socionext,uniphier-pxs2-dwc3";
|
||||
status = "disabled";
|
||||
|
|
@ -601,7 +805,8 @@
|
|||
interrupts = <0 65 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand2cs>;
|
||||
clocks = <&sys_clk 2>;
|
||||
clock-names = "nand", "nand_x", "ecc";
|
||||
clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
|
||||
resets = <&sys_rst 2>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -144,6 +144,28 @@
|
|||
#size-cells = <1>;
|
||||
ranges = <0 0 0 0xffffffff>;
|
||||
|
||||
spi0: spi@54006000 {
|
||||
compatible = "socionext,uniphier-scssi";
|
||||
status = "disabled";
|
||||
reg = <0x54006000 0x100>;
|
||||
interrupts = <0 39 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
clocks = <&peri_clk 11>;
|
||||
resets = <&peri_rst 11>;
|
||||
};
|
||||
|
||||
spi1: spi@54006100 {
|
||||
compatible = "socionext,uniphier-scssi";
|
||||
status = "disabled";
|
||||
reg = <0x54006100 0x100>;
|
||||
interrupts = <0 216 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
clocks = <&peri_clk 11>;
|
||||
resets = <&peri_rst 11>;
|
||||
};
|
||||
|
||||
serial0: serial@54006800 {
|
||||
compatible = "socionext,uniphier-uart";
|
||||
status = "disabled";
|
||||
|
|
@ -384,6 +406,50 @@
|
|||
efuse@200 {
|
||||
compatible = "socionext,uniphier-efuse";
|
||||
reg = <0x200 0x68>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* USB cells */
|
||||
usb_rterm0: trim@54,4 {
|
||||
reg = <0x54 1>;
|
||||
bits = <4 2>;
|
||||
};
|
||||
usb_rterm1: trim@55,4 {
|
||||
reg = <0x55 1>;
|
||||
bits = <4 2>;
|
||||
};
|
||||
usb_rterm2: trim@58,4 {
|
||||
reg = <0x58 1>;
|
||||
bits = <4 2>;
|
||||
};
|
||||
usb_rterm3: trim@59,4 {
|
||||
reg = <0x59 1>;
|
||||
bits = <4 2>;
|
||||
};
|
||||
usb_sel_t0: trim@54,0 {
|
||||
reg = <0x54 1>;
|
||||
bits = <0 4>;
|
||||
};
|
||||
usb_sel_t1: trim@55,0 {
|
||||
reg = <0x55 1>;
|
||||
bits = <0 4>;
|
||||
};
|
||||
usb_sel_t2: trim@58,0 {
|
||||
reg = <0x58 1>;
|
||||
bits = <0 4>;
|
||||
};
|
||||
usb_sel_t3: trim@59,0 {
|
||||
reg = <0x59 1>;
|
||||
bits = <0 4>;
|
||||
};
|
||||
usb_hs_i0: trim@56,0 {
|
||||
reg = <0x56 1>;
|
||||
bits = <0 4>;
|
||||
};
|
||||
usb_hs_i2: trim@5a,0 {
|
||||
reg = <0x5a 1>;
|
||||
bits = <0 4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -465,6 +531,109 @@
|
|||
};
|
||||
};
|
||||
|
||||
_usb0: usb@65a00000 {
|
||||
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
|
||||
status = "disabled";
|
||||
reg = <0x65a00000 0xcd00>;
|
||||
interrupt-names = "host", "peripheral";
|
||||
interrupts = <0 134 4>, <0 135 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
|
||||
clock-names = "ref", "bus_early", "suspend";
|
||||
clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
|
||||
resets = <&usb0_rst 15>;
|
||||
phys = <&usb0_hsphy0>, <&usb0_hsphy1>,
|
||||
<&usb0_ssphy0>, <&usb0_ssphy1>;
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
usb-glue@65b00000 {
|
||||
compatible = "socionext,uniphier-pxs3-dwc3-glue",
|
||||
"simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x65b00000 0x400>;
|
||||
|
||||
usb0_rst: reset@0 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-reset";
|
||||
reg = <0x0 0x4>;
|
||||
#reset-cells = <1>;
|
||||
clock-names = "link";
|
||||
clocks = <&sys_clk 12>;
|
||||
reset-names = "link";
|
||||
resets = <&sys_rst 12>;
|
||||
};
|
||||
|
||||
usb0_vbus0: regulator@100 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-regulator";
|
||||
reg = <0x100 0x10>;
|
||||
clock-names = "link";
|
||||
clocks = <&sys_clk 12>;
|
||||
reset-names = "link";
|
||||
resets = <&sys_rst 12>;
|
||||
};
|
||||
|
||||
usb0_vbus1: regulator@110 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-regulator";
|
||||
reg = <0x110 0x10>;
|
||||
clock-names = "link";
|
||||
clocks = <&sys_clk 12>;
|
||||
reset-names = "link";
|
||||
resets = <&sys_rst 12>;
|
||||
};
|
||||
|
||||
usb0_hsphy0: hs-phy@200 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-hsphy";
|
||||
reg = <0x200 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy";
|
||||
clocks = <&sys_clk 12>, <&sys_clk 16>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 12>, <&sys_rst 16>;
|
||||
vbus-supply = <&usb0_vbus0>;
|
||||
nvmem-cell-names = "rterm", "sel_t", "hs_i";
|
||||
nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>,
|
||||
<&usb_hs_i0>;
|
||||
};
|
||||
|
||||
usb0_hsphy1: hs-phy@210 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-hsphy";
|
||||
reg = <0x210 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy";
|
||||
clocks = <&sys_clk 12>, <&sys_clk 16>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 12>, <&sys_rst 16>;
|
||||
vbus-supply = <&usb0_vbus1>;
|
||||
nvmem-cell-names = "rterm", "sel_t", "hs_i";
|
||||
nvmem-cells = <&usb_rterm1>, <&usb_sel_t1>,
|
||||
<&usb_hs_i0>;
|
||||
};
|
||||
|
||||
usb0_ssphy0: ss-phy@300 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-ssphy";
|
||||
reg = <0x300 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy";
|
||||
clocks = <&sys_clk 12>, <&sys_clk 17>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 12>, <&sys_rst 17>;
|
||||
vbus-supply = <&usb0_vbus0>;
|
||||
};
|
||||
|
||||
usb0_ssphy1: ss-phy@310 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-ssphy";
|
||||
reg = <0x310 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy";
|
||||
clocks = <&sys_clk 12>, <&sys_clk 18>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 12>, <&sys_rst 18>;
|
||||
vbus-supply = <&usb0_vbus1>;
|
||||
};
|
||||
};
|
||||
|
||||
/* FIXME: U-Boot own node */
|
||||
usb0: usb@65b00000 {
|
||||
compatible = "socionext,uniphier-pxs3-dwc3";
|
||||
status = "disabled";
|
||||
|
|
@ -483,6 +652,101 @@
|
|||
};
|
||||
};
|
||||
|
||||
_usb1: usb@65c00000 {
|
||||
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
|
||||
status = "disabled";
|
||||
reg = <0x65c00000 0xcd00>;
|
||||
interrupt-names = "host", "peripheral";
|
||||
interrupts = <0 137 4>, <0 138 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
|
||||
clock-names = "ref", "bus_early", "suspend";
|
||||
clocks = <&sys_clk 13>, <&sys_clk 13>, <&sys_clk 13>;
|
||||
resets = <&usb1_rst 15>;
|
||||
phys = <&usb1_hsphy0>, <&usb1_hsphy1>,
|
||||
<&usb1_ssphy0>;
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
usb-glue@65d00000 {
|
||||
compatible = "socionext,uniphier-pxs3-dwc3-glue",
|
||||
"simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x65d00000 0x400>;
|
||||
|
||||
usb1_rst: reset@0 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-reset";
|
||||
reg = <0x0 0x4>;
|
||||
#reset-cells = <1>;
|
||||
clock-names = "link";
|
||||
clocks = <&sys_clk 13>;
|
||||
reset-names = "link";
|
||||
resets = <&sys_rst 13>;
|
||||
};
|
||||
|
||||
usb1_vbus0: regulator@100 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-regulator";
|
||||
reg = <0x100 0x10>;
|
||||
clock-names = "link";
|
||||
clocks = <&sys_clk 13>;
|
||||
reset-names = "link";
|
||||
resets = <&sys_rst 13>;
|
||||
};
|
||||
|
||||
usb1_vbus1: regulator@110 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-regulator";
|
||||
reg = <0x110 0x10>;
|
||||
clock-names = "link";
|
||||
clocks = <&sys_clk 13>;
|
||||
reset-names = "link";
|
||||
resets = <&sys_rst 13>;
|
||||
};
|
||||
|
||||
usb1_hsphy0: hs-phy@200 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-hsphy";
|
||||
reg = <0x200 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy", "phy-ext";
|
||||
clocks = <&sys_clk 13>, <&sys_clk 20>,
|
||||
<&sys_clk 14>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 13>, <&sys_rst 20>;
|
||||
vbus-supply = <&usb1_vbus0>;
|
||||
nvmem-cell-names = "rterm", "sel_t", "hs_i";
|
||||
nvmem-cells = <&usb_rterm2>, <&usb_sel_t2>,
|
||||
<&usb_hs_i2>;
|
||||
};
|
||||
|
||||
usb1_hsphy1: hs-phy@210 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-hsphy";
|
||||
reg = <0x210 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy", "phy-ext";
|
||||
clocks = <&sys_clk 13>, <&sys_clk 20>,
|
||||
<&sys_clk 14>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 13>, <&sys_rst 20>;
|
||||
vbus-supply = <&usb1_vbus1>;
|
||||
nvmem-cell-names = "rterm", "sel_t", "hs_i";
|
||||
nvmem-cells = <&usb_rterm3>, <&usb_sel_t3>,
|
||||
<&usb_hs_i2>;
|
||||
};
|
||||
|
||||
usb1_ssphy0: ss-phy@300 {
|
||||
compatible = "socionext,uniphier-pxs3-usb3-ssphy";
|
||||
reg = <0x300 0x10>;
|
||||
#phy-cells = <0>;
|
||||
clock-names = "link", "phy", "phy-ext";
|
||||
clocks = <&sys_clk 13>, <&sys_clk 21>,
|
||||
<&sys_clk 14>;
|
||||
reset-names = "link", "phy";
|
||||
resets = <&sys_rst 13>, <&sys_rst 21>;
|
||||
vbus-supply = <&usb1_vbus0>;
|
||||
};
|
||||
};
|
||||
|
||||
/* FIXME: U-Boot own node */
|
||||
usb1: usb@65d00000 {
|
||||
compatible = "socionext,uniphier-pxs3-dwc3";
|
||||
status = "disabled";
|
||||
|
|
@ -509,7 +773,8 @@
|
|||
interrupts = <0 65 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
clocks = <&sys_clk 2>;
|
||||
clock-names = "nand", "nand_x", "ecc";
|
||||
clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
|
||||
resets = <&sys_rst 2>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -63,6 +63,17 @@
|
|||
cache-level = <2>;
|
||||
};
|
||||
|
||||
spi: spi@54006000 {
|
||||
compatible = "socionext,uniphier-scssi";
|
||||
status = "disabled";
|
||||
reg = <0x54006000 0x100>;
|
||||
interrupts = <0 39 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
clocks = <&peri_clk 11>;
|
||||
resets = <&peri_rst 11>;
|
||||
};
|
||||
|
||||
serial0: serial@54006800 {
|
||||
compatible = "socionext,uniphier-uart";
|
||||
status = "disabled";
|
||||
|
|
@ -385,7 +396,8 @@
|
|||
interrupts = <0 65 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand2cs>;
|
||||
clocks = <&sys_clk 2>;
|
||||
clock-names = "nand", "nand_x", "ecc";
|
||||
clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
|
||||
resets = <&sys_rst 2>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in a new issue