When building this with clang, we get a warning about having excess
parenthesis here, or that we're incorrectly using "==" when we want "=".
Correct these by using the common size macro.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Andre: Use SZ_512M as per Simon's suggestion]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far we have a convoluted #ifdef mesh that guards the early AXP PMIC
setup in board.c. That combination of &&, || and negations is very hard
to read, maintain and especially to extend.
Fortunately we have those same conditions already modelled in the
Kconfig file, so they are actually redundant. On top of that the real
reason we have those preprocessor guards in the first place is about the
symbols that are *conditionally* defined: without #ifdefs the build
would break because of them being undefined for many boards.
To simplify this, just change the guards to actually look at the symbols
needed, so CONFIG_AXP_xxx_VOLT instead of CONFIG_AXPyyy_POWER.
This drastically improves the readability of this code, and makes adding
PMIC support a pure Kconfig matter.
Doing this revealed one bug in Kconfig: there is no axp_set_dcdc4() for
the AXP818, even though CONFIG_AXP_DCDC4_VOLT includes that PMIC.
Since the AXP818 wasn't included when calling axp_set_dcdc4() in board.c,
this wasn't an issue, but becomes one now, so also remove the AXP818 from
the DCDC4 Kconfig symbol.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The build instructions for the hikey960 had some broken links. Update
the links to use new vendor URLs. Also change build instructions to
reference a different file name.
Signed-off-by: Dylan Corrales <deathcamel58@gmail.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
- Fix some issues Coverity has reported, update MAINTAINERS file,
another bootstd fix, typo fix in error message, gitignore fix and
update TI's URL in many places.
It's happened that glitches on the STM32_RST and STM32_BOOT lines have
put the STM32 companion microcontroller into DFU mode making it not boot
its FW, rendering it useless for the user.
Considering that the STM32 companion microcontroller is always reset on
a reboot or power cycle, resetting it once again in U-Boot SPL isn't
going to hurt it any more.
For ATtiny companion microcontroller, the situation is a bit different
because a reboot or power cycle doesn't reset it. Additionally, since it
can only be reset with a UPDI reset on the STM32_RST line, and that is
virtually impossible to mistakenly trigger, the ATtiny is unlikely to be
in unwanted reset or enter reset because U-Boot toggles STM32_RST line.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
QuartzPro64 is a Rockchip RK3588 based SBC by Pine64.
UART and boot over SD/eMMC/RJ45 are tested to work.
Linux commits from next-20231013:
8152d3d070a9 ("arm64: dts: rockchip: Add QuartzPro64 SBC device tree")
Signed-off-by: Tom Fitzhenry <tom@tom-fitzhenry.me.uk>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Cc: Eugen Hristev <eugen.hristev@collabora.com>
Cc: Jonas Karlman <jonas@kwiboo.se>
Cc: Ondrej Jirman <megi@xff.cz>
The migration deadline for moving to DM_SCSI was v2023.04. A further
reminder was sent out in August 2023 to the remaining platforms that had
not migrated already, and that a few more over the line (or configs
deleted).
With this commit we:
- Rename CONFIG_DM_SCSI to CONFIG_SCSI.
- Remove all of the non-DM SCSI code. This includes removing other
legacy symbols and code and removes some legacy non-DM AHCI code.
- Some platforms that had previously been DM_SCSI=y && SCSI=n are now
fully migrated to DM_SCSI as a few corner cases in the code assumed
DM_SCSI=y meant SCSI=y.
Signed-off-by: Tom Rini <trini@konsulko.com>
As we call sprintf in this file we need to include vsprintf.h in order
to get the function prototype and we need linux/string.h for strcmp.
Signed-off-by: Tom Rini <trini@konsulko.com>
As we call sprintf in this file we need to include vsprintf.h in order
to get the function prototype and we need linux/string.h for strcmp.
Signed-off-by: Tom Rini <trini@konsulko.com>
Given that this file references CFG_* defines, we need to be explicit in
our inclusion of config.h, so that these will be defined.
Reviewed-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitacienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Rather than selecting CMD_QFW, we should make the option itself by
enabled by default on these platforms. Then in the board-specific
Kconfig we should select the appropriate back-end as needed if the
command is enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
This adds support for the Inteno XG6846 board based on the
Broadcom MIPS 6328 SoC.
The default boot will read a uImage from flash and boot it.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Move ASUS Transformers, Grouper, P895 and P880 config fragments into
their respective device directory in /board/../configs/
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Remove nvidia_board_late_init calls from board since this setup is
performed in board2 of mach-tegra. Call of nvidia_board_late_init
from within the board does not provide any additional data.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Transformer T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Default configuration matches values which are set in the board
so this configuration is not required.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
JTAG pins are mapped as below. To access the JTAG pins, we need to
control the GPIO pins from SPL which seems to be the earliest stage for
JTAG.
- JTAG nTRST: GPIO36 / Input
- JTAG TDI: GPIO61 / Input
- JTAG TMS: GPIO63 / Input
- JTAG TCK: GPIO60 / Input
- JTAG TDO: GPIO44 / Output
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
1. Fix incorrect ram size of 4GB dram with ECC enabled
2. Fix wrong place to set dram bank size
- The dram bank size should be set in dram_init_banksize
- Dram_init should not access gd->bd because the board info
struct is not reserved yet.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
[trini: Rework slightly]
Signed-off-by: Tom Rini <trini@konsulko.com>
Similar change was done by commit b4c2c151b1 ("Kconfig: Remove all
default n/no options") and again sync is required.
default n/no doesn't need to be specified. It is default option anyway.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Angelo Dureghello <angelo@kernel-space.org>
The SynQuacer Developerbox, in EFI mode, supports A/B capsule
updates and single image ones. The flash layout in the latter case is
outdated, update it with the new offsets and images
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-By: Masahisa Kojima <masahisa.kojima@linaro.org>
The "simpler" the logic, the higher the probability to not test and get
things wrong, again: The absence of a "-PG2" suffix is not sufficient to
derive that we are on PG1. There is also "IOT2050-ADVANCED-M2".
Finally fix that by exactly matching against the two PG1 device names.
While changing this, we can also drop the not really needed check for
!board_is_sr1 in board_is_m2 and call the boards by their names
("board_is_pg1").
Reported-and-tested-by: Bao Cheng Su <baocheng.su@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Extend Turris Mox board code to support CZ.NIC's RIPE Atlas Probe.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Michal Simek <michal.simek@amd.com>
We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
- Add Board: rk3588 NanoPC-T6, Orange Pi 5, Orange Pi 5 Plus;
- clk driver fix for rk3568 and rk3588;
- rkmtd cmd support for rockchip nand device;
- dts update and sync from linux;
Xunlong Orange Pi 5 Plus is a single-board computer based on the
Rockchip RK3588 SoC. The board provides abundant interfaces, including
two HDMI output ports, one HDMI input port, two 2.5G Ethernet ports,
M.2 M-Key slot, M.2 E-Key slot, two USB 3.0, two USB 2.0, and two Type-C.
Features tested on a Orange Pi 5 Plus 4GB v1.2:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe
- USB 2.0 host
- Ethernet
Device tree is imported from linux v6.7-rockchip-dts64-1 tag.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Xunlong Orange Pi 5 is a single-board computer based on the Rockchip
RK3588S SoC. The board provides abundant interfaces, HDMI output, GPIO
interface, M.2 PCIe2.0, Type-C, Gigabit LAN port, 2*USB2.0, 1*USB3.0,
etc.
Features tested on a Orange Pi 5 4GB v1.2:
- SD-card boot
- SPI Flash boot
- PCIe/NVMe
- USB 2.0 host
- Ethernet
Device tree is imported from linux v6.7-rockchip-dts64-1 tag.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
-----BEGIN PGP SIGNATURE-----
iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmU2fxwcHGV1Z2VuLmhy
aXN0ZXZAY29sbGFib3JhLmNvbQAKCRAesx4CDqwvyKr+B/42+WkPiAiwt79R6Kh5
UKo404oN1na28D3V12EvikiCH2QWubi38EV7VfcB3jqEpxj4j+rY0cSLZv+u7d4/
bfQN3FPrcTwYnXYLbYkUKC+MAVzGLiVzFBBhIt5cPrT4iVXctwYY6LJ58aX8uRo6
KU6CwXYc3cnmIUqpXE4EYbbQU4TAp55SV2n8QLFFI9DHcy2kELfdrZduFn+Hm9Ij
9sQHH5JxbrGHv5XpcjJkARW3M4K3K4TPzweFGN61VMJwWqzD3L4YPshwIGDfhRui
LECKCdr/rWkavumXCfw2pD3RYFTqnqnUzaEN/3ueL9FCJ2uFH1EyaoSuXFEn3+Ul
m1LE
=CMMd
-----END PGP SIGNATURE-----
Merge tag 'u-boot-at91-2024.01-b' of https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 features for the 2024.01 cycle
This feature set a new board named Conclusive KSTR sama5d27 with some
small prerequisites patches.
This is mostly about support for the Allwinner R528/T113s SoC, which is
reportedly the same die as the Allwinner D1, but with the two
Arm Cortex-A7 cores activated instead of the RISC-V one.
Using sunxi code outside of arch/arm proved to be difficult, so apart
from enabling this Arm SoC, the patches also prepare for more refactoring
to get the D1 nicely supported some day:
- We get rid of some Kconfig (hard-)coded GPIO pins, responsible for
enabling regulators.
- The GPIO code is moved out of arch/arm, into drivers/gpio.
- Some definitions are moved out of header files under asm/arch.
- Some T113s/D1 specific definitions are guarded by a generic Kconfig
symbol (CONFIG_SUNXI_GEN_NCAT2).
- The DRAM controller initialisation code is located under drivers/ram.
- The base SoC .dtsi files are shared (under arch/riscv, as in Linux).
Of course there are also the usual new SoC specific patches, like clock
and pinmux descriptions, alongside a rework of the pinctrl code, since
Allwinner changed the GPIO register layout, for the first time since
sunxi's inception.
On top of this the PSCI code sees some update, to provide SMP services
for R528/T113s boards. Many thanks to Sam for providing this code and
staying strong through the review cycles.
The final patch enables support for one popular board, I hope to see
more DTs and defconfigs contributed in the future!
Many thanks to all the various contributors, testers and reviewers,
that series was a real team effort!
Introduce support for Conclusive KSTR-SAMA5D27 Single Board Computer.
Co-developed-by: Jakub Klama <jakub@conclusive.pl>
Signed-off-by: Jakub Klama <jakub@conclusive.pl>
Co-developed-by: Marcin Jabrzyk <marcin@conclusive.pl>
Signed-off-by: Marcin Jabrzyk <marcin@conclusive.pl>
Signed-off-by: Artur Rojek <artur@conclusive.pl>
The NanoPC-T6 is a Rockchip RK3588 based SBC by FriendlyElec.
There are four variants depending on the DRAM size: 4G/32GB eMMC,
8G/64GB eMMC, 16G/16MB SPI NOR, and 16G/256GB eMMC/16MB SPI NOR
Specifications:
CPU: Rockchip RK3588, 4x Cortex-A76 (up to 2.4GHz)
+ 4x Cortex-A55 (up to 1.8GHz)
GPU: Mali-G610 MP4
VPU: 8K@60fps H.265 and VP9 decoder, 8K@30fps H.264 decoder,
4K@60fps AV1 decoder, 8K@30fps H.264 and H.265 encoder
NPU: 6TOPs, supports INT4/INT8/INT16/FP16
RAM: 64-bit 4GB/8GB/16GB LPDDR4X at 2133MHz
eMMC: 0GB/32GB/64GB/256GB HS400
MicroSD Slot: MicroSD SDR104
PCIe 3.0: M.2 M-Key x1, PCIe 3.0 x4 for NVMe SSDs up to 2,500 MB/s
Ethernet: PCIe 2.5G 2x Ethernet (RTL8125BG)
PCIe 2.1: M.2 E-Key x1, PCIe 2.1 x1 and USB2.0 Host,
supports M.2 WiFi and Bluetooth
4G Module: MiniPCIe x1, MicroSIM Card Slot x1
Audio Out: 3.5mm jack for stereo headphone output
Audio In: 2.0mm PH-2A connector for analog microphone input
Video Input: standard HDMI input port, up to 4Kp60
2x 4-lane MIPI-CSI, compatible with MIPI V1.2
Video Output: 2x standard HDMI output ports compatible with HDMI2.1,
HDMI2.0, and HDMI1.4
2x 4-lane MIPI-DSI, compatible with MIPI DPHY 2.0 or CPHY 1.1
USB-A: USB 3.0, Type A
USB-C: Full function USB Type‑C port, DP display up to 4Kp60, USB 3.0
40-pin 2.54mm header connector: up to 2x SPIs, 6x UARTs, 1x I2Cs,
8x PWMs, 2x I2Ss, 28x GPIOs
Debug UART: 3 Pin 2.54mm header, 3V level, 1500000bps
Onboard IR receiver: 38KHz carrier frequency
RTC Battery: 2 Pin 1.27/1.25mm RTC battery connector for low power
RTC IC HYM8563TS
5V Fan connector
Working Temperature: 0C to 70C
Power: 5.5*2.1mm DC Jack, 12VDC input
Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case)
Kernel commits:
893c17716d0c ("arm64: dts: rockchip: Add NanoPC T6")
a721e28dfad2 ("arm64: dts: rockchip: Add NanoPC T6 PCIe Ethernet support")
ac76b786cc37 ("arm64: dts: rockchip: Add NanoPC T6 PCIe e-key support")
Signed-off-by: John Clark <inindev@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for eMMC (SMHC2) pin pull ups for R528 boards.
The D1 and T113s (and even R329) SoCs do not support 8-bit eMMC anymore,
so it's just four data pins to cover here.
Signed-off-by: Okhunjon Sobirjonov <Okhunjon.Sobirjonov@Mec-electronics.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: adjust commit message]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code
to more easily include platform specific GPIO headers. This should not
be needed in a DM world anymore, since the generic GPIO framework
handles that nicely.
For Allwinner boards we still need to deal with non-DM GPIO in the SPL,
but this should become the exception, not the rule.
Make this more obvious by removing the definition of GPIO_EXTRA_HEADER,
and just force every legacy user of platform specific GPIO to include
the new sunxi_gpio.h header explicitly. Everyone doing so should feel
ashamed and should find a way to avoid it from now on.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Samuel Holland <samuel@sholland.org>
The CONFIG_MACPWR Kconfig symbol is used to point to a GPIO that enables
the power for the Ethernet "MAC" (mostly PHY, really).
In the DT this is described with the phy-supply property in the MAC DT
node, pointing to a (GPIO controlled) regulator. Since we need Ethernet
only in U-Boot proper, and use a DM driver there, we should use the DT
instead of hardcoding this.
Add code to the sun8i_emac and sunxi_emac drivers to check the DT for
that regulator and enable it, at probe time. Then drop the current code
from board.c, which was doing that job before.
This allows us to remove the MACPWR Kconfig definition and the respective
values from the defconfigs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
The CONFIG_SATAPWR Kconfig symbol was used to point to a GPIO that
enables the power for a SATA harddisk.
In the DT this is described with the target-supply property in the AHCI
DT node, pointing to a (GPIO controlled) regulator. Since we need SATA
only in U-Boot proper, and use a DM driver for AHCI there, we should use
the DT instead of hardcoding this.
Add code to the sunxi AHCI driver to check the DT for that regulator and
enable it, at probe time. Then drop the current code from board.c, which
was doing that job before.
This allows us to remove the SATAPWR Kconfig definition and the
respective values from the defconfigs.
We also select the generic fixed regulator driver, which handles those
GPIO controlled regulators.
Please note that the OrangePi Plus is a bit special here, it's a H3
board without native SATA, but with a USB-to-SATA bridge. The DT models
the SATA power via a VBUS supply regulator, which we don't parse yet in
the USB PHY driver. Use the hardcoded CONFIG_USB3_VBUS_PIN for that
board meanwhile.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Originally, u-boot SPL will place the DTB directly after the kernel,
but the size of the kernel does not include the BSS section, This
means that u-boot SPL places the DTB in the kernel BSS section causing
the DTB to be cleared by the kernel BSS initialisation.
Moving the DTB in front of the kernel can avoid this error.
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Introduce two new weak functions, arch_spl_mmc_get_uboot_raw_sector() and
board_spl_mmc_get_uboot_raw_sector(), each of which can be overridden at
a matching level, that is arch/ and board/ , in addition to the existing
weak function spl_mmc_get_uboot_raw_sector().
This way, architecture code can define a default architecture specific
implementation of arch_spl_mmc_get_uboot_raw_sector(), while the board
code can override that using board_spl_mmc_get_uboot_raw_sector() which
takes precedence over the architecture code. In some sort of unlikely
special case where code has to take precedence over board code too, the
spl_mmc_get_uboot_raw_sector() is still left out to be a weak function,
but it should be unlikely that this is ever needed to be overridden.
Signed-off-by: Marek Vasut <marex@denx.de>
The Renesas RZ/G2L SMARC Evaluation Board Kit consists of the RZ/G2L
System-on-Module (SOM) based on the R9A07G044L2 SoC, and a common SMARC
carrier board.
The ARM TrustedFirmware code for the Renesas RZ/G2L SoC family passes a
devicetree blob to the bootloader as an argument in the same was
previous R-Car gen3/gen4 SoCs. This blob contains a compatible string
which can be used to identify the particular SoC we are running on and
this is used to select the appropriate device tree to load.
The configuration renesas_rzg2l_smarc_defconfig is added to support
building for this target. In the future this defconfig will be extended
to support other SoCs and evaluation boards from the RZ/G2L family.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The current imx8mp-dhcom-som.dtsi describes production rev.200 SoM,
add DT overlay which reinstates rev.100 SoM description to permit
prototype rev.100 SoMs to be used until they get phased out.
Signed-off-by: Marek Vasut <marex@denx.de>
Add DT overlays to support additional DH i.MX8MP DHCOM SoM 660-100
population options with 1x or 2x RMII PHY mounted on PDK2 or PDK3
carrier boards.
Use SPL DTO support to apply matching SoM specific DTO to cater
for the SoM differences. Remove ad-hoc patching of control DT from
fdtdec_board_setup().
Signed-off-by: Marek Vasut <marex@denx.de>
- Generally we just drop the #ifdef CONFIG_SYS_LONGHELP and endif lines
and use U_BOOT_LONGHELP to declare the same variable name as before
- In a few places, either rename the variable to follow convention or
introduce the variable as it was being done inline before.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If the data version field of the EEPROM is not supported, provide a hexdump
of the data.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The different implementations of the mac command have board or vendor
specific sub-commands.
Add the command definition specific to the VisionFive 2 board.
Don't call cmd_usage() directly but return CMD_RET_USAGE instead.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The different implementations of the mac command have board or vendor
specific sub-commands.
Add the command definition specific to the SiFive HiFive Unmatched board.
Don't call cmd_usage() directly but return CMD_RET_USAGE instead.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
CONFIG_SYS_LONGHELP=n we want to reduce the size of the U-Boot binary.
The long text should be reduced to and empty string in this case.
There is not need to call cmd_usage() directly. It is sufficient to
return CMD_RET_USAGE.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Board specific implementations of the 'mac' command differ concerning the
supported sub-commands.
Move the Freescale specific mac command definition to the board code.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Handle 2GBit memory size value "2" from tlv eeprom on ddr
initialisation, to support SoMs with 512MB ddr memory.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Extend the existing tlv vendor extension used for ram size by one byte to
also store the number of ddr channels.
The length of the tlv entry can indicate whether the new information is
present. If not default to single channel.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Starting with PCB revision 3 we can safely make use of higher RAM
frequency again. Make use of the EEPROM detection to determine the
revision and use the updated RAM timings for new SoMs.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Yannic Moog <y.moog@phytec.de>
Add EEPROM detection initialisation for phyCORE-i.MX8MM and
print SoM information during boot when successful.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Yannic Moog <y.moog@phytec.de>
Add helper function to read out the PCB revision of a PHYTEC SoM.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Yannic Moog <y.moog@phytec.de>
Due to PCB layout constraints in PCB revisions until including 1549.2,
a RAM frequency of 2 GHz can cause rare instabilities. Set the RAM
frequency to 1.5 GHz to achieve a stable system under all conditions.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Yannic Moog <y.moog@phytec.de>
Add imx8m specific detection part. Which includes checking the
EEPROM data for article number options.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Yannic Moog <y.moog@phytec.de>
Recent shipped PHYTEC SoMs come with an i2c EEPROM containing
information about the hardware such as board revision and variant.
This can be used for RAM detection and loading device tree overlays
during kernel start.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Yannic Moog <y.moog@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
ZyXEL NSA325 specifications:
Marvell Kirkwood 88F6282 SoC
1.6 GHz CPU
1x GBE LAN port (Marvell MV88E1318)
512 MB RAM
128 MB Eon NAND, SLC
I2C
1x USB 3.0 (on PCIe bus)
2x USB 2.0
2x SATA (hot swap slots)
Serial console
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The 2nd HD is not enabled in U-Boot on the D-Link DNS325. This patch
sets the responsible GPIO to high, enabling the drive.
Suggested-by: Peter Granilla
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
When using a list of writeable variables, the initial values come
from the built-in default environment since commit 5ab8105836 ("env:
Complete generic support for writable list").
Remove unnecessary misuse of CONFIG_ENV_IS_NOWHERE as default environment.
Based on the fix done by commit b16fd7f75f ("imx6q: acc: Remove misuse
of env is nowhere driver").
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Add detection of eMMC vs NAND devices on the Colibri iMX7
board. A GPIO is configured to detect the presence of an on-board resistor
that is configured differently based on the flash memory used. Depending on
the detection result, the 'variant' environment variable is set to '-emmc'
or cleared, indicating the type of storage device.
This enhancement improves variant detection during system initialization
through USB recovery mode, where U-Boot is loaded directly to RAM. This
allows variant detection for an accurate device tree selection.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Update lpddr4 configuration and training using updated spreadsheet and
tools from NXP using data from previous spreadsheet and verified
toward datasheet:
- MX8M_Mini_LPDDR4_RPA_v22.xlsx
- mscale_ddr_tool_v3.31_setup.exe
The most relevant update is related to errata ERR050805:
"DRAM: Controller automatic derating logic may not work when
the LPDDR4 memory temperature is above 85 °C at initialization"
Other relevant fixes:
- DRAMTMG7 register: corrected calculation of T_CKPDX parameter
(equal to tCKCKEH for LPDDR4)
- RANKCTL register: corrected calculations for ODTLon and ODTLoff
to follow the JEDEC specification
- ADDRMAP7 register: added support for 17-row devices
As per errata ERR050805:
An issue exists with the automatic derating logic of the DDR
controller that only samples the LPDDR4 MR4 register when the
Temperature Update Flag (TUF) field (MR4[7] ) is 1’b1. If the
LPDDR4 memory is initialized and starts operation above 85 °C
(MR4[2:0] > 3’b011), the MR4 Temperature Update Flag (TUF) will
not be set. The DDR Controller will therefore not automatically
adjust the memory refresh rate or de-rate memory timings based
on the LPDDR4 memory temperature. This may cause the controller
incorrectly setting the refresh period, potentially cause the
LPDDR4 memory losing data contents and lead to possible data
integrity issues above 85 °C.
Errata provides three possible workaround options, while option 2
is the most reasonable:
Disable the automatic derating logic of the DDR controller and
apply fixed x2 refresh rate (0.5x refresh). This option is
suitable for designs that are expected to boot at or above 85 °C
and memory’s MR4[2:0] (Refresh Rate) DOES NOT report the following
conditions:
3b101: 0.25x refresh, no de-rating
3b110: 0.25x refresh, with de-rating
3b111: SDRAM High temperature operating limit exceeded
[1]: https://www.nxp.com/docs/en/errata/IMX8MM_0N87W.pdf
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Update the imx8mp-venice-gw74xx for revB:
- add CAN1
- add TIS-TPM on SPI2
- add FAN controller
- fix PMIC I2C bus (revA PMIC I2C was non-functional so no need for
backward compatible option)
- M2 socket GPIO's moved
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
clk:
- remove additional compatible strings for Versal NET
net:
- zynq_gem: Fix clock calculation for MDC for higher frequencies
pinctrl:
- core: Extend pinmux status buffere size
- zynqmp driver: Show also tristate configuration
test:
- add test case for pxe get
Xilinx:
- describe SelectMAP boot mode
Zynq:
- Fix nand description in DT
ZynqMP:
- DTS sync patches with kernel and also W=1 related fixes
- Add support for KD240, zcu670, e-a2197 with x-prc cards, SC revB/C with i2c
description for other SC based boards
- k24 psu_init cleanup
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZSjvwAAKCRDKSWXLKUoM
IR34AJ92oum3pJXKxKREEZh0dCfDvJlE/wCggyzxI2T5liJfRG5jzlUuDjiLLU0=
=u1bz
-----END PGP SIGNATURE-----
Merge tag 'xilinx-for-v2024.01-rc1-v3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2024.01-rc1 v3
clk:
- remove additional compatible strings for Versal NET
net:
- zynq_gem: Fix clock calculation for MDC for higher frequencies
pinctrl:
- core: Extend pinmux status buffere size
- zynqmp driver: Show also tristate configuration
test:
- add test case for pxe get
Xilinx:
- describe SelectMAP boot mode
Zynq:
- Fix nand description in DT
ZynqMP:
- DTS sync patches with kernel and also W=1 related fixes
- Add support for KD240, zcu670, e-a2197 with x-prc cards, SC revB/C with i2c
description for other SC based boards
- k24 psu_init cleanup
Update the MAINTAINERS file and propose a new MAINTAINER for j721s2 due
to the previous MAINTAINER not being associated with TI.
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Switch to using bootstd. Note with this change, we will stop using
distro_bootcmd and instead depend entirely on bootflow method of
starting the system up.
Drop header files that are no longer needed in am64x_evm.h.
k3_dfu.h is available via k3_dfu.env in am64x.env.
Drop unused macro CFG_SYS_SDRAM_BASE1.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
ti_mmc is not a valid boot_target for standard boot flow so
remove it. Prefer mmc1 (sd-card) over mmc0 (emmc).
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
This caused the wrong fdtfile to be set and was failing to apply M.2
settings.
Fixes: badaa1f6a7 ("boards: siemens: iot2050: Unify PG1 and PG2/M.2 configurations again")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Added new xenguest_arm64_virtio_defconfig which
enables support for virtio-blk using various types
of transport like virtio-pci, vrtio-mmio. Currently
supported: up to 2 PCI host bridges and 10 MMIO devices.
Note: DT parsing code was partly taken from pci-uclass.c
Limitation: All memory regions should be
below 4GB address space.
Signed-off-by: Andrii Chepurnyi <andrii_chepurnyi@epam.com>
Current gd->ram_size and gd->ram_top reflect only the
first DRAM bank even if the SynQuacer Developerbox could
have up to three DRAM banks.
With the commit 06d514d77c ("lmb: consider EFI memory map"),
the first DRAM bank indicates <4GB address, so whole >4GB memory
is marked as EFI_BOOT_SERVICES_DATA and it results that
U-Boot can not access >4GB memory.
Since 64-bits DRAM address is fully available on the SynQuacer
Developerbox, let's set the installed DIMM information to
gd->ram_top and gd->ram_size.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Populate the device tree with the MC reserved memory regions.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Populate the device tree with the MC reserved memory regions.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for declaring in device tree the reserved memory ranges
required for MC. Since the MC firmware acts as any DMA master present
in the SoC, the reserved memory ranges need also be identity mapped
in the SMMU, so create the required 'iommu-addresses' property in
the reserved memory nodes.
For now this support is used only on LX2160A SoCs.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
PPA was a secure firmware developed in-house which is no longer
supported and replaced by TF-A quite some years ago. Drop support
for it.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
String "/soc/fman/ethernet@e8000" is 25 bytes long
and not 24 due to extra byte for null character at
the end.
Signed-off-by: Francois Berder <fberder@outlook.fr>
- None of the callers perform error checking and based on the non-empty
versions of this function, there's no checking to be done, so make
this a void.
- Add a default weak version of the function.
- Remove the empty versions of exynos_init now that we have a weak
version.
Signed-off-by: Tom Rini <trini@konsulko.com>
As part of reviewing a new platform, Daniel Schwierzeck noted that we
can have an empty Makefile in the board directory and don't need an
empty board.c file as well. Further with further cleanup in the
Makefile we can now omit the Makefile entirely. Remove a number of now
unnecessary board.c and Makefiles.
Signed-off-by: Tom Rini <trini@konsulko.com>
The SelectMAP configuration interface provides an 8-bit,
16-bit or 32-bit bidirectional data bus interface to the Versal FPGA
configuration logic that can be used for both configuration and readback.
A connected microcontoller to the SelectMAP interface can load boot
image with bitstream, TF-A (ARM Trusted Firmware) and U-Boot.
This commit adds the missing identification of the SelectMAP mode.
Signed-off-by: Polak, Leszek <LPolak@arri.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Stefan Roese <sr@denx.de>
Link: https://lore.kernel.org/r/DU0PR07MB8419F7765892CDBCE7D559C5C8CFA@DU0PR07MB8419.eurprd07.prod.outlook.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add Bananapi R2 Pro board.
tested:
- sdcard
- both front usb-ports
- sata
- wan-port
lan-ports are connected to mt7531 switch where driver needs to be
separated from mtk ethernet-driver.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Add a minimal generic RK3566/RK3568 board that only have eMMC and SDMMC
enabled. This defconfig can be used to boot from eMMC or SD-card on most
RK3566/RK3568 boards that follow reference board design.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
+ ae350: modify memory layout and target name
+ ae350: use generic RISC-V timer driver in S-mode
+ Support bootstage report for RISC-V
+ Support C extension exception command for RISC-V
+ Add Starfive timer support
_ alignment with kernel DT v6.5 for stm32f429 and stm32f746
_ rework way of displaying ST logo for stm32f746-disco and stm32f769-disco
STM32 MPU:
_ alignment with kernel DT v6.6-rc1
_ add RNG support for stm32mp13
_ add USB, USB boot and stm32prog command support for stm32mp13
_ add support of USART1 clock for stm32mp1
_ only print RAM and board code with SPL_DISPLAY_PRINT flag for
stm32mp1
_ rename update_sf to dh_update_sd_to_sf and add dh_update_sd_to_emmc
for stm32mp15xx DHCOR
-----BEGIN PGP SIGNATURE-----
iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmUdaJccHHBhdHJpY2Uu
Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/ptHxEACdibF5EoRb40qhQCWB
mwW50s76xWOyHGOGjSe3l18zxPdBjQ+9rnT8/A+mjaa8he4kMX9EZJyYRogcz7eR
QcnSeu9Q4L8bKbqnPBOpKF6TN7rFOIUcu+BWp3o8jZ+7/q7OSJrVLsjbXtCuCLnB
q5Pie/in7hmHJsQr6LJ4r31chW6Zm4VDuFiXquuxyE/c94Q8Ue27ag1/RfXL8b/g
Ir9aO+PAldGnVdnhPz4e6PZhzMfCVafw+DR7GVx3Zfnx2bg/dajo38UaLBDdEIS1
EIKONU2CBT/W1kPkLFiz+NdaYCzK9EL+RIbN/iG7ms+ds1+wc3zXpWwqZFASfIod
ZF788Up+wW+3SrKI2ySFjhQroNzDascn+bbHm4yJuAsORqY0XkxjSuWcSz++q8Hs
eMTw/R4uMfEiDvN1A7xlhBMuBrBHk4/6bdCRx2R6nkWes542fsgjXy8tGRWyUgnY
nbpTfYU07N8ck6arZ36KThedD7whJHHRcBYtLjhRG+lKbD0epWy67pXgTr9edTLf
U6ddH+Tndn4qhx067VhZ8vEXTCzypt4lY61MLcM0b9z8S1nJDn8b8jmiii7IR76L
/ocXzuLvNWHfmwNnB2hj/YY+n78vlZhegUxL5/6sH9lNebnewyEzCkVENNELUSYf
8M6vEZprvuhN44Z6hBUWZxXk0w==
=1mUx
-----END PGP SIGNATURE-----
Merge tag 'u-boot-stm32-20231004' of https://source.denx.de/u-boot/custodians/u-boot-stm
STM32 MCU:
_ alignment with kernel DT v6.5 for stm32f429 and stm32f746
_ rework way of displaying ST logo for stm32f746-disco and stm32f769-disco
STM32 MPU:
_ alignment with kernel DT v6.6-rc1
_ add RNG support for stm32mp13
_ add USB, USB boot and stm32prog command support for stm32mp13
_ add support of USART1 clock for stm32mp1
_ only print RAM and board code with SPL_DISPLAY_PRINT flag for
stm32mp1
_ rename update_sf to dh_update_sd_to_sf and add dh_update_sd_to_emmc
for stm32mp15xx DHCOR
[ Fix merge conflict at board/st/common/stm32mp_dfu.c ]
Signed-off-by: Tom Rini <trini@konsulko.com>
split the file stm32mp_dfu.c in two files to simplify the Makefile
- stm32mp_dfu.c: required by CONFIG_SET_DFU_ALT_INFO
- stm32mp_dfu_virt.c: required by CONFIG_DFU_VIRT for stm32prog
command or VIRT device for PMIC for CONFIG_SET_DFU_ALT_INFO.
This patch also remove some remaining #ifdef CONFIG
and avoid compilation error when CONFIG_SET_DFU_ALT_INFO is not
activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Ensure that the SoM and board code information is only printed when
CONFIG_SPL_DISPLAY_PRINT is set.
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
The patch removes the legacy mode of displaying the ST logo and adopts
the approach introduced by the commit 284b08fb51 ("board: stm32mp1: add
splash screen with stmicroelectronics logo"). It was necessary to use a
specific logo for the stm32f746-disco board.
Furthermore, the previous version didn't properly center the logo, hiding
its upper part.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
CONFIG_SYS_BOOT_LOCKED means that a restricted boot environment will
be used. In this case, hab_auth_img_or_fail should be called to prevent
U-Boot to continue running when the fitImage authentication fails.
Fix the logic accordingly.
Additionally, select CONFIG_SYS_BOOT_LOCKED by default.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Multiple revisions of the StarFive VisionFive 2 board exist. They can be
identified by reading their EEPROM.
Linux uses two differently named device-tree files. To load the correct
device-tree we need to set $fdtfile to the device-tree file name that
matches the board revision.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
This old patch was marked as deferred. Bring it back to life, to continue
towards the removal of common.h
Move this out of the common header and include it only where needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Set CONFIG_SYS_LOAD_ADDR=0x88000000 and use this address for
loading fitImage.
Also pass the standard CONFIG_BOOTFILE option to indicate
the fitImage file.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Vanessa's NXP e-mail is no longer active.
Contacted her offline and she told me that she does not have
access to the board anymore and it is OK to remove her
from MAINTAINERS.
Signed-off-by: Fabio Estevam <festevam@denx.de>
U-Boot should set up the SMBIOS tables during startup, as it does on x86.
Ensure that it does this correctly on non-x86 machines too, by creating
an event spy for last-stage init.
Tidy up the installation-condition code while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Declare the global_data pointer at the top of the file, to avoid an
error:
arch/x86/include/asm/global_data.h:143:35: error: a label can
only be part of a statement and a declaration is not a statement
board/coreboot/coreboot/coreboot.c:60:2: note: in expansion of macro
‘DECLARE_GLOBAL_DATA_PTR’
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mike Frysinger <vapier@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
clk:
- Dont return error when assigned-clocks is empty or missing
dm:
- Support reading a single indexed u64 value
- Add support for reading bootscript address/flash address from DT
cmd:
- Fix flash_is_unlocked API
fpga:
- Define fpga_load() for debug build
global:
- U-Boot project name cleanup (next2)
net:
- zynq_gem: Use generic_phy_valid() helper
- axienet: Convert to ofnode functions
- gmii2rgmii: Read bridge address from DT
pytest:
- skip tpm2_startup when env__tpm_device_test_skip=True
spi-nor:
- Add mx25u25635f support
- zynqmp_qspi: Tune cache behavior
trace:
- Fix flyrecord alignment issue
xilinx:
- Move scriptaddr to DT as bootscr-address
- Pick script_offset_f/script_size_f from DT as bootscr-flash-offset/size
- Do not generate distro boot variables if disabled
versal:
- Extend memory ranges to cover HBM
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
- Clean mini targets bootcommand
- Fix clock driver
versal-net:
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
zynqmp;
- Allow AES to run from SPL
- Enable CMD_KASLRSEED
- Add proper dependencies for USB and remove ZYNQMP_USB
- Fix user si570 default frequency for zcu* boards
- Cover SOM rev2 revision
- Various DT changes
- Add firmware and pinctrl support for tristate configuration
(high impedance/output enable)
- Add output-enable pins to SOMs
- Fix distroboot prioritization in connection to available devices
- Read bootscript address/flash address from DT
- Fix pcap_prog address
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZQwqWAAKCRDKSWXLKUoM
IQYIAJ9WQrnZoCfi7MuxzYA2t34Dbx4gkwCgk1o6bX+R89jvjBOhgZOlXTQCbb0=
=/rxs
-----END PGP SIGNATURE-----
Merge tag 'xilinx-for-v2024.01-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2024.01-rc1
clk:
- Dont return error when assigned-clocks is empty or missing
dm:
- Support reading a single indexed u64 value
- Add support for reading bootscript address/flash address from DT
cmd:
- Fix flash_is_unlocked API
fpga:
- Define fpga_load() for debug build
global:
- U-Boot project name cleanup (next2)
net:
- zynq_gem: Use generic_phy_valid() helper
- axienet: Convert to ofnode functions
- gmii2rgmii: Read bridge address from DT
pytest:
- skip tpm2_startup when env__tpm_device_test_skip=True
spi-nor:
- Add mx25u25635f support
- zynqmp_qspi: Tune cache behavior
trace:
- Fix flyrecord alignment issue
xilinx:
- Move scriptaddr to DT as bootscr-address
- Pick script_offset_f/script_size_f from DT as bootscr-flash-offset/size
- Do not generate distro boot variables if disabled
versal:
- Extend memory ranges to cover HBM
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
- Clean mini targets bootcommand
- Fix clock driver
versal-net:
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
zynqmp;
- Allow AES to run from SPL
- Enable CMD_KASLRSEED
- Add proper dependencies for USB and remove ZYNQMP_USB
- Fix user si570 default frequency for zcu* boards
- Cover SOM rev2 revision
- Various DT changes
- Add firmware and pinctrl support for tristate configuration
(high impedance/output enable)
- Add output-enable pins to SOMs
- Fix distroboot prioritization in connection to available devices
- Read bootscript address/flash address from DT
- Fix pcap_prog address
SOC can boot in the device which is not accessible from APU and running
this is detected as error which ends up in stopping boot process.
Boot mode detection and logic around is present to setup priority on boot
devices that SOC boot device is likely also used for booting OS.
Change logic to detect this case with showing message about it but don't fail
in boot process and don't prioritize boot device in this case.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20230904032035.11926-4-venkatesh.abbarapu@amd.com
SOC can boot in the device which is not accessible from APU and running
this is detected as error which ends up in stopping boot process.
Boot mode detection and logic around is present to setup priority on boot
devices that SOC boot device is likely also used for booting OS.
Change logic to detect this case with showing message about it but don't fail
in boot process and don't prioritize boot device in this case.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20230904032035.11926-3-venkatesh.abbarapu@amd.com
SOC can boot in the device which is not accessible from APU and running
this is detected as error which ends up in stopping boot process.
Boot mode detection and logic around is present to setup priority
on boot devices that SOC boot device is likely also used for booting OS.
Change logic to detect this case with showing message about it but don't
fail in boot process and don't prioritize boot device in this case.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20230904032035.11926-2-venkatesh.abbarapu@amd.com
Location of bootscript in flash can be specified via /options/u-boot DT
node by using bootscr-flash-offset and bootscr-flash-size properties.
Values should be saved to script_offset_f and script_size_f variables.
Variables are described in doc/develop/bootstd.rst as:
script_offset_f
SPI flash offset from which to load the U-Boot script, e.g. 0xffe000
script_size_f
Size of the script to load, e.g. 0x2000
Both of them are used by sf_get_bootflow() in drivers/mtd/spi/sf_bootdev.c
to identify bootscript location inside flash.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/60a84405f3fefabb8b48a4e1ce84431483a729f3.1693465465.git.michal.simek@amd.com
The bootscript is expected at a default address specific to each
platform.
When high speed memory like Programmable Logic Double Data Rate RAM
(PL DDR RAM) or Higher Bandwidth Memory RAM (HBM) is used the boot.scr
may be loaded at a different offset. The offset needs to be set through
setenv. Due to the default values in some cases the boot.scr is falling
in between the kernel partition.
The bootscript address or the bootscript offset is fetched directly from
the DT and updated in the environment making it easier for automated
flows.
Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fac7020b31e1f150b021d666f0d588579ea671ad.1693465140.git.michal.simek@amd.com
This moves the aes operation that is performed by the pmu into a
separate file. This way it can be called not just from the shell
command, but also e.g. from board initialization code.
Signed-off-by: Christian Taedcke <christian.taedcke@weidmueller.com>
Link: https://lore.kernel.org/r/20230725072658.16341-1-christian.taedcke-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Multiple revisions of the StarFive VisionFive 2 board exist. They can be
identified by reading their EEPROM.
Linux uses two differently named device-tree files. To load the correct
device-tree we need to set $fdtfile to the device-tree file name that
matches the board revision.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Use fdt_fixup_memory to make the memory size data from dtb match
the actual size.
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
Change the file name from ti.gz and ti.bmp to ti_logos_414x97_32bpp to
help user understand the resolution and identify the logo files when
placed in the boot partition and update the splashfile name with the
same in .env file.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
The usb_gadget_handle_interrupts() is no longer used anywhere,
replace the remaining uses with dm_usb_gadget_handle_interrupts()
which takes udevice as a parameter.
Some of the UDC drivers currently ignore the index parameter altogether,
those also ignore the udevice and have to be reworked. Other like the
dwc3_uboot_handle_interrupt() had to be switched from index to udevice
look up to avoid breakage.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on khadas vim3
Signed-off-by: Marek Vasut <marex@denx.de>
BeagleBoard.org BeaglePlay is an easy to use, affordable open source
hardware single board computer based on the Texas Instruments AM625
SoC that allows you to create connected devices that work even at long
distances using IEEE 802.15.4g LR-WPAN and IEEE 802.3cg 10Base-T1L.
Expansion is provided over open standards based mikroBUS, Grove and
QWIIC headers among other interfaces.
This board family can be identified by the 24c32 eeprom:
[aa 55 33 ee 01 37 00 10 2e 00 42 45 41 47 4c 45 |.U3..7....BEAGLE|]
[50 4c 41 59 2d 41 30 2d 00 00 30 32 30 30 37 38 |PLAY-A0-..020078|]
https://beagleplay.org/https://git.beagleboard.org/beagleplay/beagleplay
baseline of base device tree is v6.5-rc1.
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Co-developed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
ti_armv7_common does not make any more sense as it is used by armv7
and armv8 TI based platforms.
Reported-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Add explicit boot_targets to indicate the specific boot sequence to
follow.
NOTE: The non-standard ti_mmc emulates what is done for distro_boot.
With bootstd, this will eventually need to be replaced by equivalent
class.
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
verdin am62 SKUs comes in multiple memory configuration, check that
the detected memory is at least 512MB since we have some
reserved memory just before this threshold and therefore
the module cannot work with less memory.
Fixes: 7d1a10659f ("board: toradex: add verdin am62 support")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
fdt_fixup_ethernet() sets eth0 mac address from ethaddr. Set
ethaddr to environment instead of eth0addr.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This platform is behind on migrations (it is the sole user of the oldest
legacy version of the USB gadget stack and is long overdue for
migration) and with Pali no longer being a maintainer, we remove this
platform.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add a new event which handles this function. Convert existing use of
the function to use the new event instead.
Make sure that EVENT is enabled by affected boards, by selecting it from
the LAST_STAGE_INIT option. For x86, enable it by default since all boards
need it.
For controlcenterdc, inline the get_tpm() function and make sure the event
is not built in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the misc_init_f event instead, which is designed for this purpose.
All boards with CONFIG_VID already enable CONFIG_EVENT.
Signed-off-by: Simon Glass <sjg@chromium.org>
Very few of the existing event-spy records use the arguments they are
passed. Update them to use a simple spy instead, to simplify the code.
Where an adaptor function is currently used, remove it where possible.
Signed-off-by: Simon Glass <sjg@chromium.org>
-----BEGIN PGP SIGNATURE-----
iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmTu+QMcHGV1Z2VuLmhy
aXN0ZXZAY29sbGFib3JhLmNvbQAKCRAesx4CDqwvyFqVB/9z5lV4zhqWYiQ+wNZL
Gxs3//DSS5iVHU+xaPRrYQT99Yn2/kfM2LeQ4REBOaOTP7IX2ewmOEro4OUViFuC
kt/WnHD0XzN+2o8akIdVC5YudgVcuX751SQtp5dqcbN6FylSH010+YIZTvaJoNQn
+Wny1ZZhpuNJJEPvLxE/eiJ3jFwvEAjC+jH328uQIeSLknPh93hGJOFc/02F0O2o
s96J1/VZ4qvvQKYw0sgNtGb/0Og7V0RLW27+RfwhH4XJvAIv/A6MioTyRaCS2h7H
tzj/hFXbzGtu+AqrEtMgNjzC7vAx+0266P/Zx/DOWKoWLDIYkWSLpYKLut0E6CUe
+fcB
=L/iw
-----END PGP SIGNATURE-----
Merge tag 'u-boot-at91-2023.10-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2023.10 cycle:
This feature set includes a new board sama5d29 Curiosity, and various
fixes and alignments for sam9x60 and sam9x60 curiosity board.
Add the private keys and public key certificates which are to be used
for capsule authentication while testing the EFI capsule update
functionality. There are two pairs of private and public keys, good
and bad. The good key pair will be used for signing capsules, whilst
the bad key pair is to be used as malicious keys for testing
authentication failure cases. The capsule_pub_key_good.crt is also
converted to an EFI Signature List(ESL) file, SIGNER.esl, which is
embedded in the platform's device-tree for capsule authentication.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
If CONFIG_LED and CONFIG_LED_GPIO are enabled, it is not necessary to
initialize the RGB LED on the board by manually setting hardcoded GPIOs
anymore. Everything is well defined in dts and can be used like on
boards of other vendors.
Keep the old behaviour as fallback, though.
With all this in place enabling CONFIG_CMD_LED gives us a working 'led'
command on the U-Boot shell.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Commit 02be57caf7 ("riscv: qemu: Enable usb keyboard as an input
device") adds PCI xHCI support to QEMU RISC-V virtual machines and
enables using a USB keyboard as one of the input devices. Similarly,
enable those for ARM virtual machines as well.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Commit 608b80b5b8 ("riscv: qemu: Enable PRE_CONSOLE_BUFFER") enables
buffering console messages for QEMU RISC-V virtual machines so those
printed before the video console is available will still show up on the
display. Similarly, enable it for ARM virtual machines as well.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Commit 716161663e ("riscv: qemu: Enable Bochs video support") enables
a video console for QEMU RISC-V virtual machines using an emulated Bochs
VGA card. Similarly, enable it for ARM virtual machines as well.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Rename defconfig to include SoC name, use similar pattern as other
RK356x boards: <soc>-<name>.dts -> <name>-<soc>_defconfig
Suggested-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
has some other minor enhancements, such as enabling the poweroff command
on several Tegra210 and Tegra186 boards.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmTfWrITHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoYPFD/9hw40HjaAXf6cD960HWSlcGuNOIV99
A9JoSgHipCuhACr0z7s4MpbATjEgknZUblJNiVdhzCWAgW3Spy9JpSxMyKlpqdiH
7Z971DuaXFX9ZCilX9g6whZI/RDglpUEjt3cb4PWrznM6dpKA73voizo+czBeXd7
AhxTN/2I89VLz75RyR+X41bLLK1VuGND+uGHz/DDbpMXEW8gVRtZ8gnJPeR4zg1y
EUacNFc+PVjghMFZGmClnw0pXkq2akKp5cJ/A+11aa/Q7FII63v5/Np79kDtnUje
GPSdg4yqSr1ZE/6qK0qV58B2KKHfeg+6GC47s46KjzaUwL4De64zHtCt6t37zz8y
hngeeR5SYIKR8HkpXKM8DsMv0D1WciP2awggFPaPF802H/5GMVCnEFITmuFlOuAe
Q1lg2acywMo2NFINMOONuQahGIJZORpm2VMonMhlesyAuc89quslt/iYSAoV9E4/
Pt1AqgeOpUh5I236EygJJ11V2BAXkwzR6RazFDr3AHCqB9iFW/UNS1Y7A1pXwKYN
IVUWU8xkuYYSyxeGwuIrTj/JdQhwfO0jn+xn5g+rUPWNP5n4FJ2oBVPOInfEpled
k0HgxcGK6Z0hBCwd6/t03QQJWD47/r5jAd9x1eLRFWYV8ivl2Acvm+MlkPx81weG
E1h7UKdfvTZcDw==
=Bzgn
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-2023.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-tegra
ARM: tegra: Changes for v2023.10-rc1
This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
has some other minor enhancements, such as enabling the poweroff command
on several Tegra210 and Tegra186 boards.
AM64-HSEVM is AM64-GPEVM with High Security Device.
Gets rid of "Unidentified board claims AM64-HSEVM in eeprom header".
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Andrew Davis <afd@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com> #SK-AM64B
Add myself as a reviewer for RK3566/RK3568/RK3588 boards that I have and
can help with review and testing of defconfig and device tree changes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Eugen Hristev <eugen.hristev@collabora.com>
Update MAINTAINERS files for RK3566/RK3568/RK3588 boards to include
related device tree files. Also replace space with tabs.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Eugen Hristev <eugen.hristev@collabora.com>
In case the DHSOM is in suspend state and either reset button is pushed
or IWDG2 triggers a watchdog reset, then DRAM initialization could fail
as follows:
"
RAM: DDR3L 32bits 2x4Gb 533MHz
DDR invalid size : 0x4, expected 0x40000000
DRAM init failed: -22
### ERROR ### Please RESET the board ###
"
Avoid this failure by not keeping any Buck regulators enabled during reset,
let the SoC and DRAMs power cycle fully. Since the change which keeps Buck3
VDD enabled during reset is ST specific, move this addition to ST specific
SPL board initialization so that it wouldn't affect the DHSOM .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
board_get_usable_ram_top() returns a physical address that is stored in
gd->ram_top. The return type of the function should be phys_addr_t like the
current type of gd->ram_top.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When raspberrpi-4b platform boots up, there are 2 sets of same bootup
log displayed on HDMI monitor screen, it looks like the screen is split
into 2 parts. The root cause is that video format of u-boot is different
from kernel. The fixing "a8r8g8b8" video format is used in u-boot, but
"r5g6b5" video format from framebuffer node is used in kernel image. In
order to avoid weird display status on screen, it needs to set the correct
parameter for simple framebuffer node even if it has existed.
Signed-off-by: Meng Li <Meng.Li@windriver.com>
align with other ROCK series.
Fixes: 2b506407c8 ("rockchip: Add MAINTAINERS entry for Radxa Rock 4C+")
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
LubanCat2 is a rk3568 based SBC from EmbedFire.
Specification:
- Rockchip rk3568
- LPDDR4/4X 1/2/4/8 GB
- TF scard slot
- eMMC 8/32/64/128 GB
- Gigabit ethernet x 2
- HDMI out
- USB 2.0 Host x 1
- USB 2.0 Type-C OTG x 1
- USB 3.0 Host x 1
- Mini PCIE interface for WIFI/BT module
- M.2 key for 2280 NVME
- 40 pin header
The dts file is sync from linux mainline.
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The EFI_RNG_PROTOCOL is needed for Linux' KASLR.
QEMU can provide a virtio-rng device to emulate a hardware random number
generator which is supported by our virtio_rng driver.
Enabling CONFIG_DM_RNG will enable CONFIG_VIRTIO_RNG and
CONFIG_EFI_RNG_PROTOCOL by default too.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include. Drop the unnecessary changes, since missing
stdio drivers will be ignored.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include along with some additions.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Drop common env from slimbootloader.env]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include along with some additions.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include. The existing environment includes "vga" but that
is not valid anymore, so let it use vidconsole
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Don't use the common include since Edison's environment is empty.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the common include and add some options specific to this board.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The 'environment' word is too long. We mostly use 'env' in U-Boot, so use
that as the name of the include directory too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Now all linker symbols are declared as type char[]. Though we can
reference the address via both the array name 'var' and its address
'&var'. It's better to unify them to avoid confusing developers.
This patch converts all '&var' linker symbol refrences to the most
commonly used format 'var'.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
1. Convert all linker symbols to char[] type so that we can get the
corresponding address by calling array name 'var' or its address
'&var'. In this way, we can avoid some potential issues[1].
2. Remove unused symbol '_TEXT_BASE'. It has been abandoned and has
not been referenced by any source code.
3. Move '__data_end' to the arch x86's own sections header as it's
only used by x86 arch.
4. Remove some duplicate declared linker symbols. Now we use the
standard header file to declare them.
[1] This patch fixes the boot failure on MIPS target. Error log:
SPL: Image overlaps SPL
Fixes: 1b8a1be1a1 ("spl: spl_legacy: Fix spl_end address")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Both the Linux kernel and libbsd agree that strlcpy() should always
return strlen(src) and not include the NUL termination. The incorrect
U-Boot implementation makes it impossible to check the return value for
truncation, and breaks code written with the usual implementation in
mind (for example, fdtdec_add_reserved_memory() was subtly broken).
I reviewed all callers of strlcpy() and strlcat() and fixed them
according to my understanding of the intended function.
This reverts commit d3358ecc54 and adds
related fixes.
Fixes: d3358ecc54 ("lib: string: Fix strlcpy return value")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
The retimer reset/power on logic was changed in a recent commit,
however, it neglected to check if the commands sent to the
board microcontroller (to control power to the retimer chip)
actually completed.
Add return checks for these operations so any failures will
be reported to the user.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Fixes: 7a041fea2 ("board: traverse: ten64: ensure retimer reset
is done on new board revisions")
Update MAINTAINERS file. Add missing MAINTAINERS file for Spider,
Whitehawk and V3HSK boards. Update mail addresses. Add file globs
to match on DT and driver files related to these boards.
The GRPEACH and R2DPLUS are special in that they are not R-Car
and have their own set of specialized drivers.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This adds initial support for the Toradex Verdin AM62 Quad 1GB WB IT
V1.0A module and subsequent V1.1 launch configuration SKUs. They are
strapped to boot from their on-module eMMC. U-Boot supports booting
from the on-module eMMC only, DFU support is disabled for now due to
missing AM62x USB support.
The device trees were taken straight from Linux v6.5-rc1.
Boot sequence is:
SYSFW ---> R5 SPL (both in tiboot3.bin) ---> ATF (TF-A) ---> OP-TEE
---> A53 SPL (part of tispl.bin) ---> U-boot proper (u-boot.img)
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Rework the rather big array of zero length strings with 4 entries of
actual display adapter names to a array of structs which ties a pid4
to its correspondent human readable string.
Provide an accessor to get the string for a given PID4.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Rework the rather big array of zero length strings with 4 entries of
actual carrier board names to a array of structs which ties a pid4
to its correspondent human readable string.
Provide an accessor to get the string for a given PID4.
Rework the user of the information to use the accessor.
Note that check_pid8_sanity() is used for early samples of Dahlia and
the development board. Yavia isn't affected.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Add the Yavia Carrier board name string to the known carrier
board list.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
As the defconfig files here have been removed we can also remove the
entries.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Given that we no longer have a configs/vexpress_aemv8a_defconfig file,
drop that and then include at least the aarch64-specific config.h file
here. Also move Linus and Peter up to the main entry as well so that
they'll get tagged for the board code too and not literally only the
defconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Rajesh's email bounces. Remove his email from all boards he maintains.
Fortunately, he has co-maintainers on most boards. I have taken the
liberty of volunteering Pramod to maintain the LS1012AFRDM, since he
also maintains the LS1012AFRWY. Let me know if the board should be
orphaned instead.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
The u-boot version of the LS1088A device tree has
an extra compatible (simple-mfd) added to &fsl_mc
to facilitate usage with U-Boot's device model.
Unfortunately FreeBSD will only match the single
"fsl,qoriq-mc" exactly when the node is a "bus"
object, so we need to strip out the extra compatible
before presenting it to the operating system.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Our bootcmd is the same regardless of where the SoC
loaded it's code from, so we don't want
fsl_setenv_bootcmd to do anything.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The GE0 (first Gigabit Ethernet interface) is used as the
'serial number' for the board and appliance.
To ensure the 'true' board S/N is available regardless of how
the DPAA2 subsystem is configured, use serial# so it is passed in
the device tree.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
On Ten64 boards, the "serial number" is the MAC address of the
first Gigabit Ethernet interface (labelled GE0 on the appliance),
and counted up from there.
The previous logic did not take into account U-Boot's ordering
of the network interfaces. By setting aliases/ethernetX in the device
tree we can ensure the U-Boot 'ethX' is the same as the labelled
port order on the unit, as well as the one adopted by Linux.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Ensure nvme devices are scanned before reaching the shell,
otherwise extra user intervention ("nvme scan") is required
before they are visible to bootdev/bootflow.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Board revision C (production) and later require the SFP+
retimer to be turned on (or reset) on boot, by way of issuing
a command to the board's microcontroller (via I2C).
The comparison statement here was incorrect, as the board
ID decrements every revision (from 0xFF downwards),
so this was matching board RevA,B,C instead of Rev >= C.
Another oops that transpired when working on this issue,
is that if the board controller is not called (such as
CONFIG_TEN64_CONTROLLER=n or earlier board rev), then
the retimer udevice was not obtained. So the board
version check has to be moved inside board_cycle_retimer
(which probes/fetches the retimer device) as well.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Ten64 board revision D is a variant that removes the USB hub
and PCIe expander/switch, but is otherwise compatible with the
main production "C" version.
At the same time, revise the printf specifiers (PCB version
"1064-0201%s") to reduce the number of string characters related
to the boot printout.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This patch adds general board files based on MT7988 SoCs.
MT7988 uses one mmc controller for booting from both SD and eMMC,
and the pins of mmc controller booting from SD are also shared with
one of spi controllers.
So two configs are need for these boot types:
1. mt7988_rfb_defconfig - SPI-NOR, SPI-NAND and eMMC
2. mt7988_sd_rfb_defconfig - SPI-NAND and SD
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Now we use fdtdec_setup_mem_size_base() to get DRAM base from fdt ram node
and update gd->ram_base. CFG_SYS_SDRAM_BASE is unused and will be removed.
Also, since mt7622 always passes fdt to linux kernel, there's no need to
assign value to gd->bd->bi_boot_params.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This brings PCI xHCI support to QEMU RISC-V and uses a usb keyboard
as one of the input devices.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 66ffe57 ("riscv: qemu: detect and boot the kernel passed by QEMU")
added some logic to handle "riscv,kernel-start" in DT and stored the
address to an environment variable kernel_start.
However this "riscv,kernel-start" has never been an upstream DT binding.
The upstream QEMU never generates such a DT either. Presumably U-Boot
development was based on a downstream QEMU fork.
Now we drop all codes in commit 66ffe57, except that BOARD_LATE_INIT
is kept for later use.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
By default the video console only outputs messages after it's ready.
Messages before that won't show on the video console, but U-Boot has
an option to buffer the console messages before it's ready.
Enable this support, and carefully select an address for the buffer.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Update dwc3 generic driver and update support for rk3568/rk3328;
- Add boards:
rk3566: Pine64 Quartz64-A/B, SOQuartz on Model A/Blade/CM4-IO
rk3568: Radxa E25 Carrier Board
rk3588: Radxa ROCK5A
- Fixes and updates for chromebook veryon/jerry/speedy;
- SPI support fixes for rk3399/rk3568/rk3588;
- rk3588 usbdp phy support;
- dts and config updates for different boards;
Radxa E25 is a network application carrier board for the Radxa CM3I SoM
with a RK3568 SoC. It features dual 2.5G ethernet, mini PCIe, M.2 B Key,
USB3, eMMC, SD, nano SIM card slot and a 26-pin GPIO header.
Features tested on a Radxa E25 v1.4:
- SD-card boot
- eMMC boot
- USB host
- PCIe/Ethernet adapters is detected
- SATA
Device tree is imported from linux next-20230728.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa.
There are tree variants depending on the DRAM size : 4G, 8G and 16G.
Specifications:
Rockchip Rk3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
MIPI CSI 2 multiple lanes connector
4-lane MIPI DSI connector
Audio – 3.5mm earphone jack
eMMC module connector
uSD slot (up to 128GB)
2x USB 2.0, 2x USB 3.0
2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60
Gigabit Ethernet RJ45 with optional PoE support
40-pin IO header including UART, SPI, I2C and 5V DC power in
USB PD over USB Type-C
Size: 85mm x 56mm (Raspberry Pi 4 form factor)
Kernel commits:
d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board")
991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a")
304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a")
cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on rk3588s-rock5a")
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
