mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 15:14:43 +00:00
board: rockchip: Add Bananapi R2Pro Board
Add Bananapi R2 Pro board. tested: - sdcard - both front usb-ports - sata - wan-port lan-ports are connected to mt7531 switch where driver needs to be separated from mtk ethernet-driver. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
This commit is contained in:
Frank Wunderlich
Kever Yang
parent
f1aa4cdfbf
commit
3d96c3f5ec
6 changed files with 973 additions and 0 deletions
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@ -177,6 +177,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
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rk3566-soquartz-blade.dtb \
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rk3566-soquartz-cm4.dtb \
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rk3566-soquartz-model-a.dtb \
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rk3568-bpi-r2-pro.dtb \
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rk3568-evb.dtb \
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rk3568-lubancat-2.dtb \
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rk3568-nanopi-r5c.dtb \
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19
arch/arm/dts/rk3568-bpi-r2-pro-u-boot.dtsi
Normal file
19
arch/arm/dts/rk3568-bpi-r2-pro-u-boot.dtsi
Normal file
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@ -0,0 +1,19 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2021 Rockchip Electronics Co., Ltd
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*/
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#include "rk356x-u-boot.dtsi"
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/ {
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chosen {
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stdout-path = &uart2;
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};
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};
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&uart2 {
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clock-frequency = <24000000>;
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bootph-pre-ram;
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status = "okay";
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};
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852
arch/arm/dts/rk3568-bpi-r2-pro.dts
Normal file
852
arch/arm/dts/rk3568-bpi-r2-pro.dts
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@ -0,0 +1,852 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Author: Frank Wunderlich <frank-w@public-files.de>
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*
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/soc/rockchip,vop2.h>
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#include "rk3568.dtsi"
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/ {
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model = "Bananapi-R2 Pro (RK3568) DDR4 Board";
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compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568";
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aliases {
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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mmc0 = &sdmmc0;
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mmc1 = &sdhci;
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};
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chosen: chosen {
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stdout-path = "serial2:1500000n8";
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&blue_led_pin &green_led_pin>;
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blue_led: led-0 {
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color = <LED_COLOR_ID_BLUE>;
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default-state = "off";
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
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};
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green_led: led-1 {
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color = <LED_COLOR_ID_GREEN>;
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default-state = "on";
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function = LED_FUNCTION_POWER;
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gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
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};
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};
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dc_12v: dc-12v-regulator {
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compatible = "regulator-fixed";
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regulator-name = "dc_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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hdmi-con {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_in: endpoint {
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remote-endpoint = <&hdmi_out_con>;
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};
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};
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};
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ir-receiver {
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compatible = "gpio-ir-receiver";
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gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&ir_receiver_pin>;
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};
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vcc3v3_sys: vcc3v3-sys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&dc_12v>;
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};
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vcc5v0_sys: vcc5v0-sys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&dc_12v>;
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};
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pcie30_avdd0v9: pcie30-avdd0v9-regulator {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd0v9";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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vin-supply = <&vcc3v3_sys>;
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};
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pcie30_avdd1v8: pcie30-avdd1v8-regulator {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc3v3_sys>;
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};
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/* pi6c pcie clock generator feeds both ports */
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vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <200000>;
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vin-supply = <&vcc5v0_sys>;
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};
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/* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
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vcc3v3_minipcie: vcc3v3-minipcie-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_minipcie";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&minipcie_enable_h>;
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startup-delay-us = <50000>;
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vin-supply = <&vcc3v3_pi6c_05>;
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};
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/* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
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vcc3v3_ngff: vcc3v3-ngff-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_ngff";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&ngffpcie_enable_h>;
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startup-delay-us = <50000>;
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vin-supply = <&vcc3v3_pi6c_05>;
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};
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vcc5v0_usb: vcc5v0-usb-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_usb";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&dc_12v>;
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};
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vcc5v0_usb_host: vcc5v0-usb-host-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_usb_host_en>;
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regulator-name = "vcc5v0_usb_host";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v0_usb>;
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};
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vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_usb_otg_en>;
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regulator-name = "vcc5v0_usb_otg";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v0_usb>;
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};
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};
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&combphy0 {
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/* used for USB3 */
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status = "okay";
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};
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&combphy1 {
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/* used for USB3 */
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status = "okay";
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};
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&combphy2 {
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/* used for SATA */
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status = "okay";
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};
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&gmac0 {
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assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
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assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
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clock_in_out = "input";
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phy-mode = "rgmii";
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pinctrl-names = "default";
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pinctrl-0 = <&gmac0_miim
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&gmac0_tx_bus2
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&gmac0_rx_bus2
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&gmac0_rgmii_clk
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&gmac0_rgmii_bus>;
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snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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snps,reset-delays-us = <0 20000 100000>;
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tx_delay = <0x4f>;
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rx_delay = <0x0f>;
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status = "okay";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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&gmac1 {
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
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clock_in_out = "output";
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phy-handle = <&rgmii_phy1>;
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phy-mode = "rgmii";
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m1_miim
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&gmac1m1_tx_bus2
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&gmac1m1_rx_bus2
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&gmac1m1_rgmii_clk
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&gmac1m1_rgmii_bus>;
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snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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snps,reset-delays-us = <0 20000 100000>;
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tx_delay = <0x3c>;
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rx_delay = <0x2f>;
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status = "okay";
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};
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&gpu {
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mali-supply = <&vdd_gpu>;
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status = "okay";
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};
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&hdmi {
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avdd-0v9-supply = <&vdda0v9_image>;
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avdd-1v8-supply = <&vcca1v8_image>;
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status = "okay";
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};
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&hdmi_in {
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hdmi_in_vp0: endpoint {
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remote-endpoint = <&vp0_out_hdmi>;
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};
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};
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&hdmi_out {
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hdmi_out_con: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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&hdmi_sound {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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rk809: pmic@20 {
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compatible = "rockchip,rk809";
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reg = <0x20>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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#clock-cells = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int>;
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rockchip,system-power-controller;
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vcc1-supply = <&vcc3v3_sys>;
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vcc2-supply = <&vcc3v3_sys>;
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vcc3-supply = <&vcc3v3_sys>;
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vcc4-supply = <&vcc3v3_sys>;
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vcc5-supply = <&vcc3v3_sys>;
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vcc6-supply = <&vcc3v3_sys>;
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vcc7-supply = <&vcc3v3_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc3v3_sys>;
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wakeup-source;
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regulators {
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vdd_logic: DCDC_REG1 {
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regulator-name = "vdd_logic";
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_gpu: DCDC_REG2 {
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regulator-name = "vdd_gpu";
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regulator-always-on;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-name = "vcc_ddr";
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vdd_npu: DCDC_REG4 {
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regulator-name = "vdd_npu";
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_1v8: DCDC_REG5 {
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdda0v9_image: LDO_REG1 {
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regulator-name = "vdda0v9_image";
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regulator-always-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdda_0v9: LDO_REG2 {
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regulator-name = "vdda_0v9";
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regulator-always-on;
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regulator-boot-on;
|
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regulator-min-microvolt = <900000>;
|
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regulator-max-microvolt = <900000>;
|
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|
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regulator-state-mem {
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regulator-off-in-suspend;
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};
|
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};
|
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vdda0v9_pmu: LDO_REG3 {
|
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regulator-name = "vdda0v9_pmu";
|
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regulator-always-on;
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regulator-boot-on;
|
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regulator-min-microvolt = <900000>;
|
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regulator-max-microvolt = <900000>;
|
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|
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <900000>;
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};
|
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};
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vccio_acodec: LDO_REG4 {
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regulator-name = "vccio_acodec";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
|
||||
|
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regulator-state-mem {
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regulator-off-in-suspend;
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};
|
||||
};
|
||||
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vccio_sd: LDO_REG5 {
|
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regulator-name = "vccio_sd";
|
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regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_pmu: LDO_REG6 {
|
||||
regulator-name = "vcc3v3_pmu";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca_1v8: LDO_REG7 {
|
||||
regulator-name = "vcca_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_pmu: LDO_REG8 {
|
||||
regulator-name = "vcca1v8_pmu";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_image: LDO_REG9 {
|
||||
regulator-name = "vcca1v8_image";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3: SWITCH_REG1 {
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_sd: SWITCH_REG2 {
|
||||
regulator-name = "vcc3v3_sd";
|
||||
regulator-always-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
|
||||
hym8563: rtc@51 {
|
||||
compatible = "haoyu,hym8563";
|
||||
reg = <0x51>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>;
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "rtcic_32kout";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hym8563_int>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
/* pin 3 (SDA) + 4 (SCL) of header con2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&i2s0_8ch {
|
||||
/* hdmi sound */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch@0 {
|
||||
compatible = "mediatek,mt7531";
|
||||
reg = <0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan0";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "rgmii";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio1 {
|
||||
rgmii_phy1: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie30phy {
|
||||
data-lanes = <1 2>;
|
||||
phy-supply = <&vcc3v3_pi6c_05>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie3x1 {
|
||||
/* M.2 slot */
|
||||
num-lanes = <1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ngffpcie_reset_h>;
|
||||
reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_ngff>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie3x2 {
|
||||
/* mPCIe slot */
|
||||
num-lanes = <1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&minipcie_reset_h>;
|
||||
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_minipcie>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
leds {
|
||||
blue_led_pin: blue-led-pin {
|
||||
rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
green_led_pin: green-led-pin {
|
||||
rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
hym8563 {
|
||||
hym8563_int: hym8563-int {
|
||||
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
ir-receiver {
|
||||
ir_receiver_pin: ir-receiver-pin {
|
||||
rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie {
|
||||
minipcie_enable_h: minipcie-enable-h {
|
||||
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
|
||||
};
|
||||
|
||||
ngffpcie_enable_h: ngffpcie-enable-h {
|
||||
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
|
||||
};
|
||||
|
||||
minipcie_reset_h: minipcie-reset-h {
|
||||
rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
|
||||
};
|
||||
|
||||
ngffpcie_reset_h: ngffpcie-reset-h {
|
||||
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
pmic_int: pmic_int {
|
||||
rockchip,pins =
|
||||
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
vcc5v0_usb_host_en: vcc5v0_usb_host_en {
|
||||
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
|
||||
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
pmuio1-supply = <&vcc3v3_pmu>;
|
||||
pmuio2-supply = <&vcc3v3_pmu>;
|
||||
vccio1-supply = <&vccio_acodec>;
|
||||
vccio3-supply = <&vccio_sd>;
|
||||
vccio4-supply = <&vcc_3v3>;
|
||||
vccio5-supply = <&vcc_3v3>;
|
||||
vccio6-supply = <&vcc_1v8>;
|
||||
vccio7-supply = <&vcc_3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm8 {
|
||||
/* fan 5v - gnd - pwm */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm10 {
|
||||
/* pin 7 of header con2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm11 {
|
||||
/* pin 15 of header con2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm12 {
|
||||
/* pin 21 of header con2 */
|
||||
/* shared with uart9 + spi3 */
|
||||
pinctrl-0 = <&pwm12m1_pins>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm13 {
|
||||
/* pin 24 of header con2 */
|
||||
/* shared with uart9 */
|
||||
pinctrl-0 = <&pwm13m1_pins>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm14 {
|
||||
/* pin 23 of header con2 */
|
||||
/* shared with spi3 */
|
||||
pinctrl-0 = <&pwm14m1_pins>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm15 {
|
||||
/* pin 19 of header con2 */
|
||||
/* shared with spi3 */
|
||||
pinctrl-0 = <&pwm15m1_pins>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
vref-supply = <&vcca_1v8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
bus-width = <8>;
|
||||
max-frequency = <200000000>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc0 {
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
sd-uhs-sdr104;
|
||||
vmmc-supply = <&vcc3v3_sd>;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi3 {
|
||||
/* pin 19 (MO) + 21 (MI) + 23 (CK) of header con2 */
|
||||
/* shared with pwm12/14/15 and uart9 */
|
||||
pinctrl-0 = <&spi3m1_pins>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
rockchip,hw-tshut-mode = <1>;
|
||||
rockchip,hw-tshut-polarity = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
/* pin 8 (TX) + 10 (RX) (RTS:16, CTS:18) of header con2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
/* debug-uart */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart7 {
|
||||
/* pin 11 (TX) + 13 (RX) of header con2 */
|
||||
pinctrl-0 = <&uart7m1_xfer>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart9 {
|
||||
/* pin 21 (TX) + 24 (RX) of header con2 */
|
||||
/* shared with pwm13 and pwm12/spi3 */
|
||||
pinctrl-0 = <&uart9m1_xfer>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb_host0_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_xhci {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_xhci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy0_host {
|
||||
phy-supply = <&vcc5v0_usb_host>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy0_otg {
|
||||
phy-supply = <&vcc5v0_usb_otg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy1 {
|
||||
/* USB for PCIe/M2 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy1_host {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy1_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vop {
|
||||
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vop_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vp0 {
|
||||
vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||||
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||||
remote-endpoint = <&hdmi_in_vp0>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,3 +1,10 @@
|
|||
BANANAPI-BPI-R2-PRO
|
||||
M: Frank Wunderlich <frank-w@public-files.de>
|
||||
S: Maintained
|
||||
F: configs/bpi-r2-pro-rk3568_defconfig
|
||||
F: arch/arm/dts/rk3568-bpi-r2-pro.dts
|
||||
F: arch/arm/dts/rk3568-bpi-r2-pro-u-boot.dtsi
|
||||
|
||||
EVB-RK3568
|
||||
M: Joseph Chen <chenjh@rock-chips.com>
|
||||
S: Maintained
|
||||
|
|
|
|||
93
configs/bpi-r2-pro-rk3568_defconfig
Normal file
93
configs/bpi-r2-pro-rk3568_defconfig
Normal file
|
|
@ -0,0 +1,93 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SKIP_LOWLEVEL_INIT=y
|
||||
CONFIG_COUNTER_FREQUENCY=24000000
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_TEXT_BASE=0x00a00000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rk3568-bpi-r2-pro"
|
||||
CONFIG_SYS_PROMPT="BPI-R2PRO> "
|
||||
CONFIG_ROCKCHIP_RK3568=y
|
||||
CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
|
||||
CONFIG_SPL_SERIAL=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x600000
|
||||
CONFIG_SPL_STACK=0x400000
|
||||
CONFIG_DEBUG_UART_BASE=0xFE660000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_SYS_LOAD_ADDR=0xc00800
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_AHCI=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_FIT_SIGNATURE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_BOOTSTD_FULL=y
|
||||
CONFIG_LEGACY_IMAGE_FORMAT=y
|
||||
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-bpi-r2-pro.dtb"
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
CONFIG_SPL_MAX_SIZE=0x40000
|
||||
CONFIG_SPL_PAD_TO=0x7f8000
|
||||
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
||||
CONFIG_SPL_BSS_START_ADDR=0x4000000
|
||||
CONFIG_SPL_BSS_MAX_SIZE=0x4000
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_ATF=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_SYSBOOT=y
|
||||
CONFIG_CMD_PMIC=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
# CONFIG_SPL_DOS_PARTITION is not set
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
CONFIG_DWC_AHCI=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_SUPPORT_EMMC_RPMB=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_DWC_ETH_QOS=y
|
||||
CONFIG_DWC_ETH_QOS_ROCKCHIP=y
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_RK8XX=y
|
||||
CONFIG_REGULATOR_RK8XX=y
|
||||
CONFIG_PWM_ROCKCHIP=y
|
||||
CONFIG_SPL_RAM=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_DM_SCSI=y
|
||||
CONFIG_BAUDRATE=1500000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_SYS_NS16550_MEM32=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_GENERIC=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_GENERIC=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_GENERIC=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
|
|
@ -102,6 +102,7 @@ List of mainline supported Rockchip boards:
|
|||
|
||||
* rk3568
|
||||
- Rockchip Evb-RK3568 (evb-rk3568)
|
||||
- Banana Pi BPI-R2 Pro (bpi-r2-pro-rk3568)
|
||||
- EmbedFire LubanCat 2 (lubancat-2-rk3568)
|
||||
- FriendlyElec NanoPi R5C (nanopi-r5c-rk3568)
|
||||
- FriendlyElec NanoPi R5S (nanopi-r5s-rk3568)
|
||||
|
|
|
|||
Loading…
Reference in a new issue