Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-10 07:04:28 +00:00
Code Issues Projects Releases Packages Wiki Activity

board: Add support for Conclusive KSTR-SAMA5D27

Browse source 
Introduce support for Conclusive KSTR-SAMA5D27 Single Board Computer.

Co-developed-by: Jakub Klama <jakub@conclusive.pl>
Signed-off-by: Jakub Klama <jakub@conclusive.pl>
Co-developed-by: Marcin Jabrzyk <marcin@conclusive.pl>
Signed-off-by: Marcin Jabrzyk <marcin@conclusive.pl>
Signed-off-by: Artur Rojek <artur@conclusive.pl>
This commit is contained in:
Artur Rojek 2023-10-18 16:00:59 +02:00 committed by Eugen Hristev
parent a6965af7e4
commit 27347893f0
10 changed files with 540 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
arch/arm/dts/Makefile
View file

@ -1232,6 +1232,9 @@ dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \
dtb-$(CONFIG_TARGET_SAMA5D27_WLSOM1_EK) += \
at91-sama5d27_wlsom1_ek.dtb
dtb-$(CONFIG_TARGET_KSTR_SAMA5D27) += \
at91-kstr-sama5d27.dtb
dtb-$(CONFIG_TARGET_SAMA5D2_ICP) += \
at91-sama5d2_icp.dtb

42
arch/arm/dts/at91-kstr-sama5d27-u-boot.dtsi Normal file
View file

@ -0,0 +1,42 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* at91-kstr-sama5d27-u-boot.dtsi - Device Tree Include file w/ U-Boot specific
* properties for Conclusive KSTR-SAMA5D27 board
*
* Copyright (C) 2023 Conclusive Engineering Sp. z o. o.
*
*/
/ {
chosen {
bootph-all;
};
};
&sdmmc0 {
bootph-all;
};
&uart1 {
bootph-all;
};
&pinctrl_uart1_default {
bootph-all;
};
&pinctrl_macb0_phy_irq {
bootph-all;
};
&pinctrl_macb0_rmii {
bootph-all;
};
&pinctrl_sdmmc0_cmd_dat_default {
bootph-all;
};
&pinctrl_sdmmc0_ck_cd_default {
bootph-all;
};

127
arch/arm/dts/at91-kstr-sama5d27.dts Normal file
View file

@ -0,0 +1,127 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* at91-kstr-sama5d27.dts - Device Tree file for Conclusive KSTR-SAMA5D27 board
*
* Copyright (C) 2019-2023 Conclusive Engineering Sp. z o. o.
*
*/
/dts-v1/;
#include "sama5d2.dtsi"
#include "sama5d2-pinfunc.h"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/mfd/atmel-flexcom.h>
/ {
model = "Conclusive KSTR-SAMA5D27";
compatible = "conclusive,kstr-sama5d27", "atmel,sama5d2", "atmel,sama5";
chosen {
stdout-path = &uart1;
};
aliases {
i2c2 = &i2c6;
};
};
&main_xtal {
clock-frequency = <12000000>;
};
&sdmmc0 {
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
status = "okay";
};
&macb0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
phy-mode = "rmii";
status = "okay";
ethernet-phy@0 {
reg = <0x0>;
reset-gpios = <&pioA 44 GPIO_ACTIVE_LOW>;
};
};
&flx4 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "okay";
};
&i2c6 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx4_i2c>;
status = "okay";
eeprom: eeprom@50 {
compatible = "microchip,24c32", "atmel,24c32";
reg = <0x50>;
read-only;
pagesize = <32>;
status = "okay";
};
};
&pioA {
pinctrl {
pinctrl_uart1_default: uart1_default {
pinmux = <PIN_PD2__URXD1>,
<PIN_PD3__UTXD1>;
bias-disable;
};
pinctrl_macb0_phy_irq: macb0_phy_irq {
pinmux = <PIN_PB13__GPIO>;
bias-disable;
};
pinctrl_macb0_rmii: macb0_rmii {
pinmux = <PIN_PB14__GTXCK>,
<PIN_PB15__GTXEN>,
<PIN_PB16__GRXDV>,
<PIN_PB17__GRXER>,
<PIN_PB18__GRX0>,
<PIN_PB19__GRX1>,
<PIN_PB20__GTX0>,
<PIN_PB21__GTX1>,
<PIN_PB22__GMDC>,
<PIN_PB23__GMDIO>;
bias-disable;
};
pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
pinmux = <PIN_PA1__SDMMC0_CMD>,
<PIN_PA2__SDMMC0_DAT0>,
<PIN_PA3__SDMMC0_DAT1>,
<PIN_PA4__SDMMC0_DAT2>,
<PIN_PA5__SDMMC0_DAT3>;
bias-pull-up;
};
pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
pinmux = <PIN_PA0__SDMMC0_CK>,
<PIN_PA11__SDMMC0_VDDSEL>,
<PIN_PA13__SDMMC0_CD>;
bias-disable;
};
pinctrl_flx4_i2c: flx4_i2c {
pinmux = <PIN_PC28__FLEXCOM4_IO0>,
<PIN_PC29__FLEXCOM4_IO1>;
bias-disable;
};
};
};

12
arch/arm/mach-at91/Kconfig
View file

@ -204,6 +204,17 @@ config TARGET_SAMA5D27_WLSOM1_EK
processor-based SAMA5D2 MPU with 2 Gbit LPDDR2-SDRAM
in a single package.
config TARGET_KSTR_SAMA5D27
bool "Conclusive KSTR-SAMA5D27 board"
select BOARD_EARLY_INIT_F
select SAMA5D2
help
The KSTR-SAMA5D27 embeds SAMA5D27 SoC, together with
256 MiB SDRAM, 10/100 Mbit/s Ethernet, 96 Mbit/s Wi-Fi b/g/n,
Bluetooth 4.1 LE, USB OTG controller w/ type-C USB connector
and stackable GPIO headers in an all-in-one SBC form factor:
https://conclusive.pl/products/kstr-sama5d27-sbc/
config TARGET_SAMA5D2_ICP
bool "SAMA5D2 Industrial Connectivity Platform (ICP)"
select SAMA5D2
@ -364,6 +375,7 @@ source "board/atmel/sama5d4_xplained/Kconfig"
source "board/atmel/sama5d4ek/Kconfig"
source "board/bluewater/gurnard/Kconfig"
source "board/calao/usb_a9263/Kconfig"
source "board/conclusive/kstr-sama5d27/Kconfig"
source "board/egnite/ethernut5/Kconfig"
source "board/esd/meesc/Kconfig"
source "board/gardena/smart-gateway-at91sam/Kconfig"

15
board/conclusive/kstr-sama5d27/Kconfig Normal file
View file

@ -0,0 +1,15 @@
if TARGET_KSTR_SAMA5D27
config SYS_BOARD
default "kstr-sama5d27"
config SYS_VENDOR
default "conclusive"
config SYS_SOC
default "at91"
config SYS_CONFIG_NAME
default "kstr-sama5d27"
endif

9
board/conclusive/kstr-sama5d27/MAINTAINERS Normal file
View file

@ -0,0 +1,9 @@
CONCLUSIVE KSTR-SAMA5D27 BOARD
M: Jakub Klama <jakub@conclusive.pl>
M: Artur Rojek <artur@conclusive.pl>
S: Maintained
F: board/conclusive/kstr-sama5d27
F: include/configs/kstr-sama5d27.h
F: configs/kstr_sama5d27_defconfig
F: arch/arm/dts/at91-kstr-sama5d27.dts
F: arch/arm/dts/at91-kstr-sama5d27-u-boot.dtsi

5
board/conclusive/kstr-sama5d27/Makefile Normal file
View file

@ -0,0 +1,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2019-2023 Conclusive Engineering Sp. z o. o.
obj-y += kstr-sama5d27.o

239
board/conclusive/kstr-sama5d27/kstr-sama5d27.c Normal file
View file

@ -0,0 +1,239 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* kstr-sama5d27.c - Board init file for Conclusive KSTR-SAMA5D27 board
* Copyright (C) 2021-2023 Conclusive Engineering Sp. z o. o.
*/
#include <common.h>
#include <debug_uart.h>
#include <init.h>
#include <env.h>
#include <fdt_support.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/atmel_pio4.h>
#include <asm/arch/atmel_mpddrc.h>
#include <asm/arch/atmel_sdhci.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <asm/arch/sama5d2.h>
#include <linux/delay.h>
#ifdef CONFIG_USB_GADGET_ATMEL_USBA
#include <asm/arch/atmel_usba_udc.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
static void board_uart1_hw_init(void)
{
/* URXD1 */
atmel_pio4_set_a_periph(AT91_PIO_PORTD, 2, ATMEL_PIO_PUEN_MASK);
/* UTXD1 */
atmel_pio4_set_a_periph(AT91_PIO_PORTD, 3, 0);
at91_periph_clk_enable(ATMEL_ID_UART1);
}
void board_debug_uart_init(void)
{
board_uart1_hw_init();
}
#endif
void board_lan8720a_init(void)
{
/* LAN8720A_nRST */
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 12, 0);
/*
* Force 0 on RXER/PHYAD0. LAN8720A chipset will latch with address 0 on
* MDIO bus.
*/
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 17, 0);
/* Minimal delay of reset signal is 25 ms */
mdelay(30);
/* LAN8720A_nRST */
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 12, 1);
}
void board_usba_init(void)
{
#ifdef CONFIG_USB_GADGET_ATMEL_USBA
/* USB device peripheral initialization: sama5d2_devices.c */
at91_udp_hw_init();
/* USB device controller drivers/usb/gadget/atmel_usba_udc.c */
usba_udc_probe(&pdata);
#endif
}
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
#ifdef CONFIG_DEBUG_UART
debug_uart_init();
#endif
return 0;
}
#endif
int ft_board_setup(void *blob, struct bd_info *bd)
{
char *wlanaddr = env_get("eth1addr");
if (wlanaddr)
do_fixup_by_compat(blob, "brcm,bcm4329-fmac", "local-mac-address",
wlanaddr, strlen(wlanaddr), 1);
else
printf("Not setting WIFI mac address. Check if EEPROM TLV is correctly set up.\n");
return 0;
}
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
board_usba_init();
board_lan8720a_init();
return 0;
}
static int settings_r(void)
{
mac_read_from_eeprom();
serial_read_from_eeprom(0);
return 0;
}
EVENT_SPY_SIMPLE(EVT_SETTINGS_R, settings_r);
#if defined(CONFIG_DISPLAY_BOARDINFO_LATE)
int checkboard(void)
{
const char *serial_number;
serial_number = env_get("serial#");
if (!serial_number)
printf("Warning: unknown serial number.\n");
else
printf("S/N: %s\n", serial_number);
return 0;
}
#endif
#ifdef CONFIG_MISC_INIT_R
int misc_init_r(void)
{
return 0;
}
#endif
int dram_init(void)
{
gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
CFG_SYS_SDRAM_SIZE);
return 0;
}
/* SPL */
#ifdef CONFIG_SPL_BUILD
void spl_board_init(void)
{
}
static void ddrc_conf(struct atmel_mpddrc_config *ddrc)
{
ddrc->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
ATMEL_MPDDRC_CR_NR_ROW_13 |
ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |
ATMEL_MPDDRC_CR_DIC_DS |
ATMEL_MPDDRC_CR_ZQ_LONG |
ATMEL_MPDDRC_CR_NB_8BANKS |
ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |
ATMEL_MPDDRC_CR_UNAL_SUPPORTED);
ddrc->rtr = 0x511;
ddrc->tpr0 = ((7 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET) |
(3 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET) |
(3 << ATMEL_MPDDRC_TPR0_TWR_OFFSET) |
(9 << ATMEL_MPDDRC_TPR0_TRC_OFFSET) |
(3 << ATMEL_MPDDRC_TPR0_TRP_OFFSET) |
(4 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET) |
(4 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET) |
(2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET));
ddrc->tpr1 = ((22 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET) |
(23 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET) |
(200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET) |
(3 << ATMEL_MPDDRC_TPR1_TXP_OFFSET));
ddrc->tpr2 = ((2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET) |
(8 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET) |
(4 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET) |
(4 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET) |
(8 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET));
}
void mem_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
struct atmel_mpddrc_config ddrc_config;
u32 reg;
ddrc_conf(&ddrc_config);
at91_periph_clk_enable(ATMEL_ID_MPDDRC);
writel(AT91_PMC_DDR, &pmc->scer);
reg = readl(&mpddrc->io_calibr);
reg &= ~ATMEL_MPDDRC_IO_CALIBR_RDIV;
reg |= ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_55;
reg &= ~ATMEL_MPDDRC_IO_CALIBR_TZQIO;
reg |= ATMEL_MPDDRC_IO_CALIBR_TZQIO_(101);
writel(reg, &mpddrc->io_calibr);
writel(ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_ONE_CYCLE,
&mpddrc->rd_data_path);
ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config);
writel(0x3, &mpddrc->cal_mr4);
writel(64, &mpddrc->tim_cal);
}
void at91_pmc_init(void)
{
u32 tmp;
/*
* While coming from the ROM code, we run on PLLA @ 492 MHz / 164 MHz,
* so we need to slow down and configure MCKR accordingly.
* This is why we have a special flavor of the switching function.
*/
tmp = AT91_PMC_MCKR_PLLADIV_2 |
AT91_PMC_MCKR_MDIV_3 |
AT91_PMC_MCKR_CSS_MAIN;
at91_mck_init_down(tmp);
tmp = AT91_PMC_PLLAR_29 |
AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
AT91_PMC_PLLXR_MUL(40) |
AT91_PMC_PLLXR_DIV(1);
at91_plla_init(tmp);
tmp = AT91_PMC_MCKR_H32MXDIV |
AT91_PMC_MCKR_PLLADIV_2 |
AT91_PMC_MCKR_MDIV_3 |
AT91_PMC_MCKR_CSS_PLLA;
at91_mck_init(tmp);
}
#endif

73
configs/kstr_sama5d27_defconfig Normal file
View file

@ -0,0 +1,73 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TEXT_BASE=0x26f00000
CONFIG_TARGET_KSTR_SAMA5D27=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-kstr-sama5d27"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SYS_LOAD_ADDR=0x24000000
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_CMD_TLV_EEPROM=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FAT=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_AT91_H32MX=y
CONFIG_AT91_GENERIC_CLK=y
CONFIG_ATMEL_PIO4=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_AT91=y
CONFIG_I2C_EEPROM=y
CONFIG_MICROCHIP_FLEXCOM=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ATMEL=y
CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91PIO4=y
CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_ATMEL_USART=y
CONFIG_SYSRESET=y
CONFIG_SYSRESET_AT91=y
CONFIG_TEE=y
CONFIG_OPTEE=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_VENDOR_NUM=0x16c0
CONFIG_USB_GADGET_PRODUCT_NUM=0x03e9
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_USB_GADGET_DOWNLOAD=y
# CONFIG_EFI_LOADER is not set

15
include/configs/kstr-sama5d27.h Normal file
View file

@ -0,0 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2021-2023 Conclusive Engineering Sp. z o. o.
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include "at91-sama5_common.h"
/* SDRAM */
#define CFG_SYS_SDRAM_BASE 0x20000000
#define CFG_SYS_SDRAM_SIZE 0x10000000
#endif