treewide: unify the linker symbol reference format

Now all linker symbols are declared as type char[]. Though we can
reference the address via both the array name 'var' and its address
'&var'. It's better to unify them to avoid confusing developers.
This patch converts all '&var' linker symbol refrences to the most
commonly used format 'var'.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Shiji Yang 2023-08-03 09:47:17 +08:00 committed by Tom Rini
parent 506df9dc58
commit ccea96f443
21 changed files with 59 additions and 59 deletions

View file

@ -13,20 +13,20 @@ DECLARE_GLOBAL_DATA_PTR;
int copy_uboot_to_ram(void)
{
size_t len = (size_t)&__image_copy_end - (size_t)&__image_copy_start;
size_t len = (size_t)__image_copy_end - (size_t)__image_copy_start;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
memcpy((void *)gd->relocaddr, (void *)&__image_copy_start, len);
memcpy((void *)gd->relocaddr, (void *)__image_copy_start, len);
return 0;
}
int clear_bss(void)
{
ulong dst_addr = (ulong)&__bss_start + gd->reloc_off;
size_t len = (size_t)&__bss_end - (size_t)&__bss_start;
ulong dst_addr = (ulong)__bss_start + gd->reloc_off;
size_t len = (size_t)__bss_end - (size_t)__bss_start;
memset((void *)dst_addr, 0x00, len);
@ -38,8 +38,8 @@ int clear_bss(void)
*/
int do_elf_reloc_fixups(void)
{
Elf32_Rela *re_src = (Elf32_Rela *)(&__rel_dyn_start);
Elf32_Rela *re_end = (Elf32_Rela *)(&__rel_dyn_end);
Elf32_Rela *re_src = (Elf32_Rela *)__rel_dyn_start;
Elf32_Rela *re_end = (Elf32_Rela *)__rel_dyn_end;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
@ -55,8 +55,8 @@ int do_elf_reloc_fixups(void)
offset_ptr_rom = (Elf32_Addr *)re_src->r_offset;
/* Check that the location of the relocation is in .text */
if (offset_ptr_rom >= (Elf32_Addr *)&__image_copy_start &&
offset_ptr_rom < (Elf32_Addr *)&__image_copy_end) {
if (offset_ptr_rom >= (Elf32_Addr *)__image_copy_start &&
offset_ptr_rom < (Elf32_Addr *)__image_copy_end) {
unsigned int val, do_swap = 0;
/* Switch to the in-RAM version */
offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom +
@ -64,11 +64,11 @@ int do_elf_reloc_fixups(void)
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if (((u32)offset_ptr_rom >= (u32)&__text_start &&
(u32)offset_ptr_rom <= (u32)&__text_end)
if (((u32)offset_ptr_rom >= (u32)__text_start &&
(u32)offset_ptr_rom <= (u32)__text_end)
#if defined(__ARC700__) || defined(__ARC600__)
|| ((u32)offset_ptr_rom >= (u32)&__ivt_start &&
(u32)offset_ptr_rom <= (u32)&__ivt_end)
|| ((u32)offset_ptr_rom >= (u32)__ivt_start &&
(u32)offset_ptr_rom <= (u32)__ivt_end)
#endif
)
do_swap = 1;
@ -91,8 +91,8 @@ int do_elf_reloc_fixups(void)
val = (val << 16) | (val >> 16);
/* Check that the target points into executable */
if (val < (unsigned int)&__image_copy_start ||
val > (unsigned int)&__image_copy_end) {
if (val < (unsigned int)__image_copy_start ||
val > (unsigned int)__image_copy_end) {
/* TODO: Use panic() instead of debug()
*
* For some reason GCC might generate
@ -101,7 +101,7 @@ int do_elf_reloc_fixups(void)
* ----------------------->8--------------------
* static int setup_mon_len(void)
* {
* gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
* gd->mon_len = (ulong)__bss_end - CONFIG_SYS_MONITOR_BASE;
* return 0;
* }
* ----------------------->8--------------------

View file

@ -100,7 +100,7 @@ int arch_cpu_init(void)
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
mx28_fixup_vt((uint32_t)&_start);
mx28_fixup_vt((uint32_t)_start);
/*
* Enable NAND clock

View file

@ -103,7 +103,7 @@ static void mxs_spl_fixup_vectors(void)
*/
/* cppcheck-suppress nullPointer */
memcpy(0x0, &_start, 0x60);
memcpy(0x0, _start, 0x60);
}
static void mxs_spl_console_init(void)

View file

@ -29,7 +29,7 @@ void *board_fdt_blob_setup(int *err)
return (void *)nt_fw_dtb;
log_debug("%s: DTB not found.\n", __func__);
}
log_debug("%s: fall back to builtin DTB, %p\n", __func__, &_end);
log_debug("%s: fall back to builtin DTB, %p\n", __func__, _end);
return (void *)&_end;
return (void *)_end;
}

View file

@ -146,7 +146,7 @@ void relocate_code(ulong start_addr_sp, gd_t *new_gd, ulong relocaddr)
/* Clear the .bss section */
bss_start = (uint8_t *)((unsigned long)__bss_start + off);
bss_len = (unsigned long)&__bss_end - (unsigned long)__bss_start;
bss_len = (unsigned long)__bss_end - (unsigned long)__bss_start;
memset(bss_start, 0, bss_len);
/* Jump to the relocated U-Boot */

View file

@ -42,7 +42,7 @@ void board_init_f(ulong dummy)
enable_caches();
/* Clear the BSS */
memset(__bss_start, 0, (char *)&__bss_end - __bss_start);
memset(__bss_start, 0, (size_t)__bss_end - (size_t)__bss_start);
gd->flags |= GD_FLG_SPL_INIT;

View file

@ -70,7 +70,7 @@ void secondary_cpu_init(void)
cpumask = 0x0f;
/* Make BootROM/TPL redirect Core1's bootup flow to our entry point */
writel((uintptr_t)&_start, sysc + BOOT_SRAM_BASE_REG);
writel((uintptr_t)_start, sysc + BOOT_SRAM_BASE_REG);
bootup_secondary_core();
}

View file

@ -86,7 +86,7 @@ unsigned long spl_nor_get_uboot_base(void)
uint32_t spl_nand_get_uboot_raw_page(void)
{
const struct stage_header *sh = (const struct stage_header *)&_start;
const struct stage_header *sh = (const struct stage_header *)_start;
u32 addr;
addr = image_get_header_size() + be32_to_cpu(sh->stage_size);

View file

@ -77,8 +77,8 @@ void harts_early_init(void)
* If it is not cleared, the ECC part is invalid, and an ECC error
* will be reported when reading data.
*/
ptr = (ulong *)&__bss_end;
len = L2_LIM_MEM_END - (ulong)&__bss_end;
ptr = (ulong *)__bss_end;
len = L2_LIM_MEM_END - (ulong)__bss_end;
remain = len % sizeof(ulong);
len /= sizeof(ulong);

View file

@ -26,11 +26,11 @@ DECLARE_GLOBAL_DATA_PTR;
int copy_uboot_to_ram(void)
{
size_t len = (uintptr_t)&__data_end - (uintptr_t)&__text_start;
size_t len = (uintptr_t)__data_end - (uintptr_t)__text_start;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
memcpy((void *)gd->relocaddr, (void *)&__text_start, len);
memcpy((void *)gd->relocaddr, (void *)__text_start, len);
return 0;
}
@ -38,8 +38,8 @@ int copy_uboot_to_ram(void)
#ifndef CONFIG_EFI_APP
int clear_bss(void)
{
ulong dst_addr = (ulong)&__bss_start + gd->reloc_off;
size_t len = (uintptr_t)&__bss_end - (uintptr_t)&__bss_start;
ulong dst_addr = (ulong)__bss_start + gd->reloc_off;
size_t len = (uintptr_t)__bss_end - (uintptr_t)__bss_start;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
@ -150,12 +150,12 @@ static void do_elf_reloc_fixups32(unsigned int text_base, uintptr_t size,
*/
int do_elf_reloc_fixups(void)
{
void *re_src = (void *)(&__rel_dyn_start);
void *re_end = (void *)(&__rel_dyn_end);
void *re_src = (void *)__rel_dyn_start;
void *re_end = (void *)__rel_dyn_end;
uint text_base;
/* The size of the region of u-boot that runs out of RAM. */
uintptr_t size = (uintptr_t)&__bss_end - (uintptr_t)&__text_start;
uintptr_t size = (uintptr_t)__bss_end - (uintptr_t)__text_start;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;

View file

@ -138,9 +138,9 @@ static int x86_spl_init(void)
#ifndef CONFIG_SYS_COREBOOT
log_debug("bss\n");
debug("BSS clear from %lx to %lx len %lx\n", (ulong)&__bss_start,
(ulong)&__bss_end, (ulong)&__bss_end - (ulong)&__bss_start);
memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start);
debug("BSS clear from %lx to %lx len %lx\n", (ulong)__bss_start,
(ulong)__bss_end, (ulong)__bss_end - (ulong)__bss_start);
memset(__bss_start, 0, (ulong)__bss_end - (ulong)__bss_start);
# ifndef CONFIG_TPL
/* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */

View file

@ -9,8 +9,8 @@
int clear_bss(void)
{
size_t len = (size_t)&__bss_end - (size_t)&__bss_start;
size_t len = (size_t)__bss_end - (size_t)__bss_start;
memset((void *)&__bss_start, 0x00, len);
memset((void *)__bss_start, 0x00, len);
return 0;
}

View file

@ -122,7 +122,7 @@ void *board_fdt_blob_setup(int *err)
return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
}
return (ulong *)&_end;
return (ulong *)_end;
}
int board_init(void)

View file

@ -19,7 +19,7 @@ void *board_fdt_blob_setup(int *err)
return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
}
return (ulong *)&_end;
return (ulong *)_end;
}
int board_init(void)

View file

@ -49,5 +49,5 @@ void *board_fdt_blob_setup(int *err)
return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
}
return (ulong *)&_end;
return (ulong *)_end;
}

View file

@ -374,12 +374,12 @@ void *board_fdt_blob_setup(int *err)
* region
*/
if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
fdt_blob = (ulong *)&_image_binary_end;
fdt_blob = (ulong *)_image_binary_end;
else
fdt_blob = (ulong *)&__bss_end;
fdt_blob = (ulong *)__bss_end;
} else {
/* FDT is at end of image */
fdt_blob = (ulong *)&_end;
fdt_blob = (ulong *)_end;
}
if (fdt_magic(fdt_blob) == FDT_MAGIC)

View file

@ -124,8 +124,8 @@ static int display_text_info(void)
#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
ulong bss_start, bss_end, text_base;
bss_start = (ulong)&__bss_start;
bss_end = (ulong)&__bss_end;
bss_start = (ulong)__bss_start;
bss_end = (ulong)__bss_end;
#ifdef CONFIG_TEXT_BASE
text_base = CONFIG_TEXT_BASE;
@ -290,21 +290,21 @@ __weak int init_func_vid(void)
static int setup_mon_len(void)
{
#if defined(__ARM__) || defined(__MICROBLAZE__)
gd->mon_len = (ulong)&__bss_end - (ulong)_start;
gd->mon_len = (ulong)__bss_end - (ulong)_start;
#elif defined(CONFIG_SANDBOX) && !defined(__riscv)
gd->mon_len = (ulong)&_end - (ulong)_init;
gd->mon_len = (ulong)_end - (ulong)_init;
#elif defined(CONFIG_SANDBOX)
/* gcc does not provide _init in crti.o on RISC-V */
gd->mon_len = 0;
#elif defined(CONFIG_EFI_APP)
gd->mon_len = (ulong)&_end - (ulong)_init;
gd->mon_len = (ulong)_end - (ulong)_init;
#elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
gd->mon_len = CONFIG_SYS_MONITOR_LEN;
#elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
gd->mon_len = (ulong)(__bss_end) - (ulong)(_start);
#elif defined(CONFIG_SYS_MONITOR_BASE)
/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
/* TODO: use (ulong)__bss_end - (ulong)__text_start; ? */
gd->mon_len = (ulong)__bss_end - CONFIG_SYS_MONITOR_BASE;
#endif
return 0;
}

View file

@ -126,9 +126,9 @@ static int initr_reloc_global_data(void)
#ifdef __ARM__
monitor_flash_len = _end - __image_copy_start;
#elif defined(CONFIG_RISCV)
monitor_flash_len = (ulong)&_end - (ulong)&_start;
monitor_flash_len = (ulong)_end - (ulong)_start;
#elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
monitor_flash_len = (ulong)&__init_end - gd->relocaddr;
monitor_flash_len = (ulong)__init_end - gd->relocaddr;
#endif
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
/*

View file

@ -46,13 +46,13 @@ void ddr_load_train_firmware(enum fw_type type)
u32 error = 0;
unsigned long pr_to32, pr_from32;
uint32_t fw_offset = type ? IMEM_2D_OFFSET : 0;
unsigned long imem_start = (unsigned long)&_end + fw_offset;
unsigned long imem_start = (unsigned long)_end + fw_offset;
unsigned long dmem_start;
unsigned long imem_len = IMEM_LEN, dmem_len = DMEM_LEN;
#ifdef CONFIG_SPL_OF_CONTROL
if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) {
imem_start = roundup((unsigned long)&_end +
imem_start = roundup((unsigned long)_end +
fdt_totalsize(gd->fdt_blob), 4) +
fw_offset;
}

View file

@ -1230,12 +1230,12 @@ static void *fdt_find_separate(void)
#ifdef CONFIG_SPL_BUILD
/* FDT is at end of BSS unless it is in a different memory region */
if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
fdt_blob = (ulong *)&_image_binary_end;
fdt_blob = (ulong *)_image_binary_end;
else
fdt_blob = (ulong *)&__bss_end;
fdt_blob = (ulong *)__bss_end;
#else
/* FDT is at end of image */
fdt_blob = (ulong *)&_end;
fdt_blob = (ulong *)_end;
if (_DEBUG && !fdtdec_prepare_fdt(fdt_blob)) {
int stack_ptr;

View file

@ -51,7 +51,7 @@ static inline uintptr_t __attribute__((no_instrument_function))
uintptr_t offset = (uintptr_t)func_ptr;
#ifdef CONFIG_SANDBOX
offset -= (uintptr_t)&_init;
offset -= (uintptr_t)_init;
#else
if (gd->flags & GD_FLG_RELOC)
offset -= gd->relocaddr;