Commit graph

16054 commits

Author SHA1 Message Date
Nikhil M Jain
36bc171a68 board: ti: am62x: am62x: Include K3 common .env files
Include ti_armv7_common.env and ti/mmc.env, which includes' K3  common
environment variables used across different K3 boards.

This patch depends on
https://lore.kernel.org/all/20230315052745.110502-1-n-francis@ti.com/

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-03-29 13:30:29 -04:00
Nikhil M Jain
25d29a8376 include: configs: am62ax: Change to using .env
Move to using .env file for setting up environment variables for am62ax.

This patch depends on
https://lore.kernel.org/all/20230315052745.110502-1-n-francis@ti.com/

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-03-29 13:30:29 -04:00
Neha Malcom Francis
fce062d91a include: configs: j721e_evm: Change to using .env
Move to using .env file for setting up environment variables for J721E
and J7200.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-03-29 13:30:29 -04:00
Neha Malcom Francis
7e55dd25c3 include: configs: j721s2_evm: Change to using .env
Move to using .env file for setting up environment variables for J721S2.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-03-29 13:30:29 -04:00
Christian Gmeiner
e44657ed74 arm: mach-k3: introduce generic board detction kconfig option
For non TI boards it is not possible to enable the do_board_detect()
call as TI_I2C_BOARD_DETECT is defined in board/ti/common/Kconfig.

I want to use do_board_detect() to dectect boards and properties based
on some SPI communication with a FPGA.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-03-29 13:30:28 -04:00
Neha Malcom Francis
54ff4eeb59 board: ti: Kconfig: Correct invalid Kconfig syntax
Kconfig does not support using 'select' to select a 'choice'. A choice
can be configured by either setting the choice symbol to 'y' in a
configuration file or by setting a 'default' of the choice.

In board/ti/*/Kconfig the SOC_K3_* choice is already set to 'y' in their
corresponding configs/*_defconfig file. So remove selecting it.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-03-29 11:58:26 -04:00
Jan Kiszka
352ed65df7 iot2050: Add support for configuring M.2 connector
The M.2 slots of the related IOT2050 variant need to be configured
according to the plugged cards. This tries to detect the card using the
M.2 configuration pins of the B-key slot. If that fails, a U-Boot
environment variable can be set to configure manually. This variable is
write-permitted also in secure boot mode as it is not able to undermine
the integrity of the booted system.

The configuration is then applied to mux the serdes and to fix up the
device tree passed to or loaded by the bootloader. The fix-ups are
coming from device tree overlays that are embedded into the firmware
image and there also integrity protected. The OS remains free to load
a device tree to which they do not apply: U-Boot will not fail to boot
in that case.

Based on original patch by Chao Zeng.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-03-29 11:58:26 -04:00
chao zeng
f750769aa3 board: siemens: iot2050: use the named gpio to control the user-button
User-button is controlled by the mcu domain gpio number 25.
But main0 main1 mcu domain all have gpio number 25.

To identify where the gpio is from, Using gpio controll base as the prefix
to indicate the gpio resource.

Signed-off-by: chao zeng <chao.zeng@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-29 11:58:26 -04:00
Jan Kiszka
367b1bf2ce arm: dts: iot2050: Optionally embed OTP programming data into image
Use external blob otpcmd.bin to replace the 0xff filled OTP programming
command block to create a firmware image that provisions the OTP on
first boot. This otpcmd.bin is generated from the customer keys using
steps described in the meta-iot2050 integration layer for the device.

Based on original patch by Baocheng Su.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-03-29 11:58:26 -04:00
Jan Kiszka
4578095f1b iot2050: Add watchdog start to bootcmd
Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value
and this to zero by default. Users can then enable the watchdog once the
use and OS which picks it up during boot.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-03-29 11:58:26 -04:00
Jan Kiszka
d5436aad14 iot2050: Migrate settings into board env file
Anything that is not boot-env related is better kept there by now.

At this chance, also drop a stale comment from iot2050.h

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-03-29 11:58:26 -04:00
Su Baocheng
ffbd5b29a4 arm: dts: iot2050: Use the auto generator nodes for fdt
Refactor according to the entry `fit: Entry containing a FIT` of
document tools/binman/README.entries.

As the generator uses the device tree name for the config description,
board_fit_config_name_match requires a small adjustment as well.

Signed-off-by: Su Baocheng <baocheng.su@siemens.com>
[Jan: re-add now required CONFIG_OF_LIST, update config matching]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-29 11:58:26 -04:00
Su Baocheng
ea0f45d187 board: siemens: iot2050: Split the build for PG1 and PG2
Due to different signature keys, the PG1 and the PG2 boards can no
longer use the same FSBL (tiboot3). This makes it impossible anyway to
maintaine a single flash.bin for both variants, so we can also split the
build.

A new target is added to indicates the build is for PG1 vs. PG2 boards.
Hence now the variants have separated defconfig files.

The runtime board_is_sr1() check does make no sense anymore, so remove
it and replace with build time check.

Documentation is updated accordingly. New binary artifacts are already
available via meta-iot2050.

Signed-off-by: Su Baocheng <baocheng.su@siemens.com>
[Jan: refactor config option into targets, tweak some wordings]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-03-29 11:58:25 -04:00
Tom Rini
605bc145f9 Merge branch 'master' into next 2023-03-27 15:19:57 -04:00
Tom Rini
78f67f11a9 Merge branch 'rpi-2023.04' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
- Fixes for booting newer revs of the SoC in the Raspberry Pi 4
- Propagate some firmware DT properties to the loaded DT
- Update the Zero2W upstream DT name
2023-03-24 17:00:41 -04:00
Tom Rini
486930bd7f purism: librem5: Fix a function declaration in spl.c
Here we implement usb_gadget_handle_interrupts() but did not include
<linux/usb/gadget.h> so did not have the declaration correct. Fix this
and add the missing include.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-22 15:22:48 -04:00
Tom Rini
16d82d7bfa spl: Add function prototype for spl_mmc_get_uboot_raw_sector
We did not add a prototype for spl_mmc_get_uboot_raw_sector to
include/spl.h before, so add and document one now. Correct the incorrect
prototype in board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c and
ensure that we have spl.h where we define a non-weak
spl_mmc_get_uboot_raw_sector as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-22 15:22:48 -04:00
Tom Rini
f5131e80fc arm: Correct cpu_reset function prototype on some platforms
Some platforms were not including <cpu_func.h> which sets the prototype
for reset_cpu, and in turn had it set wrong. Correct these cases.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-22 15:22:48 -04:00
Tom Rini
5e207b8517 - odroid-go-ultra: setup PMIC regulators at board init
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Merge tag 'u-boot-amlogic-20230322' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- odroid-go-ultra: setup PMIC regulators at board init
2023-03-22 09:21:41 -04:00
Hai Pham
33c3ec22d4 ARM: renesas: falcon: Enable RWDT reset for V3U Falcon
Enable RWDT reset on Reset Controller so that it can be used as
reset trigger source for V3U Falcon.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Use one current_el() in board_init
2023-03-18 11:59:45 +01:00
Hai Pham
72eb1f5e19 ARM: renesas: falcon: Initialize ARM generic timer and GICv3 if EL3
U-Boot executes at EL3 is required to initalize those settings.
In other cases, they will be done by prior-stage firmware instead.

This fixes crash when U-Boot is at non-secure exception level.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-03-18 11:59:45 +01:00
Hai Pham
ca9299747f ARM: renesas: Demote overlap memory nodes message to debug on Gen3
The R-Car DTs might contains multiple /memory@* nodes from various
sources, i.e. prior firmware, u-boot itself or the OS

The duplicates are likely to happen so the messages are not meaningful
in the default setting since we have already handled that.

Reduce the message to debug level.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-03-18 11:59:45 +01:00
Tom Rini
cefd0449d6 Xilinx changes for v2023.07-rc1
cmd:
 - Print results in hex instead of dec in smc command
 
 firmware:
 - Cover missing ZYNQMP_FIRMWARE dependencies
 
 fpga:
 - fix loads for unencrypted use case
 
 relocation
 - Add support for BE systems
 
 spi:
 - Fix xilinx_spi init reset sequence
 
 arasan nand:
 - Remove hardcoded bbt option
 - Set ofnode value
 
 xilinx:
 - Enable SMC command
 - Fix some sparse issues
 
 zynqmp:
 - Remove cdns,zynq-gem compatible string
 - Add optee node
 - Some DT cleanups
 
 zynq:
 - Some DT cleanups
 
 microblaze
 - Remove MANUAL_RELOC option
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Merge tag 'xilinx-for-v2023.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2023.07-rc1

cmd:
- Print results in hex instead of dec in smc command

firmware:
- Cover missing ZYNQMP_FIRMWARE dependencies

fpga:
- fix loads for unencrypted use case

relocation
- Add support for BE systems

spi:
- Fix xilinx_spi init reset sequence

arasan nand:
- Remove hardcoded bbt option
- Set ofnode value

xilinx:
- Enable SMC command
- Fix some sparse issues

zynqmp:
- Remove cdns,zynq-gem compatible string
- Add optee node
- Some DT cleanups

zynq:
- Some DT cleanups

microblaze
- Remove MANUAL_RELOC option
2023-03-16 12:18:30 -04:00
Tom Rini
e63828bf35 Merge tag 'fsl-qoriq-next-2023-3-14' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next
Enable DM_SERIAL for freescale ls2080a
Drop non DM_ETH code for freescale:
  lx2160a/ls2080rdb/ls2080aqds/ls1088a
2023-03-16 12:17:48 -04:00
Angelo Dureghello
791840fdc4 board: m5253demo: remove floating point flash size calculation
This board is using floating point arithmetic to display
the SST39VF6401B flash size.

This actually generates errors with toolchains without
appropriate sw fp math functions available.

SST39VF6401B is the only flash for wich the size is displayed,
it's size is 8192KB and floating point calculation seems not
needed. Removing it.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-03-15 01:52:15 +01:00
Angelo Dureghello
7ff7b46e6c m68k: rename CONFIG_MCFTMR to CFG_MCFTMR
This is not a Kconfig option so changing to _CFG.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
2023-03-15 01:41:57 +01:00
Angelo Dureghello
461cca7997 board: stmark2: fix clock value
Fix totally blank console at boot, clock value must be decimal,
as for the 30Mhz external crystal.

Fixes: 26e5944ec9 ("stmark2: Migrate CONFIG_SYS_EXTRA_OPTIONS to Kconfig")
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-03-15 01:38:19 +01:00
Tom Rini
a5faa4a9eb Prepare v2023.04-rc4
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Merge tag 'v2023.04-rc4' into next

Prepare v2023.04-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-14 12:06:35 -04:00
Peter Robinson
0e8c94054f rpi: Update the RPi Zero 2W DT filename
Update the Raspberry Pi Zero 2W device tree file
name to match what landed upstream.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2023-03-14 12:12:13 +00:00
Antoine Mazeas
4a45086c0c rpi: Copy eth PHY address from fw DT to loaded DT
Some Raspberry Pi 400 boards, specifically rev 1.1, have a different
address for the ethernet PHY device than what is provided by the kernel
DTB. The correct address is provided by the firmware, so we should carry
it over into the loaded device tree so that ethernet works on such boards.

Signed-off-by: Antoine Mazeas <antoine@karthanis.net>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2023-03-14 12:12:13 +00:00
Antoine Mazeas
6d06424949 rpi: Copy properties from firmware dtb to the loaded dtb
The RPI firmware adjusts several property values in the dtb it passes
to u-boot depending on the board/SoC revision. Inherit some of these
when u-boot loads a dtb itself. Specificaly copy:

* /model: The firmware provides a more specific string
* /memreserve: The firmware defines a reserved range, better keep it
* emmc2bus and pcie0 dma-ranges: The C0T revision of the bcm2711 Soc (as
  present on rpi 400 and some rpi 4B boards) has different values for
  these then the B0T revision. So these need to be adjusted to boot on
  these boards
* blconfig: The firmware defines the memory area where the blconfig
  stored. Copy those over so it can be enabled.
* /chosen/kaslr-seed: The firmware generates a kaslr seed, take advantage
  of that.

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Signed-off-by: Antoine Mazeas <antoine@karthanis.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2023-03-14 12:12:13 +00:00
Ioana Ciornei
a33b8baf20 board: freescale: ls1088a: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:27 +08:00
Ioana Ciornei
6bd026d7f7 board: freescale: ls2080aqds: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:27 +08:00
Ioana Ciornei
c45e8fe3bf board: freescale: ls2080rdb: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:27 +08:00
Ioana Ciornei
6419072880 board: freescale: lx2160a: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:27 +08:00
Ioana Ciornei
e083a47297 board: freescale: lx2160a: remove hardcoded ethernet initialization
The LX2160ARDB board has support for DM_ETH probed devices, which means
that we do not need to manually create an MDIO controller, register it,
create PHYs on it etc.

In order to cleanup the board file a bit, just remove this code entirely.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:27 +08:00
Neil Armstrong
de58694f0d ARM: meson: odroid-go-ultra: setup PMIC regulators are board init
The Odroid Go Ultra has 2 chained PMICs RK818 and RK818, and needs
an adjustment on the BUCK and LDO values.

Add the initial regulators values in -u-boot.dtsi & run the initial
regulator setup in a new odroid-go-ultra board.

Proper OTG and BOOST regulators are still missing to have USB-A
host properly working.

Link: https://lore.kernel.org/r/20230210-u-boot-odroid-go-ultra-pmics-setup-v1-1-1f16d62b76af@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-03-14 09:03:16 +01:00
Algapally Santosh Sagar
6d87b1572f arm64: zynqmp: Add missing ZYNQMP_FIRMWARE dependencies
There are missing Kconfig dependencies in the code which is using
firmware interface.
The commit 71efd45a5f ("arm64: zynqmp: Change firmware dependency")
add option to also disable ZYNQMP_FIRMWARE. But not all Kconfig
dependencies were properly described and also sdhci and gem drivers
didn't protect the code properly.
So, add the missing ZYNQMP_FIRMWARE dependencies.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230201095553.11219-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:14:59 +01:00
Simon Glass
9c097f8139 venice: Simplify conditions for network init
The conditions in this code do not align when doing an SPL build with
split config. Use __maybe_unused to avoid needing to be so explicit.

Of course a better solution would be to refactor all of this to avoid
using #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-03 09:49:02 -05:00
Simon Glass
847fca6d47 imx: Use SATA instead of CMD_SATA
This causes a build failure on mx6cuboxi with split config, since CMD_SATA
shows up as enabled in SPl (because there is no SPL_CMD_SATA).

The condition is wrong anyway, so change it to use SATA instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-03 09:49:02 -05:00
Simon Glass
cd3a35ef0b Correct SPL use of PG_WCOM_UBOOT_UPDATE_SUPPORTED
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_PG_WCOM_UBOOT_UPDATE_SUPPORTED defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
2023-03-02 17:45:58 -05:00
Eugen Hristev
a6e85a35b5 board: rock5b-rk3588: add memory gaps into kernel's DTB
RK3588 has two memory gaps when using 16 GiB DRAM size:
[0x3fc000000 , 0x3fc500000]
and
[0x3fff00000 , 0x3ffffffff]

If the kernel is agnostic to these gaps, accessing the area causes
a SError panic.

Hence, add reserved memory areas in kernel's DTB before booting.

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:29 +08:00
Eugen Hristev
3bf8e40807 board: rockchip: add Radxa ROCK5B Rk3588 board
ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by Radxa.

There are tree variants depending on the DRAM size : 4G, 8G and 16G.

Specification:

    Rockchip Rk3588 SoC
    4x ARM Cortex-A76, 4x ARM Cortex-A55
    4/8/16GB memory LPDDR4x
    Mali G610MC4 GPU
    MIPI CSI 2 multiple lanes connector
    eMMC module connector
    uSD slot (up to 128GB)
    2x USB 2.0, 2x USB 3.0
    2x HDMI output, 1x HDMI input
    Ethernet port
    40-pin IO header including UART, SPI, I2C and 5V DC power in
    USB PD over USB Type-C
    Size: 85mm x 54mm

Kernel commits:
a1d3281450ab ("arm64: dts: rockchip: Add rock-5b board")
6fb13f888f2a ("arm64: dts: rockchip: Update sdhci alias for rock-5b")

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:29 +08:00
Jagan Teki
15b2d1fb72 board: rockchip: Add Edgeble Neural Compute Module 6
Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RK3588 from Edgeble AI.

General features:
- Rockchip RK3588
- up to 32GB LPDDR4x
- up to 128GB eMMC
- 2x MIPI CSI2 FPC

On module WiFi6/BT5 is available in the following Neu6 variants.

Neural Compute Module 6(Neu6) IO board is an industrial form factor
ready-to-use IO board from Edgeble AI.

IO board offers plenty of peripherals and connectivity options and
this patch enables basic eMMC and UART which is enough to successfully
boot Linux.

Neu6 needs to mount on top of this IO board in order to create a
complete Edgeble Neural Compute Module 6(Neu6) IO platform.

Boot log for the record,

DDR Version V1.08 20220617
LPDDR4X, 2112MHz
channel[0] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[1] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[2] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[3] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
Manufacturer ID:0x6
CH0 RX Vref:31.7%, TX Vref:21.8%,21.8%
CH1 RX Vref:30.7%, TX Vref:22.8%,23.8%
CH2 RX Vref:30.7%, TX Vref:22.8%,22.8%
CH3 RX Vref:30.7%, TX Vref:21.8%,21.8%
change to F1: 528MHz
change to F2: 1068MHz
change to F3: 1560MHz
change to F0: 2112MHz
out

U-Boot SPL 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530)
Trying to boot from MMC1
INFO:    Preloader serial: 2
NOTICE:  BL31: v2.3():v2.3-391-g856309329:derrick.huang
NOTICE:  BL31: Built : 14:15:50, Jul 18 2022
INFO:    ext 32k is not valid
INFO:    GICv3 without legacy support detected.
INFO:    ARM GICv3 driver initialized in EL3
INFO:    system boots from cpu-hwid-0
INFO:    idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001
INFO:    dfs DDR fsp_params[0].freq_mhz= 2112MHz
INFO:    dfs DDR fsp_params[1].freq_mhz= 528MHz
INFO:    dfs DDR fsp_params[2].freq_mhz= 1068MHz
INFO:    dfs DDR fsp_params[3].freq_mhz= 1560MHz
INFO:    BL31: Initialising Exception Handling Framework
INFO:    BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR:   Error initializing runtime service opteed_fast
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0xa00000
INFO:    SPSR = 0x3c9

U-Boot 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530)

Model: Edgeble Neu6A IO Board
DRAM:  7.5 GiB (effective 3.7 GiB)
Core:  71 devices, 15 uclasses, devicetree: separate
MMC:   mmc@fe2c0000: 0
Loading Environment from nowhere... OK
In:    serial@feb50000
Out:   serial@feb50000
Err:   serial@feb50000
Model: Edgeble Neu6A IO Board
Net:   No ethernet found.
Hit any key to stop autoboot:  0
=>

Add support for Edgeble Neu6 Model A IO Board.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Chris Morgan
9b78a98ee5 evb-rk3568: Update MAINTAINERS and documentation
Update the MAINTAINERS file to include the devicetree for the
rk3568-evb1-v10 board.

Also update Rockchip board docs to include information on building
RK3568 based devices.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:27 +08:00
Jagan Teki
3dd126155c board: rockchip: Add Radxa Compute Module 3 IO Board
Radxa Compute Module 3(CM3) IO board an application board from Radxa
and is compatible with Raspberry Pi CM4 IO form factor.

Radxa CM3 needs to mount on top of this IO board in order to create
complete Radxa CM3 IO board platform.

Add support for Radxa CM3 IO Board defconfig and -u-boot.dtsi

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2023-02-28 18:07:27 +08:00
Jagan Teki
165bc9cccf board: edgeble: Fix neural-compute-module-2 board name
The board should be RV1126-NEU2 instead RV1126-ECM0.

Fix the wrong name.

Fixes: b8f1ca9540 ("board: rockchip: Add Edgeble Neu2 IO Board")
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:26 +08:00
Akash Gajjar
6cd6ed9da5 arm64: dts: rockchip: rk3308: Add Radxa ROCK Pi S support
Add Radxa ROCK 3 Model A support. sync rk3308-rock-pi-s.dts from
Linux 6.2.0-rc7.

ROCK Pi S is RK3308 based SBC from radxa.com. ROCK Pi S has a,
- 256MB/512MB DDR3 RAM
- SD, NAND flash (optional on board 1/2/4/8Gb)
- 100MB ethernet, PoE (optional)
- Onboard 802.11 b/g/n wifi + Bluetooth 4.0 Module
- USB2.0 Type-A HOST x1
- USB3.0 Type-C OTG x1
- 26-pin expansion header
- USB Type-C DC 5V Power Supply

Linux commit commit for the same,
<2e04c25b1320> ("arm64: dts: rockchip: add ROCK Pi S DTS support")

Signed-off-by: Akash Gajjar <gajjar04akash@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:26 +08:00
Akash Gajjar
b44c54f600 arm64: dts: rockchip: rk3568: Add Radxa ROCK 3 Model A board support
Add Radxa ROCK 3 Model A support. sync rk3568-rock-3a.dts from Linux 6.2.0-rc7

Board Specifications
- Rockchip RK3568
- 2/4/8GB LPDDR4 3200MT/s
- eMMC socket, SD card slot
- GbE LAN
- PCIe 3.0/2.0
- M.2 Connector
- 3.5mm Audio jack with mic
- HDMI 2.0, MIPI DSI/CSI
- USB 3.0 Host/OTG, USB 2.0 Host
- 40-pin GPIO expansion ports
- USB Type C PD 2.0, 9V/2A, 12V/2A, 15V/2A, 20V/2A

Refer Linux commit <22a442e6586c>
("arm64: dts: rockchip: add basic dts for the radxa rock3 model a")

Signed-off-by: Akash Gajjar <gajjar04akash@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:26 +08:00
Svyatoslav Ryhel
5668c75ce9 board: tegra30: switch to updated pre-dm i2c write
Configure PMIC voltages for early stages using updated
early i2c write.

Tested-by: Thierry Reding <treding@nvidia.com> # Beaver T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23 12:55:37 -07:00
Svyatoslav Ryhel
e7184debf4 board: tegra124: switch to updated pre-dm i2c write
Configure PMIC for early stages using updated i2c write.

Tested-by: Thierry Reding <treding@nvidia.com> # Jetson TK1 T124
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23 12:55:37 -07:00
Paweł Anikiel
0f3c8fe392 socfpga: chameleonv3: Move environment to a text file
Move the environment to an easily editable text file in the boot
partition

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-22 00:28:39 +01:00
Tim Harvey
98382917d7 board: gateworks: venice: move README to RST
Move board/gateworks/venice/README to RST documentation.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-02-19 21:15:15 +01:00
Leo Yu-Chi Liang
8900e2bbec riscv: Rename Andes cpu and board names
The current ae350-related defconfigs could also
support newer Andes CPU IP, so modify the names of CPU
from ax25 to andesv5, and board name from ax25-ae350 to ae350.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-02-17 19:07:48 +08:00
Yu Chien Peter Lin
e74e21ceb3 board: AndesTech: ax25-ae350.c: Enable v5l2-cache in spl_board_init()
The L2-cache is not enabled currently, the enbale_caches() will call
the v5l2_enable() callback to enable it in SPL.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-02-17 19:07:48 +08:00
Tony Dinh
b21f87a5a5 arm: mvebu: Add support for Synology DS116 (Armada 385)
Synology DS116 is a NAS based on Marvell Armada 385 SoC.

Board Specification:

- Marvel MV88F6820 Dual Core at 1.8GHz
- 1 GiB DDR3 RAM
- 8MB Macronix mx25l6405d SPI flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 1x SATA (6 Gbps)
- 3x LED
- PIC16F1829 (connected to uart1)
- GPIO fan
- serial console

Note that this patch depends on the add-support for Thecus N2350 patch:
https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2023-02-13 10:14:50 +01:00
Tony Dinh
384e2d396c arm: mvebu: Power up 2nd SATA port for Thecus N2350
Currently, only the 1st SATA port is powered up (by GPIO1 12).
Add GPIO1 13 in board initialization to power up the 2nd SATA port.

Note that this patch depends on the initial add-support patch:
https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-02-13 10:14:50 +01:00
Tony Dinh
3fdd09f90f arm: mvebu: Add support for Thecus N2350 (Armada 385) board
Thecus N2350 is a NAS based on Marvell Armada 385 SoC.

Specification:

- Processor: Marvel MV88F6820 Dual Core at 1GHz
- 1 GiB DDR4 RAM
- 4MB Macronix mx25l3205d SPI flash
- 512MB Hynix H27U4G8F2DTR-BC NAND flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 2x SATA (hot swap slots)
- 3x buttons
- 10x LEDS
- serial console

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-02-13 10:14:50 +01:00
Tom Rini
386e77cda8 Merge branch 'for-2023.04' of https://source.denx.de/u-boot/custodians/u-boot-mpc8xx
- A fix for a long standing bug that has been exposed by commit
  50128aeb0f ("cyclic: get rid of cyclic_init()") preventing 8xx boards
  from booting since u-boot 2023.01
- A GPIO driver for powerpc 8xx chip
- Fixup for powerpc 8xx SPI driver
- A new powerpc 8xx board
- The two devices having that board.
2023-02-12 15:25:09 -05:00
Christophe Leroy
6a8c36b936 board: cssi: Add MIAE & VGoIP devices
This adds support for the MIAE and VGoIP devices.
Those devices have the same CPU board that the MCR3000_2G board.

The devices are very modular, they are provided with
interchangeable front and back panels.

Linux kernel is shipped with a device tree which contains all
possible setups, and U-boot eliminates unrelated nodes based on
detected hardware.

This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
2023-02-11 08:47:58 +01:00
Christophe Leroy
dac3c6f625 board: cssi: Add new board MCR3000_2G
This adds a new board from CS GROUP. The board is called
MCR3000_2G, and has a CPU board called CMPC885.

That CPU board is shared with another equipment that will
be added in a later patch.

That board stores Ethernet MAC addresses in an EEPROM which
is accessed using SPI bus.

This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
2023-02-11 08:47:58 +01:00
Christophe Leroy
19a68636b4 board: MCR3000: Remove update of non-existing e1-wan DT node
e1-wan device-tree node doesn't exist. Remove related update
to avoid following warning at startup:

	 Loading Device Tree to 007fa000, end 007ff951 ... OK
	Unable to update property /localbus/e1-wan:data-rate, err=FDT_ERR_NOTFOUND
	Unable to update property /localbus/e1-wan:channel-phase, err=FDT_ERR_NOTFOUND
	Unable to update property /localbus/e1-wan:rising-edge-sync-pulse, err=FDT_ERR_NOTFOUND

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
2023-02-11 08:47:58 +01:00
Christophe Leroy
7df55bb9b5 board: MCR3000: Modernise the settings to properly work on lastest u-boot version
Both U-boot and Linux kernel have grown over the last releases
and don't fit anymore in the 2M EPROM of the board.

So, rework the setup to allow storing the Linux kernel image
on the UBIFS NAND Flash.

Also add support to FIT images as this is what the Linux kernel
look like nowadays.

Also increase CFG_SYS_BOOTMAPSZ to 32Mbytes and define
CONFIG_SYS_BOOTM_LEN with the same value, otherwise it defaults
to 8M which is not sufficient anymore with nowadays Linux kernels.

And set the netmask to 255.255.255.0 as a class C address is used.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
2023-02-11 08:47:58 +01:00
Christophe Leroy
d126006635 board: MCR3000: Migrate to using CONFIG_EXTRA_ENV_TEXT
We can move all of the environment changes to come
from CONFIG_EXTRA_ENV_TEXT.

Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-02-11 08:44:53 +01:00
Christophe Leroy
d8809bac48 board: MCR3000: Use lowercase filenames
Rename MCR3000.* to mcr3000.* to be more in line with
other boards.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-02-10 19:33:25 +01:00
Simon Glass
762592cb5c Correct SPL uses of FEC_MXC
This converts 4 usages of this option to the non-SPL form, since there is
no SPL_FEC_MXC defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:41 -05:00
Simon Glass
41782a9c09 Correct SPL uses of FASTBOOT
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_FASTBOOT defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:41 -05:00
Simon Glass
a6c38a280c Correct SPL use of WATCHDOG_AUTOSTART
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_WATCHDOG_AUTOSTART defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
1677705c93 Correct SPL uses of TEN64_CONTROLLER
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_TEN64_CONTROLLER defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
1744ceb66f Correct SPL use of TARGET_PG_WCOM_SELI8
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_TARGET_PG_WCOM_SELI8 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
2023-02-10 07:41:40 -05:00
Simon Glass
735b3d193c Correct SPL use of TARGET_PG_WCOM_EXPU1
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_TARGET_PG_WCOM_EXPU1 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
2023-02-10 07:41:40 -05:00
Simon Glass
ae05cf44a1 Correct SPL uses of TARGET_LX2160ARDB
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_TARGET_LX2160ARDB defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
1f3a3679f5 Correct SPL use of SYS_MEM_RSVD_FOR_MMU
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SYS_MEM_RSVD_FOR_MMU defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
4337b9b6dc Correct SPL use of SL28_SPL_LOADS_OPTEE_BL32
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SL28_SPL_LOADS_OPTEE_BL32 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
8f7f4e9401 Correct SPL use of SL28CPLD
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SL28CPLD defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
1c6b832aea Correct SPL uses of SIFIVE_OTP
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_SIFIVE_OTP defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
fb705b8791 Correct SPL use of RESV_RAM
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_RESV_RAM defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
eca0986894 Correct SPL use of REGEX
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_REGEX defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
622dad2137 Correct SPL uses of PG_WCOM_UBOOT_UPDATE
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_PG_WCOM_UBOOT_UPDATE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
2023-02-10 07:41:40 -05:00
Simon Glass
c6151eec82 Correct SPL uses of PG_WCOM_UBOOT_BOOTPACKAGE
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_PG_WCOM_UBOOT_BOOTPACKAGE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
2023-02-10 07:41:40 -05:00
Simon Glass
0ab3609061 Correct SPL uses of MTD
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_MTD defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:39 -05:00
Simon Glass
0c22cdca15 Correct SPL uses of MICROBLAZE
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_MICROBLAZE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:39 -05:00
Simon Glass
93e2ce496e Correct SPL use of FSL_MC_ENET
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_FSL_MC_ENET defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
91c50987fb Correct SPL use of FSL_CAAM
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_FSL_CAAM defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
96e3b52b24 Correct SPL use of FDT_SIMPLEFB
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_FDT_SIMPLEFB defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
b2561c5bea Correct SPL uses of ENV_VARS_UBOOT_RUNTIME_CONFIG
This converts 4 usages of this option to the non-SPL form, since there is
no SPL_ENV_VARS_UBOOT_RUNTIME_CONFIG defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
821d1df52a Correct SPL uses of ENV_IS_IN_UBI
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_ENV_IS_IN_UBI defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
71aa806d5d Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT
This converts 13 usages of this option to the non-SPL form, since there is
no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
299cca0e72 Correct SPL uses of DWC_ETH_QOS
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_DWC_ETH_QOS defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
866ec874f5 Correct SPL uses of DTB_RESELECT
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_DTB_RESELECT defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
d89c8e1090 Correct SPL use of CMD_STM32PROG
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_CMD_STM32PROG defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
308d677147 Correct SPL use of CMD_STBOARD
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_CMD_STBOARD defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
f8daba4486 Correct SPL use of CMD_FRU
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_CMD_FRU defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:25 -05:00
Simon Glass
4e80a46c0a Correct SPL use of BNXT_ETH
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_BNXT_ETH defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:25 -05:00
Simon Glass
c0ef5a3ea7 Correct SPL use of ARCH_ZYNQ
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_ARCH_ZYNQ defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:25 -05:00
Simon Glass
8c2be2086f Correct SPL use of AHCI
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_AHCI defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:25 -05:00
Heiko Schocher
d49180199f powerpc/mpc85xx: use board env file for socrates board
as Tom suggested get rid of CFG_EXTRA_ENV_SETTINGS and
enable CONFIG_ENV_SOURCE_FILE and use text file

board/socrates/socrates.env

which contains the default environment. While at it,
cleanup the default Environment.

Signed-off-by: Heiko Schocher <hs@denx.de>
Suggested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-02-09 12:54:03 -05:00
Simon Glass
7a9ec31f6f freescale: Drop unused zm7300 driver
This is not used anymore. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:50 -05:00
Simon Glass
f0ad69130c freescale: Drop unused vsc3316_3308 driver
This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:50 -05:00
Simon Glass
c67e0881ba imx: Drop CONFIG_USE_PLUGIN
This option is not defined anywhere. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:50 -05:00
Simon Glass
9f793da7f5 freescale: Drop CONFIG_TARGET_MPC8536DS et al
This option as well as CONFIG_TARGET_P1022DS and CONFIG_TARGET_P5020DS
are not defined anywhere. Drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
c93ad9e24d compulab: Drop CONFIG_TARGET_MCM_IMX8M_MINI
This option is not defined anywhere. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
3b6851fee3 gdsys: Drop unused fpga file
This is not used since CONFIG_SYS_FPGA_COMMON is not defined anywhere.
Drop the code and the Makefile rule.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
c6c4ad28aa freescale: Drop unused pq-mds-pib driver
This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
408296aad9 gpio: Drop unused pca9698 driver
This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
dc1756a4a9 ppc: Drop unused CONFIG_P2020DS
This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
f6cd44691c nand: Drop unused actl_nand driver
This is not used since this commit:

   ed7fe2bee1 ppc: Remove xpedite boards

Drop the driver and Kconfig option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:48 -05:00
Simon Glass
449f11eb61 m68k: Drop unused CONFIG_MACH_DAVINCI_DA830_EVM
This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:48 -05:00
Simon Glass
4c7c97d1cf freescale: Drop unused pixis code
Drop this unused code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:48 -05:00
Simon Glass
5d409d45df Correct CONFIG_CONTROLCENTERDC
This option does not exist but presumably means to point to
CONFIG_TARGET_CONTROLCENTERDC. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:48 -05:00
Simon Glass
662cfa03cb arm: qemu: Move GUIDs to the C file
These are only used in one place, so move them there.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-06 13:04:53 -05:00
Simon Glass
ece763de2f arm: qemu: Switch to a text environment
Use the new environment format so we can drop most of the config.h file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-06 13:04:53 -05:00
Heiko Schocher
9e85d186ea powerpc/mpc85xx: socrates: enable protected Environment
enable protected Environment on socrates board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2023-02-06 13:04:53 -05:00
Heiko Schocher
a78b2538fd powerpc/mpc85xx: drop socrates specific image creation
convert socrates board to use MPC85XX_HAVE_RESET_VECTOR and
disable CONFIG_OF_BOARD and use common u-boot.dtsi for
creating u-boot-dtb.bin.

Signed-off-by: Heiko Schocher <hs@denx.de>
2023-02-06 13:04:53 -05:00
Holger Brunck
9b26a251cf km/ppc832x: join config files
There are no differences for the different 832x targets we have in
the header defined with SYS_CONFIG_NAME. So we can join the five
headers to a single file.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
2023-02-06 13:04:53 -05:00
Holger Brunck
5043ce2874 km/ppc: remove km-mpc8360.h and km-mpc832x.h
Next step to get rid of the header files in icnlude/configs. Move
most of the defines to km83xx.c directly. Some remaining defines
which should go to Kconfig are moved to km-mpc83xx.h for now.

Also remove some unused defines and move one define to powerpc.env
as we only need it there.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
2023-02-06 13:04:53 -05:00
Nikhil M Jain
0952aa81da board: ti: am62x: am62x: Add splash screen env variables
Set splash screen related env variables. Default splash source is
set to mmc where user is expected to keep bmp in compressed format
with name ti.gz on first partition of mmc.

Splash file will be uncompressed to DDR at address 0x82000000 and
splash position is set to middle of screen.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
2023-02-06 13:04:52 -05:00
Nikhil M Jain
6a74e2537f include: configs: am62x_evm: Add .env file for Am62x
Use .env file for setting board related environment variables,
in place of am62x_evm.h file. Except for BOOTENV settings, as
config_distro_boot.env file doesn't exist.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-02-06 13:04:52 -05:00
Nikhil M Jain
d5f563ccdd board: ti: am62x: evm: Add splash screen support
Splash screen function needs splash source information
to load image and display it, splash_location provides
the necessary info, Set default_splash_location to MMC
at partition 1:1. Probe DSS for splash screen display.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
2023-02-04 18:16:56 +01:00
Tom Rini
a209c3e6b4 For 2023.04
-----------
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/15028
 
 - Boards:
 	- UDoo
 	- MX53 Menlo
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQS2TmnA27QKhpKSZe309WXkmmjvpgUCY90hNQ8cc2JhYmljQGRl
 bnguZGUACgkQ9PVl5Jpo76bHAwCfSmjacuzcLNO7S+w6MUgF3thHFHoAoJMk18KY
 jVKuwOJjLIv60IacIb6p
 =fFpi
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20230203' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

For 2023.04
-----------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/15028

- Boards:
	- UDoo
	- MX53 Menlo
2023-02-03 10:30:45 -05:00
Peter Robinson
01f372d8d6 udoo_neo: Select DM_SERIAL and drop iomux board level init
Convert to DM_SERIAL and drop the iomux board file
level init as it's handled as part of the DM serial
layer instead.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-02-03 13:10:01 +01:00
Peter Robinson
99a94c368c udoo_neo: Move to DM for REGULATOR/PMIC/I2C drivers
This moves over the PMIC power init to DM and the associated i2c and
regulator bits.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-02-03 13:10:01 +01:00
Tim Harvey
c3d9736d54 board: gw_ventana: enable MV88E61XX DSA support
Add MV88E61XX DSA support:
 - update dt to provide internal MDIO bus and port handles.
   U-Boot requires a more restrictive subset of the dt bindings
   required by Linux for the sake of simplifying code
 - update defconfig to remove old driver and enable new one
 - replace mv88e61xx_hw_reset weak override with board_phy_config support
   for register configuration that is outside the scope of the DSA driver

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2023-02-02 14:44:53 -05:00
Tom Rini
57e1634836 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2023-02-02 09:25:59 -05:00
Tom Rini
1e1cd8eb2d Merge tag 'fsl-qoriq-2023-2-1' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
make QSPI clock selection optional during SoC init for ls102xa
Fix regulator name for ls2_sfp
Update NXP RCW github repo
2023-02-01 09:31:17 -05:00
Rick Chen
c5740bc1b2 riscv: ae350: support OpenSBI 1.0+ which enable FW_PIC
Original OpenSBI (without FW_PIC) will relocate itself
from 0x1000000 to 0x0. After OpenSBI added FW_PIC codes,
it will not relocate any more and always run at 0x1000000.
Hence, it may overlap with Kernel memory region. So it is
necessary to change OpenSBI address from 0x1000000 to 0x0.

More details can refer to commit cb052d7712
("riscv: qemu: spl: Fix booting Linux kernel with OpenSBI 1.0+")

Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
2023-02-01 16:17:53 +08:00
Fabio Estevam
a25dad7459 ls1021atsn: Suggest the NXP RCW github repo
As explained in the text at the bottom of the page
https://source.codeaurora.org/external/qoriq/qoriq-components/rcw:

"QUIC repositories on this site will not receive any updates after
March 31, 2022, and will be deleted on March 31, 2023."

Point to the NXP RCW github repo instead.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-02-01 14:13:28 +08:00
Michael Trimarchi
6dac63adca engicam: imx6: migrate to DM_SERIAL
Add the needed DT overrides and configs to enable UART in SPL.

Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-31 19:44:23 +01:00
Tim Harvey
3041e094e4 board: gateworks: venice: poll I2C lines to wait for GSC firmware
In some situations the GSC firmware where the EEPROM containing the
model and DRAM configuration may not be ready by the time the SoC
is ready to talk to it over I2C.

Instead of a hard delay, poll the I2C lines to wait until they are
released to avoid the I2C drivers 'Arbitation lost' error message.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-31 18:08:23 +01:00
Fabio Estevam
f0f461287e imx: Suggest the NXP ATF github repo
As explained in the text at the bottom of the page
https://source.codeaurora.org/external/imx/imx-atf:

"QUIC repositories on this site will not receive any updates after
March 31, 2022, and will be deleted on March 31, 2023."

Point to the NXP ATF github repo instead.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2023-01-31 16:02:05 +01:00
Andrejs Cainikovs
0cf91115ed board: apalis-imx8: add 2nd ethernet address
All Apalis iMX8 variants have 2nd RGMII on SoC, so add the address
for 2nd ethernet.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2023-01-31 15:46:40 +01:00
Peng Fan
1224dd8b15 imx: mx6sxsabreauto: select DM_SERIAL
Select DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:34 +01:00
Peng Fan
2108db6c92 imx: mx6sllevk: select DM_SERIAL
Select DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:34 +01:00
Peng Fan
59bae6f58d imx: mx6sllevk: correct pmic name
The prefix 0 has been dropped in dts, so correct in board file

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:34 +01:00
Peng Fan
3a6d7ef389 imx: mx6ull/z_14x14_evk: clean up UART iomux
After DM_SERIAL, and set pinctrl_uart1 as pre-reloc, no need initialize
iomux at board file.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:33 +01:00
Fabio Estevam
ab79811c9f pico-imx7d: Convert to DM_I2C and DM_PMIC
The conversion to DM_I2C is mandatory, so convert to it
and also to DM_PMIC.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-01-31 08:36:52 +01:00
Fabio Estevam
068027b1a0 pico-imx7d: Add support for the 2GB variant
Add the board detection mechanism to be able to support
the 2GB variant.

Based on the code from TechNexion U-Boot downstream tree.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:02 +01:00
Fabio Estevam
d12618b927 imx8mm-phg: Add board support
Add the board support for the i.MX8MM Cloos PHG board.

This board uses a imx8mm-tqma8mqml SoM from TQ-Group.

imx8mm-phg.dts and imx8mm-tqma8mqml.dtsi are taken
directly from Linux 6.2-rc3.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-30 23:23:02 +01:00
Marek Vasut
5cae28c3b1 ARM: imx: Factor common code out of Data Modul i.MX8M Mini eDM SBC
Pull common.c into common subdirectory of the board file,
since this code can be reused by other Data Modul SBCs.
Drop the include of lpddr4_timing.h, which is unneeded.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-30 23:23:02 +01:00
Marek Vasut
3bb15941ff ARM: imx: Drop board side icache enable on Data Modul i.MX8M Mini eDM SBC
The icache is enabled in common architecture code since commit:
2fa763baa1 ("ARM: imx: Enable instruction cache early on on i.MX8M")
Drop the board side duplicate code.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-30 23:23:01 +01:00
Marek Vasut
a20be24cd4 ARM: imx: Remove PMIC reset configuration from board files
The PCA9450 reset configuration can now be performed by the PCA9450 PMIC
driver itself, remove the hard-coded variant from board code and let the
PMIC driver perform this task using one-liner:

```
$ sed -i '/set WDOG_B_CFG to cold reset/,+2 d' $(git grep -l PCA9450_RESET_CTRL.*0xA1 board/)
```

Venice and i.MX93 EVK required slight manual fix up.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-01-30 23:23:01 +01:00
Andrejs Cainikovs
382e89ca40 board: apalis-imx8: initialize snvs
Initialize Secure Non-Volatile Storage, aka SNVS.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 21:02:27 +01:00
Andrejs Cainikovs
9607d8b17d board: apalis-imx8: remove board_phy_config duplicate
Remove a duplicate of weak board_phy_config() implementation
in drivers/net/phy/phy.c.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 21:02:27 +01:00
Philippe Schenker
63b6193f3f board: apalis-imx8: get rid of sc_err_t type
sc_pm_setup_uart() returns int, not sc_err_t.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 21:02:27 +01:00
Marcel Ziswiler
37630e0f86 apalis-imx8: display build info
Display build info with information about the version of SCFW, SECO and
TF-A (ATF).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 20:59:09 +01:00
Marcel Ziswiler
717783ecdc apalis-imx8: turn off lcd backlight before os handover
U-Boot typically tears down the display controller before handing
control over to Linux. On LCD displays disabling pixel clock leads to a
fading out effect with vertical/horizontal lines. Make sure to disable
back light GPIO Apalis BKL1 before booting Linux.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 20:59:09 +01:00
Marcel Ziswiler
fe7b2b322e apalis-imx8: implement pcb version and soc variant handling
Implement PCB version and SoC variant handling which automatically loads
the correct device tree for the Linux kernel.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 20:59:09 +01:00
Sinthu Raja
554f8e84b6 board: ti: j721s2: Add board_init and support for selecting DT based on EEPROM
Add the board_init_f API for SPL and run the platform-required SoC
initialization.

Add the functionality for board name-based DTB selection from FIT
within SPL. This will make it easier to utilise one defconfig for
both the EVM and the SK.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-27 12:51:27 -05:00
Sinthu Raja
1aaf9df197 board: ti: j721s2: Add support for detecting multiple device trees
Update the board_fit_config_name_match() to choose the right dtb
based on the board name read from EEPROM.

Also restrict multpile EEPROM reads by verifying if EEPROM is already
read

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-27 12:51:26 -05:00
Sinthu Raja
ad45a17578 board: ti: j721s2: Enable support for reading EEPROM at next alternate address
J721S2 EVM has EEPROM populated at 0x50. AM68 SK has EEPROM populated at
next address 0x51 in order to be compatible with RPi. So start looking
for TI specific EEPROM at 0x50, if not found look for EEPROM at 0x51.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-27 12:51:26 -05:00
Sinthu Raja
24bbe09a91 board: ti: j721s2: Add support to update board_name for am68-sk
Update setup_board_eeprom_env() to choose the right board name
for am68-sk.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-27 12:51:26 -05:00
Tom Rini
9ddbd70ff9 Xilinx chnages for v2023.04-rc1
makefile:
 - Add multi_dtb_fit dependency
 
 clk:
 - Handle error cases
 
 microblaze:
 - Disable falcon mode and cleanup code around
 
 xilinx:
 - Enable regular expression matching in board_fit_config_name_match()
 - Fix FRU handling for 0xC1 format
 - Fix Xilinx legacy format eeprom parsing
 
 zynqmp:
 - Some DT updates/cleanups
 - Fix IDcode for xck24
 - Remove empty mini config files
 - Add support for k24
 
 versal:
 - Remove empty mini config files
 
 versal_net:
 - Setup timer when runs in EL3
 - Build u-boot.elf for mini configurations
 
 zynq-gem:
 - Add support for new compatible strings
 - Remove support for Avnet Ultrazedev SOM
 - Handle SGMII with PCS phy
 
 spi:
 - Add support for gigadevice parts
 
 misc:
 - Remove CONFIG_TARGET_VENUS ifdef
 - Add missing headers to remove sparse warnings
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Merge tag 'xilinx-for-v2023.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx chnages for v2023.04-rc1

makefile:
- Add multi_dtb_fit dependency

clk:
- Handle error cases

microblaze:
- Disable falcon mode and cleanup code around

xilinx:
- Enable regular expression matching in board_fit_config_name_match()
- Fix FRU handling for 0xC1 format
- Fix Xilinx legacy format eeprom parsing

zynqmp:
- Some DT updates/cleanups
- Fix IDcode for xck24
- Remove empty mini config files
- Add support for k24

versal:
- Remove empty mini config files

versal_net:
- Setup timer when runs in EL3
- Build u-boot.elf for mini configurations

zynq-gem:
- Add support for new compatible strings
- Remove support for Avnet Ultrazedev SOM
- Handle SGMII with PCS phy

spi:
- Add support for gigadevice parts

misc:
- Remove CONFIG_TARGET_VENUS ifdef
- Add missing headers to remove sparse warnings
2023-01-27 10:15:39 -05:00
Algapally Santosh Sagar
f0f86d39fe fru: ops: Display FRU fields properly for 0xc1 fields
FRU data is not displayed properly in case of 0xc1 fields.
The 0xC1 can be used in two cases.
1. Char record type 8-bit ASCII + Latin 1 with length of 1.
(For example board revision 'A')

2. C1h (type/length byte encoded to indicate no more info fields).
which can follow by 00h to fill all remaining unused space

Hence removed the check end-of-the field c1 to allow c1 fields.

"ASCII+LATIN1" is defined as the printable characters from the
first set of 256 characters of Unicode 6.2 (U+0000h through U+00FFh,
inclusive) expressed as an eight-bit value. (Unicode follows ISO/IEC
8859-1 in the layout of printable characters up to U+00FFh).

So, print only printable chars and limit range from 0x20 ' ' to 0x7e '-'
which will be also indication if 0xc1 behaves as record with one char or
end of record.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4198d73de600627872c80a5b07e5068502c589d7.1674648379.git.michal.simek@amd.com
2023-01-27 08:49:24 +01:00
Michal Simek
5563167e6e xilinx: board: Update logic in xilinx_read_eeprom_legacy
When eeprom has random content printing random chars can stuck U-Boot.
That's why update legacy eeprom format decoding algorithm to copy only
maximum amount of chars allocated for fields.
And also print them directly from desc structure.

Previous algorithm was printing strings first directly from eeprom content
and then copy them to desc structure.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com
2023-01-27 08:48:32 +01:00
Michal Simek
e6c62537db xilinx: board: Fix xilinx_eeprom_legacy_cleanup()
When ethernet mac address contains 0x20 or 0xff MAC address is changed and
bytes are converted to zeros. That's why fix decoding algorithm to ignore
fields where MAC address is stored and all non printable chars (including
space) are zeroed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com
2023-01-27 08:48:32 +01:00
Michal Simek
b86b135fc6 xilinx: board: Use ETH_ALEN macro for mac address size
Use predefined macro for eth_mac legacy format.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com
2023-01-27 08:48:32 +01:00
Algapally Santosh Sagar
1d15612b99 xilinx: versal: Add missing header
Add missing prototype to fix the sparse warning, warning: no
previous prototype for 'do_go_exec' [-Wmissing-prototypes].

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-4-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-27 08:42:47 +01:00
Algapally Santosh Sagar
fb737f1ed8 xilinx: common: Include header file to fix warning
Prototype is missing for board_get_usable_ram_top, which is pointed by
below sparse warning. Include init.h header file to fix this.

warning: no previous prototype for 'board_get_usable_ram_top'
[-Wmissing-prototypes].

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-27 08:42:47 +01:00
Michal Simek
2fe2be2d27 arm64: zynqmp: Add support for Kria K24 SOM
SOM itself from PS point of view is using the same configuration as K26
that's why reuse that files and only change compatible strings.

The reason for creating own set of files is just in case when versions
start to diverge because of HW change, supply chain issue, etc.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/61f877ec0b480c5bd368a1211fc73ff7465016bd.1674043915.git.michal.simek@amd.com
2023-01-24 13:59:33 +01:00
Tom Rini
6e7df1d151 global: Finish CONFIG -> CFG migration
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks.  Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-20 12:27:24 -05:00
Tom Rini
a3fda0d30a global: Remove unused CONFIG defines
Remove some CONFIG symbols and related comments, etc, that are unused
within the code itself at this point.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
448e2b6327 event: Correct dependencies on the EVENT framework
The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf85 ("event: Convert misc_init_f() to use events")
Fixes: c5ef202557 ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-18 12:46:13 -05:00
Michal Simek
8174cd2116 xilinx: common: Add support for partial string match in board_fit_config_name_match()
Board name in FIT image can use U-Boot regular expressions SLRE to instruct
U-Boot to handle all revisions for certain board.
For example when name (description property) is saying "zynqmp-zcu104-revA"
only description with this name is selected.
When zynqmp-zcu104.* is described then all board revisions will be handled
by this fragment.
Xilinx normally have some board revisions which are SW compatible to each
other. That's why make sense to define board name with revisions first
follow by generic description with '.*' at the end like this:

config_1 {
        description = "zynqmp-zcu104-rev[AB]";
        fdt = "zynqmp-zcu104-revA";
};
config_2 {
        description = "zynqmp-zcu104.*";
        fdt = "zynqmp-zcu104-revC";
};

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d67683a3c5d0435a5070e622f7a9a38e19c64cf5.1672994329.git.michal.simek@amd.com
2023-01-18 12:17:47 +01:00
Ashok Reddy Soma
724379d9af xilinx: versal-net: Add support for timer and start it
Add support for starting timer by setting up time stamp generator
registers. This is done only for EL3 i.e. mini U-Boot case.
For other cases, it will be done TF-A.

Add COUNTER_FREQUENCY and IOU_SWITCH_DIVISOR0 to Kconfig so that they
can be tuned as required.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fcd8b0dc4b45a11f5e753afff42f84738ac813da.1673336645.git.michal.simek@amd.com
2023-01-16 15:34:37 +01:00
Quentin Schulz
c925be73a0 rockchip: add support for PX30 Ringneck SoM on Haikou Devkit
The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip
PX30 in a micro Qseven-compatible form-factor.

PX30-µQ7 features:
        * CPU: quad-core Cortex-A35
        * DRAM: 2GB dual-channel
        * eMMC: onboard eMMC
        * SD/MMC
        * TI DP83825I 10/100Mbps PHY
        * USB:
                * USB2.0 dual role port
                * 3x USB2.0 host via onboard USB2.0 hub
        * Display: MIPI-DSI
        * Camera: MIPI-CSI
        * onboard 2.4GHz WiFi + Bluetooth module
        * Companion Controller: on-board additional microcontroller
	  (STM32 Cortex-M0 or ATtiny):
                * RTC
                * fan controller
                * CAN (only STM32)

The non-U-Boot DTS files are imported from Linux v6.2-rc2.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-16 18:01:11 +08:00
Peter Robinson
5a42fd0258 rockchip: Add initial support for the PINE64 Pinephone Pro
The Pinephone Pro is another device by PINE64. It's closely related
to the Pinebook Pro of which this initial support is derived from.

Specification:
- A variant of the Rockchip RK3399
- A 6 inch 720*1440 DSI display
- Front and rear cameras
- Type-C interface with alt mode display (DP 1.2) and PD charging
- 4GB LPDDR4 RAM
- 128GB eMMC
- mSD card slot
- An AP6255 module for 802.11ac WiFi and Bluetooth 5
- Quectel EG25-G 4G/LTE modem

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-16 18:01:11 +08:00
Jagan Teki
b8f1ca9540 board: rockchip: Add Edgeble Neu2 IO Board
Neural Compute Module 2(Neu2) IO board is an industrial form factor
IO board from Edgeble AI.

General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion

Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
26f92be07e ram: rockchip: Add common ddr type configs
We have common ddr types in rockchip or in general. So use
the common ddr type names instead of per Rockchip SoC to
avoid confusion.

The respective ddr type names will use on the associated
ddr SoC driver as these drivers are built per SoC at a time.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Patrick Delaunay
4b002d9628 board: st: Add support of STM32MP13x boards in stm32board cmd
Add board identifiers for STMicroelectronics STM32MP13x boards:
- DISCO board: MB1635

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:37:13 +01:00
Patrick Delaunay
33a909a42a stm32mp: Add OP-TEE support in bsec driver
When OP-TEE is used, the SMC for BSEC management are not available and
the STM32MP BSEC pseudo TA must be used (it is mandatory for STM32MP13
and it is a new feature for STM32MP15x).

The BSEC driver try to open a session to this PTA BSEC at probe
and use it for OTP read or write access to fuse or to shadow.

This patch also adapts the commands stm32key and stboard to handle
the BSEC_LOCK_PERM lock value instead of 1.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:37:13 +01:00
Michal Simek
2732035da9 board: presidio-asic: Remove CONFIG_TARGET_VENUS
Symbol is not defined anywhere that's why remove it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e34404488b2b46cbb2a10c1663e809ff34287a66.1671463617.git.michal.simek@amd.com
2023-01-11 15:18:08 +01:00
Luca Ceresoli
66b39c1a8c arm64: zynqmp: remove Avnet UltraZed-EV Starter Kit
Nobody seems interested and able to keep this board supported, and
xilinx_zynqmp_virt_defconfig is supposed to be enough for any zynqmp board.

See the discussion at: https://lore.kernel.org/u-boot/CAPnjgZ3hHbyiFf=_Lp-Wz_XOWBkV-3vK4Q3xp=7bcERw-spNpA@mail.gmail.com/T/#m76d726f1ab3f7074c8105c9a2af2110ac7d18708

Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Link: https://lore.kernel.org/r/20230111082554.1930782-1-luca.ceresoli@bootlin.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-11 10:43:39 +01:00
Andrew Davis
367c9e0614 ARM: omap3: evm: Name this directory omap3evm
Before this was named just evm, which doesn't match the naming
of the other TI board file directory and makes it look like a
common directory for evms. Name this omap3evm.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Derald Woods <woods.technical@gmail.com>
2023-01-10 15:39:08 -05:00
Tom Rini
b82f12b642 First set of u-boot-at91 features for the 2023.04 cycle
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Merge tag 'u-boot-at91-2023.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2023.04 cycle:

This feature set includes the new DM-based NAND flash driver (old non-DM
driver is still kept for backwards compatibility), and the move to DM
NAND flash driver for sam9x60ek board. Feature set also includes
devicetree alignment for sama7g5 with Linux, devicetree alignment on USB
with Linux for all boards (sama5, sam9x60), chip id for sama7g5, minor
configs and tweaks.
2023-01-06 11:53:26 -05:00
Mihai Sain
8a2f52f44a configs: sam9x60: add mmc config for sdmmc1
Add new config for storing environment from SDMMC1.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2023-01-04 09:28:04 +02:00
Mihai Sain
77aa6456bf board: at91: sam9x60: set blue led on at boot time
Set blue led on at boot time in order to highlight that u-boot is loaded.
This is done for all sam9x60 based boards which contain an RGB led.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2023-01-04 09:28:04 +02:00
Neha Malcom Francis
9f393a2d7a board: ti: common: board_detect: Fix EEPROM read quirk for 2-byte
EEPROM detection logic in ti_i2c_eeprom_get() involves figuring out
whether addressing is 1-byte or 2-byte. There are currently different
behaviours seen across boards as documented in commit bf6376642f
("board: ti: common: board_detect: Fix EEPROM read quirk"). Adding to
the list, we see that there are 2-byte EEPROMs that read properly
with 1-byte addressing with no offset.

For ti_i2c_eeprom_am6_get where eeprom parse operation is dynamic, the
earlier commit d2ab2a2baf ("board: ti: common: board_detect: Fix
EEPROM read quirk for AM6 style data") tried to resolve this by running
ti_i2c_eeprom_get() twice. However this commit along with its former
commit fails on J7 platforms where EEPROM successfully return back the
header on 1-byte addressing and continues to do so until an offset is
introduced. So the second read incorrectly determines the EEPROM as
1-byte addressing.

A more generic solution is introduced here to solve
this issue: 1-byte read without offset and 1-byte read with offset. If
both passes, it follows 1-byte addressing else we proceed with 2-byte
addressing check.

Tested on J721E, J7200, DRA7xx, AM64x

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Fixes: d2ab2a2baf (board: ti: common: board_detect: Fix EEPROM read quirk for AM6 style data)
Fixes: bf6376642f (board: ti: common: board_detect: Fix EEPROM read quirk)
Tested-By: Matwey V. Kornilov <matwey.kornilov@gmail.com>
2023-01-02 16:06:07 -05:00
Tom Rini
0478dac62a kbuild: Remove uncmd_spl logic
At this point in the conversion there should be no need to have logic to
disable some symbol during the SPL build as all symbols should have an
SPL counterpart.

The main real changes done here are that we now must make proper use of
CONFIG_IS_ENABLED(DM_SERIAL) rather than many of the odd tricks we
developed prior to CONFIG_IS_ENABLED() being available.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:13 -05:00
Tom Rini
e1d6c16d80 librem5: Rename CONFIG_POWER_BD71837 symbols
Rename the CONFIG_POWER_BD71837_I2C_* symbols to not have the CONFIG
prefix and be local to the file they are used in.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:13 -05:00
Tom Rini
438654c87c global: Migrate CONFIG_VSC7385_IMAGE et al to CFG
Perform simple renames of:
   CONFIG_VSC7385_IMAGE to CFG_VSC7385_IMAGE
   CONFIG_VSC7385_IMAGE_SIZE to CFG_VSC7385_IMAGE_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
39d4e7b0b0 global: Migrate CONFIG_TESTPIN_REG to CFG
Perform a simple rename of CONFIG_TESTPIN_REG to CFG_TESTPIN_REG

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
77cfb3d345 global: Migrate CONFIG_TESTPIN_MASK to CFG
Perform a simple rename of CONFIG_TESTPIN_MASK to CFG_TESTPIN_MASK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
3e204427c8 global: Migrate CONFIG_SMP_PEN_ADDR to CFG
Perform a simple rename of CONFIG_SMP_PEN_ADDR to CFG_SMP_PEN_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
59f3a09a6c global: Migrate CONFIG_SLIC to CFG
Perform a simple rename of CONFIG_SLIC to CFG_SLIC

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
ddc4187033 global: Migrate CONFIG_SET_DFU_ALT_BUF_LEN to CFG
Perform a simple rename of CONFIG_SET_DFU_ALT_BUF_LEN to CFG_SET_DFU_ALT_BUF_LEN

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
3db78c830f global: Migrate CONFIG_RESET_VECTOR_ADDRESS to CFG
Perform a simple rename of CONFIG_RESET_VECTOR_ADDRESS to CFG_RESET_VECTOR_ADDRESS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:11 -05:00
Tom Rini
aa3efb6c64 global: Migrate CONFIG_POWER_PFUZE100_I2C_ADDR to CFG
Perform a simple rename of CONFIG_POWER_PFUZE100_I2C_ADDR to CFG_POWER_PFUZE100_I2C_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:52 -05:00
Tom Rini
6d38c69e83 global: Migrate CONFIG_POWER_LTC3676_I2C_ADDR to CFG
Perform a simple rename of CONFIG_POWER_LTC3676_I2C_ADDR to CFG_POWER_LTC3676_I2C_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:52 -05:00
Tom Rini
f410d0ac8a global: Migrate CONFIG_PL011_CLOCK to CFG
Perform a simple rename of CONFIG_PL011_CLOCK to CFG_PL011_CLOCK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
52d596eabb global: Migrate CONFIG_PHY_ID to CFG
Perform a simple rename of CONFIG_PHY_ID to CFG_PHY_ID

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
1c3ba55798 global: Migrate CONFIG_ODROID_REV_AIN to CFG
Perform a simple rename of CONFIG_ODROID_REV_AIN to CFG_ODROID_REV_AIN

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
4db386655a global: Migrate CONFIG_MXC_UART_BASE to CFG
Perform a simple rename of CONFIG_MXC_UART_BASE to CFG_MXC_UART_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
8a897c4f97 global: Migrate CONFIG_MAX_RAM_BANK_SIZE to CFG
Perform a simple rename of CONFIG_MAX_RAM_BANK_SIZE to CFG_MAX_RAM_BANK_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
1d457dbb91 global: Migrate CONFIG_MAX_MEM_MAPPED to CFG
Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
cdbf8459d0 global: Migrate CONFIG_ICS307_REFCLK_HZ to CFG
Perform a simple rename of CONFIG_ICS307_REFCLK_HZ to CFG_ICS307_REFCLK_HZ

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:10:40 -05:00
Tom Rini
315390e467 global: Migrate CONFIG_FSL_SERDES2 to CFG
Perform a simple rename of CONFIG_FSL_SERDES2 to CFG_FSL_SERDES2

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:43 -05:00
Tom Rini
da49557003 global: Migrate CONFIG_FSL_SERDES1 to CFG
Perform a simple rename of CONFIG_FSL_SERDES1 to CFG_FSL_SERDES1

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:43 -05:00
Tom Rini
eaaca4245e global: Migrate CONFIG_FSL_PMIC_BUS to CFG
Perform a simple rename of CONFIG_FSL_PMIC_BUS to CFG_FSL_PMIC_BUS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:43 -05:00
Tom Rini
fa760c3240 global: Migrate CONFIG_FEC_MXC_PHYADDR to CFG
Perform a simple rename of CONFIG_FEC_MXC_PHYADDR to CFG_FEC_MXC_PHYADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:42 -05:00
Tom Rini
4daffb58e6 global: Migrate CONFIG_FEC_ENET_DEV to CFG
Perform a simple rename of CONFIG_FEC_ENET_DEV to CFG_FEC_ENET_DEV

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:09:42 -05:00