Commit graph

670 commits

Author SHA1 Message Date
Ashok Reddy Soma
cd08513b05 xilinx: zynq: Add support for saving env based on bootmode
Enable saving variables to MMC(FAT), NAND, SPI based on primary
bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE).

Since most of the flashes on zynq evaluation boards are 16MB in size,
set default ENV_OFFSET to 15MB(0xE00000).

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23 08:43:18 +02:00
Tom Rini
db8b46120a Xilinx changes for v2021.07
net:
 - Fix gem PCS support
 
 spi:
 - Small trivial fixes
 
 zynq:
 - Enable time/timer commands
 - Update bitmain platform
 - Several DT changes
 
 zynqmp:
 - Update clock driver
 - mini config alignments
 - Add/update psu_init for zcu208/zcu216/zc1275
 - Several DT changes
 - Enable efi debug command (also for Versal)
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Merge tag 'xilinx-for-v2021.07' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2021.07

net:
- Fix gem PCS support

spi:
- Small trivial fixes

zynq:
- Enable time/timer commands
- Update bitmain platform
- Several DT changes

zynqmp:
- Update clock driver
- mini config alignments
- Add/update psu_init for zcu208/zcu216/zc1275
- Several DT changes
- Enable efi debug command (also for Versal)
2021-03-31 09:47:30 -04:00
Michal Simek
cde1aaeae2 arm64: zynqmp: Update psu_init for zcu1275
Update clock/pll setup, ddr, MIOs based on 2020.2 hw design.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30 12:03:24 +02:00
Michal Simek
7a50093a44 arm64: zynqmp: Add missing psu inits for zcu208/216
Add missing configurations file for zcu208 and zcu216.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30 12:03:24 +02:00
Harald Seiler
35b65dd8ef reset: Remove addr parameter from reset_cpu()
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to.  This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value.  Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.

Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g.  COLD vs WARM resets).  As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).

To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely.  Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.

This transformation was done with the following coccinelle patch:

    @@
    expression argvalue;
    @@
    - reset_cpu(argvalue)
    + reset_cpu()

    @@
    identifier argname;
    type argtype;
    @@
    - reset_cpu(argtype argname)
    + reset_cpu(void)
    { ... }

Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-02 14:03:02 -05:00
Heinrich Schuchardt
a3bbd0b912 Correct U-Boot upstream repository
The U-Boot source moves to https://source.denx.de/u-boot/u-boot.git
effective 2021-02-28.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-28 13:57:30 -05:00
Tom Rini
cbe607b920 Xilinx changes for v2021.04-rc3
qspi:
 - Support for dual/quad mode
 - Fix speed handling
 
 clk:
 - Add clock enable function for zynq/zynqmp/versal
 
 gem:
 - Enable clock for Versal
 - Fix error path
 - Fix mdio deregistration path
 
 fpga:
 - Fix buffer alignment for ZynqMP
 
 xilinx:
 - Fix reset reason clearing in ZynqMP
 - Show silicon version in SPL for Zynq/ZynqMP
 - Fix DTB selection for ZynqMP
 - Rename zc1275 to zcu1275 to match DT name
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Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2021.04-rc3

qspi:
- Support for dual/quad mode
- Fix speed handling

clk:
- Add clock enable function for zynq/zynqmp/versal

gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path

fpga:
- Fix buffer alignment for ZynqMP

xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
2021-02-23 10:45:55 -05:00
Michal Simek
3600d47b73 arm64: zynqmp: Rename zc1275/zcu1275 to be aligned with DT name
Folder names corresponds to DT name. These boards have been renamed from
zc1275 to zcu1275 by commit shown below and this should be the part of that
commit.

Fixes: 420d446781 ("arm64: zynqmp: Rename zc1275 to zcu1275")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:59 +01:00
Michal Simek
3aba25bc38 arm64: zynqmp: Do not clear reset reason
There is no need to clear reset reason register because it is protected by
PMUFW already which is reported when verbose log is enabled as:
pm_core.c@733 APU> No write permission to 0xFF5E0220

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:59 +01:00
Michal Simek
98757d87ee xilinx: Show silicon version in SPL
Both Zynq and ZynqMP can show silicon versions in SPL boot flow. It is
useful to be aware.
The patch is also fixing possition of these bits on ZynqMP.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-10 13:21:12 +01:00
Michal Simek
fc3c6fd752 xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP
Fix bug introduced by commit listed below. It is for cases where Versal or
ZynqMP don't have DDR mapped. Later SPL was also excluded by
commit a672b9871b ("xilinx: common: Do not touch
CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL").

Fixes: 506009fc10 ("xilinx: common: Change macro handling in board_fdt_blob_setup()")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-10 13:20:27 +01:00
Simon Glass
401d1c4f5d common: Drop asm/global_data.h from common header
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02 15:33:42 -05:00
Michal Simek
a672b9871b xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL
This hook is used in full U-Boot that's why there is no reason to touch
this location from SPL. The hook was introduced for QEMU usage but none is
really running SPL on QEMU that's why it shouldn't break any usecase.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Michal Simek
506009fc10 xilinx: common: Change macro handling in board_fdt_blob_setup()
Remove ifdef logic which is handled by preprocessor and move it link time
optimization to get full compile code coverage.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Michal Simek
2784befbd7 xilinx: zynqmp: Save bootseq number for SD/EMMC boot modes
For systems which has both sdhci controllers enable it is worth to export
bootseq number for variables. Then the variable can be used in custom
scripts to tune logic for OS.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Tom Rini
bc0b99bd8b Xilinx changes for v2021.04
arm64:
 - DT updates
 
 microblaze:
 - Add support for NOR device support
 
 spi:
 - Fix unaligned data write issue
 
 nand:
 - Minor code change
 
 xilinx:
 - Fru fix in limit calculation
 - Fill git repo link for all Xilinx boards
 
 video:
 - Add support for seps525 spi display
 
 tools:
 - Minor Vitis file support
 
 cmd/common
 - Minor code indentation fixes
 
 serial:
 - Uartlite debug uart initialization fix
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Merge tag 'xilinx-for-v2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2021.04

arm64:
- DT updates

microblaze:
- Add support for NOR device support

spi:
- Fix unaligned data write issue

nand:
- Minor code change

xilinx:
- Fru fix in limit calculation
- Fill git repo link for all Xilinx boards

video:
- Add support for seps525 spi display

tools:
- Minor Vitis file support

cmd/common
- Minor code indentation fixes

serial:
- Uartlite debug uart initialization fix
2021-01-06 07:57:33 -05:00
Michal Simek
0109db1cd1 xilinx: Fill git repository for Xilinx boards
All Xilinx SoCs have repository location filled already but boards are
covered by different fragment which is missing this link.
The patch is extending description with adding proper link to the same
repository.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:53 +01:00
Heinrich Schuchardt
b6d14c52f9 fru: ops: avoid out of bounds access
Building xilinx_zynq_virt_defconfig fails on origin/next as reported by
GCC 10.2 (as provided by Debian Bullseye):

  CC      board/xilinx/common/fru_ops.o
board/xilinx/common/fru_ops.c: In function ‘fru_capture’:
board/xilinx/common/fru_ops.c:173:8:
error: array subscript 284 is outside array bounds of
‘struct fru_table[1]’ [-Werror=array-bounds]
  173 |  limit = data + sizeof(struct fru_board_data);
      |  ~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
board/xilinx/common/fru_ops.c:17:18: note: while referencing ‘fru_data’
   17 | struct fru_table fru_data __section(.data);
      |                  ^~~~~~~~

When using sizeof(struct fru_board_data) to find the end of the structure
you should add it to the start of the structure.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:53 +01:00
T Karthik Reddy
5766429b7c microblaze: Set script_offset_nor env variable
Set script_offset_nor env variable using CONFIG_BOOT_SCRIPT_OFFSET
and nor flash start address to keep bootscript offset configurable.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-04 10:51:27 +01:00
Simon Glass
8b85dfc675 dm: Avoid accessing seq directly
At present various drivers etc. access the device's 'seq' member directly.
This makes it harder to change the meaning of that member. Change access
to go through a function instead.

The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Michal Simek
cd40b82655 fru: common: Record pcie/uuid fields in custom board area
Add additional fields. They will be just recorded and filled but not shown.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:54 +01:00
Michal Simek
b8771d0b1d fru: ops: Do not let parser to write data to not allocated space
If customs fields in board area are used it will likely go over allocated
space in struct fru_board_data. That's why calculate limit of this
structure to make sure that different data is not rewritten by accident.
When limit is reached stop to record fields.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:54 +01:00
Michal Simek
5fb093f471 fru: common: Switch capture variable with the rest
capture variable is bool which is just one byte and it is just causing
unaligned accesses. Better to have it as last entry in the structure.

It also simplify offset calculation for initial header copy.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:54 +01:00
Michal Simek
6c5828dc4b microblaze: Get rid of xparameters.h
There is no need to use this file anymore. Include it in main config file
and simplify logic based on it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:53 +01:00
Michal Simek
05af4834ad xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms
Move board_fit_config_name_match() from Zynq/ZynqMP to common location.
This change will open a way to use it also by Microblaze and Versal.
Through this function there is a way to handle images with multiple DTBs.
For now match it with DEVICE_TREE as is done for Zynq.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-29 08:55:43 +01:00
Ashok Reddy Soma
728d21b8c7 mmc: zynq_sdhci: Add common function to set input/output tapdelays
Remove setting tapdelays for different speeds separately. Instead use
the ITAP and OTAP delay values which are read from the device tree.
If the DT does not contain tap delay values, the predefined values
will be used for the same.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-29 08:55:43 +01:00
Ashok Reddy Soma
17a42abb40 mmc: Define timing macro's
Define timing macro's for all the available speeds of mmc. This is
done similar to linux. Replace speed macro's used with these new timing
macro's wherever applicable.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-27 08:13:33 +01:00
Michal Simek
1230582150 microblaze: Wire generic xilinx board_late_init_xilinx()
Call generic board_late_init_xilinx() to be aligned with the rest of xilinx
platforms. Also getting rid of initrd_high/fdt_high and use
bootm_low/boot_size instead.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
92dc921063 xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM
There is no reason not to use commong Kconfig by Microblaze too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
T Karthik Reddy
d388cedd46 xilinx: Add DDR base address to bootscript address
Add ram base address to scriptaddr env variable to make boot
script address to be a valid address when ddr base address changes.

This works properly if the first memory region is the region where uboot
runs. Also the solution was taken in respect of a lot of jtag script
putting u-boot script to certain address. For standard cases
bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed
out of this location it does calculation.

This is not the best solution and should be done differently in future but
enough for now till we don't have full solution ready yet.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
2fbdbee732 xilinx: zynqmp: Use tab for macro indentation
Trivial fix.

Fixes: fa793165da ("xilinx: zynqmp: refactor silicon name function")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
07499daf50 xilinx: zynqmp: Do not check 0 as invalid return from snprintf
U-Boot SPL on ZynqMP is using CONFIG_SPL_USE_TINY_PRINTF which doesn't
return any return value and all the time returns 0. That's why
even correct snprintf was returning in SPL chip ID as "unknown".
Change checking condition and allow snprintf to return 0 which is according
manual patch successful return.
"If an output error is encountered, a negative value is returned."

Fixes: 43a138956f7e ("arm64: zynqmp: Get rid of simple_itoa and replace it by snprintf")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
16df2f1edb xilinx: zynqmp: Fix debug message in zynqmp_get_silicon_idcode_name()
Fix hex format from 0x%0X to 0x%0x to show correct numbers.

Fixes: fa793165da ("xilinx: zynqmp: refactor silicon name function")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
d026aa1de3 xilinx: zynqmp: Check return value from xilinx_pm_request()
xilinx_pm_request() can failed that's why also check return value.

Fixes: 050f10f103 ("xilinx: zynqmp: remove chip_id function")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
f149b39ca3 xilinx: board: Add FRU decoder support
FMC cards are using FRU format for card identification. That's why add
support for this format.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
4489e0aa9b xilinx: cmd: Add basic fru format generator
Idea is to have something what can be used for board bringup from
generic board perspective.

There is a violation compare to spec that FRU ID is ASCII8 instead of
binary format but this is really for having something to pass boot and
boot to OS which has better generating options.
Also time should be filled properly.

For example:
fru board_gen 1000 XILINX versal-x-prc-01-revA serialX partX

There is also support for revision field which is Xilinx specific field.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Siva Durga Prasad Paladugu
f1b97b5f18 xilinx: cmd: Add support for FRU commands
This patch adds support for fru commands "fru capture" and "fru display".
The fru capture parses the FRU table present at an address and stores in a
structure for later use. The fru display prints the content of captured
structured in a readable format.

As of now, it supports only common header and board area of FRU. Also, it
supports only English language code and ASCII8/BINARY formats.

fru_data variable is placed to data section because fru parser can be
called very early before bss is initialized. And also information needs to
be shared that's why it is exported via header.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
3e315f31cc xilinx: common: Add Makefile to common folder
There is no need to reference files in common folder back. Simply adding
Makefile to this folder does the job because this "common" location is
already wired in main Makefile.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
7c553ac0ff xilinx: common: Protect board_late_init_xilinx()
Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
83594f3c01 xilinx: common: Move ZYNQ_GEM_I2C_MAC_OFFSET to board Kconfig
There is no reason to have ZYNQ specific Kconfig macro in generic location
to be visible for all other SoCs. That's why move it to Xilinx common
location to be visible only for us.
Also introduce new bool entry ZYNQ_MAC_IN_EEPROM to have also an option to
disable it or enable. This has connection to code which is reading the
whole content of i2c and also work with the rest of date not just with MAC
address.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
a03b594738 xilinx: board: Add support for additional card detection
The most of Xilinx evaluation boards have FMC connectors which contain
small eeprom for card identification. That's why read content of eeprom and
record it.
Also generate cardX_ variables for easier script handling.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
d61728c8e8 xilinx: board: Read the whole eeprom not just offset
Starts to use new way how eeproms should be referenced.
Reference is done via nvmem alias nodes. When this new way is specified
code itself read the eeprom and decode xilinx legacy format and fill struct
xilinx_board_description. Then based on information present there board_*
variables are setup.
If variables are saved and content can't be changed information is just
shown on console.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
768622b1d7 arm64: zynqmp: Add support for saving sha3 key to different address
By default 48B sha3 hash value is written to srcaddr which is not the best
solution in case of that you want to use data for other operations. That's
why add key_addr optional parameters which enables to write 48B sha3 hash
value to specified address.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
2020-10-27 08:13:32 +01:00
T Karthik Reddy
0af9de9a90 arm64: zynqmp: Add support for SHA3 command
This patch adds support for SHA3 command. It takes data blob
as input and generates 48 bytes sha3 hash value.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:31 +01:00
T Karthik Reddy
650d02ae77 arm64: zynqmp: Add support for RSA command
This patch adds support for RSA command, performs RSA encrypt &
RSA decrypt on data blob of key size.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:31 +01:00
Siva Durga Prasad Paladugu
8e4e914652 arm64: zynqmp: Add support for encryption and decryption on data blob
This patch adds support for encryption and decryption on a given data
blob using different key sources such as userkey(KUP), device key and
PUF key. Inorder to support this a new zynqmp command(zynqmp aes) has
been introduced.

Command:
zynqmp aes srcaddr ivaddr len aesop keysrc dstaddr [keyaddr]\n"
	Encrypts or decrypts blob of data at src address and puts it\n"
	back to dstaddr using key and iv at keyaddr and ivaddr\n"
	respectively. keysrc values specifies from which source key\n"
	has to be used, it can be User/Device/PUF key. A value of 0\n"
	for KUP(user key),1 for DeviceKey and 2 for PUF key. The\n"
	aesop value would specify the operationwhich can be 0 for\n"
	decrypt and 1 for encrypt(1) operation\n";

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:31 +01:00
Michal Simek
0d76b71d93 arm64: zynqmp: Get rid of simple_itoa and replace it by snprintf
simple_itoa() is implemented only for !CONFIG_USE_TINY_PRINTF. Tiny printf
is normally used by SPL that's code which uses simple_itoa() has missing
reference. That's why refactor code by using on snprintf() instead of
strncpy()/strncat() combination. This change also descrease code size by
saving 24B based on buildman.

aarch64: (for 1/1 boards) all -22.0 rodata +2.0 text -24.0
         xilinx_zynqmp_virt: all -22 rodata +2 text -24
            u-boot: add: 0/0, grow: 0/-1 bytes: 0/-24 (-24)
              function                                   old     new   delta
              board_init                                 520     496     -24

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:31 +01:00
T Karthik Reddy
ed0842d6c5 microblaze: Setup distro boot env variables at run time
Setup all the distro boot related environment variables at
run time. Add BOOT_SCRIPT_OFFSET config to microblaze board
Kconfig.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:01:36 +01:00
T Karthik Reddy
d6242edcce microblaze: board: Check return value whlie saving env variables
Check and print warning if run time env variables are not saved.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:01:36 +01:00
Michal Simek
bbe086a950 arm64: zynqmp: Add missing support for 9cg version
9cg version was supported before code refactoring. The patch is adding it
back.

Fixes: fa793165da ("xilinx: zynqmp: refactor silicon name function")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:01:36 +01:00
Alexandre GRIVEAUX
bd897a0789 ARM: zynq: Add Z-turn board V5
Adding Z-turn board V5 to resolve the change between:

"Z-TURNBOARD_schematic.pdf" schematics state version 1 to 4 has Atheros AR8035
"Z-Turn_Board_sch_V15_20160303.pdf" schematics state version 5 has Micrel KSZ9031

At this time the S25FL128SAGNFI003 doesn't work because of bug:

*** Warning - spi_flash_probe_bus_cs() failed, using default environment

zynq-zturn was checked on V5 board, same error.

Maybe Z-turn board have the same problem (board with W25Q128BVFIG).

Signed-off-by: Alexandre GRIVEAUX <agriveaux@deutnet.info>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:01:36 +01:00
Tom Rini
67ece26d8b Xilinx changes for v2021.01
arm64:
 - Support for bigger U-Boot images compiled with PIE
 
 microblaze:
 - Extend support for LE/BE systems
 
 zynqmp:
 - Refactor silicon ID detection code with using firmware interface
 - Add support for saving variables based on bootmode
 
 zynqmp-r5:
 - Fix MPU mapping and defconfig setting.
 
 xilinx:
 - Minor driver changes: names alignment
 - Enable UBIFS
 - Minor DT and macros fixes
 - Fix boot with appended DT
 - Fix distro boot
 
 cmd:
 - pxe: Add fixing for platforms with manual relocation support
 
 clk:
 - fixed_rate: Add DM flag to support early boot on r5
 
 fpga:
 - zynqmppl: Use only firmware interface and enable SPL build
 
 serial:
 - uartlite: Enable for ARM systems and support endians
 
 mmc:
 - zynq: Fix indentation
 
 net:
 - gem: Support for multiple phys
 - emac: Fix 64bit support and enable it for arm64
 
 kconfig:
 - Setup default values for Xilinx platforms
 - Fix dependecies for Xilinx drivers
 - Source board Kconfig only when platform is enabled
 - Fix FPGA Kconfig entry with SPL
 - Change some defconfig values
 
 bindings:
 - Add binding doc for vsc8531
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Merge tag 'xilinx-for-v2021.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2021.01

arm64:
- Support for bigger U-Boot images compiled with PIE

microblaze:
- Extend support for LE/BE systems

zynqmp:
- Refactor silicon ID detection code with using firmware interface
- Add support for saving variables based on bootmode

zynqmp-r5:
- Fix MPU mapping and defconfig setting.

xilinx:
- Minor driver changes: names alignment
- Enable UBIFS
- Minor DT and macros fixes
- Fix boot with appended DT
- Fix distro boot

cmd:
- pxe: Add fixing for platforms with manual relocation support

clk:
- fixed_rate: Add DM flag to support early boot on r5

fpga:
- zynqmppl: Use only firmware interface and enable SPL build

serial:
- uartlite: Enable for ARM systems and support endians

mmc:
- zynq: Fix indentation

net:
- gem: Support for multiple phys
- emac: Fix 64bit support and enable it for arm64

kconfig:
- Setup default values for Xilinx platforms
- Fix dependecies for Xilinx drivers
- Source board Kconfig only when platform is enabled
- Fix FPGA Kconfig entry with SPL
- Change some defconfig values

bindings:
- Add binding doc for vsc8531
2020-09-24 08:33:47 -04:00
Michal Simek
29bd8ada52 fpga: kconfig: Rename SPL_FPGA_SUPPORT to SPL_FPGA
The patch does sed 's/SPL_FPGA_SUPPORT/SPL_FPGA/g' but also fixing Makefile
and zynqmp.c to simplify if/endif logic in zynqmp.c.

This change is mostly done to be able to use CONFIG_IS_ENABLED macro and
obj-$(CONFIG_$(SPL_)FPGA) in Makefile. For them symbols need to be in sync.

And removing one line from Topic Miami boards which is not needed because
symbol is not enabled via Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-23 10:31:41 +02:00
Michal Simek
e2572b5544 xilinx: common: Do not save fdt_blob to bss section
For SPL flow without specifying address for DT loading DTB is automatically
appended behind U-Boot code. Specifically _end symbol is used. Just behind
it there is place for bss section.
It means if early code is using static variable and there is a write to
this variable DTB file is corrupted if variable is located between DTB
start and end.
In this particular case offset of this variable from bss section start is
very small (0x40) that's why DT is currupted which breaks this boot flow.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:41 +02:00
Michal Simek
1025bd098a xilinx: zynqmp: Add support for saving variables
Enabling saving variables to MMC(FAT), NAND, SPI based on primary bootmode.
Maybe that logic can be tuned for more complicated use cases and better
tested for different bootmodes.

Tested on zcu104 to SD(FAT) and JTAG(NOWHERE).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
4d9bc795ae xilinx: zynqmp: Get zynqmp_get_bootmode() out of CONFIG_BOARD_LATE_INIT
This function will be also used by different code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
ced4d46626 xilinx: zynqmp: Remove one static variable
There is no reason to have name variable saved in BSS section when it
doesn't need to be really used. That's why remove static from variable
definition and use strdup() to duplicate string with exact size from malloc
area instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
e17c5ec8e1 xilinx: zynqmp: Add missing 43/46/47dr ID codes
Add support for 43/46/47dr devices.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Ibai Erkiaga
fa793165da xilinx: zynqmp: refactor silicon name function
Current algorithm used to get the silicon name is bit complicated and
hard to follow. Updated to use more straightforward mechanism based on
the Device ID code table (Table 1-2). The full IDCODE register is used
(except device revision bits [31:28]) to get the device name and IDCODE2
value is used for identifying the variant.

Additionally to make the algorithm bit more clear it also save some space
as the devices table is slightly bit smaller.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
1a005b4ae4 board: xilinx: Enable changing default DTB pick up address
U-Boot on xilinx boards is checking one address where DTB can be placed as
the first location for DTB. Originally this code was developed for Versal
where QEMU was putting generated DTB for U-Boot to use.
The patch enables changing this address which is necessary for cases where
default address is pointing to location (DDR) which is not present. The
access to this location can cause exception.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Stefan Roese
dfaf6a5797 CONFIG_NR_DRAM_BANKS: Remove unreferenced code as its always defined
Since commit 86cf1c8285 ("configs: Migrate CONFIG_NR_DRAM_BANKS") &
commit 999a772d9f ("Kconfig: Migrate CONFIG_NR_DRAM_BANKS"),
CONFIG_NR_DRAM_BANKS is always defined with a value (4 is default).
It makes no sense to still carry code that is guarded with
"#ifndef CONFIG_NR_DRAM_BANKS" (and similar). This patch removes
all these unreferenced code paths.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-26 09:19:16 +02:00
Michal Simek
2570cc6430 xilinx: common: Change bootm_size variable setting
Linux kernel for arm32 requires dtb and initrd to be placed in low memory
to work properly. This requirement is described in chapter 4b) and 5) in
Linux documentation (Documentation/arm/booting.rst).

There is an issue on arm32 with 2GB of memory that bootm_size is bigger
than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm
size on these systems not to be above 768MB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:16 +02:00
Michal Simek
ca0f616530 xilinx: common: Check return value from variable setup
env_set..() can failed that's why check return status and report it back to
make sure that user is aware that's something went wrong.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:16 +02:00
Michal Simek
653809f43f xilinx: common: Get rid of initrd_high variable setup
When bootm_low/bootm_size are setup properly there is no need to setup any
initrd_high address. Location for initrd is determined through LMB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:16 +02:00
Michal Simek
9fea3b18d6 xilinx: Change logic around zynq_board_read_rom_ethaddr()
There is no reason to build private function when
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak
function which handles default case properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
62b96262b6 xilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIG
Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG to enable/disable updating
variables with run time information.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
050f10f103 xilinx: zynqmp: remove chip_id function
Remove chip_id function and integrate the firmware call in the
zynqmp_get_silicon_idcode_name function. The change avoids querying the
firmware twice and makes the code bit more clear.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
4b2ad7b111 xilinx: zynqmp: get chip ID at EL3
Modify the board init function to allow getting the chip ID when U-Boot
proper is executed at EL3.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
21c2fc7c6a xilinx: zynqmp: get chip ID using firmware driver
Current implementation for getting chip ID uses either raw access on EL3
or a SMC call to get the silicon information. Following change
simplifies the code using always the firmware driver.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
f6cccbb5f2 xilinx: zynqmp: synchronize firmware call return payload
Removes duplicated definition of PAYLOAD_ARG_CNT and define it in the
firmware driver. Additionally fixes payload buffer declarations without
macro usage

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
22b6bb6ccd xilinx: versal: Use lowest memory for U-Boot
Find and use the lowest memory for Versal to make sure that we keep u-boot
as low as possible and never use memory above u-boot's maximum VA mapping.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
T Karthik Reddy
526a67eb35 xilinx: versal: Add new versal loadpdi command
Versal loadpdi command is used for loading secure & non-secure
pdi images.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Igor Lantsman
1b208d59ba arm64: zynqmp: Fix set_fdtfile() not to break u-boots DTB
Origin function was calling strsep which replaced delimiter ',' by a null
byte ('\0'). Operation was done directly on FDT which ends up with the
following behavior:

ZynqMP>  printenv fdtfile
fdtfile=xilinx/zynqmp.dtb
ZynqMP> fdt addr $fdtcontroladdr
ZynqMP> fdt print / compatible
compatible = "xlnx", "zynqmp"

As is visible fdtfile was correctly composed but a null byte caused that
xlnx was separated from zynqmp.
This hasn't been spotted because in all Xilinx DTs there are at least 3
compatible string and only the first one was affected by this issue.
But for systems which only had one compatible string "xlnx,zynqmp" it was
causing an issue when U-Boot's DT was used by Linux kernel.

The patch removes strsep calling and strchr is called instead which just
locate the first char after deliminator ',' (variable called "name").
And using this pointer in fdtfile composing.

Fixes: 91d7e0c47f ("arm64: zynqmp: Create fdtfile from compatible string")
Reported-by: Igor Lantsman <igor.lantsman@opsys-tech.com>
Signed-off-by: Igor Lantsman <igor.lantsman@opsys-tech.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
c8da6513c0 xilinx: Setup bootm variables
On system with PL DDR which is placed before PS DDR in DT
env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low
and bootm_size variables are taking by default gd->bd->bi_dram[0].start and
gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be
PS ddr and even can be memory above 39bit VA which is what U-Boot supports
now.
That's why setup bootm variables based on ram_base/ram_size setting to make
sure that boot images are placed to the same location as U-Boot is placed.
This location should be by default location where OS can boot from.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:46:55 +02:00
Michal Simek
e20d88bffa xilinx: zynqmp: Enable pmufw config reloading
PMU FW has functionality to accept and reload configuration object at run
time. The patch is adding support for doing it via u-boot prompt.

For example:
tftpboot 100000 pmu_obj.bin
zynqmp pmufw 100000 $filesize

The most of pmufw configurations don't allow config reloading.
Also official Xilinx PMUFW doens't support this feature properly but the
patch should open a way to call PMUFW with this request.

Here is example of PMUFW config fragment which enables config reloading.

/* SET CONFIG SECTION */
PM_CONFIG_SET_CONFIG_SECTION_ID,        /* Section ID */
PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Permissions to set config */

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-25 10:08:04 +02:00
Michal Simek
3ccea69fc4 arm64: zynqmp: Print multiboot reg in decimal
It is better to print multiboot value in decimal because boot images are
also composed in decimal not in hex.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-25 10:08:04 +02:00
Mike Looijmans
39c5cf0e70 topic: zynqmp: Add support for zynqmp-xilinx-xdp platform
XDP - Xilinx Drone Platform is a board for drones or other UAV.

Pinmux the SD card by default, and if the SD card detect line is high
(inactive) then pinmux the SD1 interface to EMIO instead. SD is placed on
extension card and shares connection with on board wife. That means that
when SD card is present in the board wifi can't be used.

There seems to be an issue with DDR access from PL at 2400MT/s, after
updating the PMU and ATF firmware this is causing extremely slow DDR
access. Reducing the DDR speed from 2400 to 2133 appears to solve that
issue, even though the hardware has proven to be 2400 capable.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Mike Looijmans
dfbe492ede board: zynqmp: Fix for wrong AMS setting by ROM
A bug in the ZynqMP bootrom sets the PS_SYSMON_ANALOG_BUS register
at 0xFFA50914 to the wrong value 0x3201. This causes the AMS to
exchange the PS supply voltages 0 and 1. On Xilinx boards this is
not noticeable since these are tied together, it's only really
noticeable if banks 500 and 501 have different supplies. Xilinx' tech
support reported this undocumented register to be the cause, and
this patch applies a fix for all boards by programming the correct
value.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
T Karthik Reddy
b80a476faa fpga: zynqpl: Add zynq aes load & loadp commands
Added support for zynq aes load & loadp commands.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Siva Durga Prasad Paladugu
3427f4d204 fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes
Correct the PL bitstream loading sequence for zynqaes command by
clearing the loaded PL bitstream before loading the new encrypted
bitstream using the zynq aes command. This was done by setting
the PROG_B same as in case of fpgaload commands.
This patch fixes the issue of loading the encrypted PL bitstream
onto the PL in which a bitstream has already been loaded
successfully.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
25a5818ff8 common: Drop asm/ptrace.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
0914011310 command: Remove the cmd_tbl_t typedef
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 18:36:55 -04:00
Simon Glass
691d719db7 common: Drop init.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
e6f6f9e648 common: Drop part.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
90526e9fba common: Drop net.h from common header
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:31 -04:00
Michal Simek
51f6c52e6b xilinx: Move bootmode detection to separate function
Create special function for reading bootmode on Versal and ZynqMP.
Zynq is using specific function (without mask) already.
Future patches will be calling this function from different location too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:18 +02:00
Michal Simek
a29511eeca xilinx: Move initrd_high setup to common location
Moving to common location initrd_high is also setup for Zynq which hasn't
done in run time code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:18 +02:00
Michal Simek
dec206a09b xilinx: zynqmp: Fix MIO 18 configuration on zcu104 revC
Without this change QSPI is not detected on zcu104 revC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:17 +02:00
Michal Simek
80fdef12b2 xilinx: Introduce board_late_init_xilinx()
This function should keep common shared late configurations for Xilinx
SoCs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:17 +02:00
Michal Simek
453bb77d09 arm64: xilinx: Never touch DDR if system has no DDR
If DDR is not mapped do not touch it. Default
XILINX_OF_BOARD_DTB_ADDR is pointing to DDR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
3d03752475 arm64: zynqmp: Reorder parameters for zynqmp_mmio_write()
Parameter order is not correct based on zynqmp_mmio_write() declaration.

Fixes: be52372ff1 ("arm64: zynqmp: Use zynqmp_mmio_read/write functions")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
f8451f144e arm64: zynqmp: Move timeout for clock propagation below psu_init
Delay required for clock propagation is tighly coupled with initialization
done in psu_init(). That's why call it also for u-boot proper with
CONFIG_ZYNQMP_PSU_INIT_ENABLED enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
c0adba5721 arm64: zynqmp: Add support for debug uart also for U-Boot proper
board_early_init_f() is the right location where debug uart can be
configurated (after MIO initialization).
The patch is taking this call from SPL to also make it available for U-Boot
proper.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
387121c173 arm64: zynqmp Add support for zcu111 revA
Add low level configuration for zcu111 for easier SPL run.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
47cc45a91c arm64: zynqmp Add support for zcu102 rev1.1
rev1.1 has different DDR sodimm module that's why it requires different DDR
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
66ef85da61 arm64: zynqmp: Check firmware node when driver is enabled
ZynqMP mini configurations works without PMU firmware that's why there is
no reason to enable the driver and check if it was probed properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
c514301337 arm64: zynqmp: Print multiboot register value in EL3
Multi boot register can be used for using different boot images and design
better boot strategy. Let EL3 SPL or U-Boot to read it and print it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:30 +02:00
Michal Simek
c5d7d58b2c ARM: zynq: Rename defconfig to be align with ZynqMP and Versal
Just cosmetic change before real switch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28 12:15:11 +01:00
Michal Simek
9c18aaa23c arm: xilinx: Fill DEVICE_TREE directly in Makefiles
DEVICE_TREE variable is not exported from dts/Makefile that's why it is
necessary to setup directly before use.

Fixes: 312f2c5b14 ("arm: xilinx: Use device tree which can be passed on cmd line")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28 12:15:11 +01:00
Milan Obuch
1a4bf17b02 arm: zynq: zybo z7: fix MIO init issue
The board has two push button connected to MIO pins
50 and 51, which have a pull-down resistor and are
connected to 1.8V when pressed.

These two pins are wrongly initialized with internal
pull-up enabled so they are reported as 1 all the time
with no change when pressed.

Disable the internal pull-up to fix the issue.

Signed-off-by: Milan Obuch <u-boot@dino.sk>
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28 12:04:10 +01:00
Simon Glass
14ca9f7f5a dm: core: Rename ofnode_get_chosen_prop()
This function is actually intended to read a string rather than a
property. All of its current callers use it that way. Also there is no way
to return the length of the property from this function.

Rename it to better indicate its purpose, using ofnode_read as the prefix
since this matches most other functions.

Also add some tests which are missing for these functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:45 -07:00
Simon Glass
9a3b4ceb37 common: Move reset_cpu() to the CPU header
Move this function out of common.h and into a relevant header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 14:02:31 -05:00
T Karthik Reddy
c352f1e121 ARM: zynq: Add jtag distro boot support
This patch adds new jtag distro boot command to look for bootscript
file in DDR and execute it first incase of jtag bootmode.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:54 +01:00
Michal Simek
312f2c5b14 arm: xilinx: Use device tree which can be passed on cmd line
DEVICE_TREE variable has been added by commit 6ab6b2afa0
("dts: re-write dts/Makefile more simply with Kbuild")
where DT can be specified on command line. If it is not then
CONFIG_DEFAULT_DEVICE_TREE is used to ensure backward compatibility.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:54 +01:00
Michal Simek
594254e7fe arm64: zynqmp: Fix symlinks to SC psu_init* files
Names have to match device tree file names. Also add missing one.

Fixes: 50d9283347 ("arm64: zynqmp: Sync names for SC with Versal")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Michal Simek
47446a3c66 arm: zynq: Remove low level UART setting
There is no reason to do serial initializationin low level code. Uart
driver does it already based on DT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Michal Simek
84d2bbf082 arm64: zynqmp: Remove low level UART setting
There is no reason to do serial initialization. Uart driver does it already
based on DT. Good effect is that it is clear which interface is console.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Michal Simek
e82024def6 arm64: zynqmp: Do not assing MIO34 that early on zcu100
MIO34 is connected to POWER_KILL signal. When MIO configuration is done in
psu_init() and this pin is assigned to PMU but PMU configuration is not
loaded yet. PMU gpio output is high that means board is powered off
immediately.
The patch is fixing this sequence that MIO34 stays assing to ps gpio IP.
PMU config is loaded in SPL and then pin assigned to PMU through
psu_post_config_data().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Michal Simek
fc274a5932 arm64: zynqmp: Add support for OF_SEPARATE with board DTB
OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup().

OF_BOARD option is mostly used for picking up DTB from certain location.

OF_SEPARATE option is used when DTB is appended after u-boot binary.

This board specific function is aligned with current version in
lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Michal Simek
db5b253f01 arm64: zynqmp: Rename fw_dtb variable to fdt_blob
The reason for this change is just get in sync with board_fdt_blob_setup()
available at lib/fdtdec.c.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
T Karthik Reddy
53c69dec33 board: xilinx: Add support for user configurable boot script offset
Currently "script_offset_f" env variable is hardcoded, this variable
specifies from which offset of the flash boot.scr should be read/write.
As flashes are of different sizes having a fixed offset makes it
difficult to load other images into the flash which may overwrite the
boot script or cannot utilize the full memory. This current fix
creates a new config "CONFIG_BOOT_SCRIPT_OFFSET" which holds the
offset address, overwrites the "script_offset_f" variable.
Also removed existing variable with default values, as the default
values are held by CONFIG_BOOT_SCRIPT_OFFSET

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:52 +01:00
T Karthik Reddy
18be60b8bc arm64: zynqmp: Fix emmc boot mode boot_target sequence
Emmc boot devcie is mounted to mmc@ff160000 controller on zynqmp.
Detect mmc alias at run time for setting up proper boot_targets
sequence instead of setting boot_targets manually.
Removed setting "modeboot" variable as it not longer need as we
switched to distro boot.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:52 +01:00
T Karthik Reddy
7c5b7bb1d7 arm64: versal: Fix emmc boot mode boot_target issue
Emmc boot devcie is mounted to sdhci@f1050000 controller on versal, while
in emmc boot mode, boot tragets are set to mmc0. So removed mmc0 and using
the dev seq number from the sdhci@f1050000 controller.
Dev seq number is setup based on DT aliases that's why needs to be setup at
run time.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:52 +01:00
Simon Glass
5255932f01 common: Move some board functions out of common.h
A number of board function belong in init.h with the others. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:21 -05:00
Simon Glass
9edefc2776 common: Move some cache and MMU functions out of common.h
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.

Move them over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:55 -05:00
Simon Glass
62270f4395 common: Move some SMP functions out of common.h
These functions belong in cpu_func.h so move them over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:14 -05:00
Simon Glass
1045315df0 common: Move get_ticks() function out of common.h
This function belongs in time.h so move it over and add a comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:13 -05:00
Michal Simek
3e5476c6cd ARM: zynq: Remove unused board_early_init_f()
board_early_init_f added by commit e6cc3b25d7
("arm: zynq: Wire watchdog internals") is no longer needed that's why
remove it also with Kconfig enabling.

Fixes: ccd063e981 ("watchdog: Move watchdog_dev to data section (BSS may not be cleared)")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
403619515e arm64: zynqmp: Convert invoke_smc() to xilinx_pm_request()
Remove macros which use PM_SIP_SVC offset and convert invoke_smc() to
xilinx_pm_request() which do calculation with PM_SIP_SVC already.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:01 +02:00
Ibai Erkiaga
f4e7e61193 arm64: xilinx: Enable generic of_board_dtb
Modify the configuration naming to be generic to xilinx rather than
specific to Versal. The offset value is different for Zynq and ZynqMP
to avoid overlapping with FSBL.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 13:14:54 +02:00
Ibai Erkiaga
fec657bebd arm64: versal: Move common board dtb search
Move the exisiting function of getting board dtb from versal to a common
Xilinx folder.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 13:14:54 +02:00
Ibai Erkiaga
325a22dc19 arm64: zynqmp: probe firmware driver
Probe ZynqMP firmware driver on the board initialization phase and
ensure that firmware is in place to continue execution. The probing is
done on board_init so it can be used for both SPL and U-Boot proper.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
5743981e27 arm64: zynqmp: use firmware driver to get version
Use the new function from firmware version to get the firmware version.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
009ab7b93a firmware: zynqmp: create firmware header
New firmware header to place firmware specific macro and function
declarations. The patch also moves the macros defining PM operations as
well as some helper macros.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
c0c33d9b9b microblaze: Remove additional headers
There were several changes in past in this file without removing headers
(watchdog cleanup, soft reset, etc). That's why remove additional useless
headers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
e0418347f9 microblaze: Setup initrd_high and fdt_high at run time
Setup initrd_high and fdt_high to be placed in lowmem space for kernel to
be able to reach it. Values are setup at run time to ensure that the same
setting can be used on different memory setup. Do this setting only when
variables are not

Similar run time detection was done for Zynqmp and Versal.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
da2a4909bd microblaze: Remove unused variable ram_base
This variable is completely unused that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
64eb13bfd7 arm64: zynqmp: Add a2197 memory board revA
Similar to processor board but i2c structure is completely different.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
917c57845a arm64: zynqmp: Add System Controller for a2197-g/p
Similar SCs but different wiring.

- dc_i2c is connected to X-PRC cards that's why label is required to have
  an option to hook up some devices.
- Exactly identify i2c devices on x-prc boards.
  In case of missing i2c connection devices won't be accessible.
- USB 0 should be device mode with super speed.
- USB 1 should be host mode.
- Fix i2c mux reset pin entry - commented, not verified.
- Fix i2c1 eeprom compatible string - it is an ST 128Kbit device.
  Need to use atmel fallback.
- Fix si570 I2C slave address and add corresponding part numbers.
- Enable AMS for system monitoring.
- phy reset property should be commented because it will throw a
  warning dump when called from context that can sleep.
  No support for phys property (zynqmp phy driver) with SGMII.
  Add is-internal-pcspma property required by uboot.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
be972b2bd1 arm64: zynqmp: Add generic a2197 system controller config
Add generic configuration for a2197-p/-m/-g boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
7712fb1ff7 ARM: zynq: Specify MMC controller number for boot sequence
Xilinx Zynq SoC has two sdhci controllers but boot is only possible from
the first one. That's why there is a need to specify controller number.
mmc1 is supposed to be secondary boot device and should be also listed in
distribution boot.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Siva Durga Prasad Paladugu
134b0c8d6a arm64: zynqmp: Add idcodes for new RFSoC silicons ZU48DR and ZU49DR
Add zu48dr and zu49dr to the list of zynqmp devices. The zu48dr and zu49dr
are the new RFSoC silicons with id values of 0x7b and 0x7e.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Siva Durga Prasad Paladugu
5d2274c00f arm64: zynqmp: Add new jtag distro boot command
This patch adds new jtag distro boot command to look for bootscript file in
DDR and execute it first incase of jtag bootmode.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:35:43 +02:00
T Karthik Reddy
f0c16cd6f3 arm64: versal: Add new dfu usb distro boot command
This patch adds new dfu usb distro boot command to look for bootscript
from dfu-util and runs it.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2019-10-08 09:35:43 +02:00
Siva Durga Prasad Paladugu
3d865acb70 arm64: versal: Add new jtag distro boot command
This patch adds new jtag distro boot command to look for bootscript file
in DDR and execute it first incase of jtag bootmode.
This patch also updates scriptaddr to 512MB as there is high of script
corruption incase of bigger kernel image.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:35:43 +02:00
Michal Simek
aef149e9dd arm64: versal: Enable memory mapping via DT
Code reads DT and setup MMU table based on memory node. This will ensure
that only DT needs to be changed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
T Karthik Reddy
a69814c815 arm64: zynqmp: Set initrd_high to as high as possible
This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Siva Durga Prasad Paladugu
085201c246 arm64: versal: Set initrd_high to as high as possible
This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Siva Durga Prasad Paladugu
26e054c943 arm64: versal: fpga: Add PL bit stream load support
This patch adds PL bitstream load support for Versal platform. The PL
bitstream is loaded by making an SMC to ATF which in turn communicates
with platform firmware which configures and loads PL bitstream on to PL.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Siva Durga Prasad Paladugu
bfd092f9ca arm64: versal: Define board_late_init for versal
Define board_late_init which performs bootmode detection
and prepares corresponding distro boot commaand sequence.

Also disable it for mini platforms because simply there is no need to have
it enabled.
But also disable it for virtual platform because Qemu is not modelling this
register space that's why travis testing would fail. This configuration
should be reverted when mainline Qemu is updated.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Siva Durga Prasad Paladugu
91a5964f3b xilinx: Add sd boot command script for reference
This patch adds sdboot command script for reference.
This can be converetd into uboot script using mkimage and
use for booting.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:13 +02:00
Siva Durga Prasad Paladugu
3796d133a0 xilinx: Add qspi boot command script for reference
Thsi patch adds qspiboot command script for reference.
This can be converetd into uboot script using mkimage and
use for booting.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:13 +02:00
Simon Glass
9fb625ce05 env: Move env_set() to env.h
Move env_set() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
c7694dd483 env: Move env_set_hex() to env.h
Move env_set_hex() over to the new header file along with env_set_addr()
which uses it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-11 16:43:41 -04:00
Michal Simek
cd228cc04a arm64: zynqmp: Do not include pm_cfg_obj.o when SPL is disabled
xilinx_zynqmp_mini configuration is throwing build error:
readlink: missing operand
Try 'readlink --help' for more information.

because CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE is not defined at all and
Makefile pass ifneq condition. Add SPL_BUILD dependency which is also
reflected in Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30 17:09:58 +02:00
Luca Ceresoli
216dad7507 arm64: zynqmp: add MAINTAINERS entry for Avnet UltraZed-EV
The board was added without adding a MAINTAINERS entry.

Fixes:

  $ ./tools/genboardscfg.py -f
  WARNING: no status info for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
  WARNING: no maintainers for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
  $

Reported-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30 10:20:06 +02:00
Luca Ceresoli
ac80ac09c8 arm64: zynqmp: add support for Avnet UltraZed-EV Starter Kit
Avnet UltraZed-EV Starter Kit is composed by the UltraZed-EV SoM and the
only publicly-available compatible carrier card. The SoM is based on the EV
version of the Xilinx ZynqMP SoC+FPGA.

The psu_init_gpl.c file has been generated from the board definition files
at [0] using Vivado 2018.3 and then minimized by
tools/zynqmp_psu_init_minimize.sh. Manually removed serdes init code since
it is not mentioned in device tree and fixed a checkpatch error.

[0] 3686c9ff7d/ultrazed_7ev_cc/1.1

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30 10:20:06 +02:00
Anton Gerasimov
5456935a1d ARM: zynq: Add configuration for Z-turn board
Basic (PS-only) configuration based on Vivado board files by
Sergiusz Bazanski <sergius@q3k.org>

Signed-off-by: Anton Gerasimov <tossel@gmail.com>
2019-07-30 10:20:06 +02:00
Luca Ceresoli
04d2b0c7c2 arm64: zynqmp: xil_io.h: declare functions as static
Fixes sparse warnings when building zynqmp defconfigs:
  ./board/xilinx/zynqmp/xil_io.h:12:6: warning: symbol 'Xil_Out32' was not declared. Should it be static?
  ./board/xilinx/zynqmp/xil_io.h:17:5: warning: symbol 'Xil_In32' was not declared. Should it be static?
  ./board/xilinx/zynqmp/xil_io.h:22:6: warning: symbol 'usleep' was not declared. Should it be static?

Also add __maybe_unused to usleep() since it is not used by minimized
psu_init_gpl.c files, so it would warn as "defined but not used".

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30 10:20:06 +02:00
Luca Ceresoli
c28a9cfa40 arm64: zynqmp: spl: install a PMU firmware config object at runtime
Optionally allow U-Boot to load a configuration object into the Power
Management Unit (PMU) firmware on Xilinx ZynqMP.

The configuration object is required by the PMU FW to enable most SoC
peripherals. So far the only way to boot using U-Boot SPL was to hard-code
the configuration object in the PMU firmware. Allow a different boot
process, where the PMU FW is equal for any ZynqMP chip and its
configuration is passed at runtime by U-Boot SPL.

All the code for Inter-processor communication with the PMU is isolated in
a new file (pmu_ipc.c). The code is inspired by the same feature as
implemented in the Xilinx First Stage Bootloader (FSBL) and Arm Trusted
Firmware:

 * fb647e6b4c/lib/sw_apps/zynqmp_fsbl/src/xfsbl_misc_drivers.c (L295)
 * c48d02bade/plat/xilinx/zynqmp/pm_service/pm_api_sys.c (L357)

SPL logs on the console before loading the configuration object:

  U-Boot SPL 2019.07-rc1-00511-gaec224515c87 (May 15 2019 - 08:43:41 +0200)
  Loading PMUFW cfg obj (2008 bytes)
  EL Level:	EL3
  ...

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30 10:20:06 +02:00
Michal Simek
46e765226c arm64: zynqmp: Cover ultra96 dts file by MAINTAINERS fragment
Avnet Ultra96 dts file should be also cover by MAINTAINERS fragment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-06-21 10:07:11 -04:00
Stefan Roese
06985289d4 watchdog: Implement generic watchdog_reset() version
This patch tries to implement a generic watchdog_reset() function that
can be used by all boards that want to service the watchdog device in
U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG.

Without this approach, new boards or platforms needed to implement a
board specific version of this functionality, mostly copy'ing the same
code over and over again into their board or platforms code base.

With this new generic function, the scattered other functions are now
removed to be replaced by the generic one. The new version also enables
the configuration of the watchdog timeout via the DT "timeout-sec"
property (if enabled via CONFIG_OF_CONTROL).

This patch also adds a new flag to the GD flags, to flag that the
watchdog is ready to use and adds the pointer to the watchdog device
to the GD. This enables us to remove the global "watchdog_dev"
variable, which was prone to cause problems because of its potentially
very early use in watchdog_reset(), even before the BSS is cleared.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: "Marek Behún" <marek.behun@nic.cz>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Maxim Sloyko <maxims@google.com>
Cc: Erik van Luijk <evanluijk@interact.nl>
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: "Álvaro Fernández Rojas" <noltari@gmail.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
2019-04-26 09:16:32 +02:00
Siva Durga Prasad Paladugu
c7490907d1 arm64: zynqmp: Add idcode for new RFSoC silicon ZU39DR
This patch adds "zu39dr" to the list of zynqmp devices
The zu39DR is the new RFSoC silicon with id value of 0x66.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
T Karthik Reddy
958d1b1882 ARM: zynq: Check zynq aes & rsa command parameters count
This patch checks for zynq aes & rsa commands max parameters count. Also
checks minimum number of parameters count for aes command.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
T Karthik Reddy
be52372ff1 arm64: zynqmp: Use zynqmp_mmio_read/write functions
Changed the return type of reset_reason() to int from u32, because
zynqmp_mmio_read/write() returns signed value on error.
Replaced readl and writel functions with zynqmp_mmio_read &
zynqmp_mmio_write functions to access RESET_REASON(CRL_APB) registers.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
Stefan Roese
ccd063e981 watchdog: Move watchdog_dev to data section (BSS may not be cleared)
This patch moves all instances of static "watchdog_dev" declarations to
the "data" section. This may be needed, as the BSS may not be cleared
in the early U-Boot phase, where watchdog_reset() is already beeing
called. This may result in incorrect pointer access, as the check to
"!watchdog_dev" in watchdog_reset() may not be true and the function
may continue to run.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: "Marek Behún" <marek.behun@nic.cz>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2019-04-08 09:21:39 -04:00
Michal Simek
91d7e0c47f arm64: zynqmp: Create fdtfile from compatible string
distro boot expects that fdtfile name is setup for alternative DTB.
Create this file based on the first platform compatible string.
This should ensure that one rootfs can store multiple DTBs for different
boards.
Reflect structure which is used in Linux kernel. It means dtbs are
strored in xilinx folder.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2019-02-15 15:04:01 +01:00
Michal Simek
027b1134b2 xilinx: common: Remove !DM_i2C code for reading mac from eeprom
All platforms are converted to DM_I2C that's why there is no reason to
keep this code here.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-14 14:31:10 +01:00
Michal Simek
47a766f950 arm64: versal: Move IOU_SWITCH_DIVISOR0 to Kconfig
Move hardcoded IOU_SWITCH_DIVISOR0 to Kconfig to be able to set it up
for different platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-14 14:31:10 +01:00
Michal Simek
fb771793bd arm64: versal: Remove one level of indentation in board_early_init_r()
Simplify code indentation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-14 14:31:10 +01:00
Siva Durga Prasad Paladugu
3c7b4c359d arm: zynq: Update boot_targets based on bootmode
Update boot_targets based on bootmode to run corresponding
distroboot command first.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-14 14:31:09 +01:00
Michal Simek
829e8c73dd xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr()
It is much easier to point to eeprom which stores information like MAC
address directly via DT. eeprom which contains this information is
pointed by /chosen/xlnx,eeprom parameter.

For example:
        chosen {
                bootargs = "earlycon";
                stdout-path = "serial0:115200n8";
+               xlnx,eeprom = &eeprom;
        };

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-14 14:31:09 +01:00
Michal Simek
9755e3db8b xilinx: Move zynq_board_read_rom_ethaddr to shared location
Zynq and ZynqMP are sharing similar code and there is no reason to do
code duplication. Move zynq_board_read_rom_ethaddr() to common file for
easier conversion to DM.
Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy
which is only one Zynq board which is using this feature.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-14 14:31:09 +01:00
Michal Simek
4c84844715 arm64: zynqmp: Fix tcminit help text alignment
Trivial patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:43 +01:00
Siva Durga Prasad Paladugu
e7c9de6617 arm64: zynqmp: Fix mmc node names to be in sync with kernel
This patches renames sd nodes in dts to be in line with
kernel. This patch also modifies the references for the same
in code.
It checks mmc first to have no time penalty for new DT node names based
on left-to-right expression evaluation.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:42 +01:00
Michal Simek
0bf3f9cb27 arm64: zynqmp: Protect board_late_init function
Function should be compiled only when CONFIG_BOARD_LATE_INIT is defined.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:42 +01:00
Michal Simek
ebcc1a223e arm64: zynqmp: Wire mini-emmc1 configuration with zcu102
For testing purpose use zcu102 which has SD at controller 1 and this can
be used for testing this mini configuration.

U-Boot 2018.11-00279-gdc482e7ee092 (Nov 30 2018 - 10:22:56 +0100)

Model: ZynqMP MINI EMMC1
Board: Xilinx ZynqMP
DRAM:  512 MiB
EL Level:       EL3
MMC:   sdhci@ff170000: 0
In:    dcc
Out:   dcc
Err:   dcc
ZynqMP>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Michal Simek
f5ed777d29 arm64: zynqmp: Wire mini-emmc0 configuration with zcu100
For testing purpose use zcu100 which has SD at controller 0 and this can
be used for testing this mini configuration.

U-Boot 2018.11-00281-gc5d48466e76e (Nov 30 2018 - 10:41:05 +0100)

Model: ZynqMP MINI EMMC0
Board: Xilinx ZynqMP
DRAM:  512 MiB
EL Level:       EL3
MMC:   sdhci@ff160000: 0
In:    dcc
Out:   dcc
Err:   dcc
ZynqMP>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Michal Simek
e615f39e7f arm64: zynqmp: Start usb ethernet gadget automatically
If only usb ethernet gadget is enabled it can start automatically.
If more gagdets are enabled usb ethernet gadget can be bind by
"bind /amba/usb1@ff9e0000/dwc3@fe300000 usb_ether" (on zcu100)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Michal Simek
ee97a9996a arm64: zynqmp: Add mini mtest configuration
This configuration is useful when you want to run small u-boot and
perform DDR memory test to make sure that DDR is properly configured.
It is use for board bringup because alternative u-boot memory tests is
quite good.
Configuration is running out of OCM.

As is done for others mini configurations 0x80 bytes for variables is
enough and only default variables are stored there.

Alternative memtest is enabled and also 2GB of DDR via DTS files.
Configuration is enabling ZYNQMP_PSU_INIT_ENABLED and include psu_init()
from zcu102 for testing purpose.
In case of size issue this can be moved to SPL configuration as is done
for mini_qspi configuration but it is not a problem now.

Log:
U-Boot 2018.11-00268-gbd58b8ba8915 (Nov 29 2018 - 15:33:35 +0100)

Model: ZynqMP MINI
Board: Xilinx ZynqMP
DRAM:  WARNING: Initializing TCM overwrites TCM content
2 GiB
EL Level:       EL3
In:    dcc
Out:   dcc
Err:   dcc
ZynqMP>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Michal Simek
a837cfe5b2 arm64: zynqmp: Enable SPL for mini qspi configuration
Wire up mini_qspi SPL with zcu102 for testing purpose.
Normally mini u-boot runs with FSBL/SPL for certain board.
Enabling SPL and configuration from zcu102 helps with testing.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 15:13:57 +01:00
Michal Simek
fdba86972f ARM: zynq: Wire SPL configuration for cse nor/nand targets
These symlinks are here only for testing purpose where SPL is used
for soc configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 10:31:02 +01:00
Michal Simek
656185a5d7 microblaze: Use standard functions for memory decoding
The standard function is less error prone than custom one.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:55 +01:00
Michal Simek
0dc69f4193 ARM: zynq: Guard zynq_help_text with CONFIG_SYS_LONGHELP
If SYS_LONGHELP is disabled the following warning is generated:
board/xilinx/zynq/cmds.c:496:13: warning: ‘zynq_help_text’ defined but
not used [-Wunused-variable]

Normal way for fixing this is to guard the whole variable.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:54 +01:00
Siva Durga Prasad Paladugu
5473f245d0 arm64: zynqmp: Fix logic in CG/EG/EV detection
The VCU disable bit(8) in IP disable register of efuse
is valid only if PL powered up and hence PL powerup status
has to be considered while determining the CG part also.
This patch considers the PL powerup status and ignores the VCU
disable bit if PL not powered up.
This fixes the issue of "unknown" id for CG parts if PL not powered up
and VCU bit(8) is not set.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:54 +01:00
Siva Durga Prasad Paladugu
5860bc16b9 arm64: zynqmp: Add new command for TCM initialization
This patch adds new zynqmp command "zynqmp tcminit mode" to
initialize TCM. TCM needs to be initialized before accessing
to avoid ECC errors. This new command helps to perform
the same. It also makes tcm_init() as global and uses it for
doing the TCM initialization.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16 16:53:24 +02:00
Michal Simek
ec48b6c991 arm64: versal: Add support for new Xilinx Versal ACAPs
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent
Engines with leading-edge memory and interfacing technologies to deliver
powerful heterogeneous acceleration for any application. The Versal AI
Core series has five devices, offering 128 to 400 AI Engines. The series
includes dual-core Arm Cortex™-A72 application processors, dual-core Arm
Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more
than 1,900 DSP engines optimized for high-precision floating point with
low latency.

The patch is adding necessary infrastructure in place without enabling
platform which is done in separate patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16 16:53:21 +02:00
Michal Simek
6bfe3fffac arm: zynq: Add support for DLC20 board
Xilinx DLC20 has I2C0 with EEPROM(1KB), UART1, GPIO, SD0 (EMMC 4GB),
USB0 device, ENET0, QSPI (16MB) and DDR(two of 256MB each).

Boards have mix of Winbond/ST QSPIs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16 14:58:45 +02:00
Siva Durga Prasad Paladugu
b94a8271cc arm64: zynqmp: Return pmufw version for zynqmp_pmufw_version()
Modify the zynqmp_pmufw_version() routine to return PMUFW version so
that it can be reused wherever required. Get PMUFW version from PMU
only once at bootup and later just return stored value.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 10:15:00 +02:00
Tom Rini
b1aad8dbe2 zynqmp: Add avnet_ultra96_rev1_defconfig to the lits of boards
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-07 11:36:39 -04:00
Michal Simek
2570e12960 arm64: zynqmp: Add support for Avnet Ultra96
Avnet Ultra96 is rebranded Xilinx zcu100 revC/D. Add new defconfig files
and point to origin internal board name.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Luis Araneda
58f449676a arm: zynq: add support for the zybo z7 board
The board is manufactured by Digilent
Main features:
- Soc: XC7Z010 (Z7-10) or XC7Z020 (Z7-20)
- RAM: 1 GB DDR3L
- FLASH: 16 MB QSPI
- 1 Gbps Ethernet
- USB 2.0
- microSD slot
- Pcam camera connector
- HDMI Tx and Rx
- Audio codec: stereo out, stereo in, mic
- 5 (Z7-10) or 6 (Z7-20) Pmod ports
- 6 push-buttons, 4 switches, 5 LEDs
- 1 (Z7-10) or 2 (Z7-20) RGB LEDs

Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Michal Simek
8a32077ea6 microblaze: Add missing quotes around XILINX_MICROBLAZE0_HW_VER
This issue is reported by kconfiglib:
warning: style: quotes recommended around default value for string
symbol XILINX_MICROBLAZE0_HW_VER (defined at
board/xilinx/microblaze-generic/Kconfig:37)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Siva Durga Prasad Paladugu
12308b128f lib: fdtdec: Rename routine fdtdec_setup_memory_size()
This patch renames the routine fdtdec_setup_memory_size()
to fdtdec_setup_mem_size_base() as it now fills the
mem base as well along with size.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-07-19 10:49:56 +02:00
Vipul Kumar
0358cee595 arm64: zynqmp: Added support of mmio read and write commands
This patch added support of mmio read and write commands. These commands
can be used to read and write registers from the u-boot command line.
It can be useful in debugging.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:56 +02:00
Michal Simek
4a69366967 microblaze: Convert generic platform to DM gpio
Converting GPIO to DM requires to do changes in reset subsystem
that's why support for Microblaze soft reset via sysreset and GPIO
sysreset support was added.
These two patches enables enabling GPIO DM.
Microblaze soft reset is bind at last reset method.

GPIO reset is handled via sysreset with adding this fragment to DT.

gpio-restart {
	compatible = "gpio-restart";
	gpios = <&reset_gpio 0 0 0>;
	/* 3rd cell ACTIVE_HIGH = 0, ACTIVE_LOW = 1 */
};

hard-reset-gpio property is not documented and also handled.
Conversion is required.

Unfortunately do_reset is required for SPL that's why use only soft
microblaze reset for now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Shreenidhi Shedi
6ec6f5841d microblaze: Support for watchdog_reset in init
We should support watchdog reset so that WATCHDOG_RESET will function
properly.

Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Shreenidhi Shedi
88811bb5a1 microblaze: Delete Xilinx watchdog related macros
These macros are not required anymore. These will be taken from
configuration file.

Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Shreenidhi Shedi
35912528a8 microblaze: Cosmetic changes in Microblaze related files
Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Vipul Kumar
8c258e6245 arm64: zynqmp: Changed zynqmp command to handle subcommands with U_BOOT_CMD_MKENT
This patch changed zynqmp command to handle subcommands with
U_BOOT_CMD_MKENT.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Michal Simek
501fc50a29 arm: zynq: Try to enable the first watchdog via aliases
The same change as was done for zynqmp with this description:

Add support for enabling the first watchdog pointed via aliases.

DT fragment:
	aliases {
		...
		watchdog0= &watchdog0;
		watchdog1 = &watchdog_lpd;
		...
	};

<zynqmp example removed>

Till this patch the first watchdog found in DT was used and started
which is not enabling all possible configuration based on user request.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Michal Simek
1fbca0db5d arm64: zynqmp: Try to enable the first watchdog via aliases
Add support for enabling the first watchdog pointed via aliases.

DT fragment:
	aliases {
		...
		watchdog0 = &watchdog0;
		watchdog1 = &watchdog_lpd;
		...
	};

dm tree fragment for above configuration with patch applied:
ZynqMP> dm tree
 Class    index  Probed  Driver      Name
-----------------------------------------
...
 watchdog    0  [   ]   cdns_wdt    |   |-- watchdog@ff150000
 watchdog    1  [ + ]   cdns_wdt    |   `-- watchdog@fd4d0000
...

dm uclass fragment:
ZynqMP> dm uclass
...
uclass 75: watchdog
0   watchdog@ff150000 @ 7df02f40, seq -1, (req 1)
1 * watchdog@fd4d0000 @ 7df02ff0, seq 0, (req 0)
...

It is visible that index 1 is IP with seq 0 which means that FPD
watchdog (@fd4d0000) is in DT below LPD watchdog (@ff150000).

Till this patch the first watchdog found in DT was used and started
which is not enabling all possible configuration based on user request.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:55 +02:00
Michal Simek
71c52f2949 microblaze: Remove unused XILINX_BOARD_NAME macro
This macro is not used anywhere that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:54 +02:00
Michal Simek
d6c856c008 microblaze: Guard do_reset by CONFIG_SYSRESET
sysreset uclass have own do_reset function which should be used instead
of board/platform specific.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:54 +02:00
Siva Durga Prasad Paladugu
37e3a36a54 xilinx: zynq: Add support to secure images
This patch basically adds two new commands for loadig secure
images.
1. zynq rsa adds support to load secure image which can be both
   authenticated or encrypted or both authenticated and encrypted
   image in xilinx bootimage(BOOT.bin) format.
2. zynq aes command adds support to decrypt and load encrypted
   image back to DDR as per destination address. The image has
   to be encrypted using xilinx bootgen tool and to get only the
   encrypted image from tool use -split option while invoking
   bootgen.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:54 +02:00
Luca Ceresoli
6da4f67ad0 arm/arm64: zynq/zynqmp: pass the PS init file as a kconfig variable
U-Boot needs to link ps7_init_gpl.c on Zynq or psu_init_gpl.c on
ZynqMP (PS init for short). The current logic to locate this file for
both platforms is:

 1. if a board-specific file exists in
    board/xilinx/zynq[mp]/$(CONFIG_DEFAULT_DEVICE_TREE)/ps?_init_gpl.c
    then use it
 2. otherwise use board/xilinx/zynq/ps?_init_gpl.c

In the latter case the file does not exist in the U-Boot sources and
must be copied in the source tree from the outside before starting the
build. This is typical when it is generated from Xilinx tools while
developing a custom hardware. However making sure that a
board-specific file is _not_ found (and used) requires some trickery
such as removing or overwriting all PS init files (e.g.: the current
meta-xilinx yocto layer).

This generates a few problems:

 * if the source tree is shared among different out-of-tree builds,
   they will pollute (and potentially corrupt) each other
 * the source tree cannot be read-only
 * any buildsystem must add a command to copy the PS init file binary
 * overwriting or deleting files in the source tree is ugly as hell

Simplify usage by allowing to pass the path to the desired PS init
file in kconfig variable XILINX_PS_INIT_FILE. It can be an absolute
path or relative to $(srctree). If the variable is set, the
user-specified file will always be used without being copied
around. If the the variable is left empty, for backward compatibility
fall back to the old behaviour.

Since the issue is the same for Zynq and ZynqMP, add one kconfig
variable in a common place and use it for both.

Also use the new kconfig help text to document all the ways to give
U-Boot the PS init file.

Build-tested with all combinations of:
 - platform: zynq or zynqmp
 - PS init file: from XILINX_PS_INIT_FILE (absolute, relative path,
   non-existing), in-tree board-specific, in board/xilinx/zynq[mp]/
 - building in-tree, in subdir, in other directory

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:53 +02:00
Michal Simek
1e3e68f109 arm64: zynqmp: Check return value from calloc
calloc() can fail and return NULL. The patch is checking return value
and return in case of error.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:54:05 +02:00