Michal Simek e2572b5544 xilinx: common: Do not save fdt_blob to bss section ... For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com>		2020-09-23 10:31:41 +02:00
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bootscripts	xilinx: Add sd boot command script for reference	2019-10-08 09:11:13 +02:00
common	xilinx: common: Do not save fdt_blob to bss section	2020-09-23 10:31:41 +02:00
microblaze-generic	common: Drop log.h from common header	2020-05-18 21:19:18 -04:00
versal	xilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIG	2020-08-20 09:49:20 +02:00
zynq	xilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIG	2020-08-20 09:49:20 +02:00
zynqmp	xilinx: zynqmp: Add support for saving variables	2020-09-23 10:31:40 +02:00
zynqmp_r5	common: Drop init.h from common header	2020-05-18 17:33:33 -04:00
Kconfig	board: xilinx: Enable changing default DTB pick up address	2020-09-23 10:31:40 +02:00