Some boards like the Beacon RZ/G2 SOM use either flags for
tx-internal-delay-ps, rx-internal-delay-ps or rgmii-rxid.
In Linux the APSR_RDM flag is set when either rx-internal-delay-ps
is set or the mode is rgmii-rxid, and the APSR_TDM is set when
tx-internal-delay-ps is found or rgmii-txid is set, and both
are set if rgmii-id is set.
The ravb driver in U-Boot driver was missing rgmii-rxid support,
so add that support in a similar fashion to what is done in Linux.
Signed-off-by: Adam Ford <aford173@gmail.com>
In case fastboot over Ethernet, am65_cpsw_stop() is not called unless
DM_FLAG_OS_PREPARE is set. Without call to am65_cpsw_stop(), DMA
resources are not released thus leading to failures in kernel.
Fix this by adding DM_FLAG_OS_PREPARE flag to am65_cpsw_nuss_port
driver.
Reported-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
If we just use fdtdec_get_addr_size_fixed to get "reg" it will use
64bit address cell to get the base address.
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible ="SiFive,FU500-soc", "fu500-soc", "sifive-soc", "simple-bus";
ranges;
L28: axidma@30010000 {
#dma-cells = <1>;
compatible = "xlnx,axi-dma-1.00.a";
axistream-connected = <&L27>;
axistream-control-connected = <&L27>;
clocks = <&L1>;
interrupt-parent = <&L6>;
interrupts = <32 33>;
reg = <0x30010000 0x4000>;
fdtdec_get_addr_size_fixed: reg: addr=3001000000004000
We should get the base address through its parent's address-cells and
size-cells settings. So we should use fdtdec_get_addr_size_auto_parent()
to get correct base address.
After applying this patch, we can get the correct base address of dma by
replacing fdtdec_get_addr_size_fixed() with
fdtdec_get_addr_size_auto_parent().
fdtdec_get_addr_size_auto_parent:
na=1, ns=1, fdtdec_get_addr_size_fixed: reg: addr=30010000
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Link: https://lore.kernel.org/r/20220120084128.1892101-1-andy.chiu@sifive.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
- fdt_support: Add fdt_for_each_node_by_compatible() helper macro
(Marek)
- turris_omnia: Fixup SATA or PCIe nodes at runtime in DT blob (Pali)
- pci_mvebu: Add support for Kirkwood PCIe controllers (Pali)
- SPL: More verifications for kwbimage in SPL (Pali)
- mvebu: Remove comphy_update_map() (Pali)
- Minor misc stuff
Add macro fdt_for_each_node_by_compatible() to allow iterating over
fdt nodes by compatible string.
Convert various usages of
off = fdt_node_offset_by_compatible(fdt, start, compat);
while (off > 0) {
code();
off = fdt_node_offset_by_compatible(fdt, off, compat);
}
and similar, to
fdt_for_each_node_by_compatible(off, fdt, start, compat)
code();
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
gpio:
- Add modepin driver
net:
- Save random mac addresses to eth variable
zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses
zynqmp clk:
- Fix clock handling for gem and usb
phy:
- Add zynqmp phy/serdes driver
serial:
- Add one missing compatible string
microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups
zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver
versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain
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Merge tag 'xilinx-for-v2022.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.04-rc1
gpio:
- Add modepin driver
net:
- Save random mac addresses to eth variable
zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses
zynqmp clk:
- Fix clock handling for gem and usb
phy:
- Add zynqmp phy/serdes driver
serial:
- Add one missing compatible string
microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups
zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver
versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain
Add support of the MAC controller of Aspeed AST2600 SOC. The MAC
controller is the same with AST2500, except it has stand-alone MDIO
hardware block.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add support for DM_MDIO to connect to PHY. For the systems that have a
stand-alone MDIO hardware block, enable CONFIG_DM_MDIO to use driver
model for MDIO devices.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
- Let am335x_evm use the CPSW or PRUSS ethernet.
- Implement timer_get_boot_us in the omap timer driver
- gpmc bitflip, QSPI clock calculation on am437x, da8xx_gpio bugfixes
- Assorted K3 updates
For configurations with gmii2rgmii and external phy the DT nodes link
should be gem->gmii2rgmii->phy. But due to limitation in Linux driver
the DT is mentioned as gem->phy and gmii2rgmii->phy as shown in below DT.
ethernet@ff0c0000 {
compatible = "cdns,zynqmp-gem\0cdns,gem";
status = "okay";
interrupt-parent = <0x04>;
interrupts = <0x00 0x3b 0x04 0x00 0x3b 0x04>;
reg = <0x00 0xff0c0000 0x00 0x1000>;
clock-names = "pclk\0hclk\0tx_clk\0rx_clk\0tsu_clk";
#address-cells = <0x01>;
#size-cells = <0x00>;
#stream-id-cells = <0x01>;
iommus = <0x0d 0x875>;
power-domains = <0x0c 0x1e>;
clocks = <0x03 0x1f 0x03 0x69 0x03 0x2e 0x03 0x32 0x03 0x2c>;
phy-handle = <0x0e>;
phy-mode = "gmii";
xlnx,ptp-enet-clock = <0x00>;
local-mac-address = [ff ff ff ff ff ff];
phandle = <0x4d>;
mdio {
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x4e>;
ethernet-phy@1 {
reg = <0x01>;
rxc-skew-ps = <0x708>;
txc-skew-ps = <0x708>;
phandle = <0x0e>;
};
gmii_to_rgmii_0@8 {
compatible = "xlnx,gmii-to-rgmii-1.0";
phy-handle = <0x0e>;
reg = <0x08>;
phandle = <0x4f>;
};
};
};
Since same DT is used in Linux and U-Boot we need to workaround this
issue by using the gmii2rgmii node which points to phy and we should
ignore the gem pointing to phy directly.
Do this workaround by updating priv->phydev->node value with
priv->phy_of_node only if it is not valid node.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/641eb13425ffe80e0743f60cf90d0f940577b9e9.1642162085.git.michal.simek@xilinx.com
NXP's mEMAC reference manual, Chapter 6.5.5 "MDIO Ethernet Management
Interface usage", specifies to poll the BSY (0) bit in the CFG/STAT
register to wait until a transaction has finished, not bit 31 in the
data register.
In the Linux kernel, this has already been fixed in commit 26eee0210ad7
("net/fsl: fix a bug in xgmac_mdio").
This patch changes the register in the fman_mdio and fsl_ls_mdio
drivers.
As the MDIO_DATA_BSY define is no longer in use, this patch also removes
its definition from the fsl_memac header.
Signed-off-by: Markus Koch <markus@notsyncing.net>
Reviewed-by: Camelia Groza <camelia.groza@nxp.com>
Reduce the missing phy-handle log message to debug message. It is
possible for ethernet DT node to have no phy-handle e.g. in case
of a fixed-link connection. Furthermore, drop the FEC: prefix,
which is a copy-paste error and rather print the ethernet device
name.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This driver is based on an older downstream TI kernel, with
changes and cleanups to work with mainline device-tree bindings.
Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The sja1105_check_device_id() function contains logic to work without
changing the device tree on reworked boards, one of which I have (the
NXP LS1021A-TSN normally has a SJA1105T, but I have a version with a
resoldered SJA1105Q which is pin compatible). This logic is taken from
the Linux driver.
However this logic gets shortcircuited in U-Boot by an earlier check for
the exact device ID specified in the device tree. So the reworked board
does not probe the SJA1105Q switch. Remove this duplicated logic and let
the automatic device ID detection do its job.
Fixes: f24b666b22 ("net: dsa: add driver for NXP SJA1105 L2 switch")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
On certain TI SoC, like AM64x there is a CPSW3G which supports 2
external independent MAC ports for single CPSW instance.
It is not possible for Ethernet driver to register more than one port
for given instance.
This patch modifies top level CPSW NUSS as UCLASS_MISC and binds
UCLASS_ETH to individual ports so as to support bring up more than one
Ethernet interface in U-Boot.
Note that there is no isolation in the since, CPSW NUSS is in promisc
mode and forwards all packets to host.
Since top level driver is now UCLASS_MISC, board files would need to
instantiate this driver explicitly.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Perform reset before core initialization.
Standard flow which close to 99% users are using getting all IPs out of
reset that there is no need to reset IP again. This is because of all low
level initialization is done in previous bootloader stage.
In SOM case these IPs are not touched by previous bootloader stage that's
why reset needs to be called before IP is accessed to make sure that it is
in correct state.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/5ae1c85b282d632bb62030f1f24a0065661b9153.1638804318.git.michal.simek@xilinx.com
Xilinx DTS files are using two way how to describe ethernet phy.
The first (already supported) has phy as subnode of gem node.
eth {
phy-handle = <&phy0>;
phy0: ethernet-phy@21 {
...
};
};
The second has mdio subnode (with mdio name) which has phy subnode. This
structure allow hadling MDIO reset signal (based on Linux mdio.yaml)
eth {
phy-handle = <&phy0>;
mdio {
phy0: ethernet-phy@21 {
...
};
};
};
This patch adds support for the second case where mdio subnode
is found driver will look at its parent to find out which gem is handling
MDIO bus.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/6748007f0b6db9554d7a4b52352dce23ca403f9d.1638798796.git.michal.simek@xilinx.com
This converts the following to Kconfig:
CONFIG_ENV_SPI_BUS
CONFIG_ENV_SPI_CS
CONFIG_ENV_SPI_MAX_HZ
CONFIG_ENV_SPI_MODE
As part of this, we use Kconfig to provide the defaults now that were
done in include/spi_flash.h. We also in some cases change from using
CONFIG_ENV_SPI_FOO to CONFIG_SF_DEFAULT_FOO as those were the values in
use anyhow as ENV was not enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
The RZ/G2 series uses an external clock as a reference to the AVB.
If this clock is controlled by an external programmable clock,
it must be requested by the consumer or it will not turn on.
In order to do this, update the driver to use bulk enable and
disable functions to enable clocks for boards with multiple clocks.
Signed-off-by: Adam Ford <aford173@gmail.com>
Remove the microchip compatible string and default compatible "cdns,macb"
support both 32-bit and 64-bit DMA access.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Enable DWC IP clock in driver probe, so the MII access is possible even
outside of active network transfers. This is particularly useful when
using 'mii' or 'mdio' commands to explore PHY state, neither of which
works with DWMAC currently due to the disabled clock.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The gpio_request_by_name() returns zero in case of success, however the
conditional return value check in gpio_request_by_name() checks only for
(ret != -ENOENT) and if the condition is true, returns ret outright.
This leads to a situation where successful gpio_request_by_name() return
leads to immediate successful eth_phy_of_to_plat() return as well, and
to skipped parsing of "reset-assert-us" and "reset-deassert-us", so the
PHY driver operates with valid reset GPIO, but with assert/deassert times
set to default, which is 0, instead of the values from DT. This breaks
PHY reset.
Fix this by checking if return value is non-zero and then for this one
single allowed non-zero return value, -ENOENT.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Roman Bacik <roman.bacik@broadcom.com>
It turns out that in custom designs if the system is reset
multiple times in conjunction with a slight increase in external
temperature, the felix switch starts to behave in a strange way:
packets are no longer received on the ENECT interface connected
to the L2switch internal port (the TX side of internal port stops working
or the packets do not reach there. It is not very clear where
the packets remain blocked. None of the counters points to a disruption
in the L2switch)
The issue is not reproducible on NXP reference designs.
It was observed that by adding the switch core reset, the problem
goes aways, even if intensive testing in temperature chambers
is applied.
The current patch performs soft reset on the switch core to ensure proper
operation of the L2switch.
Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Some boards need to change the tx/rx delay config in order for
gigabit Ethernet to work.
In Linux commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), Realtek documented the bits for overriding the delays
from the hardware straps.
Copy the logic from linux, so the delay config is set from the PHY's
interface type (the phy-mode property in the device tree).
This removes the need for a one-off workaround for the Pine A64+ board.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add a driver for the MDIO interface for Aspeed AST2600 SOC. The driver
only supports clause 22 for now.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
redundant_init() is only called in the tsec driver. Make it static.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
priv->promisc is used as the parameter of the set_promisc() call
which accepts a bool type instead of char.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
If using OF_CONTROL, fdtcontroladdr is set to the fdt used to configure
U-Boot. When using PXE, if no fdt is defined in the menu file, and
there is no fdt at fdt_addr, add fall back on fdtcontroladdr too.
We are developing board support for the Armv8r64 FVP using
config_distro_bootcmd. We are also using OF_BOARD and would like the
PXE boot option to default to the fdt provided by board_fdt_blob_setup.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
The list of ports which support SGMII depending on switch generation is
available here:
https://www.kernel.org/doc/html/latest/networking/dsa/sja1105.html#port-compatibility-matrix
SGMII can either be used to connect to an external PHY or to the host
port. In the first case, the use of in-band autoneg is expected, in the
last, in-band autoneg is expected to be turned off (fixed-link). So the
driver supports both cases.
SGMII support means configuring the PCS and PMA. The PCS is a Synopsys
Designware XPCS, in Linux this has a separate driver but here it is
embedded within the sja1105 driver. If needed it can be taken out later,
although we would need a UCLASS_PCS for it, which we don't have atm.
Nonetheless, I did go all the way to export an internal MDIO bus for PCS
access, because it is nice to be able to debug the PCS through commands
such as:
=> mdio read ethernet-switch@1-pcs 4 1f.0
Reading from bus ethernet-switch@1-pcs
PHY at address 4:
31.0 - 0x1140
The internal MDIO bus is not registered with DM because there is no
udevice on it, as mentioned. But the XPCS code can still be ripped out,
as needed.
I did not add support for 2500base-x because I do not expect this
interface type to be used as a boot source for anybody, it would just
add unnecessary bloat.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The SJA1105 driver is largely reused from Linux. Its programming model
is that it is blank out of reset, and it waits for a static
configuration stream over SPI, which contains all runtime parameters (it
has no notion of "default values").
Keeping a binary array for the configuration stream would have meant
that aspects such as the CPU port and the MAC speeds could have not been
configured easily, and would have been static and board-dependent.
Live-patching the binary array means recalculating the static config
table CRCs, which is not a fun process.
So we create an abstraction over the static config tables, using the
packing API, same as in Linux. The tables are kept as C structures, and
the binary configuration stream is constructed on-the-go, with CRC and
all.
All static config tables instantiated in this driver are mandatory.
The hardware reference manual can be found at:
https://www.nxp.com/docs/en/user-guide/UM10944.pdf
For tagging, a simplified version of tag_8021q from Linux is used. The
VLAN EtherType is the same (0xdadb) but since we don't want switching in
U-Boot, there is no reason to have a TX VLAN and an RX VLAN for each
port. We just need the RX VLANs to act as the unique pvid of each
front-panel port, to decode the switch port number. The RX VLAN is used
for both RX and TX.
The device tree bindings are the same as in Linux.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Instead of trying to guess which operating modes need in-band
negotiation to be active and which ones don't, parse the available
information from the device tree. That will be correct in the cases we
can already guess, and more.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The Freescale TSEC can be a DSA master, and the ports of the attached
DSA switch can have different MAC addresses compared to the TSEC.
Nonetheless, the TSEC must receive the packets on behalf of those switch
ports. Therefore, implement the promiscuous mode method to allow DSA to
set this.
Note that the init_registers() function called from eth_ops :: start
overwrites this setting. There is no reason why the RCTRL register
should be zero-initialized, so just stop clearing it so that the setting
we applied in eth_ops :: set_promisc sticks.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The VSC8502 is a Microchip (formerly Microsemi, formerly Vitesse)
dual port, gigabit Ethernet copper PHY which supports the MII, GMII and
RGMII MAC-side interfaces.
Of these, I could only test RGMII, and my board needed RGMII delays to
be applied by software, so I am able to confirm that this patch handles
that properly.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
sdhci:
- Fix emmc mini case with missing firmware interface
zynqmp:
- Restore JTAG interface if required
- Allow overriding board name
- Add support for DLC21
- Fix one fallthrought statement description
- Use config macro instead of name duplication
- Save multiboot to variable
firmware:
- Handle ipi_req errors better
- Use local buffer in case user doesn't need it instead of NULL/0 location
spi:
- gqsi: Fix write issue at low frequencies
net:
- gem: Disable broadcasts
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Merge tag 'xilinx-for-v2022.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.01-rc3
sdhci:
- Fix emmc mini case with missing firmware interface
zynqmp:
- Restore JTAG interface if required
- Allow overriding board name
- Add support for DLC21
- Fix one fallthrought statement description
- Use config macro instead of name duplication
- Save multiboot to variable
firmware:
- Handle ipi_req errors better
- Use local buffer in case user doesn't need it instead of NULL/0 location
spi:
- gqsi: Fix write issue at low frequencies
net:
- gem: Disable broadcasts
Use moveconfig.py script to convert CONFIG_SYS_FMAN_FW_ADDR,
CONFIG_SYS_QE_FW_ADDR and CONFIG_SYS_QE_FMAN_FW_LENGTH to Kconfig and
move these entries to defconfigs.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The following warning is seen in macb.c in a 32-bit build:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Change to use dev_read_addr_index_ptr(), or cast with uintptr_t.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will
remove the asm/arch/gpio.h header. In preparation, clean up the various
files that include it.
Some files did not contain any GPIO code at all, so this header was
completely unused.
A few files contained only legacy platform-specific GPIO code for
setting up pin muxes. They were left unchanged, as that code will be
completely removed by the DM_PINCTRL migration.
The remaining files contain some combination of DM_GPIO and legacy GPIO
code. For those, switch to including asm/gpio.h (if it wasn't included
already). Right now, this header provides both sets of functions,
because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the
right header to include once the DM_GPIO migration is complete and
GPIO_EXTRA_HEADER is no longer needed.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This board has not been converted to CONFIG_DM by the deadline.
Remove it. As this is the last ARCH_MX25 platform, remove those
references as well.
Cc: Matthias Weisser <weisserm@arcor.de>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
These functions can return errors, it's best to catch them and trigger
the driver unwind code path.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The two should be equivalent, but at the moment some platforms
(ls1021a-tsn.dts) use phy-mode only, which is not parsed.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Currently the init_phy function may overwrite the priv->interface
property, since it calls tsec_get_interface which tries to determine it
dynamically based on default register values in ECNTRL.
Let's do that only if phy-connection-type happens to not be defined in
the device tree.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The felix driver runs only on NXP LS1028A, which most definitely does
not support the parallel 10G interface, just USXGMII, and that only up
to 2.5Gbps (toned down from 10 Gbps via symbol replication).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The enetc driver runs only on NXP LS1028A, which most definitely does
not support the parallel 10G interface, just USXGMII, and that only up
to 2.5Gbps (toned down from 10 Gbps via symbol replication).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
After the discussion here:
https://lore.kernel.org/netdev/20210603143453.if7hgifupx5k433b@pali/
which resulted in this patch:
https://patchwork.kernel.org/project/netdevbpf/patch/20210704134325.24842-1-pali@kernel.org/
and many other discussions before it, notably:
https://patchwork.kernel.org/project/linux-arm-kernel/patch/1512016235-15909-1-git-send-email-Bhaskar.Upadhaya@nxp.com/
it became apparent that nobody really knows what "SGMII 2500" is.
Certainly, Freescale/NXP hardware engineers name this protocol
"SGMII 2500" in the reference manuals, but the PCS devices do not
support any "SGMII" specific features when operating at the speed of
2500 Mbps, no in-band autoneg and no speed change via symbol replication
. So that leaves a fixed speed of 2500 Mbps using a coding of 8b/10b
with a SERDES lane frequency of 3.125 GHz. In fact, "SGMII 2500 without
in-band autoneg and at a fixed speed" is indistinguishable from
"2500base-x without in-band autoneg", which is precisely what these NXP
devices support.
So it just appears that "SGMII 2500" is an unclear name with no clear
definition that stuck.
As such, in the Linux kernel, the drivers which use this SERDES protocol
use the 2500base-x phy-mode.
This patch converts U-Boot to use 2500base-x too, or at least, as much
as it can.
Note that I would have really liked to delete PHY_INTERFACE_MODE_SGMII_2500
completely, but the mvpp2 driver seems to even distinguish between SGMII
2500 and 2500base-X. Namely, it enables in-band autoneg for one but not
the other, and forces flow control for one but not the other. This goes
back to the idea that maybe 2500base-X is a fiber protocol and SGMII-2500
is an MII protocol (connects a MAC to a PHY such as Aquantia), but the
two are practically indistinguishable through everything except use case.
NXP devices can support both use cases through an identical configuration,
for example RX flow control can be unconditionally enabled in order to
support rate adaptation performed by an Aquantia PHY. At least I can
find no indication in online documents published by Cisco which would
point towards "SGMII-2500" being an actual standard with an actual
definition, so I cannot say "yes, NXP devices support it".
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
To avoid a warning with W=1 about this function not having a previous
prototype, declare it as static, because it is not used outside of this
translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
NXP Legal insists that the following are not fine:
- Saying "NXP Semiconductors" instead of "NXP", since the company's
registered name is "NXP"
- Putting a "(c)" sign in the copyright string
- Putting a comma in the copyright string
The only accepted copyright string format is "Copyright <year-range> NXP".
This patch changes the copyright headers in the networking files that
were sent by me, or derived from code sent by me.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Make sure that the link status returned by phy_startup() is propagated
to the .start() method of struct eth_ops.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
It is an unfortunate reality that some PHY settings done by U-Boot
persist even after the PHY is reset and taken over by Linux, and even
more unfortunate that Linux has come to depend on things being set in a
certain way.
For example, on the NXP LS1028A-RDB, the felix switch ports are
connected to a VSC8514 QSGMII PHY. Between the switch port PCS and the
PHY, the U-Boot drivers enable in-band auto-negotiation which makes the
copper-side negotiated speed and duplex be transmitted from the PHY to
the MAC automatically.
The PHY driver portion that does this is in vsc8514_config():
/* Enable Serdes Auto-negotiation */
phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS,
PHY_EXT_PAGE_ACCESS_EXTENDED3);
val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_MAC_SERDES_CON);
val = val | MIIM_VSC8574_MAC_SERDES_ANEG;
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_MAC_SERDES_CON, val);
The point is that in-band autoneg should be turned on in both the PHY
and the MAC, or off in both the PHY and the MAC, otherwise the QSGMII
link will be broken.
And because phy_config() is currently called at .port_enable() time, the
result is that ports on which traffic has been sent in U-Boot will have
in-band autoneg enabled, and the rest won't.
It can be argued that the Linux kernel should not assume one way or
another and just reinitialize everything according to what it expects,
and that is completely fair. In fact, I've already started an attempt to
remove this dependency, although admittedly I am making slow progress at
it:
https://patchwork.kernel.org/project/netdevbpf/cover/20210212172341.3489046-1-olteanv@gmail.com/
Nonetheless, the sad reality is that NXP also has, apart from kernel
drivers, some user space networking (DPDK), and for some reason, the
expectation there is that somebody else initializes the PHYs. The kernel
can't do it because the device ownership doesn't belong to the kernel,
so what remains is for the bootloader to do it (especially since other
drivers generally call phy_config() at probe time). This is a really
weak guarantee that might break at any time, but apparently that is
enough for some.
Since initializing the ports and PHYs at probe time does not break
anything, we can just do that.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
No one is calling this function from outside felix_switch.c.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
Non DM builds fail with the following error:
drivers/net/tsec.c:641:24: error: 'tsec_get_interface' defined but not used [-Werror=unused-function]
641 | static phy_interface_t tsec_get_interface(struct tsec_private *priv)
Fix that.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
The code under drivers/net is related to ethernet networking drivers, in
some fashion or another. Drop these from the top-level Makefile and
also move the phy rule into drivers/net/Makefile which is where it
belongs. Make the new rule for drivers/net check for the build-stage
relevant ETH symbol.
Fix up some Kconfig dependencies while we're here to mirror how the
Makefile logic now works.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Introduce ETH, Kconfig dependency changes, am43xx fix]
Signed-off-by: Tom Rini <trini@konsulko.com>
default n/no doesn't need to be specified. It is default option anyway.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Rework FSP_USE_UPD portion]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add support for boards supporting TFA boot separately in cortina
firmware. Please note, a weak function is defined to retrieve firmware
address values as CONFIG_CORTINA_FW_ADDR is now defined in defconfig and
can only have one possible value defined. This weak function will help
in overwrting the values to get proper addresses as per boot source.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Use moveconfig.py script to convert below defines to Kconfig and move
these entries to defconfigs.
CONFIG_CORTINA_FW_ADDR
CONFIG_CORTINA_FW_LENGTH
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
It is a pain to have to specify the value 10 in each call. Add a new
dectoul() function and update the code to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is a pain to have to specify the value 16 in each call. Add a new
hextoul() function and update the code to use it.
Add a proper comment to simple_strtoul() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for xilinx multirate(MRMAC) ethernet driver.
This driver uses multichannel DMA(MCDMA) for data transfers of MRMAC.
Added support for 4 ports of MRMAC for speeds 10G and 25G.
MCDMA supports upto 16 channels but in this driver we have setup only
one channel which is enough.
Tested 10G and 25G on all 4 ports.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Since the SCBM SMMU is not only connected to the NETSEC
but also shared with the F_SDH30 (eMMC controller), that
should be initialized at board level instead of NETSEC.
Move the SMMU initialization code into board support
and call it from board_init().
Without this fix, if the NETSEC is disabled, the Linux
eMMC ADMA cause an error because SMMU is not initialized.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
The result of dpio_close() is actually taken into account.
Signed-off-by: Cosmin-Florin Aluchenesei <aluchenesei.cosmin-florin@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Change the reg variable to not be unsigned so that we not get into an
unsigned compared against 0.
Signed-off-by: Cosmin-Florin Aluchenesei <aluchenesei.cosmin-florin@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Define LOG_CATEGORY to allow filtering with log command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Define LOG_CATEGORY to allow filtering with log command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add a common empty ops: eqos_null_ops() to remove the duplicated empty
functions and reduce the driver size for stm32 and imx config.
This patch also aligns the prototype of ops 'eqos_stop_clks' with other
eqos ops by adding return value.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Use the generic ethernet phy which already manages the correct binding
for gpio reset, including the assert an deassert delays.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Since the commit commit 6a895d039b ("net: Update eQos driver and FEC
driver to use eth phy interfaces") the field phyaddr of driver private data
struct eqos_priv is no more used in eqos_start() for the phy_connect()
parameter.
Now this variable is only initialized in eqos_probe_resources_stm32()
it can be removed.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Bind any subnode with name beginning by mdio, mdio0 for example,
and not only the "mdio" as namei of subnode.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Replace debug trace and printf to log macros:
- debug() replaced by dev_dbg() when device is available, this macro
indicate the device name since commit ceb70bb870 ("dm: Print device
name in dev_xxx like Linux")
- printf() replaced by log_notice() to allow dispatch to log backends.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The gpio reset and the assert or deassert delay are defined in generic
binding of the ethernet phy in Linux:
Documentation/devicetree/bindings/net/ethernet-phy.yaml
reset-gpios:
maxItems: 1
description:
The GPIO phandle and specifier for the PHY reset signal.
reset-assert-us:
description:
Delay after the reset was asserted in microseconds. If this
property is missing the delay will be skipped.
reset-deassert-us:
description:
Delay after the reset was deasserted in microseconds. If
this property is missing the delay will be skipped.
See also U-Boot: doc/device-tree-bindings/net/phy.txt
This patch adds the parsing of this common DT properties in the
u-class "eth_phy_generic", used by default in the associated driver
"eth_phy_generic_drv"
This parsing function eth_phy_of_to_plat can be reused by other
ethernet phy drivers for this uclass UCLASS_ETH_PHY.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Use same type as eth_device->iobase and support addresses greater
than INT_MAX.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it. As this is also the last in family remove the related
support as well.
Cc: Angelo Durgehello <angelo.dureghello@timesys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
At present if ifname is exactly IFNAMSIZ characters then it will result
in an unterminated string. Fix this by using strlcpy() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 316358)
Acked-by: Ramon Fried <rfried.dev@gmail.com>
The Microchip KSZ9477/KSZ9897/KSZ9567 7-Port Gigabit Ethernet Switches
support SGMII/RGMII/MII/RMII with register access via SPI, I2C, or MDIO.
This driver currently supports I2C register access but SPI or MDIO register
access can be easily added at a later time.
Tagging is not implemented and instead the active port is tracked to
avoid needing a tag to store port information.
This was tested with the imx8mm-venice-gw7901 board which has a
KSZ9897S switch with an IMX8MM FEC MAC master connected via RGMII_ID.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Enabling promiscuous mode is necessary if FEC is the master of a DSA
switch driver where each port has their own MAC address.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
If the FEC is connected to a fixed-link (upstream switch port for
example) the phy_of_node should be set to the fixed-link node
so that speed and other properties can be found properly.
In addition fix a typo in the debug string.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
When using uclass_get_device* to get the FEC device we need to use
device sequence instead of index into UCLASS_ETH. In systems where for
example a I2C based DSA switch exists it will probe before the FEC
master and its ports will be registered first and have the first
indexes yet the FEC's sequence comes from the device-tree alias.
Take for example the imx8mm-venice-gw7901 board which has an i2c based
DSA switch:
u-boot=> net list
eth1 : lan1 00:0d:8d:aa:00:2f
eth2 : lan2 00:0d:8d:aa:00:30
eth3 : lan3 00:0d:8d:aa:00:31
eth4 : lan4 00:0d:8d:aa:00:32
eth0 : ethernet@30be0000 00:0d:8d:aa:00:2e active
Thus in this case uclass_get_device(UCLASS_ETH, 0, &dev) returns lan1
which is wrong but uclass_get_device_seq(UCLASS_ETH, 0, &dev) returns
ethernet@30be000 which is correct.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM. Remove it. As this is the last
ARCH_T4160 platform, remove that support as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
These boards have not been converted to CONFIG_DM_PCI by the deadline
and is also missing conversion to CONFIG_DM. Remove them. As this is
the only ARCH_T1023 platform left, remove that support as well.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
These board has not been converted to CONFIG_DM_PCI by the deadline.
Remove them. As this is the last of the mcf547x_8x family of boards,
remove that support as well.
Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove the define EQOS_DESCRIPTOR_ALIGN unused since the
commit 6f1e668d96 ("net: dwc_eth_qos: Pad descriptors to cacheline size")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Make sure that errors in the PHY driver .startup() method, such as no
link, are propagated and not ignored.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The RGMII spec supports optional in-band status reporting for the speed
and duplex negotiated on the copper side, and the ENETC driver enables
this feature by default.
However, this does not work when the PHY does not implement the in-band
reporting, or when there is a MAC-to-MAC connection described using a
fixed-link. In that case, it would be better to disable the feature in
the ENETC MAC and always force the speed and duplex to the values that
were negotiated and retrieved over MDIO once the autoneg is finished.
Since this works always, we just do it unconditionally and drop the
in-band code.
Note that because we need to wait for the autoneg to complete, we need
to move enetc_setup_mac_iface() after phy_startup() returns, and then
pass the phydev pointer all the way to enetc_init_rgmii().
The same considerations have led to a similar Linux driver patch as well:
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=c76a97218dcbb2cb7cec1404ace43ef96c87d874
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Given that even a fixed-link has an associated phy_device, there is no
reason to operate in a mode when dm_eth_phy_connect fails.
Remove the driver checks for a NULL priv->phy and just return -ENODEV
when that happens.
Copyright updated according to corporate requirements.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The SMC911x Ethernet MACs can be integrated using a 16 or 32-bit bus.
The driver needs to know about this choice, which is the reason for us
having a Kconfig symbol for that.
Now this bus width is already described using a devicetree property, and
since the driver is DM compliant and is using the DT now, we should query
this at runtime. We leave the Kconfig choice around, in case the DT is
missing this property.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The SMC911x Ethernet driver needs to know which accessor functions it
can use to access the MMIO registers. For that reason we have a Kconfig
choice between 16 and 32-bit bus width.
Since it's only those two options that we (and the Linux kernel)
support, and there does not seem to be any evidence of another bus
width anywhere, limit the Kconfig construct to a simple symbol.
This simplifies the code and allows a later rework to be much easier.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
clk:
- Add driver for Xilinx Clocking Wizard IP
fdt:
- Also record architecture in /fit-images
net:
- Fix plat/priv data handling in axi emac
- Add support for 10G/25G speeds
pca953x:
- Add missing dependency on i2c
serial:
- Fix dependencies for DEBUG uart for pl010/pl011
- Add setconfig option for cadence serial driver
watchdog:
- Add cadence wdt expire now function
zynq:
- Update DT bindings to reflect the latest state and descriptions
zynqmp:
- Update DT bindings to reflect the latest state and descriptions
- SPL: Add support for ECC DRAM initialization
- Fix R5 core 1 handling logic
- Enable firmware driver for mini configurations
- Enable secure boot, regulators, wdt
- Add support xck devices and 67dr
- Add psu init for sm/smk-k26 SOMs
- Add handling for MMC seq number via mmc_get_env_dev()
- Handle reserved memory locations
- Add support for u-boot.itb generation for secure OS
- Handle BL32 handoffs for secure OS
- Add support for 64bit addresses for u-boot.its generation
- Change eeprom handling via nvmem aliases
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Merge tag 'xilinx-for-v2021.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2021.10
clk:
- Add driver for Xilinx Clocking Wizard IP
fdt:
- Also record architecture in /fit-images
net:
- Fix plat/priv data handling in axi emac
- Add support for 10G/25G speeds
pca953x:
- Add missing dependency on i2c
serial:
- Fix dependencies for DEBUG uart for pl010/pl011
- Add setconfig option for cadence serial driver
watchdog:
- Add cadence wdt expire now function
zynq:
- Update DT bindings to reflect the latest state and descriptions
zynqmp:
- Update DT bindings to reflect the latest state and descriptions
- SPL: Add support for ECC DRAM initialization
- Fix R5 core 1 handling logic
- Enable firmware driver for mini configurations
- Enable secure boot, regulators, wdt
- Add support xck devices and 67dr
- Add psu init for sm/smk-k26 SOMs
- Add handling for MMC seq number via mmc_get_env_dev()
- Handle reserved memory locations
- Add support for u-boot.itb generation for secure OS
- Handle BL32 handoffs for secure OS
- Add support for 64bit addresses for u-boot.its generation
- Change eeprom handling via nvmem aliases
Add support for 10G/25G (XXV) high speed ethernet. This Makes use of
the exiting AXI DMA, similar to 1G.
Signed-off-by: Alessandro Temil <atemil@waymo.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There are lot of accesses to priv data in of_to_plat(), which is incorrect.
Create a platform data structure and use it in of_to_plat(), then copy all
platform data to priv data in probe.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
clean up octeontx_smi_probe by using the live-tree API.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Commit 4f0278dac5 ("net: sun8i-emac: Lower MDIO frequency") leads to
network failure on the OrangePi PC.
=> dhcp
sun8i_emac_eth_start: Timeout
According to the commit message the change of the MDIO frequency is only
required for external PHYs.
Fixes: 4f0278dac5 ("net: sun8i-emac: Lower MDIO frequency")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add SynQuacer's NETSEC GbE controller driver.
Since this driver will load the firmware from SPI NOR flash,
this depends on CONFIG_SYNQUACER_SPI=y.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Revert some changes of commit 3a97da12ee ("net: dwc_eth_qos: add dwc
eqos for imx support") that were probably added by mistake.
One of these changes can lead to received data corruption (enabling
FUP and FEP bits). Another causes invalid register rxq_ctrl0 settings
for some platforms. And another makes some writes at unknown memory
location.
Fixes: 3a97da12ee ("net: dwc_eth_qos: add dwc eqos for imx support")
Signed-off-by: Daniil Stas <daniil.stas@posteo.net>
Cc: Ye Li <ye.li@nxp.com>
Cc: Fugang Duan <fugang.duan@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Disabling clk_ck clock leads to link up status loss in phy, which
leads to auto-negotiation restart before each network command
execution.
This issue is especially big for PXE boot protocol because of
auto-negotiation restarts before each configuration filename trial.
To avoid this issue don't disable clk_ck clock after it was enabled.
Signed-off-by: Daniil Stas <daniil.stas@posteo.net>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
commit f1bcad22dd ("net: e1000: add support for writing to EEPROM")
adds support for storing hwaddr in EEPROM however i210 devices do not
support this and thus results in errors such as:
Warning: e1000#0 failed to set MAC address'
Check if a flash device is present and if not return -ENOSYS indicating
this is not supported.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Current tsec adapter sets adapter gigabit capabilities by default, and in
reality this must not always be the case.
It is possible that tsec adapter is used for 100Mbps connection, and in
this case setting 1000Mbps capabilities can lead to some side effects such
longer autoneg process.
In our ls102x designs this problem leads to long autoneg times (> 4 sec)
in case board rgmii link is 100Mbps capable only.
Limiting the rgmii link capabilities provides faster and smoother
link establishment.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Read Linux PPFE firmware from flash partition and pass it to Linux through
FDT entry. So that we can avoid placing PPFE firmware in Linux rootfs.
(FDT may increase at max by 64KB)
Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Signed-off-by: Anji J <anji.jagarlmudi@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Since 291da96b8e ("clk: Allow clock defaults to be set during re-reloc
state for SPL only") it has been impossible to set clock defaults before
relocation. This is annoying on boards without SPL, since there is no way
to set clock defaults before U-Boot proper. In particular, the aisram rate
must be changed before relocation on the K210, since U-Boot will hang if we
try and change the rate while we are using aisram.
To get around this, extend the stage parameter to allow force setting
defaults, even if they would be otherwise postponed for later. A device
tree property was decided against because of the concerns in the original
commit thread about the overhead of repeatedly parsing the device tree.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When using bootefi to boot a EFI binary, u-boot is supposed to
provide networking service for EFI application. Currently, 'pfe stop'
command is called from bootcmd before running bootefi. As a result
network stops working for EFI applications and console is flooded with
"Rx pkt not on expected port" messages.
Implement board_quiesce_devices() for ls1012a boards and call
pfe_command_stop() from it instead of calling 'pfe stop' from
*_bootcmd and bootcmd.
Tested-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com>
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
[Fixed checkpatch space error]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Removed call of ofnode_translate_address() after ofnode_read_resource
in luton_switch.c:luton_probe(); it is unnecessary since
the commit feb7ac457c ("dm: core: Add address translation in
fdt_get_resource").
Fixes: feb7ac457c ("dm: core: Add address translation in fdt_get_resource")
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reported-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
With the last user of this driver removed, remove the driver.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Until now the mvpp2 driver used an extra 'phy-speed'
DT property in order to differentiate between the
SGMII and SGMII @2.5GHz. As there is a dedicated
PHY_INTERFACE_MODE_SGMII_2500 flag to mark the latter
start using it and drop the custom flag.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Tested-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Currently, there are 2 valid cases for interface, PHY
and mdio relation:
- If an interface has PHY handler, it'll call
mdio_mii_bus_get_from_phy(), which will register
MDIO bus.
- If we want to use fixed-link for an interface,
PHY handle is not defined in the DTS, and no
MDIO is registered.
There is a third case, for some boards (with switch),
the MDIO is used for switch configuration, but the interface
itself uses fixed link. This patch allows this option by
checking if fixed-link subnode is defined, in this case,
MDIO bus is registers, but the PHY address is set to
PHY_MAX_ADDR for this interface, so this interface will
not try to access the PHY later on.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Peled <bpeled@marvell.com>
Reviewed-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Ben Peled <bpeled@marvell.com>
Reviewed-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
GMII_SPEED should be enabled for 2.5G speed
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Yan Markman <ymarkman@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Because the mvpp2 driver now relies on the PHYLIB and
the external MDIO driver, configuring low level
SMI bus settings is redundant.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
1. Differ between Port1 RGMII and SFI modes in Netcomplex config.
2. Remove XPCS config from SFI mode.
Port1 doesn't XPCS domain, XPCS config should be removed.
Access to Port1 XPCS can cause stall.
3. Add Port1 MPCS configurations.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
When the PHY interface is set as TXID & RXID, the delays should be taken from DT,
but first they should not be hardcoded since the PHY driver will set them.
Fixes: 798424e857 ("net: designware: add Amlogic Meson8b & later glue driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Currently driver may end up caching disabled port ID as active
interface. Fix this by bailing out earlier in case port is marked
disabled in the DT.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
CPSW NUSS IP on K3 SoCs can have more than one external port (upto 8)
Therefore increase AM65_CPSW_CPSWNU_MAX_PORTS to 9 (8 ext + 1 Root port)
as preparation to allow any one of the 8 ports to be used as ethernet
interface in U-Boot.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
If we fail to probe for whatever reason, we cannot unregister/free the
MII bus unless we registered it with fec_get_miibus. This fixes FECs
sharing an MDIO bus from destroying it, preventing the other FEC from
using it.
Fixes: 6a895d039b ("net: Update eQos driver and FEC driver to use eth phy interfaces")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
If a phy is disabled, don't use it. This matches Linux's behavior.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
binman FMAP improvements
minor test improvements and fixes
minor dm improvements
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Merge tag 'dm-pull-29apr21' of https://source.denx.de/u-boot/custodians/u-boot-dm
buildman environment fix
binman FMAP improvements
minor test improvements and fixes
minor dm improvements
Today of_address_to_resource() is called only in
ofnode_read_resource() for livetree support and
fdt_get_resource() is called when livetree is not supported.
The fdt_get_resource() doesn't do the address translation
so when it is required, but the address translation is done
by ofnode_read_resource() caller, for example in
drivers/firmware/scmi/smt.c::scmi_dt_get_smt_buffer() {
...
ret = ofnode_read_resource(args.node, 0, &resource);
if (ret)
return ret;
faddr = cpu_to_fdt32(resource.start);
paddr = ofnode_translate_address(args.node, &faddr);
...
The both behavior should be aligned and the address translation
must be called in fdt_get_resource() and removed for each caller.
Fixes: a44810123f ("dm: core: Add dev_read_resource() to read device resources")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
The commit 6c993815bb ("net: phy: xilinx: Be compatible with live OF
tree") change driver behavior to while loop which wasn't correct because
the driver was looping over again and again. The reason was that
ofnode_valid() is taking 0 as correct value.
Fix it by changing while loop to ofnode_for_each_subnode() which is only
loop over available nodes.
Fixes: 6c993815bb ("net: phy: xilinx: Be compatible with live OF tree")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The dw_eth_pdata is not accessible from the mdio device, it gets the mdio bus plat
leading to random sleeps (-10174464 on Odroid-HC4).
This moves the dw_mdio_reset function to a common one taking the ethernet
device as parameter and use it from the dw_mdio_reset and dm_mdio variant functions.
Fixes: 5160b4567c ("net: designware: add DM_MDIO support")
Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Commit eb5a2b6710 ("net: sun8i-emac: Determine pinmux based on SoC,
not EMAC type") switched the pinmux setup over to look at
CONFIG_MACH_SUN* symbols, to find the appropriate mux value.
Unfortunately this patch missed to check for the H5, which is
pin-compatible to the H3, but uses a different Kconfig symbol (because
it has ARMv8 vs. ARMv7 cores).
Replace the pure SUN8I_H3 symbol with the joint SUNXI_H3_H5 one, which is
there to cover the peripherals common to both SoCs.
Also explicitly list each supported SoC, and have an error message in the
fallback case, to avoid those problems in the future.
This fixes Ethernet support on all H5 boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Samuel Holland <samuel@sholland.org> # Orange Pi PC2
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Sometimes no traffic was getting out on the ports, the root cause was
a wrong configuration of the Serdes6G, which is used on jr2 pcb111.
This patch fixes this issue by applying the correct configuration.
Fixes: 5e1d417bec ("net: Add MSCC Jaguar2 network driver.")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Make sure to reset the switch core at probe time.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
To squash that nasty warning message and make better use of the newly
gained OF_CONTROL feature, let's convert the calxedagmac driver to the
"new" driver model.
The conversion is pretty straight forward, mostly just adjusting the
use of the involved data structures.
The only actual change is the required split of the receive routine into
a receive and free_pkt part.
Also this allows us to get rid of the hardcoded platform information and
explicit init calls.
This also uses the opportunity to wrap the code decoding the MMIO
register base address, to make it safe for using PHYS_64BIT later.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The fdt node offset is apparently not set properly when probed
causing no MDIO busses to be found. Fix this by obtaining the
offset.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Revert a change that occured between the Marvell SDK-10.1.1.0
and SDK-10.3.1.1 which broke QSMII phy support.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
At present the tsec driver uses a non-standard DT bindings to get
its <reg> base / size. The upstream Linux kernel seems to require
the <reg> base / size to be put under a subnode of the eTSEC node
with a name prefix "queue-group". This is not documented in the
kernel DT bindings, but it looks every dtsi file that contains the
eTSEC node was written like this.
This commit updates the tsec driver to handle this case.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
dev_remap_addr() eventually calls dev_read_addr_index(), while
pdata->iobase holds the return value of dev_read_addr() that calls
dev_read_addr_index() too. Such duplication can be avoided by using
map_physmem() directly.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.
The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:
=> setenv ethact lan0
=> ping 1.2.3.5
Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.
I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Now that the fixed phy driver has been fully adapted to OF APIs,
and dm_eth_phy_connect() already can handle the fixed phy, call
dm_eth_phy_connect() directly in the DM tsec driver.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <20210216224804.3355044-4-olteanv@gmail.com>
[bmeng: split from "net: mdio: teach dm_eth_phy_connect to connect to fixed PHY"]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Update fixedphy_probe() to support the old DT binding.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The printf statement doesn't end with a newline. Add it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The PHY driver ops should be made static.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Simplify the logic of phy_connect_fixed() by using the new API
ofnode_phy_is_fixed_link(), which brings additional bonus of
supporting the old DT bindings.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
At present phy_connect_gmii2rgmii() is implemented using a DM API
dev_of_offset() hence it cannot support a non-DM configuration.
Remove the non-DM version prototype of phy_connect_gmii2rgmii()
and make the driver depend on CONFIG_DM_ETH.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Following the same updates that were done to the fixed phy driver,
use ofnode_ APIs instead of fdt_ APIs so that the Xilinx PHY driver
can support live DT.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In drivers/net/phy/Kconfig, CONFIG_PHY_FIXED already depends on
CONFIG_DM_ETH, so the function prototype definition when
CONFIG_DM_ETH=n does nothing, so it can be dropped. It is also
never reachable, since the whole function is already under #ifdef
CONFIG_PHY_FIXED (which again, as I said, depends on CONFIG_DM_ETH=y).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <20210216224804.3355044-3-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
On systems that use CONFIG_OF_LIVE, the "ofnode" type is defined
as const struct device_node *np, while on the flat DT systems it
is defined as a long of_offset into gd->fdt_blob.
It is desirable that the fixed PHY driver uses the higher-level
ofnode abstraction instead of parsing gd->fdt_blob directly,
because that enables it to work on live OF systems.
The fixed PHY driver has used a nasty hack since its introduction in
commit db40c1aa1c ("drivers/net/phy: add fixed-phy /
fixed-link support"),
which is to pass the long gd->fdt_blob offset inside int phydev->addr
(a value that normally holds the MDIO bus address at which the PHY
responds). Even ignoring the fact that the types were already
mismatched leading to a potential truncation (flat OF offset was
supposed to be a long and not an int), we really cannot extend this
hack any longer, because there's no way an int will hold the other
representation of ofnode, the struct device_node *np.
So we unfortunately need to do the right thing, which is to use the
framework introduced by Grygorii Strashko in
commit eef0b8a930 ("net: phy: add ofnode node to struct phy_device").
This will populate phydev->node for the fixed PHY.
Note that phydev->node will not be valid in the probe function, since
that is called synchronously from phy_device_create and we really have
no way of passing the ofnode directly through the phy_device_create API.
So we do what other drivers do too: we move the OF parsing logic from
the .probe to the .config method of the PHY driver. The new function
will be called at phy_config() time.
I do believe I've converted all the possible call paths for creating
a PHY with PHY_FIXED_ID, so there is really no reason to maintain
compatibility with the old logic of retrieving a flat OF tree offset
from phydev->addr. We just pass 0 to phydev->addr now.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <20210216224804.3355044-2-olteanv@gmail.com>
[bmeng: keep fixedphy_probe(); update mdio-uclass.c to handle fixed phy]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
These boards have not been converted to CONFIG_DM_MMC by the deadline.
Remove them. As the P5020 is the last ARCH_P5020 platform, remove that
support as well.
Cc: Andy Fleming <afleming@gmail.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it. It is also the only ARCH_T2081 board so remove that support
as well.
Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This adds a proper glue driver for the Designware DWMAC ethernet MAC IP
found in the Amlogic Meson8, GXBB, GXL, GXM, G12A, G12B & SM1 SoCs.
This is aimed to replace the static ethernet link setup found on the board
init code for the Amlogic SoC based boards.
Tested on a libretech-cc (S905x Internal RMII 10/100 PHY) and Khadas VIM3 (A113d
with external 10/100/1000 RGMII PHY) to cover the most extreme setups.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Amlogic G12A & compatible SoCs embeds a mux to either communicate with
the external PHY or the internal 10/100 PHY.
This adds support for this mux as a MDIO MUX device.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add support for DM_MDIO to connect to PHY and expose a MDIO device for the
internal MDIO bus in order to dynamically connect to MDIO PHYs with DT
with eventual MDIO muxes in between.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add support for MMIO register MDIO muxes based on the Linux mdio-mux-mmioreg driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The code was trying to disable PCS auto-negotiation when a fixed-link node
is present and enable it otherwise. However, the PCS registers were being
written before the PCSSEL bit was set in the network configuration
register, and it appears that in this state, PCS register writes are
ignored. The result is that the intended change only took effect on the
second network operation that was performed, since at that time PCSSEL is
already enabled.
Fix the order of register writes so that PCS registers are only written to
after the PCS is enabled.
Fixes: 26e62cc971 ("net: gem: Disable PCS autonegotiation in case of fixed-link")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
When copying to a u32 field we should use sizeof(u32) and not
sizeof(*u32) in memcpy.
On 64bit systems like cortina_presidio-asic-emmc_defconfig using
sizeof(*u32) leads to a buffer overrun.
Fixes: febe13b438 ("net: cortina_ni: Add eth support for Cortina Access CAxxxx SoCs")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
qspi:
- Support for dual/quad mode
- Fix speed handling
clk:
- Add clock enable function for zynq/zynqmp/versal
gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path
fpga:
- Fix buffer alignment for ZynqMP
xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
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Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2021.04-rc3
qspi:
- Support for dual/quad mode
- Fix speed handling
clk:
- Add clock enable function for zynq/zynqmp/versal
gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path
fpga:
- Fix buffer alignment for ZynqMP
xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
