mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
configs: fsl: migrate FMAN/QE specific defines to Kconfig
Use moveconfig.py script to convert CONFIG_SYS_FMAN_FW_ADDR, CONFIG_SYS_QE_FW_ADDR and CONFIG_SYS_QE_FMAN_FW_LENGTH to Kconfig and move these entries to defconfigs. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
parent
5e736c9397
commit
a97a071d10
115 changed files with 135 additions and 264 deletions
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@ -62,6 +62,7 @@ CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x100000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
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@ -61,6 +61,7 @@ CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xD2000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
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@ -62,6 +62,7 @@ CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x110000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
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@ -57,6 +57,7 @@ CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
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@ -60,6 +60,7 @@ CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x100000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -59,6 +59,7 @@ CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xD2000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -60,6 +60,7 @@ CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x110000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -55,6 +55,7 @@ CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -58,6 +58,7 @@ CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xD2000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -59,6 +59,7 @@ CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x110000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -54,6 +54,7 @@ CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -61,6 +61,7 @@ CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x100000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -59,6 +59,7 @@ CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xD2000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -60,6 +60,7 @@ CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x110000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -55,6 +55,7 @@ CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -92,6 +92,8 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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ONFIG_SYS_FMAN_FW_ADDR=0x180000
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CONFIG_SYS_QE_FW_ADDR=0x200000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
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@ -88,6 +88,8 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x104000
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CONFIG_SYS_QE_FW_ADDR=0x124000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
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@ -90,6 +90,8 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x110000
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CONFIG_SYS_QE_FW_ADDR=0x130000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
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@ -73,6 +73,8 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
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CONFIG_SYS_QE_FW_ADDR=0xEFE00000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
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@ -87,6 +87,8 @@ CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x280000
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CONFIG_SYS_QE_FW_ADDR=0x380000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
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@ -83,6 +83,8 @@ CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x10400
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ONFIG_SYS_QE_FW_ADDR=0x124000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
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@ -85,6 +85,8 @@ CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x110000
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CONFIG_SYS_QE_FW_ADDR=0x130000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
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@ -68,6 +68,8 @@ CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
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CONFIG_SYS_QE_FW_ADDR=0xEFF10000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
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@ -86,6 +86,7 @@ CONFIG_PHY_TERANETICS=y
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CONFIG_PHY_VITESSE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x160000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -82,6 +82,7 @@ CONFIG_PHY_TERANETICS=y
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CONFIG_PHY_VITESSE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x104000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -66,6 +66,7 @@ CONFIG_PHY_TERANETICS=y
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CONFIG_PHY_VITESSE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -84,6 +84,7 @@ CONFIG_PHY_TERANETICS=y
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CONFIG_PHY_VITESSE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x110000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -59,6 +59,7 @@ CONFIG_PHY_TERANETICS=y
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CONFIG_PHY_VITESSE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xFFE00000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -67,6 +67,7 @@ CONFIG_PHY_TERANETICS=y
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CONFIG_PHY_VITESSE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -93,6 +93,7 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x180000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
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@ -89,6 +89,7 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x104000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
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@ -91,6 +91,7 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x110000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
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@ -73,6 +73,7 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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ONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
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CONFIG_MII=y
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CONFIG_PCIE_FSL=y
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CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
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@ -94,6 +94,7 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x180000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -90,6 +90,7 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x104000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -92,6 +92,7 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x110000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -74,6 +74,7 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -76,6 +76,7 @@ CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0x104000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -61,6 +61,7 @@ CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
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CONFIG_MII=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -69,6 +69,8 @@ CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_FMAN_ENET=y
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CONFIG_SYS_FMAN_FW_ADDR=0xE8020000
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CONFIG_SYS_QE_FW_ADDR=0xE8040000
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CONFIG_RGMII=y
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CONFIG_MII=y
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CONFIG_PCI_REGION_MULTI_ENTRY=y
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@ -179,5 +179,6 @@ CONFIG_QE_UEC=y
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# CONFIG_PINCTRL_FULL is not set
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CONFIG_QE=y
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CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
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CONFIG_SYS_QE_FW_ADDR=0xF00C0000
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CONFIG_SYS_NS16550=y
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CONFIG_BCH=y
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@ -63,3 +63,4 @@ CONFIG_FSL_QSPI=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_SYS_QE_FW_ADDR=0xf40000
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@ -79,3 +79,4 @@ CONFIG_FSL_QSPI=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_SYS_QE_FW_ADDR=0xf40000
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@ -84,3 +84,4 @@ CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_STORAGE=y
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CONFIG_SYS_QE_FW_ADDR=0x60940000
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@ -84,3 +84,4 @@ CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_STORAGE=y
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CONFIG_SYS_QE_FW_ADDR=0x60940000
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@ -105,3 +105,4 @@ CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_STORAGE=y
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CONFIG_SYS_QE_FW_ADDR=0x60940000
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@ -83,3 +83,4 @@ CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_STORAGE=y
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CONFIG_RSA=y
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CONFIG_SPL_RSA=y
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CONFIG_SYS_QE_FW_ADDR=0x60940000
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@ -85,3 +85,4 @@ CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_STORAGE=y
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CONFIG_SYS_QE_FW_ADDR=0x60940000
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@ -85,3 +85,4 @@ CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_STORAGE=y
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CONFIG_SYS_QE_FW_ADDR=0x60940000
|
||||
|
|
|
@ -80,3 +80,4 @@ CONFIG_USB=y
|
|||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
|
|
|
@ -102,3 +102,4 @@ CONFIG_USB=y
|
|||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
|
|
|
@ -97,3 +97,4 @@ CONFIG_USB=y
|
|||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
|
|
|
@ -70,3 +70,4 @@ CONFIG_USB_XHCI_HCD=y
|
|||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_SYS_QE_FW_ADDR=0x60940000
|
||||
|
|
|
@ -72,3 +72,4 @@ CONFIG_SYS_NS16550=y
|
|||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_SYS_QE_FW_ADDR=0x60940000
|
||||
|
|
|
@ -73,3 +73,4 @@ CONFIG_FSL_LPUART=y
|
|||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_SYS_QE_FW_ADDR=0x60940000
|
||||
|
|
|
@ -74,3 +74,4 @@ CONFIG_FSL_QSPI=y
|
|||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
|
|
|
@ -89,3 +89,4 @@ CONFIG_USB_XHCI_HCD=y
|
|||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
|
|
|
@ -89,3 +89,4 @@ CONFIG_SYS_NS16550=y
|
|||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
|
|
|
@ -90,3 +90,4 @@ CONFIG_FSL_QSPI=y
|
|||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
|
|
|
@ -69,6 +69,8 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x60940000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -70,6 +70,8 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x60940000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -90,6 +90,7 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -70,6 +70,8 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x60940000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -64,6 +64,7 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x40900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -89,6 +89,8 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -81,6 +81,8 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -71,6 +71,8 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -81,6 +81,8 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -58,6 +58,8 @@ CONFIG_DM_MDIO=y
|
|||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x60940000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -61,6 +61,8 @@ CONFIG_DM_ETH=y
|
|||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x60940000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -74,6 +74,7 @@ CONFIG_DM_ETH=y
|
|||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -82,6 +82,7 @@ CONFIG_DM_ETH=y
|
|||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -75,6 +75,8 @@ CONFIG_DM_MDIO=y
|
|||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
|
||||
|
|
|
@ -80,6 +80,8 @@ CONFIG_DM_ETH=y
|
|||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -60,6 +60,8 @@ CONFIG_DM_MDIO=y
|
|||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -66,6 +66,8 @@ CONFIG_DM_ETH=y
|
|||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_SYS_QE_FW_ADDR=0x940000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -69,6 +69,7 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -72,6 +72,7 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -73,6 +73,7 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -92,6 +92,7 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -68,6 +68,7 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x40900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -92,6 +92,7 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -86,6 +86,7 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -73,6 +73,7 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -84,6 +84,7 @@ CONFIG_PHY_REALTEK=y
|
|||
CONFIG_PHY_VITESSE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
|
|
|
@ -81,6 +81,7 @@ CONFIG_DM_ETH=y
|
|||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -63,6 +63,7 @@ CONFIG_DM_ETH=y
|
|||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x40900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -67,6 +67,7 @@ CONFIG_DM_ETH=y
|
|||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x40900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -85,6 +85,7 @@ CONFIG_DM_MDIO=y
|
|||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x40900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -78,6 +78,7 @@ CONFIG_DM_ETH=y
|
|||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
ONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
CONFIG_PCIE_LAYERSCAPE_EP=y
|
||||
|
|
|
@ -79,6 +79,7 @@ CONFIG_DM_ETH=y
|
|||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -60,6 +60,7 @@ CONFIG_DM_ETH=y
|
|||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -66,6 +66,7 @@ CONFIG_DM_ETH=y
|
|||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_SYS_FMAN_FW_ADDR=0x900000
|
||||
CONFIG_NVME=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIE_LAYERSCAPE_RC=y
|
||||
|
|
|
@ -74,3 +74,4 @@ CONFIG_TSEC_ENET=y
|
|||
CONFIG_SPECIFY_CONSOLE_INDEX=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SYS_QE_FW_ADDR=0x60020000
|
||||
|
|
|
@ -74,3 +74,4 @@ CONFIG_TSEC_ENET=y
|
|||
CONFIG_SPECIFY_CONSOLE_INDEX=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SYS_QE_FW_ADDR=0x60020000
|
||||
|
|
|
@ -344,6 +344,16 @@ config FMAN_ENET
|
|||
help
|
||||
This driver support the Freescale FMan Ethernet controller
|
||||
|
||||
config SYS_FMAN_FW_ADDR
|
||||
hex "FMAN Firmware Address"
|
||||
depends on FMAN_ENET
|
||||
default 0x0
|
||||
|
||||
config SYS_QE_FMAN_FW_LENGTH
|
||||
hex "FMAN QE Firmware length"
|
||||
depends on FMAN_ENET || QE || U_QE
|
||||
default 0x10000
|
||||
|
||||
config FTMAC100
|
||||
bool "Ftmac100 Ethernet Support"
|
||||
help
|
||||
|
|
|
@ -18,6 +18,10 @@ config U_QE
|
|||
help
|
||||
Choose this option to add support for U QUICC Engine.
|
||||
|
||||
config SYS_QE_FW_ADDR
|
||||
hex "QE Firmware Address"
|
||||
depends on FMAN_ENET || QE || U_QE
|
||||
default 0x0
|
||||
choice
|
||||
prompt "QUICC Engine FMan ethernet firmware location"
|
||||
depends on FMAN_ENET || QE
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright 2011-2012 Freescale Semiconductor, Inc.
|
||||
* Copyright 2020 NXP
|
||||
* Copyright 2020-2021 NXP
|
||||
*/
|
||||
|
||||
/*
|
||||
|
@ -361,35 +361,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
|
|||
|
||||
#define CONFIG_SYS_DPAA_FMAN
|
||||
#define CONFIG_SYS_DPAA_PME
|
||||
/* Default address of microcode for the Linux Fman driver */
|
||||
#if defined(CONFIG_SPIFLASH)
|
||||
/*
|
||||
* env is stored at 0x100000, sector size is 0x10000, ucode is stored after
|
||||
* env, so we got 0x110000.
|
||||
*/
|
||||
#define CONFIG_SYS_FMAN_FW_ADDR 0x110000
|
||||
#elif defined(CONFIG_SDCARD)
|
||||
/*
|
||||
* PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
|
||||
* about 825KB (1650 blocks), Env is stored after the image, and the env size is
|
||||
* 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
|
||||
*/
|
||||
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680)
|
||||
#elif defined(CONFIG_MTD_RAW_NAND)
|
||||
#define CONFIG_SYS_FMAN_FW_ADDR (8 * (128 * 1024))
|
||||
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
|
||||
/*
|
||||
* Slave has no ucode locally, it can fetch this from remote. When implementing
|
||||
* in two corenet boards, slave's ucode could be stored in master's memory
|
||||
* space, the address can be mapped from slave TLB->slave LAW->
|
||||
* slave SRIO or PCIE outbound window->master inbound window->
|
||||
* master LAW->the ucode address in master's memory space.
|
||||
*/
|
||||
#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000
|
||||
#else
|
||||
#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
|
||||
#endif
|
||||
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
|
||||
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright 2014 Freescale Semiconductor, Inc.
|
||||
* Copyright 2020 NXP
|
||||
* Copyright 2020-2021 NXP
|
||||
*/
|
||||
|
||||
/*
|
||||
|
@ -500,36 +500,6 @@ unsigned long get_board_sys_clk(void);
|
|||
|
||||
#define CONFIG_SYS_DPAA_FMAN
|
||||
|
||||
/* Default address of microcode for the Linux FMan driver */
|
||||
#if defined(CONFIG_SPIFLASH)
|
||||
/*
|
||||
* env is stored at 0x100000, sector size is 0x10000, ucode is stored after
|
||||
* env, so we got 0x110000.
|
||||
*/
|
||||
#define CONFIG_SYS_FMAN_FW_ADDR 0x110000
|
||||
#define CONFIG_SYS_QE_FW_ADDR 0x130000
|
||||
#elif defined(CONFIG_SDCARD)
|
||||
/*
|
||||
* PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
|
||||
* about 1MB (2048 blocks), Env is stored after the image, and the env size is
|
||||
* 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080(0x820).
|
||||
*/
|
||||
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
|
||||
#define CONFIG_SYS_QE_FW_ADDR (512 * 0x920)
|
||||
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
|
||||
/*
|
||||
* Slave has no ucode locally, it can fetch this from remote. When implementing
|
||||
* in two corenet boards, slave's ucode could be stored in master's memory
|
||||
* space, the address can be mapped from slave TLB->slave LAW->
|
||||
* slave SRIO or PCIE outbound window->master inbound window->
|
||||
* master LAW->the ucode address in master's memory space.
|
||||
*/
|
||||
#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000
|
||||
#else
|
||||
#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
|
||||
#define CONFIG_SYS_QE_FW_ADDR 0xEFE00000
|
||||
#endif
|
||||
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
|
||||
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
|
||||
#endif /* CONFIG_NOBQFMAN */
|
||||
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright 2014 Freescale Semiconductor, Inc.
|
||||
* Copyright 2020 NXP
|
||||
* Copyright 2020-2021 NXP
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
|
@ -501,33 +501,6 @@
|
|||
|
||||
#define CONFIG_U_QE
|
||||
|
||||
/* Default address of microcode for the Linux Fman driver */
|
||||
#if defined(CONFIG_SPIFLASH)
|
||||
/*
|
||||
* env is stored at 0x100000, sector size is 0x10000, ucode is stored after
|
||||
* env, so we got 0x110000.
|
||||
*/
|
||||
#define CONFIG_SYS_FMAN_FW_ADDR 0x110000
|
||||
#elif defined(CONFIG_SDCARD)
|
||||
/*
|
||||
* PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
|
||||
* about 1MB (2048 blocks), Env is stored after the image, and the env size is
|
||||
* 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
|
||||
*/
|
||||
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
|
||||
#else
|
||||
#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPIFLASH)
|
||||
#define CONFIG_SYS_QE_FW_ADDR 0x130000
|
||||
#elif defined(CONFIG_SDCARD)
|
||||
#define CONFIG_SYS_QE_FW_ADDR (512 * 0x920)
|
||||
#else
|
||||
#define CONFIG_SYS_QE_FW_ADDR 0xEFF10000
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
|
||||
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
|
||||
#endif /* CONFIG_NOBQFMAN */
|
||||
|
||||
|
|
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Reference in a new issue