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Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

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- fdt_support: Add fdt_for_each_node_by_compatible() helper macro
  (Marek)
- turris_omnia: Fixup SATA or PCIe nodes at runtime in DT blob (Pali)
- pci_mvebu: Add support for Kirkwood PCIe controllers (Pali)
- SPL: More verifications for kwbimage in SPL (Pali)
- mvebu: Remove comphy_update_map() (Pali)
- Minor misc stuff
This commit is contained in:
Tom Rini 2022-01-20 12:40:20 -05:00
commit 2d7a463e82
53 changed files with 396 additions and 274 deletions
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9
arch/arm/cpu/armv8/fsl-layerscape/fdt.c
View file

@ -161,14 +161,9 @@ void fsl_fdt_disable_usb(void *blob)
* controller is used, SYSCLK must meet the additional requirement
* of 100 MHz.
*/
if (get_board_sys_clk() != 100000000) {
off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
while (off != -FDT_ERR_NOTFOUND) {
if (get_board_sys_clk() != 100000000)
fdt_for_each_node_by_compatible(off, blob, -1, "snps,dwc3")
fdt_status_disabled(blob, off);
off = fdt_node_offset_by_compatible(blob, off,
"snps,dwc3");
}
}
}
#ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN

5
arch/arm/cpu/armv8/fsl-layerscape/icid.c
View file

@ -116,8 +116,7 @@ void fdt_fixup_fman_port_icid_by_compat(void *blob, int smmu_ph,
int noff, len, icid;
const u32 *prop;
noff = fdt_node_offset_by_compatible(blob, -1, compat);
while (noff > 0) {
fdt_for_each_node_by_compatible(noff, blob, -1, compat) {
prop = fdt_getprop(blob, noff, "cell-index", &len);
if (!prop) {
printf("WARNING missing cell-index for fman port\n");
@ -137,8 +136,6 @@ void fdt_fixup_fman_port_icid_by_compat(void *blob, int smmu_ph,
}
fdt_set_iommu_prop(blob, noff, smmu_ph, (u32 *)&icid, 1);
noff = fdt_node_offset_by_compatible(blob, noff, compat);
}
}

4
arch/arm/mach-kirkwood/cpu.c
View file

@ -54,11 +54,11 @@ unsigned int kw_winctrl_calcsize(unsigned int sizeval)
static struct mbus_win windows[] = {
/* Window 0: PCIE MEM address space */
{ KW_DEFADR_PCI_MEM, 1024 * 1024 * 256,
{ KW_DEFADR_PCI_MEM, KW_DEFADR_PCI_MEM_SIZE,
KWCPU_TARGET_PCIE, KWCPU_ATTR_PCIE_MEM },
/* Window 1: PCIE IO address space */
{ KW_DEFADR_PCI_IO, 1024 * 64,
{ KW_DEFADR_PCI_IO, KW_DEFADR_PCI_IO_SIZE,
KWCPU_TARGET_PCIE, KWCPU_ATTR_PCIE_IO },
/* Window 2: NAND Flash address space */

3
arch/arm/mach-kirkwood/include/mach/cpu.h
View file

@ -68,6 +68,9 @@ enum kwcpu_attrib {
#define KW_DEFADR_SPIF 0xE8000000
#define KW_DEFADR_BOOTROM 0xF8000000
#define KW_DEFADR_PCI_MEM_SIZE (1024 * 1024 * 256)
#define KW_DEFADR_PCI_IO_SIZE (1024 * 64)
struct mbus_win {
u32 base;
u32 size;

133
arch/arm/mach-mvebu/spl.c
View file

@ -46,7 +46,8 @@
#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0
#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0
#endif
#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0
#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && \
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0
#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0
#endif
#endif
@ -57,7 +58,8 @@
* set to 1. Otherwise U-Boot SPL would not be able to load U-Boot proper.
*/
#ifdef CONFIG_SPL_SATA
#if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || !defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1
#if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || \
!defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1
#error CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be set to 1
#endif
#endif
@ -73,23 +75,23 @@
/* Structure of the main header, version 1 (Armada 370/XP/375/38x/39x) */
struct kwbimage_main_hdr_v1 {
uint8_t blockid; /* 0x0 */
uint8_t flags; /* 0x1 */
uint16_t nandpagesize; /* 0x2-0x3 */
uint32_t blocksize; /* 0x4-0x7 */
uint8_t version; /* 0x8 */
uint8_t headersz_msb; /* 0x9 */
uint16_t headersz_lsb; /* 0xA-0xB */
uint32_t srcaddr; /* 0xC-0xF */
uint32_t destaddr; /* 0x10-0x13 */
uint32_t execaddr; /* 0x14-0x17 */
uint8_t options; /* 0x18 */
uint8_t nandblocksize; /* 0x19 */
uint8_t nandbadblklocation; /* 0x1A */
uint8_t reserved4; /* 0x1B */
uint16_t reserved5; /* 0x1C-0x1D */
uint8_t ext; /* 0x1E */
uint8_t checksum; /* 0x1F */
u8 blockid; /* 0x0 */
u8 flags; /* 0x1 */
u16 nandpagesize; /* 0x2-0x3 */
u32 blocksize; /* 0x4-0x7 */
u8 version; /* 0x8 */
u8 headersz_msb; /* 0x9 */
u16 headersz_lsb; /* 0xA-0xB */
u32 srcaddr; /* 0xC-0xF */
u32 destaddr; /* 0x10-0x13 */
u32 execaddr; /* 0x14-0x17 */
u8 options; /* 0x18 */
u8 nandblocksize; /* 0x19 */
u8 nandbadblklocation; /* 0x1A */
u8 reserved4; /* 0x1B */
u16 reserved5; /* 0x1C-0x1D */
u8 ext; /* 0x1E */
u8 checksum; /* 0x1F */
} __packed;
#ifdef CONFIG_SPL_MMC
@ -99,7 +101,35 @@ u32 spl_mmc_boot_mode(const u32 boot_device)
}
#endif
static u32 checksum32(void *start, u32 len)
{
u32 csum = 0;
u32 *p = start;
while (len > 0) {
csum += *p++;
len -= sizeof(u32);
};
return csum;
}
int spl_check_board_image(struct spl_image_info *spl_image,
const struct spl_boot_device *bootdev)
{
u32 csum = *(u32 *)(spl_image->load_addr + spl_image->size - 4);
if (checksum32((void *)spl_image->load_addr,
spl_image->size - 4) != csum) {
printf("ERROR: Invalid data checksum in kwbimage\n");
return -EINVAL;
}
return 0;
}
int spl_parse_board_header(struct spl_image_info *spl_image,
const struct spl_boot_device *bootdev,
const void *image_header, size_t size)
{
const struct kwbimage_main_hdr_v1 *mhdr = image_header;
@ -116,51 +146,74 @@ int spl_parse_board_header(struct spl_image_info *spl_image,
* (including SPL content) which is not included in U-Boot image_header.
*/
if (mhdr->version != 1 ||
((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr) ||
(
#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
mhdr->blockid != IBR_HDR_SPI_ID &&
#endif
#ifdef CONFIG_SPL_SATA
mhdr->blockid != IBR_HDR_SATA_ID &&
#endif
#ifdef CONFIG_SPL_MMC
mhdr->blockid != IBR_HDR_SDIO_ID &&
#endif
1
)) {
printf("ERROR: Not valid SPI/NAND/SATA/SDIO kwbimage v1\n");
((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr)) {
printf("ERROR: Invalid kwbimage v1\n");
return -EINVAL;
}
if (IS_ENABLED(CONFIG_SPL_SPI_FLASH_SUPPORT) &&
bootdev->boot_device == BOOT_DEVICE_SPI &&
mhdr->blockid != IBR_HDR_SPI_ID) {
printf("ERROR: Wrong blockid (0x%x) in SPI kwbimage\n",
mhdr->blockid);
return -EINVAL;
}
if (IS_ENABLED(CONFIG_SPL_SATA) &&
bootdev->boot_device == BOOT_DEVICE_SATA &&
mhdr->blockid != IBR_HDR_SATA_ID) {
printf("ERROR: Wrong blockid (0x%x) in SATA kwbimage\n",
mhdr->blockid);
return -EINVAL;
}
if (IS_ENABLED(CONFIG_SPL_MMC) &&
(bootdev->boot_device == BOOT_DEVICE_MMC1 ||
bootdev->boot_device == BOOT_DEVICE_MMC2 ||
bootdev->boot_device == BOOT_DEVICE_MMC2_2) &&
mhdr->blockid != IBR_HDR_SDIO_ID) {
printf("ERROR: Wrong blockid (0x%x) in SDIO kwbimage\n",
mhdr->blockid);
return -EINVAL;
}
spl_image->offset = mhdr->srcaddr;
#ifdef CONFIG_SPL_SATA
/*
* For SATA srcaddr is specified in number of sectors.
* The main header is must be stored at sector number 1.
* This expects that sector size is 512 bytes and recalculates
* data offset to bytes relative to the main header.
*/
if (mhdr->blockid == IBR_HDR_SATA_ID) {
if (IS_ENABLED(CONFIG_SPL_SATA) && mhdr->blockid == IBR_HDR_SATA_ID) {
if (spl_image->offset < 1) {
printf("ERROR: Wrong SATA srcaddr in kwbimage\n");
printf("ERROR: Wrong srcaddr (0x%08x) in SATA kwbimage\n",
spl_image->offset);
return -EINVAL;
}
spl_image->offset -= 1;
spl_image->offset *= 512;
}
#endif
#ifdef CONFIG_SPL_MMC
/*
* For SDIO (eMMC) srcaddr is specified in number of sectors.
* This expects that sector size is 512 bytes and recalculates
* data offset to bytes.
*/
if (mhdr->blockid == IBR_HDR_SDIO_ID)
if (IS_ENABLED(CONFIG_SPL_MMC) && mhdr->blockid == IBR_HDR_SDIO_ID)
spl_image->offset *= 512;
#endif
if (spl_image->offset % 4 != 0) {
printf("ERROR: Wrong srcaddr (0x%08x) in kwbimage\n",
spl_image->offset);
return -EINVAL;
}
if (mhdr->blocksize <= 4 || mhdr->blocksize % 4 != 0) {
printf("ERROR: Wrong blocksize (0x%08x) in kwbimage\n",
mhdr->blocksize);
return -EINVAL;
}
spl_image->size = mhdr->blocksize;
spl_image->entry_point = mhdr->execaddr;

2
arch/arm/mach-sunxi/spl_spi_sunxi.c
View file

@ -348,7 +348,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image,
ret = spl_load_simple_fit(spl_image, &load,
load_offset, header);
} else {
ret = spl_parse_image_header(spl_image, header);
ret = spl_parse_image_header(spl_image, bootdev, header);
if (ret)
return ret;

5
arch/arm/mach-tegra/gpu.c
View file

@ -46,11 +46,8 @@ int tegra_gpu_enable_node(void *blob, const char *compat)
if (!_configured)
return 0;
offset = fdt_node_offset_by_compatible(blob, -1, compat);
while (offset != -FDT_ERR_NOTFOUND) {
fdt_for_each_node_by_compatible(offset, blob, -1, compat)
fdt_status_okay(blob, offset);
offset = fdt_node_offset_by_compatible(blob, offset, compat);
}
return 0;
}

11
arch/mips/mach-octeon/octeon_fdt.c
View file

@ -424,12 +424,8 @@ void __octeon_fixup_fdt_mac_addr(void)
}
/* Assign 78XX addresses in the order they appear in the device tree. */
node = fdt_node_offset_by_compatible(working_fdt, -1, "cavium,octeon-7890-bgx-port");
while (node != -FDT_ERR_NOTFOUND) {
fdt_for_each_node_by_compatible(node, working_fdt, -1, "cavium,octeon-7890-bgx-port")
octeon_set_one_fdt_mac(node, &mac);
node = fdt_node_offset_by_compatible(working_fdt, node,
"cavium,octeon-7890-bgx-port");
}
}
#endif
@ -450,11 +446,8 @@ void __octeon_fixup_fdt_uart(void)
/* Device trees already have good values for fast simulator
* output, real boards need the correct value.
*/
node = fdt_node_offset_by_compatible(working_fdt, -1, "cavium,octeon-3860-uart");
while (node != -FDT_ERR_NOTFOUND) {
fdt_for_each_node_by_compatible(node, working_fdt, -1, "cavium,octeon-3860-uart")
fdt_setprop_inplace_cell(working_fdt, node, "clock-frequency", clk);
node = fdt_node_offset_by_compatible(working_fdt, node, "cavium,octeon-3860-uart");
}
}
/**

9
arch/powerpc/cpu/mpc85xx/liodn.c
View file

@ -268,15 +268,10 @@ static void fdt_fixup_pci_liodn_offsets(void *fdt, const char *compat,
* Count the number of pci nodes.
* It's needed later when the interleaved liodn offsets are generated.
*/
off = fdt_node_offset_by_compatible(fdt, -1, compat);
while (off != -FDT_ERR_NOTFOUND) {
fdt_for_each_node_by_compatible(off, fdt, -1, compat)
pci_cnt++;
off = fdt_node_offset_by_compatible(fdt, off, compat);
}
for (off = fdt_node_offset_by_compatible(fdt, -1, compat);
off != -FDT_ERR_NOTFOUND;
off = fdt_node_offset_by_compatible(fdt, off, compat)) {
fdt_for_each_node_by_compatible(off, fdt, -1, compat) {
base_liodn = fdt_getprop(fdt, off, "fsl,liodn", &rc);
if (!base_liodn) {
char path[64];

48
board/CZ.NIC/turris_mox/turris_mox.c
View file

@ -21,7 +21,6 @@
#include <linux/libfdt.h>
#include <linux/string.h>
#include <miiphy.h>
#include <mvebu/comphy.h>
#include <spi.h>
#include "mox_sp.h"
@ -49,6 +48,7 @@ int board_fix_fdt(void *blob)
enum fdt_status status_pcie, status_eth1;
u8 topology[MAX_MOX_MODULES];
int i, size, ret;
bool eth1_sgmii;
/*
* SPI driver is not loaded in driver model yet, but we have to find out
@ -69,6 +69,7 @@ int board_fix_fdt(void *blob)
status_pcie = FDT_STATUS_DISABLED;
status_eth1 = FDT_STATUS_DISABLED;
eth1_sgmii = false;
for (i = 0; i < MAX_MOX_MODULES; ++i) {
writel(0x0, ARMADA_37XX_SPI_DOUT);
@ -82,6 +83,10 @@ int board_fix_fdt(void *blob)
topology[i] &= 0xf;
if (topology[i] == MOX_MODULE_SFP &&
status_pcie == FDT_STATUS_DISABLED)
eth1_sgmii = true;
if (topology[i] == MOX_MODULE_SFP ||
topology[i] == MOX_MODULE_TOPAZ ||
topology[i] == MOX_MODULE_PERIDOT)
@ -98,6 +103,15 @@ int board_fix_fdt(void *blob)
printf("Cannot set status for eth1 in U-Boot's device tree: %s!\n",
fdt_strerror(ret));
if (eth1_sgmii) {
ret = fdt_path_offset(blob, "ethernet1");
if (ret >= 0)
ret = fdt_setprop_string(blob, ret, "phy-mode", "sgmii");
if (ret < 0)
printf("Cannot set phy-mode for eth1 to sgmii in U-Boot device tree: %s!\n",
fdt_strerror(ret));
}
if (size > 1 && (topology[1] == MOX_MODULE_PCI ||
topology[1] == MOX_MODULE_USB3 ||
topology[1] == MOX_MODULE_PASSPCI))
@ -199,38 +213,6 @@ static int mox_get_topology(const u8 **ptopology, int *psize, int *pis_sd)
return 0;
}
int comphy_update_map(struct comphy_map *serdes_map, int count)
{
int ret, i, size, sfpindex = -1, swindex = -1;
const u8 *topology;
ret = mox_get_topology(&topology, &size, NULL);
if (ret)
return ret;
for (i = 0; i < size; ++i) {
if (topology[i] == MOX_MODULE_SFP && sfpindex == -1)
sfpindex = i;
else if ((topology[i] == MOX_MODULE_TOPAZ ||
topology[i] == MOX_MODULE_PERIDOT) &&
swindex == -1)
swindex = i;
}
if (sfpindex >= 0 && swindex >= 0) {
if (sfpindex < swindex)
serdes_map[0].speed = COMPHY_SPEED_1_25G;
else
serdes_map[0].speed = COMPHY_SPEED_3_125G;
} else if (sfpindex >= 0) {
serdes_map[0].speed = COMPHY_SPEED_1_25G;
} else if (swindex >= 0) {
serdes_map[0].speed = COMPHY_SPEED_3_125G;
}
return 0;
}
#define SW_SMI_CMD_R(d, r) (0x9800 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
#define SW_SMI_CMD_W(d, r) (0x9400 | (((d) & 0x1f) << 5) | ((r) & 0x1f))

91
board/CZ.NIC/turris_omnia/turris_omnia.c
View file

@ -490,6 +490,86 @@ void spl_board_init(void)
}
}
#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) || IS_ENABLED(CONFIG_OF_BOARD_SETUP)
static void fixup_serdes_0_nodes(void *blob)
{
bool mode_sata;
int node;
/*
* Determine if SerDes 0 is configured to SATA mode.
* We do this instead of calling omnia_detect_sata() to avoid another
* call to the MCU. By this time the common PHYs are initialized (it is
* done in SPL), so we can read this common PHY register.
*/
mode_sata = (readl(MVEBU_REGISTER(0x183fc)) & GENMASK(3, 0)) == 2;
/*
* We're either adding status = "disabled" property, or changing
* status = "okay" to status = "disabled". In both cases we'll need more
* space. Increase the size a little.
*/
if (fdt_increase_size(blob, 32) < 0) {
printf("Cannot increase FDT size!\n");
return;
}
/* If mSATA card is not present, disable SATA DT node */
if (!mode_sata) {
fdt_for_each_node_by_compatible(node, blob, -1,
"marvell,armada-380-ahci") {
if (!fdtdec_get_is_enabled(blob, node))
continue;
if (fdt_status_disabled(blob, node) < 0)
printf("Cannot disable SATA DT node!\n");
else
debug("Disabled SATA DT node\n");
break;
}
return;
}
/* Otherwise disable PCIe port 0 DT node (MiniPCIe / mSATA port) */
fdt_for_each_node_by_compatible(node, blob, -1,
"marvell,armada-370-pcie") {
int port;
if (!fdtdec_get_is_enabled(blob, node))
continue;
fdt_for_each_subnode (port, blob, node) {
if (!fdtdec_get_is_enabled(blob, port))
continue;
if (fdtdec_get_int(blob, port, "marvell,pcie-port",
-1) != 0)
continue;
if (fdt_status_disabled(blob, port) < 0)
printf("Cannot disable PCIe port 0 DT node!\n");
else
debug("Disabled PCIe port 0 DT node\n");
return;
}
}
}
#endif
#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP)
int board_fix_fdt(void *blob)
{
fixup_serdes_0_nodes(blob);
return 0;
}
#endif
int board_init(void)
{
/* address of boot parameters */
@ -694,7 +774,7 @@ static bool fixup_mtd_partitions(void *blob, int offset, struct mtd_info *mtd)
return true;
}
int ft_board_setup(void *blob, struct bd_info *bd)
static void fixup_spi_nor_partitions(void *blob)
{
struct mtd_info *mtd;
int node;
@ -711,12 +791,19 @@ int ft_board_setup(void *blob, struct bd_info *bd)
goto fail;
put_mtd_device(mtd);
return 0;
return;
fail:
printf("Failed fixing SPI NOR partitions!\n");
if (!IS_ERR_OR_NULL(mtd))
put_mtd_device(mtd);
}
int ft_board_setup(void *blob, struct bd_info *bd)
{
fixup_spi_nor_partitions(blob);
fixup_serdes_0_nodes(blob);
return 0;
}
#endif

9
board/Marvell/octeon_ebb7304/board.c
View file

@ -103,9 +103,7 @@ static int get_lmac_fdt_node(const void *fdt, int search_node, int search_bgx, i
int parent;
/* Iterate through all bgx ports */
node = -1;
while ((node = fdt_node_offset_by_compatible((void *)fdt, node,
compat)) >= 0) {
fdt_for_each_node_by_compatible(node, (void *)fdt, -1, compat) {
/* Get the node and bgx from the physical address */
parent = fdt_parent_offset(fdt, node);
reg = fdt_getprop(fdt, parent, "reg", &len);
@ -146,9 +144,8 @@ static int get_mix_fdt_node(const void *fdt, int search_node, int search_index)
int node;
/* Iterate through all the mix fdt nodes */
node = -1;
while ((node = fdt_node_offset_by_compatible((void *)fdt, node,
"cavium,octeon-7890-mix")) >= 0) {
fdt_for_each_node_by_compatible(node, (void *)fdt, -1,
"cavium,octeon-7890-mix") {
int parent;
int len;
const char *name;

8
board/congatec/cgtqmx8/spl.c
View file

@ -6,6 +6,7 @@
#include <common.h>
#include <dm.h>
#include <fdt_support.h>
#include <init.h>
#include <log.h>
#include <spl.h>
@ -29,13 +30,10 @@ void spl_board_init(void)
continue;
}
offset = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "nxp,imx8-pd");
while (offset != -FDT_ERR_NOTFOUND) {
fdt_for_each_node_by_compatible(offset, gd->fdt_blob, -1,
"nxp,imx8-pd")
lists_bind_fdt(gd->dm_root, offset_to_ofnode(offset),
NULL, NULL, true);
offset = fdt_node_offset_by_compatible(gd->fdt_blob, offset,
"nxp,imx8-pd");
}
uclass_find_first_device(UCLASS_POWER_DOMAIN, &dev);

5
board/freescale/lx2160a/lx2160a.c
View file

@ -123,8 +123,7 @@ int board_fix_fdt(void *fdt)
if (IS_SVR_REV(get_svr(), 1, 0))
return 0;
off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie");
while (off != -FDT_ERR_NOTFOUND) {
fdt_for_each_node_by_compatible(off, fdt, -1, "fsl,lx2160a-pcie") {
fdt_setprop(fdt, off, "compatible", "fsl,ls-pcie",
strlen("fsl,ls-pcie") + 1);
@ -166,8 +165,6 @@ int board_fix_fdt(void *fdt)
}
fdt_setprop(fdt, off, "reg-names", reg_names, names_len);
off = fdt_node_offset_by_compatible(fdt, off,
"fsl,lx2160a-pcie");
}
return 0;

22
common/fdt_support.c
View file

@ -371,12 +371,9 @@ void do_fixup_by_compat(void *fdt, const char *compat,
debug(" %.2x", *(u8*)(val+i));
debug("\n");
#endif
off = fdt_node_offset_by_compatible(fdt, -1, compat);
while (off != -FDT_ERR_NOTFOUND) {
fdt_for_each_node_by_compatible(off, fdt, -1, compat)
if (create || (fdt_get_property(fdt, off, prop, NULL) != NULL))
fdt_setprop(fdt, off, prop, val, len);
off = fdt_node_offset_by_compatible(fdt, off, compat);
}
}
void do_fixup_by_compat_u32(void *fdt, const char *compat,
@ -996,10 +993,9 @@ void fdt_fixup_mtdparts(void *blob, const struct node_info *node_info,
for (i = 0; i < node_info_size; i++) {
idx = 0;
noff = -1;
while ((noff = fdt_node_offset_by_compatible(blob, noff,
node_info[i].compat)) >= 0) {
fdt_for_each_node_by_compatible(noff, blob, -1,
node_info[i].compat) {
const char *prop;
prop = fdt_getprop(blob, noff, "status", NULL);
@ -1473,14 +1469,12 @@ out:
int fdt_node_offset_by_compat_reg(void *blob, const char *compat,
phys_addr_t compat_off)
{
int len, off = fdt_node_offset_by_compatible(blob, -1, compat);
while (off != -FDT_ERR_NOTFOUND) {
int len, off;
fdt_for_each_node_by_compatible(off, blob, -1, compat) {
const fdt32_t *reg = fdt_getprop(blob, off, "reg", &len);
if (reg) {
if (compat_off == fdt_translate_address(blob, off, reg))
return off;
}
off = fdt_node_offset_by_compatible(blob, off, compat);
if (reg && compat_off == fdt_translate_address(blob, off, reg))
return off;
}
return -FDT_ERR_NOTFOUND;

13
common/spl/spl.c
View file

@ -312,6 +312,7 @@ static int spl_load_fit_image(struct spl_image_info *spl_image,
#endif
__weak int spl_parse_board_header(struct spl_image_info *spl_image,
const struct spl_boot_device *bootdev,
const void *image_header, size_t size)
{
return -EINVAL;
@ -326,6 +327,7 @@ __weak int spl_parse_legacy_header(struct spl_image_info *spl_image,
}
int spl_parse_image_header(struct spl_image_info *spl_image,
const struct spl_boot_device *bootdev,
const struct image_header *header)
{
#if CONFIG_IS_ENABLED(LOAD_FIT_FULL)
@ -369,7 +371,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
}
#endif
if (!spl_parse_board_header(spl_image, (const void *)header, sizeof(*header)))
if (!spl_parse_board_header(spl_image, bootdev, (const void *)header, sizeof(*header)))
return 0;
#ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT
@ -587,6 +589,12 @@ static struct spl_image_loader *spl_ll_find_loader(uint boot_device)
return NULL;
}
__weak int spl_check_board_image(struct spl_image_info *spl_image,
const struct spl_boot_device *bootdev)
{
return 0;
}
static int spl_load_image(struct spl_image_info *spl_image,
struct spl_image_loader *loader)
{
@ -608,6 +616,9 @@ static int spl_load_image(struct spl_image_info *spl_image,
}
}
#endif
if (!ret)
ret = spl_check_board_image(spl_image, &bootdev);
return ret;
}

9
common/spl/spl_ext.c
View file

@ -10,6 +10,7 @@
#include <image.h>
int spl_load_image_ext(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition,
const char *filename)
{
@ -46,7 +47,7 @@ int spl_load_image_ext(struct spl_image_info *spl_image,
goto end;
}
err = spl_parse_image_header(spl_image, header);
err = spl_parse_image_header(spl_image, bootdev, header);
if (err < 0) {
puts("spl: ext: failed to parse image header\n");
goto end;
@ -66,6 +67,7 @@ end:
#if CONFIG_IS_ENABLED(OS_BOOT)
int spl_load_image_ext_os(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition)
{
int err;
@ -103,7 +105,7 @@ int spl_load_image_ext_os(struct spl_image_info *spl_image,
}
file = env_get("falcon_image_file");
if (file) {
err = spl_load_image_ext(spl_image, block_dev,
err = spl_load_image_ext(spl_image, bootdev, block_dev,
partition, file);
if (err != 0) {
puts("spl: falling back to default\n");
@ -134,11 +136,12 @@ defaults:
return -1;
}
return spl_load_image_ext(spl_image, block_dev, partition,
return spl_load_image_ext(spl_image, bootdev, block_dev, partition,
CONFIG_SPL_FS_LOAD_KERNEL_NAME);
}
#else
int spl_load_image_ext_os(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition)
{
return -ENOSYS;

11
common/spl/spl_fat.c
View file

@ -55,6 +55,7 @@ static ulong spl_fit_read(struct spl_load_info *load, ulong file_offset,
}
int spl_load_image_fat(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition,
const char *filename)
{
@ -76,7 +77,7 @@ int spl_load_image_fat(struct spl_image_info *spl_image,
err = file_fat_read(filename, (void *)CONFIG_SYS_LOAD_ADDR, 0);
if (err <= 0)
goto end;
err = spl_parse_image_header(spl_image,
err = spl_parse_image_header(spl_image, bootdev,
(struct image_header *)CONFIG_SYS_LOAD_ADDR);
if (err == -EAGAIN)
return err;
@ -94,7 +95,7 @@ int spl_load_image_fat(struct spl_image_info *spl_image,
return spl_load_simple_fit(spl_image, &load, 0, header);
} else {
err = spl_parse_image_header(spl_image, header);
err = spl_parse_image_header(spl_image, bootdev, header);
if (err)
goto end;
@ -114,6 +115,7 @@ end:
#if CONFIG_IS_ENABLED(OS_BOOT)
int spl_load_image_fat_os(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition)
{
int err;
@ -134,7 +136,7 @@ int spl_load_image_fat_os(struct spl_image_info *spl_image,
}
file = env_get("falcon_image_file");
if (file) {
err = spl_load_image_fat(spl_image, block_dev,
err = spl_load_image_fat(spl_image, bootdev, block_dev,
partition, file);
if (err != 0) {
puts("spl: falling back to default\n");
@ -160,11 +162,12 @@ defaults:
return -1;
}
return spl_load_image_fat(spl_image, block_dev, partition,
return spl_load_image_fat(spl_image, bootdev, block_dev, partition,
CONFIG_SPL_FS_LOAD_KERNEL_NAME);
}
#else
int spl_load_image_fat_os(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition)
{
return -ENOSYS;

3
common/spl/spl_legacy.c
View file

@ -76,6 +76,7 @@ static inline int spl_image_get_comp(const struct image_header *hdr)
}
int spl_load_legacy_img(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct spl_load_info *load, ulong header)
{
__maybe_unused SizeT lzma_len;
@ -87,7 +88,7 @@ int spl_load_legacy_img(struct spl_image_info *spl_image,
/* Read header into local struct */
load->read(load, header, sizeof(hdr), &hdr);
ret = spl_parse_image_header(spl_image, &hdr);
ret = spl_parse_image_header(spl_image, bootdev, &hdr);
if (ret)
return ret;

43
common/spl/spl_mmc.c
View file

@ -17,7 +17,9 @@
#include <mmc.h>
#include <image.h>
static int mmc_load_legacy(struct spl_image_info *spl_image, struct mmc *mmc,
static int mmc_load_legacy(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct mmc *mmc,
ulong sector, struct image_header *header)
{
u32 image_offset_sectors;
@ -26,7 +28,7 @@ static int mmc_load_legacy(struct spl_image_info *spl_image, struct mmc *mmc,
u32 image_offset;
int ret;
ret = spl_parse_image_header(spl_image, header);
ret = spl_parse_image_header(spl_image, bootdev, header);
if (ret)
return ret;
@ -77,6 +79,7 @@ static __maybe_unused unsigned long spl_mmc_raw_uboot_offset(int part)
static __maybe_unused
int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct mmc *mmc, unsigned long sector)
{
unsigned long count;
@ -116,7 +119,7 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
ret = spl_load_imx_container(spl_image, &load, sector);
} else {
ret = mmc_load_legacy(spl_image, mmc, sector, header);
ret = mmc_load_legacy(spl_image, bootdev, mmc, sector, header);
}
end:
@ -181,6 +184,7 @@ static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct mmc *mmc, int partition,
unsigned long sector)
{
@ -211,15 +215,16 @@ static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,
}
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
return mmc_load_image_raw_sector(spl_image, mmc, info.start + sector);
return mmc_load_image_raw_sector(spl_image, bootdev, mmc, info.start + sector);
#else
return mmc_load_image_raw_sector(spl_image, mmc, info.start);
return mmc_load_image_raw_sector(spl_image, bootdev, mmc, info.start);
#endif
}
#endif
#if CONFIG_IS_ENABLED(OS_BOOT)
static int mmc_load_image_raw_os(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct mmc *mmc)
{
int ret;
@ -239,7 +244,7 @@ static int mmc_load_image_raw_os(struct spl_image_info *spl_image,
}
#endif /* CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR */
ret = mmc_load_image_raw_sector(spl_image, mmc,
ret = mmc_load_image_raw_sector(spl_image, bootdev, mmc,
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR);
if (ret)
return ret;
@ -257,6 +262,7 @@ int spl_start_uboot(void)
return 1;
}
static int mmc_load_image_raw_os(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct mmc *mmc)
{
return -ENOSYS;
@ -264,20 +270,22 @@ static int mmc_load_image_raw_os(struct spl_image_info *spl_image,
#endif
#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image, struct mmc *mmc,
static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct mmc *mmc,
const char *filename)
{
int err = -ENOSYS;
#ifdef CONFIG_SPL_FS_FAT
if (!spl_start_uboot()) {
err = spl_load_image_fat_os(spl_image, mmc_get_blk_desc(mmc),
err = spl_load_image_fat_os(spl_image, bootdev, mmc_get_blk_desc(mmc),
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION);
if (!err)
return err;
}
#ifdef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
err = spl_load_image_fat(spl_image, mmc_get_blk_desc(mmc),
err = spl_load_image_fat(spl_image, bootdev, mmc_get_blk_desc(mmc),
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION,
filename);
if (!err)
@ -286,13 +294,13 @@ static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image, struct mmc *mmc,
#endif
#ifdef CONFIG_SPL_FS_EXT4
if (!spl_start_uboot()) {
err = spl_load_image_ext_os(spl_image, mmc_get_blk_desc(mmc),
err = spl_load_image_ext_os(spl_image, bootdev, mmc_get_blk_desc(mmc),
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION);
if (!err)
return err;
}
#ifdef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
err = spl_load_image_ext(spl_image, mmc_get_blk_desc(mmc),
err = spl_load_image_ext(spl_image, bootdev, mmc_get_blk_desc(mmc),
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION,
filename);
if (!err)
@ -307,7 +315,9 @@ static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image, struct mmc *mmc,
return err;
}
#else
static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image, struct mmc *mmc,
static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct mmc *mmc,
const char *filename)
{
return -ENOSYS;
@ -410,7 +420,7 @@ int spl_mmc_load(struct spl_image_info *spl_image,
debug("spl: mmc boot mode: raw\n");
if (!spl_start_uboot()) {
err = mmc_load_image_raw_os(spl_image, mmc);
err = mmc_load_image_raw_os(spl_image, bootdev, mmc);
if (!err)
return err;
}
@ -418,13 +428,14 @@ int spl_mmc_load(struct spl_image_info *spl_image,
raw_sect = spl_mmc_get_uboot_raw_sector(mmc, raw_sect);
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
err = mmc_load_image_raw_partition(spl_image, mmc, raw_part,
err = mmc_load_image_raw_partition(spl_image, bootdev,
mmc, raw_part,
raw_sect);
if (!err)
return err;
#endif
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
err = mmc_load_image_raw_sector(spl_image, mmc,
err = mmc_load_image_raw_sector(spl_image, bootdev, mmc,
raw_sect + spl_mmc_raw_uboot_offset(part));
if (!err)
return err;
@ -433,7 +444,7 @@ int spl_mmc_load(struct spl_image_info *spl_image,
case MMCSD_MODE_FS:
debug("spl: mmc boot mode: fs\n");
err = spl_mmc_do_fs_boot(spl_image, mmc, filename);
err = spl_mmc_do_fs_boot(spl_image, bootdev, mmc, filename);
if (!err)
return err;

13
common/spl/spl_nand.c
View file

@ -65,6 +65,7 @@ struct mtd_info * __weak nand_get_mtd(void)
}
static int spl_nand_load_element(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
int offset, struct image_header *header)
{
struct mtd_info *mtd = nand_get_mtd();
@ -96,7 +97,7 @@ static int spl_nand_load_element(struct spl_image_info *spl_image,
load.read = spl_nand_fit_read;
return spl_load_imx_container(spl_image, &load, offset / bl_len);
} else {
err = spl_parse_image_header(spl_image, header);
err = spl_parse_image_header(spl_image, bootdev, header);
if (err)
return err;
return nand_spl_load_image(offset, spl_image->size,
@ -145,7 +146,7 @@ static int spl_nand_load_image(struct spl_image_info *spl_image,
/* load linux */
nand_spl_load_image(CONFIG_SYS_NAND_SPL_KERNEL_OFFS,
sizeof(*header), (void *)header);
err = spl_parse_image_header(spl_image, header);
err = spl_parse_image_header(spl_image, bootdev, header);
if (err)
return err;
if (header->ih_os == IH_OS_LINUX) {
@ -165,18 +166,18 @@ static int spl_nand_load_image(struct spl_image_info *spl_image,
}
#endif
#ifdef CONFIG_NAND_ENV_DST
spl_nand_load_element(spl_image, CONFIG_ENV_OFFSET, header);
spl_nand_load_element(spl_image, bootdev, CONFIG_ENV_OFFSET, header);
#ifdef CONFIG_ENV_OFFSET_REDUND
spl_nand_load_element(spl_image, CONFIG_ENV_OFFSET_REDUND, header);
spl_nand_load_element(spl_image, bootdev, CONFIG_ENV_OFFSET_REDUND, header);
#endif
#endif
/* Load u-boot */
err = spl_nand_load_element(spl_image, spl_nand_get_uboot_raw_page(),
err = spl_nand_load_element(spl_image, bootdev, spl_nand_get_uboot_raw_page(),
header);
#ifdef CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND
#if CONFIG_SYS_NAND_U_BOOT_OFFS != CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND
if (err)
err = spl_nand_load_element(spl_image,
err = spl_nand_load_element(spl_image, bootdev,
CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND,
header);
#endif

2
common/spl/spl_net.c
View file

@ -58,7 +58,7 @@ static int spl_net_load_image(struct spl_image_info *spl_image,
} else {
debug("Legacy image\n");
rv = spl_parse_image_header(spl_image, header);
rv = spl_parse_image_header(spl_image, bootdev, header);
if (rv)
return rv;

4
common/spl/spl_nor.c
View file

@ -66,7 +66,7 @@ static int spl_nor_load_image(struct spl_image_info *spl_image,
/* happy - was a Linux */
int ret;
ret = spl_parse_image_header(spl_image, header);
ret = spl_parse_image_header(spl_image, bootdev, header);
if (ret)
return ret;
@ -113,7 +113,7 @@ static int spl_nor_load_image(struct spl_image_info *spl_image,
if (IS_ENABLED(CONFIG_SPL_LEGACY_IMAGE_SUPPORT)) {
load.bl_len = 1;
load.read = spl_nor_load_read;
return spl_load_legacy_img(spl_image, &load,
return spl_load_legacy_img(spl_image, bootdev, &load,
spl_nor_get_uboot_base());
}

2
common/spl/spl_onenand.c
View file

@ -27,7 +27,7 @@ static int spl_onenand_load_image(struct spl_image_info *spl_image,
/* Load u-boot */
onenand_spl_load_image(CONFIG_SYS_ONENAND_U_BOOT_OFFS,
CONFIG_SYS_ONENAND_PAGE_SIZE, (void *)header);
ret = spl_parse_image_header(spl_image, header);
ret = spl_parse_image_header(spl_image, bootdev, header);
if (ret)
return ret;
onenand_spl_load_image(CONFIG_SYS_ONENAND_U_BOOT_OFFS,

2
common/spl/spl_ram.c
View file

@ -70,7 +70,7 @@ static int spl_ram_load_image(struct spl_image_info *spl_image,
}
header = (struct image_header *)map_sysmem(u_boot_pos, 0);
spl_parse_image_header(spl_image, header);
spl_parse_image_header(spl_image, bootdev, header);
}
return 0;

9
common/spl/spl_sata.c
View file

@ -31,6 +31,7 @@
#endif
static int spl_sata_load_image_raw(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *stor_dev, unsigned long sector)
{
struct image_header *header;
@ -45,7 +46,7 @@ static int spl_sata_load_image_raw(struct spl_image_info *spl_image,
if (count == 0)
return -EIO;
ret = spl_parse_image_header(spl_image, header);
ret = spl_parse_image_header(spl_image, bootdev, header);
if (ret)
return ret;
@ -90,18 +91,18 @@ static int spl_sata_load_image(struct spl_image_info *spl_image,
#if CONFIG_IS_ENABLED(OS_BOOT)
if (spl_start_uboot() ||
spl_load_image_fat_os(spl_image, stor_dev,
spl_load_image_fat_os(spl_image, bootdev, stor_dev,
CONFIG_SYS_SATA_FAT_BOOT_PARTITION))
#endif
{
err = -ENOSYS;
if (IS_ENABLED(CONFIG_SPL_FS_FAT)) {
err = spl_load_image_fat(spl_image, stor_dev,
err = spl_load_image_fat(spl_image, bootdev, stor_dev,
CONFIG_SYS_SATA_FAT_BOOT_PARTITION,
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME);
} else if (IS_ENABLED(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR)) {
err = spl_sata_load_image_raw(spl_image, stor_dev,
err = spl_sata_load_image_raw(spl_image, bootdev, stor_dev,
CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR);
}
}

2
common/spl/spl_sdp.c
View file

@ -39,7 +39,7 @@ static int spl_sdp_load_image(struct spl_image_info *spl_image,
* or it loads a FIT image and returns it to be handled by the SPL
* code.
*/
ret = spl_sdp_handle(controller_index, spl_image);
ret = spl_sdp_handle(controller_index, spl_image, bootdev);
debug("SDP ended\n");
usb_gadget_release(controller_index);

9
common/spl/spl_spi.c
View file

@ -24,6 +24,7 @@
* the kernel and then device tree.
*/
static int spi_load_image_os(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct spi_flash *flash,
struct image_header *header)
{
@ -36,7 +37,7 @@ static int spi_load_image_os(struct spl_image_info *spl_image,
if (image_get_magic(header) != IH_MAGIC)
return -1;
err = spl_parse_image_header(spl_image, header);
err = spl_parse_image_header(spl_image, bootdev, header);
if (err)
return err;
@ -108,7 +109,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image,
}
#if CONFIG_IS_ENABLED(OS_BOOT)
if (spl_start_uboot() || spi_load_image_os(spl_image, flash, header))
if (spl_start_uboot() || spi_load_image_os(spl_image, bootdev, flash, header))
#endif
{
/* Load u-boot, mkimage header is 64 bytes. */
@ -127,7 +128,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image,
(void *)CONFIG_SYS_LOAD_ADDR);
if (err)
return err;
err = spl_parse_image_header(spl_image,
err = spl_parse_image_header(spl_image, bootdev,
(struct image_header *)CONFIG_SYS_LOAD_ADDR);
} else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
image_get_magic(header) == FDT_MAGIC) {
@ -154,7 +155,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image,
err = spl_load_imx_container(spl_image, &load,
payload_offs);
} else {
err = spl_parse_image_header(spl_image, header);
err = spl_parse_image_header(spl_image, bootdev, header);
if (err)
return err;
err = spi_flash_read(flash, payload_offs + spl_image->offset,

4
common/spl/spl_ubi.c
View file

@ -55,7 +55,7 @@ int spl_ubi_load_image(struct spl_image_info *spl_image,
ret = ubispl_load_volumes(&info, volumes, 2);
if (!ret) {
header = (struct image_header *)volumes[0].load_addr;
spl_parse_image_header(spl_image, header);
spl_parse_image_header(spl_image, bootdev, header);
puts("Linux loaded.\n");
goto out;
}
@ -75,7 +75,7 @@ int spl_ubi_load_image(struct spl_image_info *spl_image,
ret = ubispl_load_volumes(&info, volumes, 1);
if (!ret)
spl_parse_image_header(spl_image, header);
spl_parse_image_header(spl_image, bootdev, header);
out:
#ifdef CONFIG_SPL_NAND_SUPPORT
if (bootdev->boot_device == BOOT_DEVICE_NAND)

4
common/spl/spl_usb.c
View file

@ -49,10 +49,10 @@ int spl_usb_load(struct spl_image_info *spl_image,
#if CONFIG_IS_ENABLED(OS_BOOT)
if (spl_start_uboot() ||
spl_load_image_fat_os(spl_image, stor_dev, partition))
spl_load_image_fat_os(spl_image, bootdev, stor_dev, partition))
#endif
{
err = spl_load_image_fat(spl_image, stor_dev, partition, filename);
err = spl_load_image_fat(spl_image, bootdev, stor_dev, partition, filename);
}
if (err) {

4
common/spl/spl_xip.c
View file

@ -24,7 +24,7 @@ static int spl_xip(struct spl_image_info *spl_image,
return 0;
}
#endif
return(spl_parse_image_header(spl_image, (const struct image_header *)
CONFIG_SYS_UBOOT_BASE));
return(spl_parse_image_header(spl_image, bootdev,
(const struct image_header *)CONFIG_SYS_UBOOT_BASE));
}
SPL_LOAD_IMAGE_METHOD("XIP", 0, BOOT_DEVICE_XIP, spl_xip);

4
common/spl/spl_ymodem.c
View file

@ -112,7 +112,7 @@ int spl_ymodem_load_image(struct spl_image_info *spl_image,
addr += res;
}
ret = spl_parse_image_header(spl_image, ih);
ret = spl_parse_image_header(spl_image, bootdev, ih);
if (ret)
return ret;
} else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
@ -135,7 +135,7 @@ int spl_ymodem_load_image(struct spl_image_info *spl_image,
size += res;
} else {
ih = (struct image_header *)buf;
ret = spl_parse_image_header(spl_image, ih);
ret = spl_parse_image_header(spl_image, bootdev, ih);
if (ret)
goto end_stream;
#ifdef CONFIG_SPL_GZIP

1
configs/mvebu_db-88f3720_defconfig
View file

@ -64,7 +64,6 @@ CONFIG_PHY=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_37XX=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_MVEBU_A3700_UART=y
CONFIG_MVEBU_A3700_SPI=y
CONFIG_USB=y

1
configs/mvebu_espressobin-88f3720_defconfig
View file

@ -81,7 +81,6 @@ CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_37XX=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_MVEBU_A3700_UART=y
CONFIG_MVEBU_A3700_SPI=y
CONFIG_USB=y

1
configs/turris_mox_defconfig
View file

@ -91,7 +91,6 @@ CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_MVEBU_A3700_UART=y
CONFIG_MVEBU_A3700_SPI=y
CONFIG_USB=y

1
configs/turris_omnia_defconfig
View file

@ -23,6 +23,7 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_OF_BOARD_FIXUP=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_FIT=y

1
configs/uDPU_defconfig
View file

@ -80,7 +80,6 @@ CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_37XX=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_MVEBU_A3700_UART=y
CONFIG_MVEBU_A3700_SPI=y
CONFIG_SYSINFO=y

6
drivers/misc/fsl_portals.c
View file

@ -208,8 +208,7 @@ void fdt_fixup_qportals(void *blob)
maj, min, ip_cfg) + 1;
compat_len += sprintf(compat + compat_len, "fsl,qman-portal") + 1;
off = fdt_node_offset_by_compatible(blob, -1, "fsl,qman-portal");
while (off != -FDT_ERR_NOTFOUND) {
fdt_for_each_node_by_compatible(off, blob, -1, "fsl,qman-portal") {
#if defined(CONFIG_PPC) || defined(CONFIG_ARCH_LS1043A) || \
defined(CONFIG_ARCH_LS1046A)
#ifdef CONFIG_FSL_CORENET
@ -295,9 +294,6 @@ err:
fdt_strerror(err));
return;
}
off = fdt_node_offset_by_compatible(blob, off,
"fsl,qman-portal");
}
}

3
drivers/net/fm/fdt.c
View file

@ -115,8 +115,7 @@ void fdt_fixup_fman_firmware(void *blob)
}
/* Find all other Fman nodes and point them to the firmware node. */
while ((fmnode = fdt_node_offset_by_compatible(blob, fmnode,
"fsl,fman")) > 0) {
fdt_for_each_node_by_compatible(fmnode, blob, fmnode, "fsl,fman") {
rc = fdt_setprop_cell(blob, fmnode, "fsl,firmware-phandle",
phandle);
if (rc < 0) {

6
drivers/pci/Kconfig
View file

@ -262,13 +262,13 @@ config PCIE_IPROC
Say Y here if you want to enable Broadcom iProc PCIe controller,
config PCI_MVEBU
bool "Enable Armada XP/38x PCIe driver"
depends on ARCH_MVEBU
bool "Enable Kirkwood / Armada 370/XP/375/38x PCIe driver"
depends on (ARCH_KIRKWOOD || ARCH_MVEBU)
select MISC
select DM_RESET
help
Say Y here if you want to enable PCIe controller support on
Armada XP/38x SoCs.
Kirkwood and Armada 370/XP/375/38x SoCs.
config PCIE_DW_COMMON
bool

16
drivers/pci/pci_mvebu.c
View file

@ -498,6 +498,13 @@ static int mvebu_pcie_probe(struct udevice *dev)
mvebu_pcie_set_local_bus_nr(pcie, 0);
mvebu_pcie_set_local_dev_nr(pcie, 1);
/*
* Kirkwood arch code already maps mbus windows for PCIe IO and MEM.
* So skip calling mvebu_mbus_add_window_by_id() function as it would
* fail on error "conflicts with another window" which means conflict
* with existing PCIe window mappings.
*/
#ifndef CONFIG_ARCH_KIRKWOOD
if (resource_size(&pcie->mem) &&
mvebu_mbus_add_window_by_id(pcie->mem_target, pcie->mem_attr,
(phys_addr_t)pcie->mem.start,
@ -519,6 +526,7 @@ static int mvebu_pcie_probe(struct udevice *dev)
pcie->io.start = 0;
pcie->io.end = -1;
}
#endif
/* Setup windows and configure host bridge */
mvebu_pcie_setup_wins(pcie);
@ -725,10 +733,17 @@ static int mvebu_pcie_bind(struct udevice *parent)
}
ports_count = 0;
#ifdef CONFIG_ARCH_KIRKWOOD
mem.start = KW_DEFADR_PCI_MEM;
mem.end = KW_DEFADR_PCI_MEM + KW_DEFADR_PCI_MEM_SIZE - 1;
io.start = KW_DEFADR_PCI_IO;
io.end = KW_DEFADR_PCI_IO + KW_DEFADR_PCI_IO_SIZE - 1;
#else
mem.start = MBUS_PCI_MEM_BASE;
mem.end = MBUS_PCI_MEM_BASE + MBUS_PCI_MEM_SIZE - 1;
io.start = MBUS_PCI_IO_BASE;
io.end = MBUS_PCI_IO_BASE + MBUS_PCI_IO_SIZE - 1;
#endif
/* First phase: Fill mvebu_pcie struct for each port */
ofnode_for_each_subnode(subnode, dev_ofnode(parent)) {
@ -809,6 +824,7 @@ static int mvebu_pcie_bind(struct udevice *parent)
static const struct udevice_id mvebu_pcie_ids[] = {
{ .compatible = "marvell,armada-xp-pcie" },
{ .compatible = "marvell,armada-370-pcie" },
{ .compatible = "marvell,kirkwood-pcie" },
{ }
};

12
drivers/pci/pcie_layerscape_fixup_common.c
View file

@ -48,8 +48,7 @@ static int lx2_board_fix_fdt(void *fdt)
const fdt32_t *prop;
u32 ob_wins, ib_wins;
off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie");
while (off != -FDT_ERR_NOTFOUND) {
fdt_for_each_node_by_compatible(off, fdt, -1, "fsl,lx2160a-pcie") {
fdt_setprop(fdt, off, "compatible", "fsl,ls2088a-pcie",
strlen("fsl,ls2088a-pcie") + 1);
@ -89,14 +88,10 @@ static int lx2_board_fix_fdt(void *fdt)
fdt_setprop(fdt, off, "reg-names", reg_names, names_len);
fdt_delprop(fdt, off, "apio-wins");
fdt_delprop(fdt, off, "ppio-wins");
off = fdt_node_offset_by_compatible(fdt, off,
"fsl,lx2160a-pcie");
}
/* Fixup PCIe EP nodes */
off = -1;
off = fdt_node_offset_by_compatible(fdt, off, "fsl,lx2160a-pcie-ep");
while (off != -FDT_ERR_NOTFOUND) {
fdt_for_each_node_by_compatible(off, fdt, -1, "fsl,lx2160a-pcie-ep") {
fdt_setprop_string(fdt, off, "compatible",
"fsl,lx2160ar2-pcie-ep");
prop = fdt_getprop(fdt, off, "apio-wins", NULL);
@ -113,9 +108,6 @@ static int lx2_board_fix_fdt(void *fdt)
fdt_setprop_u32(fdt, off, "num-ib-windows", ib_wins);
fdt_setprop_u32(fdt, off, "num-ob-windows", ob_wins);
fdt_delprop(fdt, off, "apio-wins");
off = fdt_node_offset_by_compatible(fdt, off,
"fsl,lx2160a-pcie-ep");
}
return 0;

12
drivers/phy/marvell/comphy_a3700.c
View file

@ -4,7 +4,7 @@
*/
#include <common.h>
#include <fdtdec.h>
#include <fdt_support.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
@ -985,12 +985,12 @@ void comphy_dedicated_phys_init(void)
static int find_available_node_by_compatible(int offset, const char *compatible)
{
do {
offset = fdt_node_offset_by_compatible(gd->fdt_blob, offset,
compatible);
} while (offset > 0 && !fdtdec_get_is_enabled(gd->fdt_blob, offset));
fdt_for_each_node_by_compatible(offset, gd->fdt_blob, offset,
compatible)
if (fdtdec_get_is_enabled(gd->fdt_blob, offset))
return offset;
return offset;
return -1;
}
static bool comphy_a3700_find_lane(const int nodes[3], int node,

9
drivers/phy/marvell/comphy_core.c
View file

@ -79,11 +79,6 @@ int comphy_rx_training(struct udevice *dev, u32 lane)
return 0;
}
__weak int comphy_update_map(struct comphy_map *serdes_map, int count)
{
return 0;
}
static int comphy_probe(struct udevice *dev)
{
int node = dev_of_offset(dev);
@ -126,10 +121,6 @@ static int comphy_probe(struct udevice *dev)
if (res < 0)
return res;
res = comphy_update_map(chip_cfg->comphy_map_data, chip_cfg->comphy_lanes_count);
if (res < 0)
return res;
/* Save CP index for MultiCP devices (A8K) */
chip_cfg->cp_index = current_idx++;
/* PHY power UP sequence */

9
drivers/phy/marvell/comphy_core.h
View file

@ -8,6 +8,7 @@
#include <fdtdec.h>
#include <mvebu/comphy.h>
#include <dt-bindings/comphy/comphy_data.h>
#if defined(DEBUG)
#define debug_enter() printf("----> Enter %s\n", __func__);
@ -20,6 +21,14 @@
#define MAX_LANE_OPTIONS 10
#define MAX_UTMI_PHY_COUNT 6
struct comphy_map {
u32 type;
u32 speed;
u32 invert;
bool clk_src;
bool end_point;
};
struct comphy_mux_options {
u32 type;
u32 mux_value;

34
drivers/ram/octeon/octeon3_lmc.c
View file

@ -2050,7 +2050,7 @@ static int compute_vref_val(struct ddr_priv *priv, int if_num, int rankx,
lmc_control.u64 = lmc_rd(priv, CVMX_LMCX_CONTROL(if_num));
/*
* New computed vref = existing computed vref – X
* New computed vref = existing computed vref - X
*
* The value of X is depending on different conditions.
* Both #122 and #139 are 2Rx4 RDIMM, while #124 is stacked
@ -2058,7 +2058,7 @@ static int compute_vref_val(struct ddr_priv *priv, int if_num, int rankx,
*
* 1. Stacked Die: 2Rx4
* 1-slot: offset = 7. i, e New computed vref = existing
* computed vref – 7
* computed vref - 7
* 2-slot: offset = 6
*
* 2. Regular: 2Rx4
@ -9941,11 +9941,11 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p,
* NOTE: this step done in the calling routine(s)...
* 3) Setup GENERAL_PURPOSE[0-2] registers with the data pattern
* of choice.
* a. GENERAL_PURPOSE0[DATA<63:0>] – sets the initial lower
* a. GENERAL_PURPOSE0[DATA<63:0>] - sets the initial lower
* (rising edge) 64 bits of data.
* b. GENERAL_PURPOSE1[DATA<63:0>] – sets the initial upper
* b. GENERAL_PURPOSE1[DATA<63:0>] - sets the initial upper
* (falling edge) 64 bits of data.
* c. GENERAL_PURPOSE2[DATA<15:0>] – sets the initial lower
* c. GENERAL_PURPOSE2[DATA<15:0>] - sets the initial lower
* (rising edge <7:0>) and upper (falling edge <15:8>) ECC data.
*/
@ -9980,8 +9980,8 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p,
/*
* 7) Set PHY_CTL[PHY_RESET] = 1 (LMC automatically clears this as
* it’s a one-shot operation). This is to get into the habit of
* resetting PHY’s SILO to the original 0 location.
* it's a one-shot operation). This is to get into the habit of
* resetting PHY's SILO to the original 0 location.
*/
phy_ctl.u64 = lmc_rd(priv, CVMX_LMCX_PHY_CTL(if_num));
phy_ctl.s.phy_reset = 1;
@ -10013,9 +10013,9 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p,
* a. COL, ROW, BA, BG, PRANK points to the starting point
* of the address.
* You can just set them to all 0.
* b. RW_TRAIN – set this to 1.
* c. TCCD_L – set this to 0.
* d. READ_CMD_COUNT – instruct the sequence to the how many
* b. RW_TRAIN - set this to 1.
* c. TCCD_L - set this to 0.
* d. READ_CMD_COUNT - instruct the sequence to the how many
* writes/reads.
* It is 5 bits field, so set to 31 of maximum # of r/w.
*/
@ -10063,9 +10063,9 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p,
/*
* 6) Read MPR_DATA0 and MPR_DATA1 for results.
* a. MPR_DATA0[MPR_DATA<63:0>] – comparison results
* a. MPR_DATA0[MPR_DATA<63:0>] - comparison results
* for DQ63:DQ0. (1 means MATCH, 0 means FAIL).
* b. MPR_DATA1[MPR_DATA<7:0>] – comparison results
* b. MPR_DATA1[MPR_DATA<7:0>] - comparison results
* for ECC bit7:0.
*/
mpr_data0 = lmc_rd(priv, CVMX_LMCX_MPR_DATA0(if_num));
@ -10073,8 +10073,8 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p,
/*
* 7) Set PHY_CTL[PHY_RESET] = 1 (LMC automatically
* clears this as it’s a one-shot operation).
* This is to get into the habit of resetting PHY’s
* clears this as it's a one-shot operation).
* This is to get into the habit of resetting PHY's
* SILO to the original 0 location.
*/
phy_ctl.u64 = lmc_rd(priv, CVMX_LMCX_PHY_CTL(if_num));
@ -10163,11 +10163,11 @@ static void setup_hw_pattern(struct ddr_priv *priv, int lmc,
/*
* 3) Setup GENERAL_PURPOSE[0-2] registers with the data pattern
* of choice.
* a. GENERAL_PURPOSE0[DATA<63:0>] – sets the initial lower
* a. GENERAL_PURPOSE0[DATA<63:0>] - sets the initial lower
* (rising edge) 64 bits of data.
* b. GENERAL_PURPOSE1[DATA<63:0>] – sets the initial upper
* b. GENERAL_PURPOSE1[DATA<63:0>] - sets the initial upper
* (falling edge) 64 bits of data.
* c. GENERAL_PURPOSE2[DATA<15:0>] – sets the initial lower
* c. GENERAL_PURPOSE2[DATA<15:0>] - sets the initial lower
* (rising edge <7:0>) and upper
* (falling edge <15:8>) ECC data.
*/

13
drivers/usb/gadget/f_sdp.c
View file

@ -773,7 +773,8 @@ static ulong search_container_header(ulong p, int size)
}
#endif
static int sdp_handle_in_ep(struct spl_image_info *spl_image)
static int sdp_handle_in_ep(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
u8 *data = sdp_func->in_req->buf;
u32 status;
@ -862,7 +863,8 @@ static int sdp_handle_in_ep(struct spl_image_info *spl_image)
/* In SPL, allow jumps to U-Boot images */
struct spl_image_info spl_image = {};
spl_parse_image_header(&spl_image, header);
struct spl_boot_device bootdev = {};
spl_parse_image_header(&spl_image, &bootdev, header);
jump_to_image_no_args(&spl_image);
#else
/* In U-Boot, allow jumps to scripts */
@ -910,7 +912,8 @@ static void sdp_handle_out_ep(void)
#ifndef CONFIG_SPL_BUILD
int sdp_handle(int controller_index)
#else
int spl_sdp_handle(int controller_index, struct spl_image_info *spl_image)
int spl_sdp_handle(int controller_index, struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
#endif
{
int flag = 0;
@ -928,9 +931,9 @@ int spl_sdp_handle(int controller_index, struct spl_image_info *spl_image)
usb_gadget_handle_interrupts(controller_index);
#ifdef CONFIG_SPL_BUILD
flag = sdp_handle_in_ep(spl_image);
flag = sdp_handle_in_ep(spl_image, bootdev);
#else
flag = sdp_handle_in_ep(NULL);
flag = sdp_handle_in_ep(NULL, NULL);
#endif
if (sdp_func->ep_int_enable)
sdp_handle_out_ep();

9
drivers/video/meson/simplefb_common.c
View file

@ -7,22 +7,19 @@
* (C) Copyright 2017 Icenowy Zheng <icenowy@aosc.io>
*/
#include <fdtdec.h>
#include <fdt_support.h>
int meson_simplefb_fdt_match(void *blob, const char *pipeline)
{
int offset, ret;
/* Find a prefilled simpefb node, matching out pipeline config */
offset = fdt_node_offset_by_compatible(blob, -1,
"amlogic,simple-framebuffer");
while (offset >= 0) {
fdt_for_each_node_by_compatible(offset, blob, -1,
"amlogic,simple-framebuffer") {
ret = fdt_stringlist_search(blob, offset, "amlogic,pipeline",
pipeline);
if (ret == 0)
break;
offset = fdt_node_offset_by_compatible(blob, offset,
"amlogic,simple-framebuffer");
}
return offset;

7
drivers/video/sunxi/simplefb_common.c
View file

@ -7,7 +7,7 @@
* (C) Copyright 2017 Icenowy Zheng <icenowy@aosc.io>
*/
#include <fdtdec.h>
#include <fdt_support.h>
int sunxi_simplefb_fdt_match(void *blob, const char *pipeline)
{
@ -16,13 +16,12 @@ int sunxi_simplefb_fdt_match(void *blob, const char *pipeline)
/* Find a prefilled simpefb node, matching out pipeline config */
offset = fdt_node_offset_by_compatible(blob, -1,
"allwinner,simple-framebuffer");
while (offset >= 0) {
fdt_for_each_node_by_compatible(offset, blob, -1,
"allwinner,simple-framebuffer") {
ret = fdt_stringlist_search(blob, offset, "allwinner,pipeline",
pipeline);
if (ret == 0)
break;
offset = fdt_node_offset_by_compatible(blob, offset,
"allwinner,simple-framebuffer");
}
return offset;

6
include/fdt_support.h
View file

@ -289,6 +289,12 @@ int fdt_node_offset_by_compat_reg(void *blob, const char *compat,
phys_addr_t compat_off);
int fdt_node_offset_by_pathf(void *blob, const char *fmt, ...)
__attribute__ ((format (printf, 2, 3)));
#define fdt_for_each_node_by_compatible(node, fdt, start, compat) \
for (node = fdt_node_offset_by_compatible(fdt, start, compat); \
node >= 0; \
node = fdt_node_offset_by_compatible(fdt, node, compat))
int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle);
unsigned int fdt_create_phandle(void *fdt, int nodeoffset);
unsigned int fdt_create_phandle_by_compatible(void *fdt, const char *compat);

11
include/mvebu/comphy.h
View file

@ -6,17 +6,6 @@
#ifndef _MVEBU_COMPHY_H_
#define _MVEBU_COMPHY_H_
#include <dt-bindings/comphy/comphy_data.h>
struct comphy_map {
u32 type;
u32 speed;
u32 invert;
bool clk_src;
bool end_point;
};
int comphy_rx_training(struct udevice *dev, u32 lane);
int comphy_update_map(struct comphy_map *serdes_map, int count);
#endif /* _MVEBU_COMPHY_H_ */

3
include/sdp.h
View file

@ -14,7 +14,8 @@ int sdp_init(int controller_index);
#ifdef CONFIG_SPL_BUILD
#include <spl.h>
int spl_sdp_handle(int controller_index, struct spl_image_info *spl_image);
int spl_sdp_handle(int controller_index, struct spl_image_info *spl_image,
struct spl_boot_device *bootdev);
#else
int sdp_handle(int controller_index);
#endif

7
include/spl.h
View file

@ -29,6 +29,7 @@ struct image_header;
struct blk_desc;
struct image_header;
struct spl_boot_device;
/*
* u_boot_first_phase() - check if this is the first U-Boot phase
@ -340,6 +341,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
* Returns 0 on success.
*/
int spl_load_legacy_img(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct spl_load_info *load, ulong header);
/**
@ -438,6 +440,7 @@ void spl_set_header_raw_uboot(struct spl_image_info *spl_image);
* Return: 0 if a header was correctly parsed, -ve on error
*/
int spl_parse_image_header(struct spl_image_info *spl_image,
const struct spl_boot_device *bootdev,
const struct image_header *header);
void spl_board_prepare_for_linux(void);
@ -574,18 +577,22 @@ static inline const char *spl_loader_name(const struct spl_image_loader *loader)
/* SPL FAT image functions */
int spl_load_image_fat(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition,
const char *filename);
int spl_load_image_fat_os(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition);
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image);
/* SPL EXT image functions */
int spl_load_image_ext(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition,
const char *filename);
int spl_load_image_ext_os(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition);
/**