mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 07:04:28 +00:00
WS cleanup: remove trailing white space
Signed-off-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
c72231d272
commit
0a50b3c97b
32 changed files with 56 additions and 56 deletions
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@ -133,7 +133,7 @@ such a program is covered only if its contents constitute a work based
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on the Library (independent of the use of the Library in a tool for
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writing it). Whether that is true depends on what the Library does
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and what the program that uses the Library does.
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1. You may copy and distribute verbatim copies of the Library's
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complete source code as you receive it, in any medium, provided that
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you conspicuously and appropriately publish on each copy an
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4
Makefile
4
Makefile
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@ -327,14 +327,14 @@ os_x_before = $(shell if [ $(DARWIN_MAJOR_VERSION) -le $(1) -a \
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$(DARWIN_MINOR_VERSION) -le $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;)
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os_x_after = $(shell if [ $(DARWIN_MAJOR_VERSION) -ge $(1) -a \
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$(DARWIN_MINOR_VERSION) -ge $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;)
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$(DARWIN_MINOR_VERSION) -ge $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;)
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# Snow Leopards build environment has no longer restrictions as described above
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HOSTCC = $(call os_x_before, 10, 5, "cc", "gcc")
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KBUILD_HOSTCFLAGS += $(call os_x_before, 10, 4, "-traditional-cpp")
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KBUILD_HOSTLDFLAGS += $(call os_x_before, 10, 5, "-multiply_defined suppress")
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# macOS Mojave (10.14.X)
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# macOS Mojave (10.14.X)
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# Undefined symbols for architecture x86_64: "_PyArg_ParseTuple"
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KBUILD_HOSTLDFLAGS += $(call os_x_after, 10, 14, "-lpython -dynamclib", "")
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endif
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@ -408,7 +408,7 @@ struct cm_dpll {
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unsigned int resv1;
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unsigned int clktimer2clk; /* offset 0x04 */
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unsigned int resv2[11];
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unsigned int clkselmacclk; /* offset 0x34 */
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unsigned int clkselmacclk; /* offset 0x34 */
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};
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#endif /* CONFIG_AM43XX */
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@ -34,7 +34,7 @@
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mov \divisor, \divisor, lsl \result
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mov \curbit, \curbit, lsl \result
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mov \result, #0
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#else
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@ Initially shift the divisor left 3 bits if possible,
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@ -48,7 +48,7 @@
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@ Unless the divisor is very big, shift it up in multiples of
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@ four bits, since this is the amount of unwinding in the main
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@ division loop. Continue shifting until the divisor is
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@ division loop. Continue shifting until the divisor is
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@ larger than the dividend.
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1: cmp \divisor, #0x10000000
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cmplo \divisor, \dividend
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@ -135,7 +135,7 @@
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@ Unless the divisor is very big, shift it up in multiples of
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@ four bits, since this is the amount of unwinding in the main
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@ division loop. Continue shifting until the divisor is
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@ division loop. Continue shifting until the divisor is
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@ larger than the dividend.
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1: cmp \divisor, #0x10000000
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cmplo \divisor, \dividend
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@ -89,7 +89,7 @@
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#define XCHAL_HAVE_HIFI3_VFPU 0 /* HiFi3 Audio Engine VFPU option */
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#define XCHAL_HAVE_HIFI2 0 /* HiFi2 Audio Engine pkg */
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#define XCHAL_HAVE_HIFI2EP 0 /* HiFi2EP */
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#define XCHAL_HAVE_HIFI_MINI 0
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#define XCHAL_HAVE_HIFI_MINI 0
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#define XCHAL_HAVE_VECTORFPU2005 0 /* vector or user floating-point pkg */
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@ -62,7 +62,7 @@ static struct __attribute__ ((__packed__)) eeprom {
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u8 mac_count; /* 0x40 Number of MAC addresses */
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u8 mac_flag; /* 0x41 MAC table flags */
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u8 mac[MAX_NUM_PORTS][6]; /* 0x42 - 0xa1 MAC addresses */
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u8 res_2[90]; /* 0xa2 - 0xfb Reserved */
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u8 res_2[90]; /* 0xa2 - 0xfb Reserved */
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u32 crc; /* 0xfc - 0xff CRC32 checksum */
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#endif
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} e;
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@ -73,7 +73,7 @@ static void sdhci_power_init(void)
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/* drive strength configs for sdhc pins */
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const struct tlmm_cfg hdrv[] = {
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{ SDC1_CLK_HDRV, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, },
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{ SDC1_CMD_HDRV, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, },
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{ SDC1_DATA_HDRV, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, },
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@ -81,14 +81,14 @@ static void sdhci_power_init(void)
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/* pull configs for sdhc pins */
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const struct tlmm_cfg pull[] = {
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{ SDC1_CLK_PULL, TLMM_NO_PULL, TLMM_PULL_MASK, },
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{ SDC1_CMD_PULL, TLMM_PULL_UP, TLMM_PULL_MASK, },
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{ SDC1_DATA_PULL, TLMM_PULL_UP, TLMM_PULL_MASK, },
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};
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const struct tlmm_cfg rclk[] = {
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{ SDC1_RCLK_PULL, TLMM_PULL_DOWN, TLMM_PULL_MASK,},
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};
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@ -19,7 +19,7 @@ $ make
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This will generate the U-Boot binary called u-boot-dtb.imx.
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Put warp7 board in USB download mode:
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Put warp7 board in USB download mode:
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Remove the CPU board from the base board then put switch 2 in the upper
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position
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@ -194,7 +194,7 @@ static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,
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err = part_get_info(mmc_get_blk_desc(mmc), type_part, &info);
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if (err)
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continue;
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if (info.sys_ind ==
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if (info.sys_ind ==
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE) {
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partition = type_part;
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break;
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@ -233,7 +233,7 @@ fdtfile:
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the DTB with a different DTB. fdtfile will automatically be set for you if
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it matches the format ${soc}-${board}.dtb which covers most 32 bit use cases.
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AArch64 generally does not match as the Linux kernel put the dtb files under
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SoC vendor directories.
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SoC vendor directories.
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ramdisk_addr_r:
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@ -9,7 +9,7 @@ SoC.
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1.1 MAC Address: It is stored in fuse bank 4, with the 32 lsbs in word 2 and the
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16 msbs in word 3[15:0].
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For i.MX6SX and i.MX6UL, they have two MAC addresses. The second MAC address
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is stored in fuse bank 4, with the 16 lsb in word 3[31:16] and the 32 msbs in
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is stored in fuse bank 4, with the 16 lsb in word 3[31:16] and the 32 msbs in
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word 4.
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Example:
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@ -339,7 +339,7 @@ int atsha204a_read(struct udevice *dev, enum atsha204a_zone zone, bool read32,
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retry--;
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atsha204a_wakeup(dev);
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} while (retry >= 0);
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if (res) {
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debug("ATSHA204A read failed\n");
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return res;
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@ -4,7 +4,7 @@
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* drivers and users.
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*
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* Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org>
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* Copyright © 2006 Red Hat UK Limited
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* Copyright © 2006 Red Hat UK Limited
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*
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*/
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@ -123,7 +123,7 @@ void *idr_get_next(struct idr *idp, int *next)
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} else {
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*next = 0;
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}
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return ret;
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}
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@ -907,7 +907,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
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u32 timer = (CONFIG_SYS_HZ * timeo) / 1000;
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u32 time_start;
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time_start = get_timer(0);
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while (get_timer(time_start) < timer) {
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if (chip->dev_ready) {
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@ -189,7 +189,7 @@ int nand_erase_opts(struct mtd_info *mtd,
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#define NAND_CMD_LOCK_TIGHT 0x2c
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#define NAND_CMD_LOCK_STATUS 0x7a
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/******************************************************************************
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* Support for locking / unlocking operations of some NAND devices
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*****************************************************************************/
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@ -115,7 +115,7 @@ static struct ubi_device *ubi_devices[UBI_MAX_DEVICES];
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#else
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struct ubi_device *ubi_devices[UBI_MAX_DEVICES];
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#endif
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#ifndef __UBOOT__
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/* Serializes UBI devices creations and removals */
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DEFINE_MUTEX(ubi_devices_mutex);
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@ -73,7 +73,7 @@ restart_aneg:
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if (!(wol & BIT(12)) ||
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((exp & EXPANSION_NWAY) && !(lpa & LPA_LPACK))) {
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/* Looks like aneg failed after all */
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if (!retries) {
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printf("%s LPA corruption max attempts\n",
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@ -286,7 +286,7 @@ static int stm32_fmc_of_to_plat(struct udevice *dev)
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} else {
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dev_dbg(dev, "cannot find st,mem_remap property\n");
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}
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swp_fmc = dev_read_u32_default(dev, "st,swp_fmc", NOT_FOUND);
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if (swp_fmc != NOT_FOUND) {
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/* set fmc swapping selection */
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@ -70,16 +70,16 @@ struct reset_ops meson_reset_ops = {
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.rst_deassert = meson_reset_deassert,
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};
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static const struct udevice_id meson_reset_ids[] = {
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{ .compatible = "amlogic,meson-gxbb-reset" },
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static const struct udevice_id meson_reset_ids[] = {
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{ .compatible = "amlogic,meson-gxbb-reset" },
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{ .compatible = "amlogic,meson-axg-reset" },
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{ }
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};
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{ }
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};
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static int meson_reset_probe(struct udevice *dev)
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{
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struct meson_reset_priv *priv = dev_get_priv(dev);
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return regmap_init_mem(dev_ofnode(dev), &priv->regmap);
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}
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@ -233,7 +233,7 @@ static int msm_serial_of_to_plat(struct udevice *dev)
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if (priv->base == FDT_ADDR_T_NONE)
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return -EINVAL;
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priv->clk_bit_rate = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
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priv->clk_bit_rate = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
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"bit-rate", UART_DM_CLK_RX_TX_BIT_RATE);
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return 0;
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@ -170,7 +170,7 @@ static int dwc3_meson_gxl_usb2_init(struct dwc3_meson_gxl *priv)
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static int dwc3_meson_gxl_usb_init(struct dwc3_meson_gxl *priv)
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{
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int ret;
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ret = dwc3_meson_gxl_usb2_init(priv);
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if (ret)
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return ret;
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@ -190,7 +190,7 @@
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/* SUNXI has different reg addresses, but identical r/w functions */
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#ifndef CONFIG_ARCH_SUNXI
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#ifndef CONFIG_ARCH_SUNXI
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/*
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* Common USB registers
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@ -159,7 +159,7 @@ static struct int_queue *_musb_create_int_queue(struct musb_host_data *host,
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static int _musb_destroy_int_queue(struct musb_host_data *host,
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struct usb_device *dev, struct int_queue *queue)
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{
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int index = usb_pipein(queue->urb.pipe) * 16 +
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int index = usb_pipein(queue->urb.pipe) * 16 +
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usb_pipeendpoint(queue->urb.pipe);
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if (queue->urb.status == -EINPROGRESS)
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@ -327,7 +327,7 @@ static int ctrlreq_out_data_phase(struct usb_device *dev, u32 len, void *buffer)
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/* Set TXPKTRDY bit */
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csr = readw(&musbr->txcsr);
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csr |= MUSB_CSR0_TXPKTRDY;
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csr |= MUSB_CSR0_H_DIS_PING;
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writew(csr, &musbr->txcsr);
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@ -67,11 +67,11 @@ void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate, int bpp)
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printf("Error anx9804 clock is not stable\n");
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i2c_reg_write(0x39, ANX9804_VID_CTRL2_REG, colordepth);
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/* Set a bunch of analog related register values */
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i2c_reg_write(0x38, ANX9804_PLL_CTRL_REG, 0x07);
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i2c_reg_write(0x39, ANX9804_PLL_FILTER_CTRL3, 0x19);
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i2c_reg_write(0x39, ANX9804_PLL_CTRL3, 0xd9);
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i2c_reg_write(0x38, ANX9804_PLL_CTRL_REG, 0x07);
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i2c_reg_write(0x39, ANX9804_PLL_FILTER_CTRL3, 0x19);
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i2c_reg_write(0x39, ANX9804_PLL_CTRL3, 0xd9);
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i2c_reg_write(0x39, ANX9804_RST_CTRL2_REG, ANX9804_RST_CTRL2_AC_MODE);
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i2c_reg_write(0x39, ANX9804_ANALOG_DEBUG_REG1, 0xf0);
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i2c_reg_write(0x39, ANX9804_ANALOG_DEBUG_REG3, 0x99);
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@ -105,7 +105,7 @@ void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate, int bpp)
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i2c_reg_write(0x38, ANX9804_LINK_BW_SET_REG, data_rate);
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i2c_reg_write(0x38, ANX9804_LANE_COUNT_SET_REG, lanes);
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/* Link training */
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/* Link training */
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i2c_reg_write(0x38, ANX9804_LINK_TRAINING_CTRL_REG,
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ANX9804_LINK_TRAINING_CTRL_EN);
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mdelay(5);
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@ -118,7 +118,7 @@ static int tl070wsh30_panel_probe(struct udevice *dev)
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/* reset panel */
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dm_gpio_set_value(&priv->reset, true);
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mdelay(10);
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dm_gpio_set_value(&priv->reset, false);
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@ -105,7 +105,7 @@
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#ifdef CONFIG_MX6UL
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# define DRAM_OFFSET(x) 0x87##x
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# define FDT_ADDR __stringify(DRAM_OFFSET(800000))
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#else
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#else
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# define DRAM_OFFSET(x) 0x1##x
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# define FDT_ADDR __stringify(DRAM_OFFSET(8000000))
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#endif
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@ -945,7 +945,7 @@ struct nand_chip {
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int jedec_version;
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struct nand_onfi_params onfi_params;
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struct nand_jedec_params jedec_params;
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|
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struct nand_data_interface *data_interface;
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int read_retries;
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|
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@ -3,7 +3,7 @@
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* include/linux/serial_reg.h
|
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*
|
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* Copyright (C) 1992, 1994 by Theodore Ts'o.
|
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*
|
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*
|
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* These are the UART port assignments, expressed as offsets from the base
|
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* register. These assignments should hold for any serial port based on
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* a 8250, 16450, or 16550(A).
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@ -88,7 +88,7 @@
|
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|
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#define UART_LCR 3 /* Out: Line Control Register */
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/*
|
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* Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting
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* Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting
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* UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits.
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*/
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#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
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|
|
|
@ -639,7 +639,7 @@ on_set_option_mode3_activate(GtkMenuItem *menuitem, gpointer user_data)
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void on_introduction1_activate(GtkMenuItem * menuitem, gpointer user_data)
|
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{
|
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GtkWidget *dialog;
|
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const gchar *intro_text =
|
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const gchar *intro_text =
|
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"Welcome to gkc, the GTK+ graphical configuration tool\n"
|
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"For each option, a blank box indicates the feature is disabled, a\n"
|
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"check indicates it is enabled, and a dot indicates that it is to\n"
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|
|
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@ -427,7 +427,7 @@ static void tokenise(char *buffer, char *end)
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}
|
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memcpy(tokens[tix].content, start, tokens[tix].size);
|
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tokens[tix].content[tokens[tix].size] = 0;
|
||||
|
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|
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/* If it begins with a lowercase letter then
|
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* it's an element name
|
||||
*/
|
||||
|
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@ -3,15 +3,15 @@ Author: Simon Glass <sjg@chromium.org>
|
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Date: Sat Apr 15 15:39:08 2017 -0600
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|
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pci: Correct cast for sandbox
|
||||
|
||||
|
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This gives a warning with some native compilers:
|
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|
||||
|
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cmd/pci.c:152:11: warning: format ‘%llx’ expects argument of type
|
||||
‘long long unsigned int’, but argument 3 has type
|
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‘u64 {aka long unsigned int}’ [-Wformat=]
|
||||
|
||||
|
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Fix it with a cast.
|
||||
|
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|
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Signed-off-by: Simon Glass <sjg@chromium.org>
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Commit-changes: 2
|
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- second revision change
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|
@ -21,7 +21,7 @@ Date: Sat Apr 15 15:39:08 2017 -0600
|
|||
about some things
|
||||
from the first commit
|
||||
END
|
||||
|
||||
|
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Commit-notes:
|
||||
Some notes about
|
||||
the first commit
|
||||
|
@ -32,15 +32,15 @@ Author: Simon Glass <sjg@chromium.org>
|
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Date: Sat Apr 15 15:39:08 2017 -0600
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fdt: Correct cast for sandbox in fdtdec_setup_mem_size_base()
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||||
|
||||
|
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This gives a warning with some native compilers:
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||||
|
||||
|
||||
lib/fdtdec.c:1203:8: warning: format ‘%llx’ expects argument of type
|
||||
‘long long unsigned int’, but argument 3 has type
|
||||
‘long unsigned int’ [-Wformat=]
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||||
|
||||
|
||||
Fix it with a cast.
|
||||
|
||||
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||||
Signed-off-by: Simon Glass <sjg@chromium.org>
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Series-to: u-boot
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Series-prefix: RFC
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|
@ -60,7 +60,7 @@ Date: Sat Apr 15 15:39:08 2017 -0600
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Cover-changes: 4
|
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- Some notes for the cover letter
|
||||
|
||||
|
||||
Cover-letter:
|
||||
test: A test patch series
|
||||
This is a test of how the cover
|
||||
|
|
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