Commit graph

1163 commits

Author SHA1 Message Date
Simon Glass
3238474b8f rockchip: Fix regualtor typo in veyron
This typo doesn't actually cause any problems, but is wrong. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:34 -06:00
Simon Glass
c415dda8df tegra: dts: Add cros-ec SPI settings
At present the interrupt does not work and the SPI bus runs much less
quickly than it should. Add settings to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:32 -06:00
Jagan Teki
b0174c39b3 sun8i: h3: Add initial NanoPi M1 Plus support
NanoPi M1 Plus is designed and developed by FriendlyElec
for professionals, enterprise users, makers and hobbyists
using the Allwinner H3 SOC.

NanoPi M1 Plus key features
- Allwinner H3, Quad-core Cortex-A7@1.2GHz
- 1GB DDR3 RAM
- 8GB eMMC
- microSD slot
- 10/100/1000M Ethernet
- Serial Debug Port
- 5V 2A DC power-supply

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-08 21:48:23 +05:30
Philipp Tomsich
cf35242a3e rockchip: dts: rk3399-puma: add DTS for the DDR3-1866 timing
This adds the DDR3-1866 timing via its own DTS and wires it up.  This
(currently) is not the default timing for the RK3399-Q7 and should be
selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:48 -06:00
Philipp Tomsich
6608cf0fbe rockchip: dts: rk3399-puma: add DTS for the DDR3-1333 timing
This adds the DDR3-1333 timing via its own DTS and wires it up.  This
is not the default timing for the RK3399-Q7 and should be selected
explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:48 -06:00
Philipp Tomsich
3a29ae8e6f rockchip: dts: rk3399-puma: refactor and rename (default) DDR3-1600 DTS
To better support different RAM timings (DDR3-1333 and DDR3-1866 are
assembly options for the RK3399-Q7), this refactors the DTS support
and renames the default DTS variant from rk3399-puma to
rk3399-puma-ddr1600:
- changes the rk3399-puma DTS into a board-specific DTSI by removing
  the inclusion of the DRAM timings
- adds a new rk3399-puma-ddr1600.dts, which includes the (new) common
  board DTSI and the DDR3-1600 timing DTSI
- wires this up from arch/arm/dts/Makefile and configs/puma-rk3399_defconfig

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:48 -06:00
Philipp Tomsich
f592edd920 rockchip: dts: rk3399-puma: sync DTS with Linux tree
The Linux DTS for the RK3399-Q7 has moved with the times... resync
against it to ensure a consistent configuration.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:48 -06:00
Philipp Tomsich
876c1d0fb1 rockchip: dts: rk3399: enable HDMI output in the DTS
This commit enables HDMI output in the DTS by adding the necessary
nodes to vopl/vopb and by adding the HDMI node.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:48 -06:00
Andy Yan
2d1951fec6 rockchip: Add basic support for evb-rv1108 board
Add basic support for rv1108 evb, whith this patch we
can boot into u-boot console.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:25 -06:00
Klaus Goger
a4264b4d14 rockchip: dts: rk3399-puma: set spl-payload-offset
defines the spl-payload to 256k (0x40000)

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:23 -06:00
Philipp Tomsich
2dd2c011e8 rockchip: dts: rk3399-puma: release reset of on-module USB3 hub via vbus-gpio
On the RK3399-Q7, the on-module USB3 hub is held in reset at boot-up
to save power and needs to be woken up using GPIO4A3.

Note that this is not a negated reset-signal (due to a level shifter
being needed for this signal anyway), but a negated enable-signal:
to enable, we need to output LOW (i.e. 0)... so we mark this as an
ACTIVE_LOW signal.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:23 -06:00
Philipp Tomsich
4411cd054b rockchip: dts: rk3399-puma: make the debug serial dm-pre-reloc
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:23 -06:00
Philipp Tomsich
3b89461b40 rockchip: dts: rk3399-puma: Add DDR3-1866 timings
With the validation done for DDR3-1866 (i.e. 933 MHz bus clock), we
can now add the timings (rk3399-sdram-ddr3-1866.dtsi) for boards built
with the DDR3-1866 option.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:23 -06:00
Meng Dongyang
75ff918f83 rockchip: dts: rk3328: support and enable xhci
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:22 -06:00
Meng Dongyang
ef82a0db5a rockchip: dts: rk3328: add ehci and ohci node and enable host0 port
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:21 -06:00
Andy Yan
9d7ed33926 rockchip: rk3368: Add PX5 Evaluation board
PX5 EVB is designed by Rockchip for automotive field
with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS
HDMI video input/output interface, audio codec ES8396,
WIFI / BT (on RTL8723BS), Gsensor BMA250E and light&proximity
sensor STK3410.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:20 -06:00
Andreas Färber
54c57ae051 rockchip: rk3368: Add initial support for RK3368 based GeekBox
The GeekBox is a TV box from GeekBuying, based on an MXM3 module.
The module can be used with base boards such as the GeekBox Landingship.
This adds basic support to chain-load U-Boot from Rockchip's miniloader.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:20 -06:00
Andy Yan
e2901ab8f6 rockchip: rk3368: add Sheep board
Sheep board is designed by Rockchip as a EVB for rk3368.
Currently it is able to boot a linux kernel and system
to console with the miniloader run as fist level loader.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2017-06-07 07:29:20 -06:00
Andreas Färber
37a0c60085 rockchip: rk3368: Add core start-up code for RK3368
The RK3368 is an octa-core Cortex-A53 SoC from Rockchip.
This adds basic support to chain-load U-Boot from Rockchip's
miniloader.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:19 -06:00
Tom Rini
708ca4daf9 ti816x: Import dts files from Linux Kernel v4.11
This brings in the required dts/dtsi files for the TI8168-EVM from the
Linux Kernel v4.11 release.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 11:02:25 -04:00
Jaehoon Chung
c9972a8652 ARM: dts: exynos5422-odroidxu3: add the LDO's nodes
Add the LDO's nodes that taken from Linux Kernel.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2017-06-05 11:06:52 +09:00
Jaehoon Chung
9c2e2cab9a ARM: dts: exynos4: change the nodes relevant to mmc/sd
Change the nodes relevant to mmc/sd for using DM.
compatible are also changed to each SoCs.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2017-06-05 11:06:42 +09:00
Tom Rini
b07d044d5b Merge git://git.denx.de/u-boot-sunxi 2017-06-03 18:04:54 -04:00
Jagan Teki
868e37159e sun50i: h5: Add initial Orangepi Prime support
Orangepi Prime is an open-source single-board computer
using the Allwinner h5 SOC.

H5 Orangepi Prime has
- Quad-core Cortex-A53
- 2GB DDR3
- Debug TTL UART
- 1000M/100M Ethernet RJ45
- Three USB 2.0
- HDMI
- Audio and MIC
- Wifi + BT
- IR receiver
- HDMI
- Wifi + BT

Boot from MMC:
-------------
U-Boot SPL 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14)
DRAM: 2048 MiB
Trying to boot from MMC1
NOTICE:  BL3-1: Running on H5 (1718) in SRAM A2 (@0x44000)
NOTICE:  Configuring SPC Controller
NOTICE:  BL3-1: v1.0(debug):aa75c8d
NOTICE:  BL3-1: Built : 18:28:27, May 24 2017
INFO:    BL3-1: Initializing runtime services
INFO:    BL3-1: Preparing for EL3 exit to normal world
INFO:    BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9

U-Boot 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14 +0000) Allwinner Technology

CPU:   Allwinner H5 (SUN50I)
Model: OrangePi Prime
DRAM:  2 GiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   phy interface7
eth0: ethernet@1c30000
starting USB...
USB0:   USB EHCI 1.00
USB1:   USB OHCI 1.0
scanning bus 0 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot:  0

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-02 13:28:07 +00:00
Jagan Teki
f333973340 arm64: dts: sun50i: h5: orangepi-pc2: Use GPIO flag binding macro
Instead of defining numerical value on GPIO flag
better to use existing binding macro.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-01 14:42:08 +00:00
Jagan Teki
702a3e579b arm64: dts: sun50i: Add sun50i-h5.dtsi
The Allwinner H5 SoC is pin-compatible to the H3 SoC,
but uses Cortex-A53 cores instead.

So move the shared cpu based and peripherals nodes into
sun50i-h5.dtsi so, that it can shared among the sun50i-h5
board dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-01 14:35:23 +00:00
Jagan Teki
2dbe9c1362 sun50i: a64: Add initial Banana Pi M64 support
BPI-M64 is a 64-bit quad-core mini single board computer
using the Allwinner A64 SOC.

BPI-M64 features
- 1.2 Ghz Quad-Core ARM Cortex A53
- 2GB DDR3 SDRAM with 733MHz
- MicroSD/eMMC(8GB)
- 10/100/1000Mbps ethernet (Realtek RTL8211E/D)
- Wifi + BT
- IR receiver
- Audio In/Out
- Video In/Out
- 5V 2A DC power-supply

For dts file,
Sync with Linux commit 4879b7ae("Merge tag 'dmaengine-4.12-rc1'").

Boot from MMC:
-------------
U-Boot SPL 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31)
DRAM: 2048 MiB
Trying to boot from MMC1
NOTICE:  BL3-1: Running on A64/H64 (1689) in SRAM A2 (@0x44000)
NOTICE:  Configuring SPC Controller
NOTICE:  BL3-1: v1.0(debug):aa75c8d
NOTICE:  BL3-1: Built : 18:28:27, May 24 2017
NOTICE:  Configuring AXP PMIC
NOTICE:  PMIC: setup successful
INFO:    BL3-1: Initializing runtime services
INFO:    BL3-1: Preparing for EL3 exit to normal world
INFO:    BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9

U-Boot 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31 +0000) Allwinner Technology

CPU:   Allwinner A64 (SUN50I)
Model: BananaPi-M64
DRAM:  2 GiB
MMC:   SUNXI SD/MMC: 0, SUNXI SD/MMC: 1
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
starting USB...
No controllers found
Hit any key to stop autoboot:  0

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-01 09:26:05 +00:00
Andre Przywara
f98852bfa9 sunxi: A64/Pine64: update device tree from Linux
The Linux device tree for the Allwinner A64 SoC has changed a lot since
the U-Boot version was merged.
Let's replace the current DT with a exact copy of the Linux one as of:
commit c6778ff813d2ca3e3c8733c87dc8b6831a64578b
Merge: 0ff4c01 3c0e3abd
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Tue May 9 10:07:33 2017 -0700

This is the DT used in Linux 4.12-rc1.

Since U-Boot has an Ethernet driver (while Linux does not yet), we
provide the required DT nodes for it in an ...-u-boot.dtsi file, to both
mark them as U-Boot specific and to allow easier upgrading once Linux gets
the driver and its own binding later.
Compared to the existing Ethernet DT nodes we just slightly tweak the clock
and reset nodes in there to match the new bindings used by Linux for those.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-01 09:25:30 +00:00
Stefan Roese
0cc209124f arm64: mvebu: armada-7040-db: Enable 10GB port 0 / SFI (KR)
This patch enables the mvpp2 port 0 usage on the Armada 7k DB by setting
the correct PHY type (KR / SFI) for the COMPHY driver and enabling the
ethernet0 device node in the dts.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Chulski <stefanc@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
2017-05-31 07:39:06 +02:00
Gregory CLEMENT
045504bbb8 arm64: mvebu: armada37xx: add pinctrl definition
Start to populate the device tree of the Armada 37xx with the pincontrol
configuration used on the board providing a dts.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
2017-05-31 07:33:49 +02:00
Gregory CLEMENT
5cb7b79558 arm64: mvebu: Add pinctrl nodes for Armada 3700
Add the nodes for the two pin controller present in the Armada 37xx SoCs.

Initially the node was named gpio1 using the same name that for the
register range in the datasheet. However renaming it pinctr_nb (nb for
North Bridge) makes more sens.

Minor changes for U-Boot because of the slightly different dts version
done by Stefan Roese.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
2017-05-31 07:33:49 +02:00
Mylene JOSSERAND
6ff02fba04 sunxi: Update NanoPi Neo to use dtsi
Update the NanoPi Neo device tree file to use the NanoPi dtsi.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-30 11:05:24 +05:30
Mylene JOSSERAND
a647ea172a sunxi: Add support for NanoPi M1
NanoPi M1 is a board based on Allwinner H3 CPU.

This commit adds the support for this platform with:
   - an include device tree which enables UART, LEDs, GPIO key switch,
   1 USB host ports and the SD-card as a dtsi file.
   - a device tree specific to this board that enables the
   2 additional USB ports
   - a defconfig file for minimal support
   - a section in MAINTAINERS (add myself)

Synchronized with the kernel device tree, from commits:
sun8i-nanopi.dtsi: 85d2913614d9ab899d23b7ab7d22d23cf45bd1de
sun8i-h3-nanopi-m1.dts: 10efbf5f16336b7540ad6a16aa1cb0b26bab033b

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-30 11:05:09 +05:30
Tom Rini
380e86f361 Merge git://git.denx.de/u-boot-fsl-qoriq 2017-05-26 11:19:27 -04:00
Priyanka Jain
3049a583f3 armv8: ls2080ardb: Add LS2081ARDB board support
LS2081ARDB board is similar to LS2080ARDB board with few differences
 It hosts LS2081A SoC
 Default boot source is QSPI-boot
 It does not have IFC interface
 RTC and QSPI flash device are different
 It provides QIXIS access via I2C

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:47:08 -07:00
Priyanka Jain
89a168f776 armv8: ls2080ardb: Add QSPI-boot support
QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC.
LS2088ARDB RevF Board has limitation that QIXIS can not be accessed.
CONFIG_FSL_QIXIS is not enabled.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:38:55 -07:00
Tom Rini
a375ff8e14 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2017-05-18 17:17:45 -04:00
Tom Rini
753a4dde97 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2017-05-18 17:17:42 -04:00
Jean-Jacques Hiblot
ad99abe8e7 ARM: dts: am335x-evm: disable mmc3
SDIO is not supported in u-boot, there is no point in enabling mmc3.
For this purpose, add u-boot specific dtsi that this will be included
automatically while building the dtb.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-18 17:17:11 -04:00
Ley Foon Tan
3d5f7c5af3 arm: dts: Add dts and dtsi for Arria 10
Device tree files for Arria 10

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:18 +02:00
Peng Fan
e02ec19f4d arm: dts: imx7d-sdb: add usdhc support
Add usdhc support

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-05-18 11:24:34 +02:00
Peng Fan
00ad3a9f73 arm: dts: imx7d-sdb: add i2c support
Add i2c support.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-05-18 11:24:34 +02:00
Peng Fan
63f3401d23 arm: dts: imx7d-sdb: add regulator node for usb and mmc
Add regulator node for usb and mmc.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-05-18 11:24:34 +02:00
Peng Fan
9880eed8bd arm: dts: imx7d-sdb: add spi gpio node
Add spi gpio node for 74LV595.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-05-18 11:24:34 +02:00
Peng Fan
896d2e82e6 arm: dts: imx7d-sdb add basic dts
Add basic dts for i.MX7D-SDB board.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-05-18 11:24:33 +02:00
Peng Fan
993274f485 arm: dts: imx7: sync with Linux
Sync with Linux commit 308ac756("Merge tag 'gpio-v4.11-3'").

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefan Agner <stefan.agner@toradex.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-05-18 11:24:33 +02:00
Masahiro Yamada
abb6ac25da ARM: dts: uniphier: sync DT with Linux
Fix the following DTC warnings:
Warning (simple_bus_reg): Node /soc/system-bus@58c00000/support_card@1,1f00000/ethernet@00000000 simple-bus unit address format error, expected "0"
Warning (simple_bus_reg): Node /soc/system-bus@58c00000/support_card@1,1f00000/uart@000b0000 simple-bus unit address format error, expected "b0000"
Warning (simple_bus_reg): Node /soc/smpctrl@59800000 simple-bus unit address format error, expected "59801000"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-17 21:51:04 +09:00
Eric Gao
2085de57f3 rockchip: dts: evb_rk3288: Add mipi display support
Add mipi dsi configuration for evb-rk3288 device tree.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Eric Gao
df8fe99cf2 rockchip: dts: Add mipi dsi support for rk3399
Add dts config for mipi display, include vop, mipi controller, panel, backlight
. And Enable rk808 for lcd_3v3 in another patch.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-05-10 13:37:22 -06:00
Jonas Karlman
ecc3bd73b3 rockchip: tinker: set ethaddr in late init
Set ethernet mac address in late init for Tinker Board,
prevents getting a random mac address each boot.

Read mac address from eeprom, first 6 bytes from m24c08@50.
Same as /etc/init.d/rockchip.sh on Tinker OS.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Kever Yang
a66726838e rockchip: dts: add rk3399-firefly dts
Firefly-rk3399 is a bord from T-Firefly, you can find detail about
it here:
http://en.t-firefly.com/en/firenow/Firefly_RK3399/

This patch add basic node for the board and make it able to bring
up.

Peripheral/interfaces on board:
- usb hub which connect to ehci controller;
- UART2 debug
- eMMC
- PCIe
- USB 3.0 HOST, type-C port
- sdio, sd-card
- HDMI
- Ethernet
- OPTICAL
- WiFi/BT
- MIPI CSI/DSI
- IR
- EDP/DP

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Kever Yang
dde2223372 rockchip: dts: rk3399: sync with kernel dts
The kernel dts has update a lot since the first time we commit rk3399.dtsi,
sync with kernel for further development.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Kever Yang
fd9884e292 rockchip: dts: evb-rk3399: add gmac support
Enable gmac for evb-rk3399.

Change-Id: I85e35667e08e22e38577e63eb0e65731fc9c69b6
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2017-05-10 13:37:21 -06:00
Kever Yang
26b1edf4ce rockchip: dts: evb-rk3399: correct pwm3 polarity
The pwm3 on evb-rk3399 is used for pwm regulator, need to invert
the polarity to make it work correctly.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Philipp Tomsich
572045b6e7 rockchip: dts: rk3399-puma: Add DDR3-1600 timings and use for Puma
With the validation done for DDR3-1600 (i.e. 800 MHz bus clock), we
add the timings (rk3399-sdram-ddr3-1600.dtsi) and change rk3399-puma.dts
to use these by default.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Drop blank line at end of file:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Philipp Tomsich
c5f99c654e rockchip: dts: Clean up graffiti in rk3399-sdram-ddr3-1333.dtsi
The DDR3-1333 timings for the RK3399-Q7 (Puma) has some unintended
left-over comments in them. This change cleans the file up.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Adam Ford
15fde737fc omap3_logic: Add Device Tree Support and more DM drivers
This patch also removes all the excessive code for NS16550 intiailization
as the device tree can do that now.  This also adds DM_I2C and DM_MMC
since the overlying drivers have the built-in support already.  The
corresponding include/config/omap3_logic.h also reduced in size
due to the new device tree support.

Signed-off-by: Adam Ford <aford173@gmail.com>

Changes in V2:
  Retain Auto-detect ability between SOM-LV and Torpedo
  Split this off from the device sub submissions
2017-05-09 20:35:38 -04:00
Adam Ford
4c8a9f2311 ARM: DTS: Add Logic PD DM3730 Torpedo Device Tree
Previous commit has this combined with SOM-LV.  This commit has only
the Torpedo Device Tree.

The device trees were sync'd with 4.9.y stable with two changes:
disable mmc2 and stdout-path = &uart1.  Both of those two changes
will be submitted to the linux-omap list

Signed-off-by: Adam Ford <aford173@gmail.com>

Changes in V2:
  Split device tree from other board
2017-05-09 20:35:37 -04:00
Adam Ford
063da122e0 ARM: DTS: Add Logic PD DM3730 SOM-LV initial support
This adds the device tree.  Previous commit added both boards at the
same time.

Signed-off-by: Adam Ford <aford173@gmail.com>

Changes in V2:
  Split the SOM-LV from Torpedo
2017-05-09 20:35:37 -04:00
Adam Ford
65ee2f3c33 OMAP3: Add SMSC9221 device tree for omap devices connected on GPMC.
Some OMAP3 devices support an SMSC ethernet PHY connected to the GPMC bus.
This copies this device tree from Linux 4.9.y stable

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-09 20:35:37 -04:00
Adam Ford
c9ff04fdc8 omap3: Copy twl4030 device tree from Linux 4.9.y stable
Many OMAP3 boards use a TWL4030 PMIC.  This brings in the related
device tree information for common TWL4030 and TWL4030 with OMAP3.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-09 20:35:36 -04:00
Adam Ford
cac4d6a680 omap3630: Copy Device tree from Linux 4.9.y stable
Add device tree support to allow for CONFIG_OF_CONTROL in OMAP3630 boards.
DM3730 can use this same device tree.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-09 20:35:36 -04:00
Adam Ford
1932145728 omap3: Copy Device tree from Linux 4.9.y stable
Add device tree support to allow for CONFIG_OF_CONTROL in OMAP3 boards.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-09 20:35:35 -04:00
Tom Rini
dd9999d5f4 Merge git://git.denx.de/u-boot-dm 2017-05-09 16:11:36 -04:00
Tom Rini
a284212963 Merge git://www.denx.de/git/u-boot-marvell 2017-05-09 15:48:09 -04:00
Jean-Jacques Hiblot
33a5e2c5e7 dra7: dtsi: mark ocp2scp bus compatible with "simple-bus"
This is needed to probe devices under that bus such as the SATA PHY.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:16 -06:00
Wenyou Yang
6cb2a7fe81 ARM: dts: at91: Add dts files for at91sam9263ek
The device tree source files of at91sam9263ek boards are copied from
the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
   in board_init_f stage.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:15 -06:00
Wenyou Yang
1e315a356b ARM: dts: at91: Add dts files for at91sam9rlek
The device tree source files of at91sam9rlek boards are copied from
the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
   in board_init_f stage.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:15 -06:00
Wenyou Yang
627e41f125 ARM: dts: at91: Add dts files for at91sam9260ek/9g20ek
The device tree source files of at91sam9g20ek and at91sam9260ek
boards are copied from the Linux v4.10, do the changes below.
 - Fix the build error for the usb0 node.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
   in board_init_f stage.
 - Add the clk pinctrl of the mmc0 node.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:15 -06:00
Wenyou Yang
eb6f87cc07 ARM: dts: at91: Add dts files for at91sam9m10g45ek
The device tree source files of at91sam9m10g45ek boards are copied
from the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property to determine which nodes
   are used by the board_init_f stage.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:15 -06:00
Wenyou Yang
cd339347b9 ARM: dts: at91: Add dts files for at91sam9n12ek
The device tree source files of at91sam9n12ek boards are copied from
the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Change the compatible of the spi flash to "spi-flash".
 - Add the spi0 aliases.
 - Fix the pinctrl-names of mmc0 node.
 - Add the "u-boot,dm-pre-reloc" property to determine which nodes
   are used by the board_init_f stage.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:15 -06:00
Wenyou Yang
25e88d406e ARM: dts: at91: Add dts files for at91sam9x5ek
The device tree source files of at91sam9x5ek board are copied from
the Linux v4.10, do the changes below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property to determine which nodes
   are used by the board_init_f stage.
 - Change the compatible of the spi flash to "spi-flash".
 - Add the spi0 aliases.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:15 -06:00
Wenyou Yang
4529ee3bc5 ARM: dts: sama5d2_xplained: update for SPL
Add the "u-boot,dm-pre-reloc" property to determine which nodes
which are needed by SPL and by the board_init_f stage.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2017-05-09 12:14:15 -06:00
Wenyou Yang
20bb165c1f ARM: dts: sama5d2: add clock property for uart1 node
Add clock property for uart1 node.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2017-05-09 12:14:15 -06:00
Chris Packham
e38f5fc8d8 ARM: mvebu: switch db-88f6820-amc to DM for i2c
Move existing configuration from header file to defconfig or dts as
appropriate.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Stefan Roese
fdc9e88088 fix: phy: marvell: cp110: update comphy selector option
Align PHY selectors register with Armada-CP-110 functional SPEC
update all relevant device trees with this change.

Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Stefan Roese
e89acc4bf1 phy: marvell: cp110: update utmi phy connection type
UTMI_PHY_TO_USB_HOST was used in USB3 UTMI dts node only, but there will
be USB2 UTMI dts node for some SoCs that have got USB2 controller, so rename
TO_USB_HOST to TO_USB3_HOST to distinguish TO_USB2_HOST in later on patches.

Signed-off-by: zachary <zhangzg@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Stefan Roese
cb686454c7 phy: marvell: Replace PHY_TYPE_KR with PHY_TYPE_SFI
Use correct naming as done in the latest Marvell U-Boot version as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Konstantin Porotchkin
50eacd8eb1 arm64: a8k: dts: Add support for NAND devices on A8K platform
Add NAND to CP master device tree. Add armada-7040-db-nand
device tree for the board configured with NAND boot device.
Add comment about boot device ID to armada-7040-db DTS.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Konstantin Porotchkin
0f712f2c8d mvebu: dts: a80x0: Sync the DB DTS with standard config A
Sync the default configuration of Armada-8040-DB with
Marvell u-boot-2015  standard configuration "A" for the same board.
The standard configuration "A" enables 2 PCIe slots on CP0
and 3 PCIe slots on CP1.
This is the main configuration used for u-boot  and Linux tests.
This patch also re-arranges the DTS file entries by grouping
all nodes related to CP0 and CP1.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Cooper Jr., Franklin
1eaa0b4ed6 ARM: dts: keystone-k2g-evm: Enable I2C0 and I2C1
Enable I2C0 and I2C1 which is needed to enable usage of DM I2C.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-05-09 09:05:03 +02:00
Cooper Jr., Franklin
c7d45ff91d ARM: dts: keystone2: add I2C aliases for davinci I2C nodes
Add aliases for I2C nodes required for the DM framework to probe the
davinci-i2c driver.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-05-09 09:04:55 +02:00
Cooper Jr., Franklin
80d40ec9dd ARM: dts: k2g: Add I2C nodes to 66AK2Gx
Add I2C nodes to the 66AK2Gx dtsi.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-05-09 09:04:49 +02:00
maxims@google.com
d5c16d0093 aspeed: Cleanup ast2500-u-boot.dtsi Device Tree
Remove unnecessary apb and ahb nodes and just override necessary
nodes/values.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:35 -04:00
maxims@google.com
3b95902d47 aspeed: Add support for Clocks needed by MACs
Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.

The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how this clock is used
by MACs, so not clear if the rate would ever need to be different. So,
for now, hardcoding it is probably safer.

The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through
hardware strapping.

So, the network driver would only need to enable these clocks, no need
to configure the rate.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:35 -04:00
maxims@google.com
c93adc08f3 aspeed: Device Tree configuration for Reset Driver
Add Reset Driver configuration to ast2500 SoC Device Tree and bindings
for various reset signals

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:32 -04:00
maxims@google.com
17c5fb1953 aspeed: Update ast2500 Device Tree
Pull in the Device Tree for ast2500 from the mainline Linux kernel.
The file is copied from
https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:30 -04:00
Vikas Manocha
f22f3dc996 ARM: DT: STM32F746: add u-boot, dm-pre-reloc property to sub nodes
This patch is required for correct SPL device tree creation by fdtgrep
as fdtgrep looks for u-boot,dm-pre-reloc property of the node to include
it in the spl device tree.

Not adding it in these subnodes ignores the pin muxing of peripherals
which is almost always in the subnodes.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08 11:57:30 -04:00
Vikas Manocha
97c2093236 stm32f7: add support for stm32f769 disco board
This board support stm32f7 family device stm32f769-I with 2MB internal Flash &
512KB RAM.
STM32F769 lines offer the performance of the Cortex-M7 core (with double
precision floating point unit) running up to 216 MHz.

To compile for stm32f769 board, use same defconfig as stm32f746-disco,
the only difference is to pass "DEVICE_TREE=stm32f769-disco".

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:24 -04:00
Vikas Manocha
bd4a985f50 stm32f7: move board specific pin muxing to dts
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:24 -04:00
Vikas Manocha
bfea69ad27 stm32f7: sdram: correct sdram configuration as per micron sdram
Actually the sdram memory on stm32f746 discovery board is micron part
MT48LC_4M32_B2B5_6A. This patch does the modification required in the
device tree node & driver for the same.

Also we are passing here all the timing parameters in terms of clock
cycles, so no need to convert time(ns or ms) to cycles.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:22 -04:00
Vikas Manocha
2f80a9f72e stm32f746: to switch on user LED1 & read user button
All discovery boards have one user button & one user LED. Here we are
just reading the button status & switching ON the user LED.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:21 -04:00
Vikas Manocha
d33a6a2f06 ARM: DT: stm32f7: add gpio device tree nodes
Also created alias for gpios for stm32f7 discovery board. Based on these
aliases, it would be possible to get gpio devices by sequence.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:20 -04:00
Vikas Manocha
6c9a10034a stm32f7: sdram: use sdram device tree node to configure sdram controller
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:05 -04:00
Vikas Manocha
d0b24c1aa9 stm32f7: use clock driver to enable sdram controller clock
This patch also removes the sdram/fmc clock enable from board specific
code.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:04 -04:00
Vikas Manocha
fd198ee1a8 ARM: DT: stm32f7: add sdram pin contol node
Also added DT binding doc for stm32 fmc(flexible memory controller).

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:03 -04:00
Vikas Manocha
890bafd752 stm32f7: use clock driver to enable qspi controller clock
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:38:41 -04:00
Mike Looijmans
79ed06f2cc zynq-topic-miami.dts: Add usbotg0 alias to make USB actually work
Fixes the following problem:
zynq-uboot> run dfu_ram
Setting bus to 1
g_dnl_register: failed!, error: -19

The cause appears to be that the USB framework is looking for a usbotg aliases,
so add the alias to point to our USB device.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-04-27 13:31:55 +02:00
Tom Rini
6f008a2e16 Merge git://git.denx.de/u-boot-sunxi 2017-04-25 16:12:42 -04:00
Tom Rini
9ad99bee9c Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2017-04-25 08:59:56 -04:00