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rockchip: dts: evb-rk3399: add gmac support
Enable gmac for evb-rk3399. Change-Id: I85e35667e08e22e38577e63eb0e65731fc9c69b6 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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3 changed files with 45 additions and 0 deletions
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@ -6,6 +6,7 @@
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/dts-v1/;
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include "rk3399.dtsi"
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#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
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@ -59,6 +60,12 @@
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gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
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};
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clkin_gmac: external-gmac-clock {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "clkin_gmac";
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#clock-cells = <0>;
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};
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};
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&emmc_phy {
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@ -164,3 +171,35 @@
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};
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};
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};
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&gmac {
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phy-supply = <&vcc_phy>;
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phy-mode = "rgmii";
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clock_in_out = "input";
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snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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snps,reset-delays-us = <0 10000 50000>;
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assigned-clocks = <&cru SCLK_RMII_SRC>;
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assigned-clock-parents = <&clkin_gmac>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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tx_delay = <0x10>;
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rx_delay = <0x10>;
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status = "okay";
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};
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&gmac {
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phy-supply = <&vcc_phy>;
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phy-mode = "rgmii";
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clock_in_out = "input";
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snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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snps,reset-delays-us = <0 10000 50000>;
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assigned-clocks = <&cru SCLK_RMII_SRC>;
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assigned-clock-parents = <&clkin_gmac>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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tx_delay = <0x10>;
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rx_delay = <0x10>;
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status = "okay";
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};
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@ -34,6 +34,10 @@ CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ROCKCHIP=y
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_ROCKCHIP_RK3399=y
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@ -17,6 +17,8 @@
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#define RK_GPIO4 4
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#define RK_GPIO6 6
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#define RK_PB7 15
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#define RK_FUNC_GPIO 0
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#define RK_FUNC_1 1
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#define RK_FUNC_2 2
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