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Merge git://git.denx.de/u-boot-dm

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This commit is contained in:
Tom Rini 2017-05-09 16:11:36 -04:00
commit dd9999d5f4
117 changed files with 8935 additions and 990 deletions
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20
arch/arm/dts/Makefile
View file

@ -353,6 +353,26 @@ dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \
keystone-k2e-evm.dtb \
keystone-k2g-evm.dtb
dtb-$(CONFIG_TARGET_AT91SAM9263EK) += at91sam9263ek.dtb
dtb-$(CONFIG_TARGET_AT91SAM9RLEK) += at91sam9rlek.dtb
dtb-$(CONFIG_TARGET_AT91SAM9260EK) += \
at91sam9260ek.dtb \
at91sam9g20ek.dtb \
at91sam9g20ek_2mmc.dtb
dtb-$(CONFIG_TARGET_AT91SAM9M10G45EK) += at91sam9m10g45ek.dtb
dtb-$(CONFIG_TARGET_AT91SAM9X5EK) += \
at91sam9g15ek.dtb \
at91sam9g25ek.dtb \
at91sam9g35ek.dtb \
at91sam9x25ek.dtb \
at91sam9x35ek.dtb
dtb-$(CONFIG_TARGET_AT91SAM9N12EK) += at91sam9n12ek.dtb
dtb-$(CONFIG_TARGET_SAMA5D2_XPLAINED) += \
at91-sama5d2_xplained.dtb

12
arch/arm/dts/at91-sama5d2_xplained.dts
View file

@ -7,6 +7,7 @@
compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
chosen {
u-boot,dm-pre-reloc;
stdout-path = &uart1;
};
@ -28,6 +29,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
status = "okay";
u-boot,dm-pre-reloc;
};
sdmmc1: sdio-host@b0000000 {
@ -35,6 +37,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
status = "okay"; /* conflict with qspi0 */
u-boot,dm-pre-reloc;
};
apb {
@ -67,11 +70,13 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0_default>;
status = "okay";
u-boot,dm-pre-reloc;
spi_flash@0 {
compatible = "spi-flash";
reg = <0>;
spi-max-frequency = <50000000>;
u-boot,dm-pre-reloc;
};
};
@ -90,6 +95,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
status = "okay";
u-boot,dm-pre-reloc;
};
i2c1: i2c@fc028000 {
@ -146,6 +152,7 @@
<PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>;
bias-pull-up;
u-boot,dm-pre-reloc;
};
pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
@ -154,6 +161,7 @@
<PIN_PA11__SDMMC0_VDDSEL>,
<PIN_PA13__SDMMC0_CD>;
bias-disable;
u-boot,dm-pre-reloc;
};
pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
@ -163,12 +171,14 @@
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
u-boot,dm-pre-reloc;
};
pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>;
bias-disable;
u-boot,dm-pre-reloc;
};
pinctrl_spi0_default: spi0_default {
@ -176,12 +186,14 @@
<PIN_PA15__SPI0_MOSI>,
<PIN_PA16__SPI0_MISO>;
bias-disable;
u-boot,dm-pre-reloc;
};
pinctrl_uart1_default: uart1_default {
pinmux = <PIN_PD2__URXD1>,
<PIN_PD3__UTXD1>;
bias-disable;
u-boot,dm-pre-reloc;
};
pinctrl_usb_default: usb_default {

149
arch/arm/dts/at91sam9260.dtsi
View file

@ -79,12 +79,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@ -107,6 +109,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@ -134,7 +137,7 @@
clocks = <&slow_rc_osc>, <&slow_xtal>;
};
plla: pllack {
plla: pllack@0 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
@ -146,7 +149,7 @@
<150000000 240000000 2 1>;
};
pllb: pllbck {
pllb: pllbck@1 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKB>;
@ -164,6 +167,7 @@
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 105000000>;
atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc;
};
usb: usbck {
@ -180,13 +184,13 @@
interrupt-parent = <&pmc>;
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
prog0: prog0 {
prog0: prog@0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog1 {
prog1: prog@1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
@ -198,25 +202,25 @@
#address-cells = <1>;
#size-cells = <0>;
uhpck: uhpck {
uhpck: uhpck@6 {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
udpck: udpck {
udpck: udpck@7 {
#clock-cells = <0>;
reg = <7>;
clocks = <&usb>;
};
pck0: pck0 {
pck0: pck0@8 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
pck1: pck1@9 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
@ -228,128 +232,132 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
pioA_clk: pioA_clk {
pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
};
pioB_clk: pioB_clk {
pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
};
pioC_clk: pioC_clk {
pioC_clk: pioC_clk@4 {
#clock-cells = <0>;
reg = <4>;
u-boot,dm-pre-reloc;
};
adc_clk: adc_clk {
adc_clk: adc_clk@5 {
#clock-cells = <0>;
reg = <5>;
};
usart0_clk: usart0_clk {
usart0_clk: usart0_clk@6 {
#clock-cells = <0>;
reg = <6>;
};
usart1_clk: usart1_clk {
usart1_clk: usart1_clk@7 {
#clock-cells = <0>;
reg = <7>;
};
usart2_clk: usart2_clk {
usart2_clk: usart2_clk@8 {
#clock-cells = <0>;
reg = <8>;
};
mci0_clk: mci0_clk {
mci0_clk: mci0_clk@9 {
#clock-cells = <0>;
reg = <9>;
};
udc_clk: udc_clk {
udc_clk: udc_clk@10 {
#clock-cells = <0>;
reg = <10>;
};
twi0_clk: twi0_clk {
twi0_clk: twi0_clk@11 {
reg = <11>;
#clock-cells = <0>;
};
spi0_clk: spi0_clk {
spi0_clk: spi0_clk@12 {
#clock-cells = <0>;
reg = <12>;
};
spi1_clk: spi1_clk {
spi1_clk: spi1_clk@13 {
#clock-cells = <0>;
reg = <13>;
};
ssc0_clk: ssc0_clk {
ssc0_clk: ssc0_clk@14 {
#clock-cells = <0>;
reg = <14>;
};
tc0_clk: tc0_clk {
tc0_clk: tc0_clk@17 {
#clock-cells = <0>;
reg = <17>;
};
tc1_clk: tc1_clk {
tc1_clk: tc1_clk@18 {
#clock-cells = <0>;
reg = <18>;
};
tc2_clk: tc2_clk {
tc2_clk: tc2_clk@19 {
#clock-cells = <0>;
reg = <19>;
};
ohci_clk: ohci_clk {
ohci_clk: ohci_clk@20 {
#clock-cells = <0>;
reg = <20>;
};
macb0_clk: macb0_clk {
macb0_clk: macb0_clk@21 {
#clock-cells = <0>;
reg = <21>;
};
isi_clk: isi_clk {
isi_clk: isi_clk@22 {
#clock-cells = <0>;
reg = <22>;
};
usart3_clk: usart3_clk {
usart3_clk: usart3_clk@23 {
#clock-cells = <0>;
reg = <23>;
};
uart0_clk: uart0_clk {
uart0_clk: uart0_clk@24 {
#clock-cells = <0>;
reg = <24>;
};
uart1_clk: uart1_clk {
uart1_clk: uart1_clk@25 {
#clock-cells = <0>;
reg = <25>;
};
tc3_clk: tc3_clk {
tc3_clk: tc3_clk@26 {
#clock-cells = <0>;
reg = <26>;
};
tc4_clk: tc4_clk {
tc4_clk: tc4_clk@27 {
#clock-cells = <0>;
reg = <27>;
};
tc5_clk: tc5_clk {
tc5_clk: tc5_clk@28 {
#clock-cells = <0>;
reg = <28>;
};
@ -395,11 +403,51 @@
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
u-boot,dm-pre-reloc;
};
pioB: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
u-boot,dm-pre-reloc;
};
pioC: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
u-boot,dm-pre-reloc;
};
pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
ranges = <0xfffff400 0xfffff400 0x600>;
reg = <0xfffff400 0x200 /* pioA */
0xfffff600 0x200 /* pioB */
0xfffff800 0x200 /* pioC */
>;
atmel,mux-mask = <
/* A B */
@ -407,9 +455,11 @@
0xffffffff 0x7fff3ccf /* pioB */
0xffffffff 0x007fffff /* pioC */
>;
u-boot,dm-pre-reloc;
/* shared pinctrl settings */
dbgu {
u-boot,dm-pre-reloc;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
@ -719,39 +769,6 @@
atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
};
pioB: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
};
pioC: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
};
};
dbgu: serial@fffff200 {

215
arch/arm/dts/at91sam9260ek.dts Normal file
View file

@ -0,0 +1,215 @@
/*
* Device Tree file for Atmel at91sam9260 Evaluation Kit
*
* Copyright (C) 2016 Atmel,
* 2016 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "at91sam9260.dtsi"
/ {
model = "Atmel at91sam9260ek";
compatible = "atmel,at91sam9260ek", "atmel,at91sam9260", "atmel,at91sam9";
chosen {
u-boot,dm-pre-reloc;
stdout-path = &dbgu;
};
memory {
reg = <0x20000000 0x4000000>;
};
clocks {
slow_xtal {
clock-frequency = <32768>;
};
main_xtal {
clock-frequency = <18432000>;
};
};
ahb {
apb {
usb1: gadget@fffa4000 {
atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
mmc0: mmc@fffa8000 {
pinctrl-0 = <
&pinctrl_board_mmc0_slot1
&pinctrl_mmc0_clk
&pinctrl_mmc0_slot1_cmd_dat0
&pinctrl_mmc0_slot1_dat1_3>;
status = "okay";
slot@1 {
reg = <1>;
bus-width = <4>;
cd-gpios = <&pioC 9 GPIO_ACTIVE_HIGH>;
};
};
usart0: serial@fffb0000 {
pinctrl-0 =
<&pinctrl_usart0
&pinctrl_usart0_rts
&pinctrl_usart0_cts
&pinctrl_usart0_dtr_dsr
&pinctrl_usart0_dcd
&pinctrl_usart0_ri>;
status = "okay";
};
usart1: serial@fffb4000 {
status = "okay";
};
ssc0: ssc@fffbc000 {
status = "okay";
pinctrl-0 = <&pinctrl_ssc0_tx>;
};
macb0: ethernet@fffc4000 {
phy-mode = "rmii";
status = "okay";
};
spi0: spi@fffc8000 {
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
mtd_dataflash@0 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <50000000>;
reg = <1>;
};
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
status = "okay";
};
pinctrl@fffff400 {
board {
pinctrl_board_mmc0_slot1: mmc0_slot1-board {
atmel,pins =
<AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
};
};
shdwc@fffffd10 {
atmel,wakeup-counter = <10>;
atmel,wakeup-rtt-timer;
};
rtc@fffffd20 {
atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
status = "okay";
};
watchdog@fffffd40 {
status = "okay";
};
gpbr: syscon@fffffd50 {
status = "okay";
};
};
usb0: ohci@00500000 {
num-ports = <2>;
status = "okay";
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
};
};
gpio_keys {
compatible = "gpio-keys";
btn3 {
label = "Button 3";
gpios = <&pioA 30 GPIO_ACTIVE_LOW>;
linux,code = <0x103>;
wakeup-source;
};
btn4 {
label = "Button 4";
gpios = <&pioA 31 GPIO_ACTIVE_LOW>;
linux,code = <0x104>;
wakeup-source;
};
};
i2c-gpio-0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
24c512@50 {
compatible = "24c512";
reg = <0x50>;
};
};
leds {
compatible = "gpio-leds";
ds1 {
label = "ds1";
gpios = <&pioA 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
ds5 {
label = "ds5";
gpios = <&pioA 6 GPIO_ACTIVE_LOW>;
};
};
};

198
arch/arm/dts/at91sam9263.dtsi
View file

@ -77,12 +77,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@ -100,6 +102,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@ -114,7 +117,7 @@
clocks = <&main_osc>;
};
plla: pllack {
plla: pllack@0 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
@ -126,7 +129,7 @@
<190000000 240000000 2 1>;
};
pllb: pllbck {
pllb: pllbck@1 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKB>;
@ -145,6 +148,7 @@
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 120000000>;
atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc;
};
usb: usbck {
@ -161,25 +165,25 @@
interrupt-parent = <&pmc>;
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
prog0: prog0 {
prog0: prog@0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog1 {
prog1: prog@1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
prog2: prog2 {
prog2: prog@2 {
#clock-cells = <0>;
reg = <2>;
interrupts = <AT91_PMC_PCKRDY(2)>;
};
prog3: prog3 {
prog3: prog@3 {
#clock-cells = <0>;
reg = <3>;
interrupts = <AT91_PMC_PCKRDY(3)>;
@ -191,37 +195,37 @@
#address-cells = <1>;
#size-cells = <0>;
uhpck: uhpck {
uhpck: uhpck@6 {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
udpck: udpck {
udpck: udpck@7 {
#clock-cells = <0>;
reg = <7>;
clocks = <&usb>;
};
pck0: pck0 {
pck0: pck0@8 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
pck1: pck1@9 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
pck2: pck2 {
pck2: pck2@10 {
#clock-cells = <0>;
reg = <10>;
clocks = <&prog2>;
};
pck3: pck3 {
pck3: pck3@11 {
#clock-cells = <0>;
reg = <11>;
clocks = <&prog3>;
@ -233,123 +237,127 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
pioA_clk: pioA_clk {
pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
u-boot,dm-pre-reloc;
};
pioB_clk: pioB_clk {
pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
u-boot,dm-pre-reloc;
};
pioCDE_clk: pioCDE_clk {
pioCDE_clk: pioCDE_clk@4 {
#clock-cells = <0>;
reg = <4>;
u-boot,dm-pre-reloc;
};
usart0_clk: usart0_clk {
usart0_clk: usart0_clk@7 {
#clock-cells = <0>;
reg = <7>;
};
usart1_clk: usart1_clk {
usart1_clk: usart1_clk@8 {
#clock-cells = <0>;
reg = <8>;
};
usart2_clk: usart2_clk {
usart2_clk: usart2_clk@9 {
#clock-cells = <0>;
reg = <9>;
};
mci0_clk: mci0_clk {
mci0_clk: mci0_clk@10 {
#clock-cells = <0>;
reg = <10>;
};
mci1_clk: mci1_clk {
mci1_clk: mci1_clk@11 {
#clock-cells = <0>;
reg = <11>;
};
can_clk: can_clk {
can_clk: can_clk@12 {
#clock-cells = <0>;
reg = <12>;
};
twi0_clk: twi0_clk {
twi0_clk: twi0_clk@13 {
#clock-cells = <0>;
reg = <13>;
};
spi0_clk: spi0_clk {
spi0_clk: spi0_clk@14 {
#clock-cells = <0>;
reg = <14>;
};
spi1_clk: spi1_clk {
spi1_clk: spi1_clk@15 {
#clock-cells = <0>;
reg = <15>;
};
ssc0_clk: ssc0_clk {
ssc0_clk: ssc0_clk@16 {
#clock-cells = <0>;
reg = <16>;
};
ssc1_clk: ssc1_clk {
ssc1_clk: ssc1_clk@17 {
#clock-cells = <0>;
reg = <17>;
};
ac97_clk: ac97_clk {
ac97_clk: ac97_clk@18 {
#clock-cells = <0>;
reg = <18>;
};
tcb_clk: tcb_clk {
tcb_clk: tcb_clk@19 {
#clock-cells = <0>;
reg = <19>;
};
pwm_clk: pwm_clk {
pwm_clk: pwm_clk@20 {
#clock-cells = <0>;
reg = <20>;
};
macb0_clk: macb0_clk {
macb0_clk: macb0_clk@21 {
#clock-cells = <0>;
reg = <21>;
};
g2de_clk: g2de_clk {
g2de_clk: g2de_clk@23 {
#clock-cells = <0>;
reg = <23>;
};
udc_clk: udc_clk {
udc_clk: udc_clk@24 {
#clock-cells = <0>;
reg = <24>;
};
isi_clk: isi_clk {
isi_clk: isi_clk@25 {
#clock-cells = <0>;
reg = <25>;
};
lcd_clk: lcd_clk {
lcd_clk: lcd_clk@26 {
#clock-cells = <0>;
reg = <26>;
};
dma_clk: dma_clk {
dma_clk: dma_clk@27 {
#clock-cells = <0>;
reg = <27>;
};
ohci_clk: ohci_clk {
ohci_clk: ohci_clk@29 {
#clock-cells = <0>;
reg = <29>;
};
@ -398,6 +406,12 @@
#size-cells = <1>;
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
ranges = <0xfffff200 0xfffff200 0xa00>;
reg = <0xfffff200 0x200
0xfffff400 0x200
0xfffff600 0x200
0xfffff800 0x200
0xfffffa00 0x200
>;
atmel,mux-mask = <
/* A B */
@ -412,8 +426,8 @@
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
};
@ -707,60 +721,66 @@
};
};
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
};
};
pioB: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
};
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
u-boot,dm-pre-reloc;
};
pioC: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
};
pioB: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
u-boot,dm-pre-reloc;
};
pioD: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
};
pioC: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
u-boot,dm-pre-reloc;
};
pioE: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
};
pioD: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
u-boot,dm-pre-reloc;
};
pioE: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioCDE_clk>;
u-boot,dm-pre-reloc;
};
dbgu: serial@ffffee00 {
@ -1019,7 +1039,7 @@
};
};
i2c@0 {
i2c-gpio-0 {
compatible = "i2c-gpio";
gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
&pioB 5 GPIO_ACTIVE_HIGH /* scl */

229
arch/arm/dts/at91sam9263ek.dts Normal file
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@ -0,0 +1,229 @@
/*
* at91sam9263ek.dts - Device Tree file for Atmel at91sam9263 reference board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2 only
*/
/dts-v1/;
#include "at91sam9263.dtsi"
/ {
model = "Atmel at91sam9263ek";
compatible = "atmel,at91sam9263ek", "atmel,at91sam9263", "atmel,at91sam9";
chosen {
bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
};
memory {
reg = <0x20000000 0x4000000>;
};
clocks {
slow_xtal {
clock-frequency = <32768>;
};
main_xtal {
clock-frequency = <16367660>;
};
};
ahb {
apb {
dbgu: serial@ffffee00 {
u-boot,dm-pre-reloc;
status = "okay";
};
usart0: serial@fff8c000 {
pinctrl-0 = <
&pinctrl_usart0
&pinctrl_usart0_rts
&pinctrl_usart0_cts>;
status = "okay";
};
macb0: ethernet@fffbc000 {
phy-mode = "rmii";
status = "okay";
};
usb1: gadget@fff78000 {
atmel,vbus-gpio = <&pioA 25 GPIO_ACTIVE_HIGH>;
status = "okay";
};
mmc0: mmc@fff80000 {
pinctrl-0 = <
&pinctrl_board_mmc0
&pinctrl_mmc0_clk
&pinctrl_mmc0_slot0_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioE 18 GPIO_ACTIVE_HIGH>;
wp-gpios = <&pioE 19 GPIO_ACTIVE_HIGH>;
};
};
pinctrl@fffff200 {
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
<AT91_PIOE 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PE18 gpio CD pin pull up and deglitch */
AT91_PIOE 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PE19 gpio WP pin pull up */
};
};
};
spi0: spi@fffa4000 {
status = "okay";
cs-gpios = <&pioA 5 0>, <0>, <0>, <0>;
mtd_dataflash@0 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <50000000>;
reg = <0>;
};
};
watchdog@fffffd40 {
status = "okay";
};
};
fb0: fb@0x00700000 {
display = <&display0>;
status = "okay";
display0: display {
bits-per-pixel = <16>;
atmel,lcdcon-backlight;
atmel,dmacon = <0x1>;
atmel,lcdcon2 = <0x80008002>;
atmel,guard-time = <1>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <4965000>;
hactive = <240>;
vactive = <320>;
hback-porch = <1>;
hfront-porch = <33>;
vback-porch = <1>;
vfront-porch = <0>;
hsync-len = <5>;
vsync-len = <1>;
hsync-active = <1>;
vsync-active = <1>;
};
};
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt = <1>;
status = "okay";
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x20000>;
};
barebox@20000 {
label = "barebox";
reg = <0x20000 0x40000>;
};
bareboxenv@60000 {
label = "bareboxenv";
reg = <0x60000 0x20000>;
};
bareboxenv2@80000 {
label = "bareboxenv2";
reg = <0x80000 0x20000>;
};
oftree@80000 {
label = "oftree";
reg = <0xa0000 0x20000>;
};
kernel@a0000 {
label = "kernel";
reg = <0xc0000 0x400000>;
};
rootfs@4a0000 {
label = "rootfs";
reg = <0x4c0000 0x7800000>;
};
data@7ca0000 {
label = "data";
reg = <0x7cc0000 0x8340000>;
};
};
usb0: ohci@00a00000 {
num-ports = <2>;
status = "okay";
atmel,vbus-gpio = <&pioA 24 GPIO_ACTIVE_HIGH
&pioA 21 GPIO_ACTIVE_HIGH
>;
};
};
leds {
compatible = "gpio-leds";
d3 {
label = "d3";
gpios = <&pioB 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
d2 {
label = "d2";
gpios = <&pioC 29 GPIO_ACTIVE_LOW>;
linux,default-trigger = "nand-disk";
};
};
gpio_keys {
compatible = "gpio-keys";
left_click {
label = "left_click";
gpios = <&pioC 5 GPIO_ACTIVE_LOW>;
linux,code = <272>;
wakeup-source;
};
right_click {
label = "right_click";
gpios = <&pioC 4 GPIO_ACTIVE_LOW>;
linux,code = <273>;
wakeup-source;
};
};
i2c-gpio-0 {
status = "okay";
24c512@50 {
compatible = "24c512";
reg = <0x50>;
pagesize = <128>;
};
};
};

29
arch/arm/dts/at91sam9g15.dtsi Normal file
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@ -0,0 +1,29 @@
/*
* at91sam9g15.dtsi - Device Tree Include file for AT91SAM9G15 SoC
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
#include "at91sam9x5.dtsi"
#include "at91sam9x5_lcd.dtsi"
/ {
model = "Atmel AT91SAM9G15 SoC";
compatible = "atmel,at91sam9g15", "atmel,at91sam9x5";
ahb {
apb {
pinctrl@fffff400 {
atmel,mux-mask = <
/* A B C */
0xffffffff 0xffe0399f 0x00000000 /* pioA */
0x00040000 0x00047e3f 0x00000000 /* pioB */
0xfdffffff 0x00000000 0xb83fffff /* pioC */
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
};
};
};

26
arch/arm/dts/at91sam9g15ek.dts Normal file
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@ -0,0 +1,26 @@
/*
* at91sam9g15ek.dts - Device Tree file for AT91SAM9G15-EK board
*
* Copyright (C) 2012 Atmel,
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
#include "at91sam9g15.dtsi"
#include "at91sam9x5dm.dtsi"
#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9G15-EK";
compatible = "atmel,at91sam9g15ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
ahb {
apb {
hlcdc: hlcdc@f8038000 {
u-boot,dm-pre-reloc;
status = "okay";
};
};
};
};

4
arch/arm/dts/at91sam9g20.dtsi
View file

@ -40,7 +40,7 @@
};
pmc: pmc@fffffc00 {
plla: pllack {
plla: pllack@0 {
atmel,clk-input-range = <2000000 32000000>;
atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
<695000000 750000000 1 0>,
@ -52,7 +52,7 @@
<400000000 450000000 3 1>;
};
pllb: pllbck {
pllb: pllbck@1 {
compatible = "atmel,at91sam9g20-clk-pllb";
atmel,clk-input-range = <2000000 32000000>;
atmel,pll-clk-output-ranges = <30000000 100000000 0 0>;

29
arch/arm/dts/at91sam9g20ek.dts Normal file
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@ -0,0 +1,29 @@
/*
* at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
/dts-v1/;
#include "at91sam9g20ek_common.dtsi"
/ {
model = "Atmel at91sam9g20ek";
compatible = "atmel,at91sam9g20ek", "atmel,at91sam9g20", "atmel,at91sam9";
leds {
compatible = "gpio-leds";
ds1 {
label = "ds1";
gpios = <&pioA 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
ds5 {
label = "ds5";
gpios = <&pioA 6 GPIO_ACTIVE_LOW>;
};
};
};

56
arch/arm/dts/at91sam9g20ek_2mmc.dts Normal file
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@ -0,0 +1,56 @@
/*
* at91sam9g20ek_2mmc.dts - Device Tree file for Atmel at91sam9g20ek 2 MMC board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
/dts-v1/;
#include "at91sam9g20ek_common.dtsi"
/ {
model = "Atmel at91sam9g20ek 2 mmc";
compatible = "atmel,at91sam9g20ek_2mmc", "atmel,at91sam9g20", "atmel,at91sam9";
ahb {
apb{
mmc0: mmc@fffa8000 {
/* clk already mux wuth slot0 */
pinctrl-0 = <
&pinctrl_board_mmc0_slot0
&pinctrl_mmc0_clk
&pinctrl_mmc0_slot0_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioC 2 GPIO_ACTIVE_HIGH>;
};
};
pinctrl@fffff400 {
mmc0_slot0 {
pinctrl_board_mmc0_slot0: mmc0_slot0-board {
atmel,pins =
<AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC2 gpio CD pin pull up and deglitch */
};
};
};
};
};
leds {
compatible = "gpio-leds";
ds1 {
label = "ds1";
gpios = <&pioB 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
ds5 {
label = "ds5";
gpios = <&pioB 8 GPIO_ACTIVE_LOW>;
};
};
};

227
arch/arm/dts/at91sam9g20ek_common.dtsi Normal file
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@ -0,0 +1,227 @@
/*
* at91sam9g20ek_common.dtsi - Device Tree file for Atmel at91sam9g20ek board
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
#include "at91sam9g20.dtsi"
/ {
chosen {
u-boot,dm-pre-reloc;
stdout-path = &dbgu;
};
memory {
reg = <0x20000000 0x4000000>;
};
clocks {
slow_xtal {
clock-frequency = <32768>;
};
main_xtal {
clock-frequency = <18432000>;
};
};
ahb {
apb {
pinctrl@fffff400 {
board {
pinctrl_pck0_as_mck: pck0_as_mck {
atmel,pins =
<AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC1 periph B */
};
};
mmc0_slot1 {
pinctrl_board_mmc0_slot1: mmc0_slot1-board {
atmel,pins =
<AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC9 gpio CD pin pull up and deglitch */
};
};
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
status = "okay";
};
usart0: serial@fffb0000 {
pinctrl-0 =
<&pinctrl_usart0
&pinctrl_usart0_rts
&pinctrl_usart0_cts
&pinctrl_usart0_dtr_dsr
&pinctrl_usart0_dcd
&pinctrl_usart0_ri>;
status = "okay";
};
usart1: serial@fffb4000 {
status = "okay";
};
macb0: ethernet@fffc4000 {
phy-mode = "rmii";
status = "okay";
};
usb1: gadget@fffa4000 {
atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
mmc0: mmc@fffa8000 {
pinctrl-0 = <
&pinctrl_board_mmc0_slot1
&pinctrl_mmc0_clk
&pinctrl_mmc0_slot1_cmd_dat0
&pinctrl_mmc0_slot1_dat1_3>;
status = "okay";
slot@1 {
reg = <1>;
bus-width = <4>;
cd-gpios = <&pioC 9 GPIO_ACTIVE_HIGH>;
};
};
ssc0: ssc@fffbc000 {
status = "okay";
pinctrl-0 = <&pinctrl_ssc0_tx>;
};
spi0: spi@fffc8000 {
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
mtd_dataflash@0 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <50000000>;
reg = <1>;
};
};
shdwc@fffffd10 {
atmel,wakeup-counter = <10>;
atmel,wakeup-rtt-timer;
};
rtc@fffffd20 {
atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
status = "okay";
};
watchdog@fffffd40 {
status = "okay";
};
gpbr: syscon@fffffd50 {
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x20000>;
};
barebox@20000 {
label = "barebox";
reg = <0x20000 0x40000>;
};
bareboxenv@60000 {
label = "bareboxenv";
reg = <0x60000 0x20000>;
};
bareboxenv2@80000 {
label = "bareboxenv2";
reg = <0x80000 0x20000>;
};
oftree@80000 {
label = "oftree";
reg = <0xa0000 0x20000>;
};
kernel@a0000 {
label = "kernel";
reg = <0xc0000 0x400000>;
};
rootfs@4a0000 {
label = "rootfs";
reg = <0x4c0000 0x7800000>;
};
data@7ca0000 {
label = "data";
reg = <0x7cc0000 0x8340000>;
};
};
usb0: ohci@00500000 {
num-ports = <2>;
status = "okay";
};
};
i2c-gpio-0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
24c512@50 {
compatible = "24c512";
reg = <0x50>;
};
wm8731: wm8731@1b {
compatible = "wm8731";
reg = <0x1b>;
};
};
gpio_keys {
compatible = "gpio-keys";
btn3 {
label = "Button 3";
gpios = <&pioA 30 GPIO_ACTIVE_LOW>;
linux,code = <0x103>;
wakeup-source;
};
btn4 {
label = "Button 4";
gpios = <&pioA 31 GPIO_ACTIVE_LOW>;
linux,code = <0x104>;
wakeup-source;
};
};
sound {
compatible = "atmel,at91sam9g20ek-wm8731-audio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pck0_as_mck>;
atmel,model = "wm8731 @ AT91SAMG20EK";
atmel,audio-routing =
"Ext Spk", "LHPOUT",
"Int Mic", "MICIN";
atmel,ssc-controller = <&ssc0>;
atmel,audio-codec = <&wm8731>;
};
};

31
arch/arm/dts/at91sam9g25.dtsi Normal file
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@ -0,0 +1,31 @@
/*
* at91sam9g25.dtsi - Device Tree Include file for AT91SAM9G25 SoC
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
#include "at91sam9x5.dtsi"
#include "at91sam9x5_isi.dtsi"
#include "at91sam9x5_usart3.dtsi"
#include "at91sam9x5_macb0.dtsi"
/ {
model = "Atmel AT91SAM9G25 SoC";
compatible = "atmel,at91sam9g25", "atmel,at91sam9x5";
ahb {
apb {
pinctrl@fffff400 {
atmel,mux-mask = <
/* A B C */
0xffffffff 0xffe0399f 0xc000001c /* pioA */
0x0007ffff 0x8000fe3f 0x00000000 /* pioB */
0x80000000 0x07c0ffff 0xb83fffff /* pioC */
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
};
};
};

69
arch/arm/dts/at91sam9g25ek.dts Normal file
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@ -0,0 +1,69 @@
/*
* at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board
*
* Copyright (C) 2012 Atmel,
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
#include "at91sam9g25.dtsi"
#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9G25-EK";
compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
ahb {
apb {
spi0: spi@f0000000 {
status = "disabled";
};
mmc1: mmc@f000c000 {
status = "disabled";
};
i2c0: i2c@f8010000 {
ov2640: camera@0x30 {
compatible = "ovti,ov2640";
reg = <0x30>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>;
pwdn-gpios = <&pioA 13 GPIO_ACTIVE_HIGH>;
clocks = <&pck0>;
clock-names = "xvclk";
assigned-clocks = <&pck0>;
assigned-clock-rates = <25000000>;
status = "okay";
port {
ov2640_0: endpoint {
remote-endpoint = <&isi_0>;
bus-width = <8>;
};
};
};
};
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
};
isi: isi@f8048000 {
status = "okay";
port {
isi_0: endpoint@0 {
reg = <0>;
remote-endpoint = <&ov2640_0>;
bus-width = <8>;
vsync-active = <1>;
hsync-active = <1>;
};
};
};
};
};
};

30
arch/arm/dts/at91sam9g35.dtsi Normal file
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@ -0,0 +1,30 @@
/*
* at91sam9g35.dtsi - Device Tree Include file for AT91SAM9G35 SoC
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
#include "at91sam9x5.dtsi"
#include "at91sam9x5_lcd.dtsi"
#include "at91sam9x5_macb0.dtsi"
/ {
model = "Atmel AT91SAM9G35 SoC";
compatible = "atmel,at91sam9g35", "atmel,at91sam9x5";
ahb {
apb {
pinctrl@fffff400 {
atmel,mux-mask = <
/* A B C */
0xffffffff 0xffe0399f 0xc000000c /* pioA */
0x000406ff 0x00047e3f 0x00000000 /* pioB */
0xfdffffff 0x00000000 0xb83fffff /* pioC */
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
};
};
};

31
arch/arm/dts/at91sam9g35ek.dts Normal file
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@ -0,0 +1,31 @@
/*
* at91sam9g35ek.dts - Device Tree file for AT91SAM9G35-EK board
*
* Copyright (C) 2012 Atmel,
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
#include "at91sam9g35.dtsi"
#include "at91sam9x5dm.dtsi"
#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9G35-EK";
compatible = "atmel,at91sam9g35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
ahb {
apb {
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
};
hlcdc: hlcdc@f8038000 {
u-boot,dm-pre-reloc;
status = "okay";
};
};
};
};

218
arch/arm/dts/at91sam9g45.dtsi
View file

@ -84,12 +84,14 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
u-boot,dm-pre-reloc;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>;
@ -121,6 +123,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@ -135,7 +138,7 @@
clocks = <&main_osc>;
};
plla: pllack {
plla: pllack@0 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
@ -173,6 +176,7 @@
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
atmel,clk-output-range = <0 133333333>;
atmel,clk-divisors = <1 2 4 3>;
u-boot,dm-pre-reloc;
};
usb: usbck {
@ -188,13 +192,13 @@
interrupt-parent = <&pmc>;
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
prog0: prog0 {
prog0: prog@0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog1 {
prog1: prog@1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
@ -206,25 +210,25 @@
#address-cells = <1>;
#size-cells = <0>;
ddrck: ddrck {
ddrck: ddrck@2 {
#clock-cells = <0>;
reg = <2>;
clocks = <&mck>;
};
uhpck: uhpck {
uhpck: uhpck@6 {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
pck0: pck0 {
pck0: pck0@8 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
pck1: pck1@9 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
@ -237,147 +241,147 @@
#size-cells = <0>;
clocks = <&mck>;
pioA_clk: pioA_clk {
pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
};
pioB_clk: pioB_clk {
pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
};
pioC_clk: pioC_clk {
pioC_clk: pioC_clk@4 {
#clock-cells = <0>;
reg = <4>;
};
pioDE_clk: pioDE_clk {
pioDE_clk: pioDE_clk@5 {
#clock-cells = <0>;
reg = <5>;
};
trng_clk: trng_clk {
trng_clk: trng_clk@6 {
#clock-cells = <0>;
reg = <6>;
};
usart0_clk: usart0_clk {
usart0_clk: usart0_clk@7 {
#clock-cells = <0>;
reg = <7>;
};
usart1_clk: usart1_clk {
usart1_clk: usart1_clk@8 {
#clock-cells = <0>;
reg = <8>;
};
usart2_clk: usart2_clk {
usart2_clk: usart2_clk@9 {
#clock-cells = <0>;
reg = <9>;
};
usart3_clk: usart3_clk {
usart3_clk: usart3_clk@10 {
#clock-cells = <0>;
reg = <10>;
};
mci0_clk: mci0_clk {
mci0_clk: mci0_clk@11 {
#clock-cells = <0>;
reg = <11>;
};
twi0_clk: twi0_clk {
twi0_clk: twi0_clk@12 {
#clock-cells = <0>;
reg = <12>;
};
twi1_clk: twi1_clk {
twi1_clk: twi1_clk@13 {
#clock-cells = <0>;
reg = <13>;
};
spi0_clk: spi0_clk {
spi0_clk: spi0_clk@14 {
#clock-cells = <0>;
reg = <14>;
};
spi1_clk: spi1_clk {
spi1_clk: spi1_clk@15 {
#clock-cells = <0>;
reg = <15>;
};
ssc0_clk: ssc0_clk {
ssc0_clk: ssc0_clk@16 {
#clock-cells = <0>;
reg = <16>;
};
ssc1_clk: ssc1_clk {
ssc1_clk: ssc1_clk@17 {
#clock-cells = <0>;
reg = <17>;
};
tcb0_clk: tcb0_clk {
tcb0_clk: tcb0_clk@18 {
#clock-cells = <0>;
reg = <18>;
};
pwm_clk: pwm_clk {
pwm_clk: pwm_clk@19 {
#clock-cells = <0>;
reg = <19>;
};
adc_clk: adc_clk {
adc_clk: adc_clk@20 {
#clock-cells = <0>;
reg = <20>;
};
dma0_clk: dma0_clk {
dma0_clk: dma0_clk@21 {
#clock-cells = <0>;
reg = <21>;
};
uhphs_clk: uhphs_clk {
uhphs_clk: uhphs_clk@22 {
#clock-cells = <0>;
reg = <22>;
};
lcd_clk: lcd_clk {
lcd_clk: lcd_clk@23 {
#clock-cells = <0>;
reg = <23>;
};
ac97_clk: ac97_clk {
ac97_clk: ac97_clk@24 {
#clock-cells = <0>;
reg = <24>;
};
macb0_clk: macb0_clk {
macb0_clk: macb0_clk@25 {
#clock-cells = <0>;
reg = <25>;
};
isi_clk: isi_clk {
isi_clk: isi_clk@26 {
#clock-cells = <0>;
reg = <26>;
};
udphs_clk: udphs_clk {
udphs_clk: udphs_clk@27 {
#clock-cells = <0>;
reg = <27>;
};
aestdessha_clk: aestdessha_clk {
aestdessha_clk: aestdessha_clk@28 {
#clock-cells = <0>;
reg = <28>;
};
mci1_clk: mci1_clk {
mci1_clk: mci1_clk@29 {
#clock-cells = <0>;
reg = <29>;
};
vdec_clk: vdec_clk {
vdec_clk: vdec_clk@30 {
#clock-cells = <0>;
reg = <30>;
};
@ -434,6 +438,13 @@
#size-cells = <1>;
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
ranges = <0xfffff200 0xfffff200 0xa00>;
reg = <0xfffff200 0x200
0xfffff400 0x200
0xfffff600 0x200
0xfffff800 0x200
0xfffffa00 0x200
>;
u-boot,dm-pre-reloc;
atmel,mux-mask = <
/* A B */
@ -476,10 +487,11 @@
};
dbgu {
u-boot,dm-pre-reloc;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
};
};
@ -845,61 +857,61 @@
AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
};
};
};
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
};
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioA_clk>;
};
pioB: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
};
pioB: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioB_clk>;
};
pioC: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
};
pioC: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioC_clk>;
};
pioD: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioDE_clk>;
};
pioD: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioDE_clk>;
};
pioE: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioDE_clk>;
};
pioE: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pioDE_clk>;
};
dbgu: serial@ffffee00 {
@ -978,7 +990,7 @@
trng@fffcc000 {
compatible = "atmel,at91sam9g45-trng";
reg = <0xfffcc000 0x4000>;
reg = <0xfffcc000 0x100>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&trng_clk>;
};
@ -1044,28 +1056,24 @@
atmel,adc-res-names = "lowres", "highres";
atmel,adc-use-res = "highres";
trigger@0 {
reg = <0>;
trigger0 {
trigger-name = "external-rising";
trigger-value = <0x1>;
trigger-external;
};
trigger@1 {
reg = <1>;
trigger1 {
trigger-name = "external-falling";
trigger-value = <0x2>;
trigger-external;
};
trigger@2 {
reg = <2>;
trigger2 {
trigger-name = "external-any";
trigger-value = <0x3>;
trigger-external;
};
trigger@3 {
reg = <3>;
trigger3 {
trigger-name = "continuous";
trigger-value = <0x6>;
};
@ -1169,13 +1177,13 @@
clock-names = "pclk", "hclk";
status = "disabled";
ep0 {
ep@0 {
reg = <0>;
atmel,fifo-size = <64>;
atmel,nb-banks = <1>;
};
ep1 {
ep@1 {
reg = <1>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
@ -1183,7 +1191,7 @@
atmel,can-isoc;
};
ep2 {
ep@2 {
reg = <2>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
@ -1191,21 +1199,21 @@
atmel,can-isoc;
};
ep3 {
ep@3 {
reg = <3>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <3>;
atmel,can-dma;
};
ep4 {
ep@4 {
reg = <4>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <3>;
atmel,can-dma;
};
ep5 {
ep@5 {
reg = <5>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <3>;
@ -1213,7 +1221,7 @@
atmel,can-isoc;
};
ep6 {
ep@6 {
reg = <6>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <3>;
@ -1320,7 +1328,7 @@
};
};
i2c@0 {
i2c-gpio-0 {
compatible = "i2c-gpio";
gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
&pioA 21 GPIO_ACTIVE_HIGH /* scl */

359
arch/arm/dts/at91sam9m10g45ek.dts Normal file
View file

@ -0,0 +1,359 @@
/*
* at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
*
* Copyright (C) 2011 Atmel,
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
#include "at91sam9g45.dtsi"
#include <dt-bindings/pwm/pwm.h>
/ {
model = "Atmel AT91SAM9M10G45-EK";
compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
chosen {
bootargs = "mem=64M root=/dev/mtdblock1 rw rootfstype=jffs2";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
};
memory {
reg = <0x70000000 0x4000000>;
};
clocks {
slow_xtal {
clock-frequency = <32768>;
};
main_xtal {
clock-frequency = <12000000>;
};
};
ahb {
apb {
dbgu: serial@ffffee00 {
status = "okay";
u-boot,dm-pre-reloc;
};
usart1: serial@fff90000 {
pinctrl-0 =
<&pinctrl_usart1
&pinctrl_usart1_rts
&pinctrl_usart1_cts>;
status = "okay";
};
macb0: ethernet@fffbc000 {
phy-mode = "rmii";
status = "okay";
};
i2c0: i2c@fff84000 {
status = "okay";
ov2640: camera@30 {
compatible = "ovti,ov2640";
reg = <0x30>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
resetb-gpios = <&pioD 12 GPIO_ACTIVE_LOW>;
pwdn-gpios = <&pioD 13 GPIO_ACTIVE_HIGH>;
clocks = <&pck1>;
clock-names = "xvclk";
assigned-clocks = <&pck1>;
assigned-clock-rates = <25000000>;
port {
ov2640_0: endpoint {
remote-endpoint = <&isi_0>;
bus-width = <8>;
};
};
};
};
i2c1: i2c@fff88000 {
status = "okay";
};
watchdog@fffffd40 {
status = "okay";
};
mmc0: mmc@fff80000 {
pinctrl-0 = <
&pinctrl_board_mmc0
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 10 GPIO_ACTIVE_HIGH>;
};
};
mmc1: mmc@fffd0000 {
pinctrl-0 = <
&pinctrl_board_mmc1
&pinctrl_mmc1_slot0_clk_cmd_dat0
&pinctrl_mmc1_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 11 GPIO_ACTIVE_HIGH>;
wp-gpios = <&pioD 29 GPIO_ACTIVE_HIGH>;
};
};
pinctrl@fffff200 {
camera_sensor {
pinctrl_pck1_as_isi_mck: pck1_as_isi_mck-0 {
atmel,pins =
<AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_sensor_reset: sensor_reset-0 {
atmel,pins =
<AT91_PIOD 12 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
pinctrl_sensor_power: sensor_power-0 {
atmel,pins =
<AT91_PIOD 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
};
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD10 gpio CD pin pull up and deglitch */
};
};
mmc1 {
pinctrl_board_mmc1: mmc1-board {
atmel,pins =
<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PD11 gpio CD pin pull up and deglitch */
AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD29 gpio WP pin pull up */
};
};
pwm0 {
pinctrl_pwm_leds: pwm-led {
atmel,pins =
<AT91_PIOD 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PD0 periph B */
AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PD31 periph B */
};
};
};
spi0: spi@fffa4000{
status = "okay";
cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
mtd_dataflash@0 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <13000000>;
reg = <0>;
};
};
usb2: gadget@fff78000 {
atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>;
status = "okay";
};
adc0: adc@fffb0000 {
pinctrl-names = "default";
pinctrl-0 = <
&pinctrl_adc0_ad0
&pinctrl_adc0_ad1
&pinctrl_adc0_ad2
&pinctrl_adc0_ad3
&pinctrl_adc0_ad4
&pinctrl_adc0_ad5
&pinctrl_adc0_ad6
&pinctrl_adc0_ad7>;
atmel,adc-ts-wires = <4>;
status = "okay";
};
isi@fffb4000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_isi_data_0_7>;
status = "okay";
port {
isi_0: endpoint {
remote-endpoint = <&ov2640_0>;
bus-width = <8>;
vsync-active = <1>;
hsync-active = <1>;
};
};
};
pwm0: pwm@fffb8000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm_leds>;
};
rtc@fffffd20 {
atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
status = "okay";
};
gpbr: syscon@fffffd60 {
status = "okay";
};
rtc@fffffdb0 {
status = "okay";
};
};
fb0: fb@0x00500000 {
display = <&display0>;
status = "okay";
display0: display {
bits-per-pixel = <32>;
atmel,lcdcon-backlight;
atmel,dmacon = <0x1>;
atmel,lcdcon2 = <0x80008002>;
atmel,guard-time = <9>;
atmel,lcd-wiring-mode = "RGB";
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hback-porch = <1>;
hfront-porch = <1>;
vback-porch = <40>;
vfront-porch = <1>;
hsync-len = <45>;
vsync-len = <1>;
};
};
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
boot@0 {
label = "bootstrap/uboot/kernel";
reg = <0x0 0x400000>;
};
rootfs@400000 {
label = "rootfs";
reg = <0x400000 0x3C00000>;
};
data@4000000 {
label = "data";
reg = <0x4000000 0xC000000>;
};
};
usb0: ohci@00700000 {
status = "okay";
num-ports = <2>;
atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW
&pioD 3 GPIO_ACTIVE_LOW>;
};
usb1: ehci@00800000 {
status = "okay";
};
};
leds {
compatible = "gpio-leds";
d8 {
label = "d8";
gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
pwmleds {
compatible = "pwm-leds";
d6 {
label = "d6";
pwms = <&pwm0 3 5000 PWM_POLARITY_INVERTED>;
max-brightness = <255>;
linux,default-trigger = "nand-disk";
};
d7 {
label = "d7";
pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>;
max-brightness = <255>;
linux,default-trigger = "mmc0";
};
};
gpio_keys {
compatible = "gpio-keys";
left_click {
label = "left_click";
gpios = <&pioB 6 GPIO_ACTIVE_LOW>;
linux,code = <272>;
wakeup-source;
};
right_click {
label = "right_click";
gpios = <&pioB 7 GPIO_ACTIVE_LOW>;
linux,code = <273>;
wakeup-source;
};
left {
label = "Joystick Left";
gpios = <&pioB 14 GPIO_ACTIVE_LOW>;
linux,code = <105>;
};
right {
label = "Joystick Right";
gpios = <&pioB 15 GPIO_ACTIVE_LOW>;
linux,code = <106>;
};
up {
label = "Joystick Up";
gpios = <&pioB 16 GPIO_ACTIVE_LOW>;
linux,code = <103>;
};
down {
label = "Joystick Down";
gpios = <&pioB 17 GPIO_ACTIVE_LOW>;
linux,code = <108>;
};
enter {
label = "Joystick Press";
gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
linux,code = <28>;
};
};
};

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/*
* at91sam9n12ek.dts - Device Tree file for AT91SAM9N12-EK board
*
* Copyright (C) 2012 Atmel,
* 2012 Hong Xu <hong.xu@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
#include "at91sam9n12.dtsi"
/ {
model = "Atmel AT91SAM9N12-EK";
compatible = "atmel,at91sam9n12ek", "atmel,at91sam9n12", "atmel,at91sam9";
chosen {
bootargs = "root=/dev/mtdblock1 rw rootfstype=jffs2";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
};
memory {
reg = <0x20000000 0x8000000>;
};
clocks {
slow_xtal {
clock-frequency = <32768>;
};
main_xtal {
clock-frequency = <16000000>;
};
};
ahb {
apb {
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
status = "okay";
};
ssc0: ssc@f0010000 {
status = "okay";
};
i2c0: i2c@f8010000 {
status = "okay";
wm8904: codec@1a {
compatible = "wlf,wm8904";
reg = <0x1a>;
clocks = <&pck0>;
clock-names = "mclk";
};
qt1070: keyboard@1b {
compatible = "qt1070";
reg = <0x1b>;
interrupt-parent = <&pioA>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qt1070_irq>;
};
};
mmc0: mmc@f0008000 {
pinctrl-names = "default";
pinctrl-0 = <
&pinctrl_board_mmc0
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioA 7 GPIO_ACTIVE_HIGH>;
};
};
pinctrl@fffff400 {
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PA7 gpio CD pin pull up and deglitch */
};
};
qt1070 {
pinctrl_qt1070_irq: qt1070_irq {
atmel,pins =
<AT91_PIOA 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
};
sound {
pinctrl_pck0_as_audio_mck: pck0_as_audio_mck {
atmel,pins =
<AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
usb1 {
pinctrl_usb1_vbus_sense: usb1_vbus_sense {
atmel,pins =
<AT91_PIOB 16 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB16 gpio usb vbus sense, no pull up and deglitch */
};
};
};
spi0: spi@f0000000 {
status = "okay";
cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
spi_flash@0 {
compatible = "spi-flash";
spi-max-frequency = <50000000>;
reg = <0>;
};
};
hlcdc: hlcdc@f8038000 {
status = "okay";
hlcdc-display-controller {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
port@0 {
hlcdc_panel_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_input>;
};
};
};
};
usb1: gadget@f803c000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1_vbus_sense>;
atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
status = "okay";
};
watchdog@fffffe40 {
status = "okay";
};
rtc@fffffeb0 {
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "hw";
atmel,has-pmecc;
atmel,pmecc-cap = <2>;
atmel,pmecc-sector-size = <512>;
nand-on-flash-bbt;
status = "okay";
};
usb0: ohci@00500000 {
num-ports = <1>;
atmel,vbus-gpio = <&pioB 7 GPIO_ACTIVE_LOW>;
status = "okay";
};
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&hlcdc_pwm 0 50000 0>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
power-supply = <&bl_reg>;
status = "okay";
};
bl_reg: backlight_regulator {
compatible = "regulator-fixed";
regulator-name = "backlight-power-supply";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
status = "okay";
};
leds {
compatible = "gpio-leds";
d8 {
label = "d8";
gpios = <&pioB 4 GPIO_ACTIVE_LOW>;
linux,default-trigger = "mmc0";
};
d9 {
label = "d9";
gpios = <&pioB 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "nand-disk";
};
d10 {
label = "d10";
gpios = <&pioB 6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
gpio_keys {
compatible = "gpio-keys";
enter {
label = "Enter";
gpios = <&pioB 3 GPIO_ACTIVE_LOW>;
linux,code = <28>;
wakeup-source;
};
};
panel: panel {
compatible = "qiaodian,qd43003c0-40", "simple-panel";
backlight = <&backlight>;
power-supply = <&panel_reg>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
panel_input: endpoint@0 {
reg = <0>;
remote-endpoint = <&hlcdc_panel_output>;
};
};
};
panel_reg: panel_regulator {
compatible = "regulator-fixed";
regulator-name = "panel-power-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
status = "okay";
};
sound {
compatible = "atmel,asoc-wm8904";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pck0_as_audio_mck>;
atmel,model = "wm8904 @ AT91SAM9N12";
atmel,audio-routing =
"Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"IN2L", "Line In Jack",
"IN2R", "Line In Jack",
"Mic", "MICBIAS",
"IN1L", "Mic";
atmel,ssc-controller = <&ssc0>;
atmel,audio-codec = <&wm8904>;
};
};

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/*
* at91sam9rlek.dts - Device Tree file for Atmel at91sam9rl reference board
*
* Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
*
* Licensed under GPLv2 only
*/
/dts-v1/;
#include "at91sam9rl.dtsi"
/ {
model = "Atmel at91sam9rlek";
compatible = "atmel,at91sam9rlek", "atmel,at91sam9rl", "atmel,at91sam9";
chosen {
bootargs = "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
};
memory {
reg = <0x20000000 0x4000000>;
};
clocks {
slow_xtal {
clock-frequency = <32768>;
};
main_xtal {
clock-frequency = <12000000>;
};
};
ahb {
fb0: fb@00500000 {
display = <&display0>;
status = "okay";
display0: display {
bits-per-pixel = <16>;
atmel,lcdcon-backlight;
atmel,dmacon = <0x1>;
atmel,lcdcon2 = <0x80008002>;
atmel,guard-time = <1>;
atmel,lcd-wiring-mode = "RGB";
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <4965000>;
hactive = <240>;
vactive = <320>;
hback-porch = <1>;
hfront-porch = <33>;
vback-porch = <1>;
vfront-porch = <0>;
hsync-len = <5>;
vsync-len = <1>;
hsync-active = <1>;
vsync-active = <1>;
};
};
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt = <1>;
status = "okay";
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x40000>;
};
bootloader@40000 {
label = "bootloader";
reg = <0x40000 0x80000>;
};
bootloaderenv@c0000 {
label = "bootloader env";
reg = <0xc0000 0xc0000>;
};
dtb@180000 {
label = "device tree";
reg = <0x180000 0x80000>;
};
kernel@200000 {
label = "kernel";
reg = <0x200000 0x600000>;
};
rootfs@800000 {
label = "rootfs";
reg = <0x800000 0x0f800000>;
};
};
apb {
mmc0: mmc@fffa4000 {
pinctrl-0 = <
&pinctrl_board_mmc0
&pinctrl_mmc0_clk
&pinctrl_mmc0_slot0_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
};
};
usart0: serial@fffb0000 {
pinctrl-0 = <
&pinctrl_usart0
&pinctrl_usart0_rts
&pinctrl_usart0_cts>;
status = "okay";
};
adc0: adc@fffd0000 {
pinctrl-names = "default";
pinctrl-0 = <
&pinctrl_adc0_ad0
&pinctrl_adc0_ad1
&pinctrl_adc0_ad2
&pinctrl_adc0_ad3
&pinctrl_adc0_ad4
&pinctrl_adc0_ad5
&pinctrl_adc0_adtrg>;
atmel,adc-ts-wires = <4>;
status = "okay";
};
usb0: gadget@fffd4000 {
atmel,vbus-gpio = <&pioA 8 GPIO_ACTIVE_HIGH>;
status = "okay";
};
spi0: spi@fffcc000 {
status = "okay";
cs-gpios = <&pioA 28 0>, <0>, <0>, <0>;
mtd_dataflash@0 {
compatible = "atmel,at45", "atmel,dataflash";
spi-max-frequency = <15000000>;
reg = <0>;
};
};
pwm0: pwm@fffc8000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_pwm1_2>,
<&pinctrl_pwm0_pwm2_2>;
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
status = "okay";
};
pinctrl@fffff400 {
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
<AT91_PIOA 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
};
};
watchdog@fffffd40 {
status = "okay";
};
rtc@fffffe00 {
status = "okay";
};
};
};
pwmleds {
compatible = "pwm-leds";
ds1 {
label = "ds1";
pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>;
max-brightness = <255>;
};
ds2 {
label = "ds2";
pwms = <&pwm0 2 5000 PWM_POLARITY_INVERTED>;
max-brightness = <255>;
};
};
leds {
compatible = "gpio-leds";
ds3 {
label = "ds3";
gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
gpio_keys {
compatible = "gpio-keys";
right_click {
label = "right_click";
gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
linux,code = <273>;
wakeup-source;
};
left_click {
label = "left_click";
gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
linux,code = <272>;
wakeup-source;
};
};
i2c-gpio-0 {
status = "okay";
};
i2c-gpio-1 {
status = "okay";
};
};

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/*
* at91sam9x25.dtsi - Device Tree Include file for AT91SAM9X25 SoC
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
#include "at91sam9x5.dtsi"
#include "at91sam9x5_usart3.dtsi"
#include "at91sam9x5_macb0.dtsi"
#include "at91sam9x5_macb1.dtsi"
#include "at91sam9x5_can.dtsi"
/ {
model = "Atmel AT91SAM9X25 SoC";
compatible = "atmel,at91sam9x25", "atmel,at91sam9x5";
ahb {
apb {
pinctrl@fffff400 {
atmel,mux-mask = <
/* A B C */
0xffffffff 0xffe03fff 0xc000001c /* pioA */
0x0007ffff 0x00047e3f 0x00000000 /* pioB */
0x80000000 0xfffd0000 0xb83fffff /* pioC */
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
};
};
};

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/*
* at91sam9x25ek.dts - Device Tree file for AT91SAM9X25-EK board
*
* Copyright (C) 2012 Atmel,
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
#include "at91sam9x25.dtsi"
#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9X25-EK";
compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
ahb {
apb {
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
};
macb1: ethernet@f8030000 {
phy-mode = "rmii";
status = "okay";
};
};
};
};

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/*
* at91sam9x35.dtsi - Device Tree Include file for AT91SAM9X35 SoC
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
#include "at91sam9x5.dtsi"
#include "at91sam9x5_lcd.dtsi"
#include "at91sam9x5_macb0.dtsi"
#include "at91sam9x5_can.dtsi"
/ {
model = "Atmel AT91SAM9X35 SoC";
compatible = "atmel,at91sam9x35", "atmel,at91sam9x5";
ahb {
apb {
pinctrl@fffff400 {
atmel,mux-mask = <
/* A B C */
0xffffffff 0xffe03fff 0xc000000c /* pioA */
0x000406ff 0x00047e3f 0x00000000 /* pioB */
0xfdffffff 0x00000000 0xb83fffff /* pioC */
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
};
};
};

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/*
* at91sam9x35ek.dts - Device Tree file for AT91SAM9X35-EK board
*
* Copyright (C) 2012 Atmel,
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
#include "at91sam9x35.dtsi"
#include "at91sam9x5dm.dtsi"
#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9X35-EK";
compatible = "atmel,at91sam9x35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
ahb {
apb {
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
};
hlcdc: hlcdc@f8038000 {
u-boot,dm-pre-reloc;
status = "okay";
};
};
};
};

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/*
* at91sam9x5_can.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
* Ethernet interface.
*
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
*
* Licensed under GPLv2.
*/
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
ahb {
apb {
pmc: pmc@fffffc00 {
periphck {
can0_clk: can0_clk@29 {
#clock-cells = <0>;
reg = <29>;
};
can1_clk: can1_clk@30 {
#clock-cells = <0>;
reg = <30>;
};
};
};
can0: can@f8000000 {
compatible = "atmel,at91sam9x5-can";
reg = <0xf8000000 0x300>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can0_rx_tx>;
clocks = <&can0_clk>;
clock-names = "can_clk";
status = "disabled";
};
can1: can@f8004000 {
compatible = "atmel,at91sam9x5-can";
reg = <0xf8004000 0x300>;
interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_rx_tx>;
clocks = <&can1_clk>;
clock-names = "can_clk";
status = "disabled";
};
pinctrl@fffff400 {
can0 {
pinctrl_can0_rx_tx: can0_rx_tx {
atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0, conflicts with DRXD */
AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX0, conflicts with DTXD */
};
};
can1 {
pinctrl_can1_rx_tx: can1_rx_tx {
atmel,pins =
<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1, conflicts with RXD1 */
AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX1, conflicts with TXD1 */
};
};
};
};
};
};

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/*
* at91sam9x5_isi.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
* Image Sensor Interface.
*
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
*
* Licensed under GPLv2.
*/
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
ahb {
apb {
pinctrl@fffff400 {
isi {
pinctrl_isi_data_0_7: isi-0-data-0-7 {
atmel,pins =
<AT91_PIOC 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D0, conflicts with LCDDAT0 */
AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D1, conflicts with LCDDAT1 */
AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D2, conflicts with LCDDAT2 */
AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D3, conflicts with LCDDAT3 */
AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D4, conflicts with LCDDAT4 */
AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D5, conflicts with LCDDAT5 */
AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D6, conflicts with LCDDAT6 */
AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D7, conflicts with LCDDAT7 */
AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_PCK, conflicts with LCDDAT12 */
AT91_PIOC 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_HSYNC, conflicts with LCDDAT14 */
AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* ISI_VSYNC, conflicts with LCDDAT13 */
};
pinctrl_isi_data_8_9: isi-0-data-8-9 {
atmel,pins =
<AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D8, conflicts with LCDDAT8 */
AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* ISI_D9, conflicts with LCDDAT9 */
};
pinctrl_isi_data_10_11: isi-0-data-10-11 {
atmel,pins =
<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D10, conflicts with LCDDAT10 */
AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* ISI_D11, conflicts with LCDDAT11 */
};
};
};
pmc: pmc@fffffc00 {
periphck {
isi_clk: isi_clk@25 {
#clock-cells = <0>;
reg = <25>;
};
};
};
isi: isi@f8048000 {
compatible = "atmel,at91sam9g45-isi";
reg = <0xf8048000 0x4000>;
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_isi_data_0_7>;
clocks = <&isi_clk>;
clock-names = "isi_clk";
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
};
};
};
};
};

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/*
* at91sam9x5_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
* LCD controller.
*
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
*
* Licensed under GPLv2.
*/
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
ahb {
apb {
hlcdc: hlcdc@f8038000 {
compatible = "atmel,at91sam9x5-hlcdc";
reg = <0xf8038000 0x4000>;
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
clock-names = "periph_clk","sys_clk", "slow_clk";
status = "disabled";
};
pinctrl@fffff400 {
lcd {
pinctrl_lcd_base: lcd-base-0 {
atmel,pins =
<AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */
AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
};
pinctrl_lcd_pwm: lcd-pwm-0 {
atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
};
pinctrl_lcd_rgb444: lcd-rgb-0 {
atmel,pins =
<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */
};
pinctrl_lcd_rgb565: lcd-rgb-1 {
atmel,pins =
<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */
};
pinctrl_lcd_rgb666: lcd-rgb-2 {
atmel,pins =
<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD17 pin */
};
pinctrl_lcd_rgb888: lcd-rgb-3 {
atmel,pins =
<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
};
};
};
pmc: pmc@fffffc00 {
periphck {
lcdc_clk: lcdc_clk@25 {
#clock-cells = <0>;
reg = <25>;
};
};
systemck {
lcdck: lcdck@3 {
#clock-cells = <0>;
reg = <3>;
clocks = <&mck>;
};
};
};
};
};
};

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/*
* at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
* Ethernet interface.
*
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
*
* Licensed under GPLv2.
*/
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
ahb {
apb {
pinctrl@fffff400 {
macb0 {
pinctrl_macb0_rmii: macb0_rmii-0 {
atmel,pins =
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */
};
pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
atmel,pins =
<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */
AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
};
};
};
pmc: pmc@fffffc00 {
periphck {
macb0_clk: macb0_clk@24 {
#clock-cells = <0>;
reg = <24>;
};
};
};
macb0: ethernet@f802c000 {
compatible = "cdns,at91sam9260-macb", "cdns,macb";
reg = <0xf802c000 0x100>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb0_rmii>;
clocks = <&macb0_clk>, <&macb0_clk>;
clock-names = "hclk", "pclk";
status = "disabled";
};
};
};
};

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/*
* at91sam9x5_macb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 2
* Ethernet interfaces.
*
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
*
* Licensed under GPLv2.
*/
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
ahb {
apb {
pinctrl@fffff400 {
macb1 {
pinctrl_macb1_rmii: macb1_rmii-0 {
atmel,pins =
<AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */
AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */
AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */
AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
};
};
};
pmc: pmc@fffffc00 {
periphck {
macb1_clk: macb1_clk@27 {
#clock-cells = <0>;
reg = <27>;
};
};
};
macb1: ethernet@f8030000 {
compatible = "cdns,at91sam9260-macb", "cdns,macb";
reg = <0xf8030000 0x100>;
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb1_rmii>;
clocks = <&macb1_clk>, <&macb1_clk>;
clock-names = "hclk", "pclk";
status = "disabled";
};
};
};
};

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/*
* at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
* 4 USART.
*
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
*
* Licensed under GPLv2.
*/
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
aliases {
serial4 = &usart3;
};
ahb {
apb {
pinctrl@fffff400 {
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
};
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
};
pinctrl_usart3_sck: usart3_sck-0 {
atmel,pins =
<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
};
};
};
pmc: pmc@fffffc00 {
periphck {
usart3_clk: usart3_clk@8 {
#clock-cells = <0>;
reg = <8>;
};
};
};
usart3: serial@f8028000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8028000 0x200>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>,
<&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
clocks = <&usart3_clk>;
clock-names = "usart";
status = "disabled";
};
};
};
};

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/*
* at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module
*
* Copyright (C) 2012 Atmel,
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/ {
memory {
reg = <0x20000000 0x8000000>;
};
clocks {
slow_xtal {
clock-frequency = <32768>;
};
main_xtal {
clock-frequency = <12000000>;
};
};
ahb {
apb {
pinctrl@fffff400 {
1wire_cm {
pinctrl_1wire_cm: 1wire_cm-0 {
atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */
};
};
};
rtc@fffffeb0 {
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "hw";
atmel,has-pmecc; /* Enable PMECC */
atmel,pmecc-cap = <2>;
atmel,pmecc-sector-size = <512>;
nand-on-flash-bbt;
status = "okay";
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x40000>;
};
uboot@40000 {
label = "u-boot";
reg = <0x40000 0x80000>;
};
ubootenv@c0000 {
label = "U-Boot Env";
reg = <0xc0000 0x140000>;
};
kernel@200000 {
label = "kernel";
reg = <0x200000 0x600000>;
};
rootfs@800000 {
label = "rootfs";
reg = <0x800000 0x1f800000>;
};
};
};
leds {
compatible = "gpio-leds";
pb18 {
label = "pb18";
gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
pd21 {
label = "pd21";
gpios = <&pioD 21 GPIO_ACTIVE_HIGH>;
};
};
1wire_cm {
compatible = "w1-gpio";
gpios = <&pioB 18 GPIO_ACTIVE_HIGH>;
linux,open-drain;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_1wire_cm>;
status = "okay";
};
};

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/*
* at91sam9x5dm.dtsi - Device Tree file for SAM9x5 display module
*
* Copyright (C) 2014 Atmel,
* 2014 Free Electrons
*
* Author: Boris Brezillon <boris.brezillon@free-electrons.com>
*
* Licensed under GPLv2 or later.
*/
/ {
ahb {
apb {
i2c0: i2c@f8010000 {
qt1070: keyboard@1b {
compatible = "qt1070";
reg = <0x1b>;
interrupt-parent = <&pioA>;
interrupts = <7 0x0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qt1070_irq>;
wakeup-source;
};
};
hlcdc: hlcdc@f8038000 {
atmel,vl-bpix = <4>;
atmel,guard-time = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>;
display-timings {
u-boot,dm-pre-reloc;
800x480 {
clock-frequency = <24000000>;
hactive = <800>;
vactive = <480>;
hsync-len = <128>;
hfront-porch = <64>;
hback-porch = <64>;
vfront-porch = <22>;
vback-porch = <21>;
vsync-len = <2>;
u-boot,dm-pre-reloc;
};
};
};
adc0: adc@f804c000 {
atmel,adc-ts-wires = <4>;
atmel,adc-ts-pressure-threshold = <10000>;
status = "okay";
};
pinctrl@fffff400 {
board {
pinctrl_qt1070_irq: qt1070_irq {
atmel,pins =
<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
};
};
};
};
};

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/*
* at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board
*
* Copyright (C) 2012 Atmel,
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
#include "at91sam9x5cm.dtsi"
/ {
model = "Atmel AT91SAM9X5-EK";
compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
chosen {
bootargs = "root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc;
};
ahb {
apb {
mmc0: mmc@f0008000 {
pinctrl-0 = <
&pinctrl_board_mmc0
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
};
};
mmc1: mmc@f000c000 {
pinctrl-0 = <
&pinctrl_board_mmc1
&pinctrl_mmc1_slot0_clk_cmd_dat0
&pinctrl_mmc1_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
};
};
dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
status = "okay";
};
usart0: serial@f801c000 {
status = "okay";
};
usb2: gadget@f803c000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_board_usb2>;
atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
status = "okay";
};
i2c0: i2c@f8010000 {
status = "okay";
wm8731: wm8731@1a {
compatible = "wm8731";
reg = <0x1a>;
};
};
adc0: adc@f804c000 {
atmel,adc-ts-wires = <4>;
atmel,adc-ts-pressure-threshold = <10000>;
status = "okay";
};
pinctrl@fffff400 {
camera_sensor {
pinctrl_pck0_as_isi_mck: pck0_as_isi_mck-0 {
atmel,pins =
<AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_MCK */
};
pinctrl_sensor_power: sensor_power-0 {
atmel,pins =
<AT91_PIOA 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
pinctrl_sensor_reset: sensor_reset-0 {
atmel,pins =
<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
};
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
};
};
mmc1 {
pinctrl_board_mmc1: mmc1-board {
atmel,pins =
<AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD14 gpio CD pin pull up and deglitch */
};
};
usb2 {
pinctrl_board_usb2: usb2-board {
atmel,pins =
<AT91_PIOB 16 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB16 gpio vbus sense, deglitch */
};
};
};
spi0: spi@f0000000 {
status = "okay";
cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
spi_flash@0 {
compatible = "spi-flash";
spi-max-frequency = <50000000>;
reg = <0>;
};
};
watchdog@fffffe40 {
status = "okay";
};
ssc0: ssc@f0010000 {
status = "okay";
};
};
usb0: ohci@00600000 {
status = "okay";
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
&pioD 19 GPIO_ACTIVE_LOW
&pioD 20 GPIO_ACTIVE_LOW
>;
};
usb1: ehci@00700000 {
status = "okay";
};
};
sound {
compatible = "atmel,sam9x5-wm8731-audio";
atmel,model = "wm8731 @ AT91SAM9X5EK";
atmel,audio-routing =
"Headphone Jack", "RHPOUT",
"Headphone Jack", "LHPOUT",
"LLINEIN", "Line In Jack",
"RLINEIN", "Line In Jack";
atmel,ssc-controller = <&ssc0>;
atmel,audio-codec = <&wm8731>;
};
};

4
arch/arm/dts/omap5-u-boot.dtsi
View file

@ -10,6 +10,10 @@
/{
ocp {
u-boot,dm-pre-reloc;
ocp2scp@4a090000 {
compatible = "ti,omap-ocp2scp", "simple-bus";
};
};
};

22
arch/arm/dts/sama5d2.dtsi
View file

@ -29,6 +29,7 @@
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
usb1: ohci@00400000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
@ -66,6 +67,7 @@
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
pmc: pmc@f0014000 {
compatible = "atmel,sama5d2-pmc", "syscon";
@ -73,10 +75,12 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
u-boot,dm-pre-reloc;
main: mainck {
compatible = "atmel,at91sam9x5-clk-main";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
plla: pllack@0 {
@ -87,6 +91,7 @@
atmel,clk-input-range = <12000000 12000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
u-boot,dm-pre-reloc;
};
plladiv: plladivck {
@ -117,6 +122,7 @@
compatible = "atmel,at91sam9x5-clk-utmi";
#clock-cells = <0>;
clocks = <&main>;
u-boot,dm-pre-reloc;
};
mck: masterck {
@ -125,12 +131,14 @@
clocks = <&main>, <&plladiv>, <&utmi>;
atmel,clk-output-range = <124000000 166000000>;
atmel,clk-divisors = <1 2 4 3>;
u-boot,dm-pre-reloc;
};
h32ck: h32mxck {
#clock-cells = <0>;
compatible = "atmel,sama5d4-clk-h32mx";
clocks = <&mck>;
u-boot,dm-pre-reloc;
};
usb: usbck {
@ -221,6 +229,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&h32ck>;
u-boot,dm-pre-reloc;
macb0_clk: macb0_clk@5 {
#clock-cells = <0>;
@ -248,6 +257,7 @@
#clock-cells = <0>;
reg = <18>;
atmel,clk-output-range = <0 83000000>;
u-boot,dm-pre-reloc;
};
flx0_clk: flx0_clk@19 {
@ -290,6 +300,7 @@
#clock-cells = <0>;
reg = <25>;
atmel,clk-output-range = <0 83000000>;
u-boot,dm-pre-reloc;
};
uart2_clk: uart2_clk@26 {
@ -326,6 +337,7 @@
#clock-cells = <0>;
reg = <33>;
atmel,clk-output-range = <0 83000000>;
u-boot,dm-pre-reloc;
};
spi1_clk: spi1_clk@34 {
@ -430,6 +442,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
u-boot,dm-pre-reloc;
dma0_clk: dma0_clk@6 {
#clock-cells = <0>;
@ -469,11 +482,13 @@
sdmmc0_hclk: sdmmc0_hclk@31 {
#clock-cells = <0>;
reg = <31>;
u-boot,dm-pre-reloc;
};
sdmmc1_hclk: sdmmc1_hclk@32 {
#clock-cells = <0>;
reg = <32>;
u-boot,dm-pre-reloc;
};
lcdc_clk: lcdc_clk@45 {
@ -503,15 +518,18 @@
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&main>, <&plla>, <&utmi>, <&mck>;
u-boot,dm-pre-reloc;
sdmmc0_gclk: sdmmc0_gclk@31 {
#clock-cells = <0>;
reg = <31>;
u-boot,dm-pre-reloc;
};
sdmmc1_gclk: sdmmc1_gclk@32 {
#clock-cells = <0>;
reg = <32>;
u-boot,dm-pre-reloc;
};
tcb0_gclk: tcb0_gclk@35 {
@ -600,6 +618,8 @@
uart1: serial@f8020000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8020000 0x100>;
clocks = <&uart1_clk>;
clock-names = "usart";
status = "disabled";
};
@ -661,9 +681,11 @@
clocks = <&pioA_clk>;
gpio-controller;
#gpio-cells = <2>;
u-boot,dm-pre-reloc;
pinctrl {
compatible = "atmel,sama5d2-pinctrl";
u-boot,dm-pre-reloc;
};
};
};

7
arch/arm/mach-at91/include/mach/atmel_mpddrc.h
View file

@ -186,9 +186,14 @@ int ddr3_init(const unsigned int base,
#define ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_73 0x6
#define ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_110 0x7
#define ATMEL_MPDDRC_IO_CALIBR_TZQIO 0x7f
#define ATMEL_MPDDRC_IO_CALIBR_TZQIO (0x7f << 8)
#define ATMEL_MPDDRC_IO_CALIBR_TZQIO_(x) (((x) & 0x7f) << 8)
#define ATMEL_MPDDRC_IO_CALIBR_CALCODEP (0xf << 16)
#define ATMEL_MPDDRC_IO_CALIBR_CALCODEP_(x) (((x) & 0xf) << 16)
#define ATMEL_MPDDRC_IO_CALIBR_CALCODEN (0xf << 20)
#define ATMEL_MPDDRC_IO_CALIBR_CALCODEN_(x) (((x) & 0xf) << 20)
#define ATMEL_MPDDRC_IO_CALIBR_EN_CALIB (0x1 << 4)
/* Bit field in Read Data Path Register */

17
arch/sandbox/dts/test.dts
View file

@ -59,6 +59,23 @@
ping-add = <3>;
};
phy_provider0: gen_phy@0 {
compatible = "sandbox,phy";
#phy-cells = <1>;
};
phy_provider1: gen_phy@1 {
compatible = "sandbox,phy";
#phy-cells = <0>;
broken;
};
gen_phy_user: gen_phy_user {
compatible = "simple-bus";
phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
phy-names = "phy1", "phy2", "phy3";
};
some-bus {
#address-cells = <1>;
#size-cells = <0>;

2
board/atmel/at91sam9260ek/Makefile
View file

@ -10,5 +10,5 @@
#
obj-y += at91sam9260ek.o
obj-y += led.o
obj-$(CONFIG_AT91_LED) += led.o
obj-$(CONFIG_HAS_DATAFLASH) += partition.o

79
board/atmel/at91sam9260ek/at91sam9260ek.c
View file

@ -7,18 +7,13 @@
*/
#include <common.h>
#include <debug_uart.h>
#include <asm/io.h>
#include <asm/arch/at91sam9260_matrix.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <atmel_mci.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
# include <net.h>
#endif
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -67,81 +62,34 @@ static void at91sam9260ek_nand_hw_init(void)
}
#endif
#ifdef CONFIG_MACB
static void at91sam9260ek_macb_hw_init(void)
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
at91_periph_clk_enable(ATMEL_ID_EMAC0);
/*
* Disable pull-up on:
* RXDV (PA17) => PHY normal mode (not Test mode)
* ERX0 (PA14) => PHY ADDR0
* ERX1 (PA15) => PHY ADDR1
* ERX2 (PA25) => PHY ADDR2
* ERX3 (PA26) => PHY ADDR3
* ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
*
* PHY has internal pull-down
*/
writel(pin_to_mask(AT91_PIN_PA14) |
pin_to_mask(AT91_PIN_PA15) |
pin_to_mask(AT91_PIN_PA17) |
pin_to_mask(AT91_PIN_PA25) |
pin_to_mask(AT91_PIN_PA26) |
pin_to_mask(AT91_PIN_PA28),
&pioa->pudr);
at91_phy_reset();
/* Re-enable pull-up */
writel(pin_to_mask(AT91_PIN_PA14) |
pin_to_mask(AT91_PIN_PA15) |
pin_to_mask(AT91_PIN_PA17) |
pin_to_mask(AT91_PIN_PA25) |
pin_to_mask(AT91_PIN_PA26) |
pin_to_mask(AT91_PIN_PA28),
&pioa->puer);
/* Initialize EMAC=MACB hardware */
at91_macb_hw_init();
}
#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
int board_mmc_init(bd_t *bd)
{
at91_mci_hw_init();
return atmel_mci_init((void *)ATMEL_BASE_MCI);
at91_seriald_hw_init();
}
#endif
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
at91_periph_clk_enable(ATMEL_ID_PIOA);
at91_periph_clk_enable(ATMEL_ID_PIOB);
at91_periph_clk_enable(ATMEL_ID_PIOC);
#ifdef CONFIG_DEBUG_UART
debug_uart_init();
#endif
return 0;
}
#endif
int board_init(void)
{
/* adress of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
at91_seriald_hw_init();
#ifdef CONFIG_CMD_NAND
at91sam9260ek_nand_hw_init();
#endif
#ifdef CONFIG_HAS_DATAFLASH
at91_spi0_hw_init((1 << 0) | (1 << 1));
#endif
#ifdef CONFIG_MACB
at91sam9260ek_macb_hw_init();
#endif
return 0;
}
@ -159,12 +107,3 @@ void reset_phy(void)
{
}
#endif
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
#endif
return rc;
}

2
board/atmel/at91sam9263ek/Makefile
View file

@ -10,5 +10,5 @@
#
obj-y += at91sam9263ek.o
obj-y += led.o
obj-$(CONFIG_AT91_LED) += led.o
obj-$(CONFIG_HAS_DATAFLASH) += partition.o

64
board/atmel/at91sam9263ek/at91sam9263ek.c
View file

@ -7,6 +7,7 @@
*/
#include <common.h>
#include <debug_uart.h>
#include <linux/sizes.h>
#include <asm/arch/at91sam9263.h>
#include <asm/arch/at91sam9_smc.h>
@ -19,11 +20,6 @@
#include <asm/arch/hardware.h>
#include <lcd.h>
#include <atmel_lcdc.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
#include <netdev.h>
#include <atmel_mci.h>
DECLARE_GLOBAL_DATA_PTR;
@ -77,34 +73,6 @@ static void at91sam9263ek_nand_hw_init(void)
}
#endif
#ifdef CONFIG_MACB
static void at91sam9263ek_macb_hw_init(void)
{
at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
at91_periph_clk_enable(ATMEL_ID_EMAC);
/*
* Disable pull-up on:
* RXDV (PC25) => PHY normal mode (not Test mode)
* ERX0 (PE25) => PHY ADDR0
* ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
*
* PHY has internal pull-down
*/
writel(1 << 25, &pio->pioc.pudr);
writel((1 << 25) | (1 <<26), &pio->pioe.pudr);
at91_phy_reset();
/* Re-enable pull-up */
writel(1 << 25, &pio->pioc.puer);
writel((1 << 25) | (1 <<26), &pio->pioe.puer);
at91_macb_hw_init();
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 240,
@ -209,24 +177,22 @@ void lcd_show_board_info(void)
#endif /* CONFIG_LCD_INFO */
#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
int board_mmc_init(bd_t *bd)
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
at91_mci_hw_init();
return atmel_mci_init((void *)ATMEL_BASE_MCI1);
at91_seriald_hw_init();
}
#endif
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
at91_periph_clk_enable(ATMEL_ID_PIOA);
at91_periph_clk_enable(ATMEL_ID_PIOB);
at91_periph_clk_enable(ATMEL_ID_PIOCDE);
at91_seriald_hw_init();
#ifdef CONFIG_DEBUG_UART
debug_uart_init();
#endif
return 0;
}
#endif
int board_init(void)
{
@ -242,9 +208,6 @@ int board_init(void)
at91_set_pio_output(AT91_PIO_PORTE, 20, 1); /* select spi0 clock */
at91_spi0_hw_init(1 << 0);
#endif
#ifdef CONFIG_MACB
at91sam9263ek_macb_hw_init();
#endif
#ifdef CONFIG_USB_OHCI_NEW
at91_uhp_hw_init();
#endif
@ -267,12 +230,3 @@ void reset_phy(void)
{
}
#endif
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
rc = macb_eth_initialize(0, (void *) ATMEL_BASE_EMAC, 0x00);
#endif
return rc;
}

2
board/atmel/at91sam9m10g45ek/Makefile
View file

@ -10,4 +10,4 @@
#
obj-y += at91sam9m10g45ek.o
obj-y += led.o
obj-(CONFIG_AT91_LED) += led.o

107
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
View file

@ -7,6 +7,7 @@
*/
#include <common.h>
#include <debug_uart.h>
#include <asm/io.h>
#include <asm/arch/clk.h>
#include <asm/arch/at91sam9g45_matrix.h>
@ -17,11 +18,6 @@
#include <lcd.h>
#include <linux/mtd/nand.h>
#include <atmel_lcdc.h>
#include <atmel_mci.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -149,39 +145,6 @@ static void at91sam9m10g45ek_usb_hw_init(void)
}
#endif
#ifdef CONFIG_MACB
static void at91sam9m10g45ek_macb_hw_init(void)
{
struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
at91_periph_clk_enable(ATMEL_ID_EMAC);
/*
* Disable pull-up on:
* RXDV (PA15) => PHY normal mode (not Test mode)
* ERX0 (PA12) => PHY ADDR0
* ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
*
* PHY has internal pull-down
*/
writel(pin_to_mask(AT91_PIN_PA15) |
pin_to_mask(AT91_PIN_PA12) |
pin_to_mask(AT91_PIN_PA13),
&pioa->pudr);
at91_phy_reset();
/* Re-enable pull-up */
writel(pin_to_mask(AT91_PIN_PA15) |
pin_to_mask(AT91_PIN_PA12) |
pin_to_mask(AT91_PIN_PA13),
&pioa->puer);
/* And the pins. */
at91_macb_hw_init();
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
@ -280,20 +243,22 @@ void lcd_show_board_info(void)
#endif /* CONFIG_LCD_INFO */
#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
int board_mmc_init(bd_t *bis)
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
at91_mci_hw_init();
return atmel_mci_init((void *)ATMEL_BASE_MCI0);
at91_seriald_hw_init();
}
#endif
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
at91_seriald_hw_init();
#ifdef CONFIG_DEBUG_UART
debug_uart_init();
#endif
return 0;
}
#endif
int board_init(void)
{
@ -313,15 +278,6 @@ int board_init(void)
#ifdef CONFIG_CMD_USB
at91sam9m10g45ek_usb_hw_init();
#endif
#ifdef CONFIG_HAS_DATAFLASH
at91_spi0_hw_init(1 << 0);
#endif
#ifdef CONFIG_ATMEL_SPI
at91_spi0_hw_init(1 << 4);
#endif
#ifdef CONFIG_MACB
at91sam9m10g45ek_macb_hw_init();
#endif
#ifdef CONFIG_LCD
at91sam9m10g45ek_lcd_hw_init();
#endif
@ -340,48 +296,3 @@ void reset_phy(void)
{
}
#endif
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
#endif
return rc;
}
/* SPI chip select control */
#ifdef CONFIG_ATMEL_SPI
#include <spi.h>
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
return bus == 0 && cs < 2;
}
void spi_cs_activate(struct spi_slave *slave)
{
switch(slave->cs) {
case 1:
at91_set_gpio_output(AT91_PIN_PB18, 0);
break;
case 0:
default:
at91_set_gpio_output(AT91_PIN_PB3, 0);
break;
}
}
void spi_cs_deactivate(struct spi_slave *slave)
{
switch(slave->cs) {
case 1:
at91_set_gpio_output(AT91_PIN_PB18, 1);
break;
case 0:
default:
at91_set_gpio_output(AT91_PIN_PB3, 1);
break;
}
}
#endif /* CONFIG_ATMEL_SPI */

64
board/atmel/at91sam9n12ek/at91sam9n12ek.c
View file

@ -13,9 +13,9 @@
#include <asm/arch/at91_rstc.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/clk.h>
#include <debug_uart.h>
#include <lcd.h>
#include <atmel_hlcdc.h>
#include <atmel_mci.h>
#include <netdev.h>
#ifdef CONFIG_LCD_INFO
@ -132,48 +132,6 @@ void lcd_show_board_info(void)
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
/* SPI chip select control */
#ifdef CONFIG_ATMEL_SPI
#include <spi.h>
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
return bus == 0 && cs < 2;
}
void spi_cs_activate(struct spi_slave *slave)
{
switch (slave->cs) {
case 0:
at91_set_pio_output(AT91_PIO_PORTA, 14, 0);
break;
case 1:
at91_set_pio_output(AT91_PIO_PORTA, 7, 0);
break;
}
}
void spi_cs_deactivate(struct spi_slave *slave)
{
switch (slave->cs) {
case 0:
at91_set_pio_output(AT91_PIO_PORTA, 14, 1);
break;
case 1:
at91_set_pio_output(AT91_PIO_PORTA, 7, 1);
break;
}
}
#endif /* CONFIG_ATMEL_SPI */
#ifdef CONFIG_GENERIC_ATMEL_MCI
int board_mmc_init(bd_t *bd)
{
at91_mci_hw_init();
return atmel_mci_init((void *)ATMEL_BASE_HSMCI0);
}
#endif
#ifdef CONFIG_KS8851_MLL
void at91sam9n12ek_ks8851_hw_init(void)
{
@ -205,14 +163,22 @@ void at91sam9n12ek_usb_hw_init(void)
}
#endif
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
at91_seriald_hw_init();
}
#endif
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
at91_periph_clk_enable(ATMEL_ID_PIOAB);
at91_periph_clk_enable(ATMEL_ID_PIOCD);
at91_seriald_hw_init();
#ifdef CONFIG_DEBUG_UART
debug_uart_init();
#endif
return 0;
}
#endif
int board_init(void)
{
@ -223,10 +189,6 @@ int board_init(void)
at91sam9n12ek_nand_hw_init();
#endif
#ifdef CONFIG_ATMEL_SPI
at91_spi0_hw_init(1 << 0);
#endif
#ifdef CONFIG_LCD
at91_lcd_hw_init();
#endif

2
board/atmel/at91sam9rlek/Makefile
View file

@ -10,5 +10,5 @@
#
obj-y += at91sam9rlek.o
obj-y += led.o
obj-$(CONFIG_AT91_LED) += led.o
obj-$(CONFIG_HAS_DATAFLASH) += partition.o

24
board/atmel/at91sam9rlek/at91sam9rlek.c
View file

@ -7,6 +7,7 @@
*/
#include <common.h>
#include <debug_uart.h>
#include <asm/io.h>
#include <asm/arch/at91sam9rl.h>
#include <asm/arch/at91sam9rl_matrix.h>
@ -18,10 +19,6 @@
#include <lcd.h>
#include <atmel_lcdc.h>
#include <atmel_mci.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
@ -159,24 +156,22 @@ void lcd_show_board_info(void)
#endif /* CONFIG_LCD_INFO */
#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
int board_mmc_init(bd_t *bis)
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
at91_mci_hw_init();
return atmel_mci_init((void *)ATMEL_BASE_MCI);
at91_seriald_hw_init();
}
#endif
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
at91_periph_clk_enable(ATMEL_ID_PIOA);
at91_periph_clk_enable(ATMEL_ID_PIOB);
at91_periph_clk_enable(ATMEL_ID_PIOC);
at91_periph_clk_enable(ATMEL_ID_PIOD);
#ifdef CONFIG_DEBUG_UART
debug_uart_init();
#endif
return 0;
}
#endif
int board_init(void)
{
@ -185,7 +180,6 @@ int board_init(void)
/* adress of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
at91_seriald_hw_init();
#ifdef CONFIG_CMD_NAND
at91sam9rlek_nand_hw_init();
#endif

82
board/atmel/at91sam9x5ek/at91sam9x5ek.c
View file

@ -12,20 +12,13 @@
#include <asm/arch/at91_rstc.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <debug_uart.h>
#include <lcd.h>
#include <atmel_hlcdc.h>
#include <atmel_mci.h>
#ifdef CONFIG_MACB
#include <net.h>
#endif
#include <netdev.h>
#ifdef CONFIG_LCD_INFO
#include <nand.h>
#include <version.h>
#endif
#ifdef CONFIG_ATMEL_SPI
#include <spi.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
@ -92,21 +85,6 @@ static void at91sam9x5ek_nand_hw_init(void)
}
#endif
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
if (has_emac0())
rc = macb_eth_initialize(0,
(void *)ATMEL_BASE_EMAC0, 0x00);
if (has_emac1())
rc = macb_eth_initialize(1,
(void *)ATMEL_BASE_EMAC1, 0x00);
#endif
return rc;
}
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 800,
@ -205,54 +183,22 @@ void lcd_show_board_info(void)
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
/* SPI chip select control */
#ifdef CONFIG_ATMEL_SPI
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
return bus == 0 && cs < 2;
}
void spi_cs_activate(struct spi_slave *slave)
{
switch (slave->cs) {
case 1:
at91_set_pio_output(AT91_PIO_PORTA, 7, 0);
break;
case 0:
default:
at91_set_pio_output(AT91_PIO_PORTA, 14, 0);
break;
}
}
void spi_cs_deactivate(struct spi_slave *slave)
{
switch (slave->cs) {
case 1:
at91_set_pio_output(AT91_PIO_PORTA, 7, 1);
break;
case 0:
default:
at91_set_pio_output(AT91_PIO_PORTA, 14, 1);
break;
}
}
#endif /* CONFIG_ATMEL_SPI */
#ifdef CONFIG_GENERIC_ATMEL_MCI
int board_mmc_init(bd_t *bd)
{
at91_mci_hw_init();
return atmel_mci_init((void *)ATMEL_BASE_HSMCI0);
at91_seriald_hw_init();
}
#endif
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
at91_seriald_hw_init();
#ifdef CONFIG_DEBUG_UART
debug_uart_init();
#endif
return 0;
}
#endif
int board_init(void)
{
@ -266,14 +212,6 @@ int board_init(void)
at91sam9x5ek_nand_hw_init();
#endif
#ifdef CONFIG_ATMEL_SPI
at91_spi0_hw_init(1 << 4);
#endif
#ifdef CONFIG_MACB
at91_macb_hw_init();
#endif
#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI)
at91_uhp_hw_init();
#endif
@ -300,8 +238,6 @@ void at91_spl_board_init(void)
at91_mci_hw_init();
#elif CONFIG_SYS_USE_NANDFLASH
at91sam9x5ek_nand_hw_init();
#elif CONFIG_SYS_USE_SPIFLASH
at91_spi0_hw_init(1 << 4);
#endif
}

49
board/atmel/sama5d2_xplained/sama5d2_xplained.c
View file

@ -11,16 +11,11 @@
#include <dm.h>
#include <i2c.h>
#include <lcd.h>
#include <mmc.h>
#include <net.h>
#include <netdev.h>
#include <spi.h>
#include <version.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/atmel_pio4.h>
#include <asm/arch/atmel_mpddrc.h>
#include <asm/arch/atmel_usba_udc.h>
#include <asm/arch/atmel_sdhci.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
@ -118,22 +113,7 @@ void lcd_show_board_info(void)
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
static void board_gmac_hw_init(void)
{
atmel_pio4_set_f_periph(AT91_PIO_PORTB, 14, 0); /* GTXCK */
atmel_pio4_set_f_periph(AT91_PIO_PORTB, 15, 0); /* GTXEN */
atmel_pio4_set_f_periph(AT91_PIO_PORTB, 16, 0); /* GRXDV */
atmel_pio4_set_f_periph(AT91_PIO_PORTB, 17, 0); /* GRXER */
atmel_pio4_set_f_periph(AT91_PIO_PORTB, 18, 0); /* GRX0 */
atmel_pio4_set_f_periph(AT91_PIO_PORTB, 19, 0); /* GRX1 */
atmel_pio4_set_f_periph(AT91_PIO_PORTB, 20, 0); /* GTX0 */
atmel_pio4_set_f_periph(AT91_PIO_PORTB, 21, 0); /* GTX1 */
atmel_pio4_set_f_periph(AT91_PIO_PORTB, 22, 0); /* GMDC */
atmel_pio4_set_f_periph(AT91_PIO_PORTB, 23, 0); /* GMDIO */
at91_periph_clk_enable(ATMEL_ID_GMAC);
}
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
static void board_uart1_hw_init(void)
{
atmel_pio4_set_a_periph(AT91_PIO_PORTD, 2, 1); /* URXD1 */
@ -142,7 +122,6 @@ static void board_uart1_hw_init(void)
at91_periph_clk_enable(ATMEL_ID_UART1);
}
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
board_uart1_hw_init();
@ -154,8 +133,6 @@ int board_early_init_f(void)
{
#ifdef CONFIG_DEBUG_UART
debug_uart_init();
#else
board_uart1_hw_init();
#endif
return 0;
@ -167,18 +144,12 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#ifdef CONFIG_MACB
board_gmac_hw_init();
#endif
#ifdef CONFIG_LCD
board_lcd_hw_init();
#endif
#ifdef CONFIG_CMD_USB
board_usb_hw_init();
#endif
#ifdef CONFIG_USB_GADGET_ATMEL_USBA
at91_udp_hw_init();
#endif
return 0;
}
@ -190,24 +161,6 @@ int dram_init(void)
return 0;
}
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC, 0x00);
#endif
#ifdef CONFIG_USB_GADGET_ATMEL_USBA
usba_udc_probe(&pdata);
#ifdef CONFIG_USB_ETH_RNDIS
usb_eth_initialize(bis);
#endif
#endif
return rc;
}
#ifdef CONFIG_CMD_I2C
static int set_ethaddr_from_eeprom(void)
{

16
board/atmel/sama5d4ek/sama5d4ek.c
View file

@ -230,7 +230,6 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2)
ATMEL_MPDDRC_CR_NR_ROW_14 |
ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |
ATMEL_MPDDRC_CR_NB_8BANKS |
ATMEL_MPDDRC_CR_NDQS_DISABLED |
ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |
ATMEL_MPDDRC_CR_UNAL_SUPPORTED);
@ -260,6 +259,8 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2)
void mem_init(void)
{
struct atmel_mpddrc_config ddr2;
const struct atmel_mpddr *mpddr = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
u32 tmp;
ddr2_conf(&ddr2);
@ -267,6 +268,19 @@ void mem_init(void)
at91_periph_clk_enable(ATMEL_ID_MPDDRC);
at91_system_clk_enable(AT91_PMC_DDR);
tmp = ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_ONE_CYCLE;
writel(tmp, &mpddr->rd_data_path);
tmp = readl(&mpddr->io_calibr);
tmp = (tmp & ~(ATMEL_MPDDRC_IO_CALIBR_RDIV |
ATMEL_MPDDRC_IO_CALIBR_TZQIO |
ATMEL_MPDDRC_IO_CALIBR_CALCODEP |
ATMEL_MPDDRC_IO_CALIBR_CALCODEN)) |
ATMEL_MPDDRC_IO_CALIBR_DDR2_RZQ_52 |
ATMEL_MPDDRC_IO_CALIBR_TZQIO_(8) |
ATMEL_MPDDRC_IO_CALIBR_EN_CALIB;
writel(tmp, &mpddr->io_calibr);
/* DDRAM2 Controller initialize */
ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2);
}

102
common/scsi.c
View file

@ -549,6 +549,52 @@ removable:
* to the user if mode = 1
*/
#if defined(CONFIG_DM_SCSI)
static int do_scsi_scan_one(struct udevice *dev, int id, int lun, int mode)
{
int ret;
struct udevice *bdev;
struct blk_desc bd;
struct blk_desc *bdesc;
char str[10];
/*
* detect the scsi driver to get information about its geometry (block
* size, number of blocks) and other parameters (ids, type, ...)
*/
scsi_init_dev_desc_priv(&bd);
if (scsi_detect_dev(id, lun, &bd))
return -ENODEV;
/*
* Create only one block device and do detection
* to make sure that there won't be a lot of
* block devices created
*/
snprintf(str, sizeof(str), "id%dlun%d", id, lun);
ret = blk_create_devicef(dev, "scsi_blk", str, IF_TYPE_SCSI, -1,
bd.blksz, bd.blksz * bd.lba, &bdev);
if (ret) {
debug("Can't create device\n");
return ret;
}
bdesc = dev_get_uclass_platdata(bdev);
bdesc->target = id;
bdesc->lun = lun;
bdesc->removable = bd.removable;
bdesc->type = bd.type;
memcpy(&bdesc->vendor, &bd.vendor, sizeof(bd.vendor));
memcpy(&bdesc->product, &bd.product, sizeof(bd.product));
memcpy(&bdesc->revision, &bd.revision, sizeof(bd.revision));
part_init(bdesc);
if (mode == 1) {
printf(" Device %d: ", 0);
dev_print(bdesc);
}
return 0;
}
int scsi_scan(int mode)
{
unsigned char i, lun;
@ -576,59 +622,9 @@ int scsi_scan(int mode)
/* Get controller platdata */
plat = dev_get_platdata(dev);
for (i = 0; i < plat->max_id; i++) {
for (lun = 0; lun < plat->max_lun; lun++) {
struct udevice *bdev; /* block device */
/* block device description */
struct blk_desc _bd;
struct blk_desc *bdesc;
char str[10];
scsi_init_dev_desc_priv(&_bd);
ret = scsi_detect_dev(i, lun, &_bd);
if (ret)
/*
* no device detected?
* check the next lun.
*/
continue;
/*
* Create only one block device and do detection
* to make sure that there won't be a lot of
* block devices created
*/
snprintf(str, sizeof(str), "id%dlun%d", i, lun);
ret = blk_create_devicef(dev, "scsi_blk",
str, IF_TYPE_SCSI,
-1,
_bd.blksz,
_bd.blksz * _bd.lba,
&bdev);
if (ret) {
debug("Can't create device\n");
return ret;
}
bdesc = dev_get_uclass_platdata(bdev);
bdesc->target = i;
bdesc->lun = lun;
bdesc->removable = _bd.removable;
bdesc->type = _bd.type;
memcpy(&bdesc->vendor, &_bd.vendor,
sizeof(_bd.vendor));
memcpy(&bdesc->product, &_bd.product,
sizeof(_bd.product));
memcpy(&bdesc->revision, &_bd.revision,
sizeof(_bd.revision));
part_init(bdesc);
if (mode == 1) {
printf(" Device %d: ", 0);
dev_print(bdesc);
} /* if mode */
} /* next LUN */
}
for (i = 0; i < plat->max_id; i++)
for (lun = 0; lun < plat->max_lun; lun++)
do_scsi_scan_one(dev, i, lun, mode);
}
return 0;

21
configs/at91sam9260ek_dataflash_cs0_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
@ -17,7 +19,24 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y

21
configs/at91sam9260ek_dataflash_cs1_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
@ -17,7 +19,24 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y

21
configs/at91sam9260ek_nandflash_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
@ -17,7 +19,24 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y

24
configs/at91sam9263ek_dataflash_cs0_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
@ -21,7 +23,27 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

24
configs/at91sam9263ek_dataflash_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
@ -21,7 +23,27 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

24
configs/at91sam9263ek_nandflash_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
@ -21,7 +23,27 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

24
configs/at91sam9263ek_norflash_boot_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_BOOT_NORFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
@ -21,8 +23,28 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

24
configs/at91sam9263ek_norflash_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NORFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
@ -21,8 +23,28 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

24
configs/at91sam9g20ek_2mmc_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
@ -18,6 +20,26 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y

24
configs/at91sam9g20ek_2mmc_nandflash_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
@ -18,6 +20,26 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y

21
configs/at91sam9g20ek_dataflash_cs0_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
@ -17,7 +19,24 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y

21
configs/at91sam9g20ek_dataflash_cs1_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
@ -17,7 +19,24 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y

21
configs/at91sam9g20ek_nandflash_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
@ -17,7 +19,24 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y

34
configs/at91sam9m10g45ek_mmc_defconfig
View file

@ -1,19 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9M10G45EK=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
@ -29,7 +23,29 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

32
configs/at91sam9m10g45ek_nandflash_defconfig
View file

@ -1,17 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9M10G45EK=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
@ -27,7 +23,29 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

25
configs/at91sam9n12ek_mmc_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9N12EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
@ -19,9 +21,30 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

31
configs/at91sam9n12ek_nandflash_defconfig
View file

@ -1,17 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9N12EK=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTZ=y
@ -25,9 +21,30 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

32
configs/at91sam9n12ek_spiflash_defconfig
View file

@ -1,18 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9N12EK=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_SPIFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTZ=y
@ -26,9 +21,30 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

22
configs/at91sam9rlek_dataflash_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9RLEK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
@ -20,5 +22,23 @@ CONFIG_CMD_MMC=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

22
configs/at91sam9rlek_mmc_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9RLEK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
@ -20,5 +22,23 @@ CONFIG_CMD_MMC=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

22
configs/at91sam9rlek_nandflash_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9RLEK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
@ -20,5 +22,23 @@ CONFIG_CMD_MMC=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

29
configs/at91sam9x5ek_dataflash_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_DATAFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
@ -21,9 +23,34 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

29
configs/at91sam9x5ek_mmc_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
@ -21,9 +23,34 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

35
configs/at91sam9x5ek_nandflash_defconfig
View file

@ -1,17 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTZ=y
@ -27,9 +23,34 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

36
configs/at91sam9x5ek_spiflash_defconfig
View file

@ -1,18 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9X5EK=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_SPIFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTZ=y
@ -28,9 +23,34 @@ CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
CONFIG_OF_LIBFDT=y

21
configs/at91sam9xeek_dataflash_cs0_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
@ -17,7 +19,24 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y

21
configs/at91sam9xeek_dataflash_cs1_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
@ -17,7 +19,24 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y

21
configs/at91sam9xeek_nandflash_defconfig
View file

@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
@ -17,7 +19,24 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y

12
configs/dra7xx_evm_defconfig
View file

@ -38,7 +38,13 @@ CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm"
CONFIG_DM=y
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_BLK=y
CONFIG_DM_SCSI=y
CONFIG_DWC_AHCI=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
@ -68,6 +74,7 @@ CONFIG_TI_QSPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_DRA7XX_INDEX=1
@ -81,3 +88,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
CONFIG_G_DNL_VENDOR_NUM=0x0451
CONFIG_G_DNL_PRODUCT_NUM=0xd022
CONFIG_SPL_PHY=y
CONFIG_PIPE3_PHY=y
CONFIG_SPL_PIPE3_PHY=y

11
configs/dra7xx_hs_evm_defconfig
View file

@ -43,7 +43,12 @@ CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm"
CONFIG_DM=y
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_DM_SCSI=y
CONFIG_DWC_AHCI=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
@ -73,6 +78,7 @@ CONFIG_TI_QSPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_DRA7XX_INDEX=1
@ -86,3 +92,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
CONFIG_G_DNL_VENDOR_NUM=0x0451
CONFIG_G_DNL_PRODUCT_NUM=0xd022
CONFIG_SPL_PHY=y
CONFIG_PIPE3_PHY=y
CONFIG_SPL_PIPE3_PHY=y

10
configs/sama5d2_xplained_mmc_defconfig
View file

@ -8,12 +8,15 @@ CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
@ -30,8 +33,10 @@ CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_AT91=y
@ -48,13 +53,16 @@ CONFIG_MMC_SDHCI_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_AT91PIO4=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xf8020000
CONFIG_DEBUG_UART_CLOCK=0
CONFIG_DEBUG_UART_CLOCK=83000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y

9
configs/sama5d2_xplained_spiflash_defconfig
View file

@ -4,9 +4,11 @@ CONFIG_TARGET_SAMA5D2_XPLAINED=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH"
@ -29,8 +31,10 @@ CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_AT91=y
@ -47,13 +51,16 @@ CONFIG_MMC_SDHCI_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_AT91PIO4=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xf8020000
CONFIG_DEBUG_UART_CLOCK=0
CONFIG_DEBUG_UART_CLOCK=83000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y

51
configs/sama5d36ek_cmp_mmc_defconfig Normal file
View file

@ -0,0 +1,51 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_AT91_H32MX=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_LCD=y

51
configs/sama5d36ek_cmp_nandflash_defconfig Normal file
View file

@ -0,0 +1,51 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_AT91_H32MX=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_LCD=y

51
configs/sama5d36ek_cmp_spiflash_defconfig Normal file
View file

@ -0,0 +1,51 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_AT91_UTMI=y
CONFIG_AT91_H32MX=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_LCD=y

2
configs/sandbox_defconfig
View file

@ -172,6 +172,8 @@ CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
CONFIG_VIDEO_SANDBOX_SDL=y
CONFIG_FS_CBFS=y
CONFIG_FS_CRAMFS=y
CONFIG_PHY=y
CONFIG_PHY_SANDBOX=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
CONFIG_LZ4=y

2
configs/sandbox_noblk_defconfig
View file

@ -174,6 +174,8 @@ CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
CONFIG_VIDEO_SANDBOX_SDL=y
CONFIG_FS_CBFS=y
CONFIG_FS_CRAMFS=y
CONFIG_PHY=y
CONFIG_PHY_SANDBOX=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
CONFIG_LZ4=y

2
configs/sandbox_spl_defconfig
View file

@ -178,6 +178,8 @@ CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
CONFIG_VIDEO_SANDBOX_SDL=y
CONFIG_FS_CBFS=y
CONFIG_FS_CRAMFS=y
CONFIG_PHY=y
CONFIG_PHY_SANDBOX=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
CONFIG_LZ4=y

2
drivers/Kconfig
View file

@ -54,6 +54,8 @@ source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
source "drivers/phy/Kconfig"
source "drivers/phy/marvell/Kconfig"
source "drivers/pinctrl/Kconfig"

1
drivers/Makefile
View file

@ -5,6 +5,7 @@
obj-$(CONFIG_$(SPL_TPL_)DM) += core/
obj-$(CONFIG_$(SPL_)CLK) += clk/
obj-$(CONFIG_$(SPL_)LED) += led/
obj-$(CONFIG_$(SPL_)PHY) += phy/
obj-$(CONFIG_$(SPL_)PINCTRL) += pinctrl/
obj-$(CONFIG_$(SPL_)RAM) += ram/

10
drivers/block/Kconfig
View file

@ -48,4 +48,14 @@ config SATA_CEVA
ZynqMP. Support up to 2 external devices. Complient with SATA 3.1 and
AHCI 1.3 specifications with hot-plug detect feature.
config DWC_AHCI
bool "Enable Synopsys DWC AHCI driver support"
select SCSI_AHCI
select PHY
depends on DM_SCSI
help
Enable this driver to support Sata devices through
Synopsys DWC AHCI module.
endmenu

1
drivers/block/Makefile
View file

@ -11,6 +11,7 @@ ifndef CONFIG_BLK
obj-y += blk_legacy.o
endif
obj-$(CONFIG_DWC_AHCI) += dwc_ahci.o
obj-$(CONFIG_AHCI) += ahci-uclass.o
obj-$(CONFIG_DM_SCSI) += scsi-uclass.o
obj-$(CONFIG_SCSI_AHCI) += ahci.o

101
drivers/block/dwc_ahci.c Normal file
View file

@ -0,0 +1,101 @@
/*
* DWC SATA platform driver
*
* (C) Copyright 2016
* Texas Instruments Incorporated, <www.ti.com>
*
* Author: Mugunthan V N <mugunthanvnm@ti.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include <ahci.h>
#include <scsi.h>
#include <sata.h>
#include <asm/arch/sata.h>
#include <asm/io.h>
#include <generic-phy.h>
DECLARE_GLOBAL_DATA_PTR;
struct dwc_ahci_priv {
void *base;
void *wrapper_base;
};
static int dwc_ahci_ofdata_to_platdata(struct udevice *dev)
{
struct dwc_ahci_priv *priv = dev_get_priv(dev);
struct scsi_platdata *plat = dev_get_platdata(dev);
fdt_addr_t addr;
plat->max_id = fdtdec_get_uint(gd->fdt_blob, dev->of_offset, "max-id",
CONFIG_SYS_SCSI_MAX_SCSI_ID);
plat->max_lun = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
"max-lun", CONFIG_SYS_SCSI_MAX_LUN);
priv->base = map_physmem(dev_get_addr(dev), sizeof(void *),
MAP_NOCACHE);
addr = dev_get_addr_index(dev, 1);
if (addr != FDT_ADDR_T_NONE) {
priv->wrapper_base = map_physmem(addr, sizeof(void *),
MAP_NOCACHE);
} else {
priv->wrapper_base = NULL;
}
return 0;
}
static int dwc_ahci_probe(struct udevice *dev)
{
struct dwc_ahci_priv *priv = dev_get_priv(dev);
int ret;
struct phy phy;
ret = generic_phy_get_by_name(dev, "sata-phy", &phy);
if (ret) {
error("can't get the phy from DT\n");
return ret;
}
ret = generic_phy_init(&phy);
if (ret) {
error("unable to initialize the sata phy\n");
return ret;
}
ret = generic_phy_power_on(&phy);
if (ret) {
error("unable to power on the sata phy\n");
return ret;
}
if (priv->wrapper_base) {
u32 val = TI_SATA_IDLE_NO | TI_SATA_STANDBY_NO;
/* Enable SATA module, No Idle, No Standby */
writel(val, priv->wrapper_base + TI_SATA_SYSCONFIG);
}
return ahci_init(priv->base);
}
static const struct udevice_id dwc_ahci_ids[] = {
{ .compatible = "snps,dwc-ahci" },
{ }
};
U_BOOT_DRIVER(dwc_ahci) = {
.name = "dwc_ahci",
.id = UCLASS_SCSI,
.of_match = dwc_ahci_ids,
.ofdata_to_platdata = dwc_ahci_ofdata_to_platdata,
.probe = dwc_ahci_probe,
.priv_auto_alloc_size = sizeof(struct dwc_ahci_priv),
.platdata_auto_alloc_size = sizeof(struct scsi_platdata),
.flags = DM_FLAG_ALLOC_PRIV_DMA,
};

1
drivers/clk/at91/clk-master.c
View file

@ -21,6 +21,7 @@ static struct clk_ops at91_master_clk_ops = {
};
static const struct udevice_id at91_master_clk_match[] = {
{ .compatible = "atmel,at91rm9200-clk-master" },
{ .compatible = "atmel,at91sam9x5-clk-master" },
{}
};

29
drivers/clk/at91/clk-peripheral.c
View file

@ -16,6 +16,10 @@
#define PERIPHERAL_ID_MAX 31
#define PERIPHERAL_MASK(id) (1 << ((id) & PERIPHERAL_ID_MAX))
enum periph_clk_type {
CLK_PERIPH_AT91RM9200 = 0,
CLK_PERIPH_AT91SAM9X5,
};
/**
* sam9x5_periph_clk_bind() - for the periph clock driver
* Recursively bind its children as clk devices.
@ -28,7 +32,14 @@ static int sam9x5_periph_clk_bind(struct udevice *dev)
}
static const struct udevice_id sam9x5_periph_clk_match[] = {
{ .compatible = "atmel,at91sam9x5-clk-peripheral" },
{
.compatible = "atmel,at91rm9200-clk-peripheral",
.data = CLK_PERIPH_AT91RM9200,
},
{
.compatible = "atmel,at91sam9x5-clk-peripheral",
.data = CLK_PERIPH_AT91SAM9X5,
},
{}
};
@ -45,12 +56,24 @@ static int periph_clk_enable(struct clk *clk)
{
struct pmc_platdata *plat = dev_get_platdata(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
enum periph_clk_type clk_type;
void *addr;
if (clk->id < PERIPHERAL_ID_MIN)
return -1;
writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr);
setbits_le32(&pmc->pcr, AT91_PMC_PCR_CMD_WRITE | AT91_PMC_PCR_EN);
clk_type = dev_get_driver_data(dev_get_parent(clk->dev));
if (clk_type == CLK_PERIPH_AT91RM9200) {
addr = &pmc->pcer;
if (clk->id > PERIPHERAL_ID_MAX)
addr = &pmc->pcer1;
setbits_le32(addr, PERIPHERAL_MASK(clk->id));
} else {
writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr);
setbits_le32(&pmc->pcr,
AT91_PMC_PCR_CMD_WRITE | AT91_PMC_PCR_EN);
}
return 0;
}

6
drivers/clk/at91/pmc.c
View file

@ -16,6 +16,12 @@
DECLARE_GLOBAL_DATA_PTR;
static const struct udevice_id at91_pmc_match[] = {
{ .compatible = "atmel,at91rm9200-pmc" },
{ .compatible = "atmel,at91sam9260-pmc" },
{ .compatible = "atmel,at91sam9g45-pmc" },
{ .compatible = "atmel,at91sam9n12-pmc" },
{ .compatible = "atmel,at91sam9x5-pmc" },
{ .compatible = "atmel,sama5d3-pmc" },
{ .compatible = "atmel,sama5d2-pmc" },
{}
};

52
drivers/net/macb.c
View file

@ -111,6 +111,9 @@ struct macb_device {
#endif
unsigned short phy_addr;
struct mii_dev *bus;
#ifdef CONFIG_PHYLIB
struct phy_device *phydev;
#endif
#ifdef CONFIG_DM_ETH
#ifdef CONFIG_CLK
@ -478,9 +481,6 @@ static int macb_phy_init(struct macb_device *macb, const char *name)
{
#ifdef CONFIG_DM_ETH
struct macb_device *macb = dev_get_priv(dev);
#endif
#ifdef CONFIG_PHYLIB
struct phy_device *phydev;
#endif
u32 ncfgr;
u16 phy_id, status, adv, lpa;
@ -503,19 +503,19 @@ static int macb_phy_init(struct macb_device *macb, const char *name)
#ifdef CONFIG_PHYLIB
#ifdef CONFIG_DM_ETH
phydev = phy_connect(macb->bus, macb->phy_addr, dev,
macb->phydev = phy_connect(macb->bus, macb->phy_addr, dev,
macb->phy_interface);
#else
/* need to consider other phy interface mode */
phydev = phy_connect(macb->bus, macb->phy_addr, &macb->netdev,
macb->phydev = phy_connect(macb->bus, macb->phy_addr, &macb->netdev,
PHY_INTERFACE_MODE_RGMII);
#endif
if (!phydev) {
if (!macb->phydev) {
printf("phy_connect failed\n");
return -ENODEV;
}
phy_config(phydev);
phy_config(macb->phydev);
#endif
status = macb_mdio_read(macb, MII_BMSR);
@ -1035,6 +1035,7 @@ static int macb_eth_probe(struct udevice *dev)
struct eth_pdata *pdata = dev_get_platdata(dev);
struct macb_device *macb = dev_get_priv(dev);
const char *phy_mode;
__maybe_unused int ret;
phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
NULL);
@ -1048,7 +1049,7 @@ static int macb_eth_probe(struct udevice *dev)
macb->regs = (void *)pdata->iobase;
#ifdef CONFIG_CLK
int ret = macb_enable_clk(dev);
ret = macb_enable_clk(dev);
if (ret)
return ret;
#endif
@ -1056,23 +1057,35 @@ static int macb_eth_probe(struct udevice *dev)
_macb_eth_initialize(macb);
#if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
macb->bus = mdio_alloc();
if (!macb->bus)
return -ENOMEM;
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
mdiodev->read = macb_miiphy_read;
mdiodev->write = macb_miiphy_write;
strncpy(macb->bus->name, dev->name, MDIO_NAME_LEN);
macb->bus->read = macb_miiphy_read;
macb->bus->write = macb_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
ret = mdio_register(macb->bus);
if (ret < 0)
return ret;
macb->bus = miiphy_get_dev_by_name(dev->name);
#endif
return 0;
}
static int macb_eth_remove(struct udevice *dev)
{
struct macb_device *macb = dev_get_priv(dev);
#ifdef CONFIG_PHYLIB
free(macb->phydev);
#endif
mdio_unregister(macb->bus);
mdio_free(macb->bus);
return 0;
}
static int macb_eth_ofdata_to_platdata(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_platdata(dev);
@ -1083,6 +1096,10 @@ static int macb_eth_ofdata_to_platdata(struct udevice *dev)
static const struct udevice_id macb_eth_ids[] = {
{ .compatible = "cdns,macb" },
{ .compatible = "cdns,at91sam9260-macb" },
{ .compatible = "atmel,sama5d2-gem" },
{ .compatible = "atmel,sama5d3-gem" },
{ .compatible = "atmel,sama5d4-gem" },
{ }
};
@ -1092,6 +1109,7 @@ U_BOOT_DRIVER(eth_macb) = {
.of_match = macb_eth_ids,
.ofdata_to_platdata = macb_eth_ofdata_to_platdata,
.probe = macb_eth_probe,
.remove = macb_eth_remove,
.ops = &macb_eth_ops,
.priv_auto_alloc_size = sizeof(struct macb_device),
.platdata_auto_alloc_size = sizeof(struct eth_pdata),

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