Commit graph

17545 commits

Author SHA1 Message Date
Marek Vasut
f5e7df58e0 net: pcnet: Split common and non-DM functions
Pull the common parts of functions out so they can be reused by both
DM and non-DM code paths. The recv() function had to be reworked to
fit into this scheme and this means it now only receives one packet
at a time instead of spinning in an endless loop.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
6d76c9f1e6 net: pcnet: Wrap name and enetaddr into private data
Instead of using the non-DM-only name and enetaddr in struct eth_device,
add pointers into the private data which can either point to that non-DM
name or a DM one later on.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
deca773821 net: pcnet: Wrap iobase into private data
Instead of using the non-DM-only iobase in struct eth_device, add
one into the private data to make DM and non-DM operation possible.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
834d5cebe5 net: pcnet: Pass private data through dev->priv
Get rid of the global point to private data, and rather pass it
thought dev->priv. Also remove the unnecessary check for lp being
non-NULL, since it is always NULL at this point.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
ab6ecbdc3c net: pcnet: Wrap devbusfn into private data
Instead of using eth_device priv for this PCI devbusfn, free it
so it could be used for driver private data, and wrap devbusfn
into those driver private data.

Note that using the name dev for the variable is a trick left for
later, when DM support is in place, so dm_pci_virt_to_mem() can be
used with minimal ifdeffery.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
553286a63c net: pcnet: Drop useless forward declarations
Remove those as they are not needed anymore.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
54c6067486 net: pcnet: Move initialize function at the end
Move the function at the end of the driver, so we could drop
various forward declarations later. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
ada6a2cea5 net: pcnet: Move private data allocation to initialize
The private data allocation does not have to be done every time the
NIC is initialized at run time, move the allocation to initialize
function, which means it will be done only once when the driver
starts.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
0e11d79a53 net: pcnet: Replace memset+malloc with calloc
This combination of functions can be replaced with calloc(),
make it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
89369b0ac2 net: pcnet: Simplify private data allocation
The current code is horribly complex. Both the RX and TX buffer
descriptors are 16 bytes in size, the init block is 32 bytes in
size, so simplify the code such that the entire private data of
the driver are allocated cache aligned and the RX and TX buffer
descriptors are part of the private data.

This removes multiple malloc calls and cache flushes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
d3b1df0f39 net: pcnet: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
b92b8f48fb net: pcnet: Drop PCNET_HAS_PROM
All of one PCNET users has this option set, make this default
and drop this config option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Marek Vasut
b9c52c5090 net: pcnet: Drop typedef struct pcnet_priv_t
Use struct pcnet_priv all over the place instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-29 22:36:35 +02:00
Tom Rini
582b4f7f39 Convert CONFIG_CADENCE_QSPI to Kconfig
This converts the following to Kconfig:
   CONFIG_CADENCE_QSPI

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-29 13:34:43 -04:00
Lukasz Majewski
56c4046038 spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI*
This change allows more fine tuning of driver model based SPI support in
SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI
support in SPL and TPL via Kconfig option.

Before this change it was necessary to use:
    /* SPI Flash Configs */
    #if defined(CONFIG_SPL_BUILD)
    #undef CONFIG_DM_SPI
    #undef CONFIG_DM_SPI_FLASH
    #undef CONFIG_SPI_FLASH_MTD
    #endif

in the ./include/configs/<board>.h, which is error prone and shall be
avoided when we strive to switch to Kconfig.

The goal of this patch:

Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL).
Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must
still support non DM driver.

Another use case is the conversion of non DM/DTS SPI driver to support
DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the
distinction is needed in Kconfig (also if SPL version of the driver
supports OF_PLATDATA).

In the end of the day one would have to support following use cases (in
single driver file - e.g. mxs_spi.c):

- U-Boot proper driver supporting DT/DTS
- U-Boot proper driver without DT/DTS support (deprecated)
- SPL driver without DT/DTS support
- SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to
  run full blown DT/DTS)
- SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained
  environment with no fitImage and OF_LIBFDT support).

Some boards do require SPI support (with DM) in SPL (TPL) and some only
have DM_SPI{_FLASH} defined to allow compiling SPL.

This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI)
and provides corresponding defines in Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[trini: Fixup a few platforms]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-29 13:34:43 -04:00
Anatolij Gustschin
35ee34b2c2 video: rockchip: fix HDMI 4K resolution
3480 is not valid XRES, use 3840 as default.

Fixes: 05c65a82c3 ("video: rockchip: Support 4K resolution for rk3399, HDMI")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
2020-06-29 17:53:16 +02:00
Tom Rini
19a7e5814b - fix logo on mx6ul_14x14_evk with DM_VIDEO enabled
- fix banner string overwriting the logo on small displays
 - fix splash warning when building for ARM64
 - fix STM32 DSI driver to probe only on supported hardware
 - fix memory corruption with DSI panel drivers
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Merge tag 'fixes-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-video

- fix logo on mx6ul_14x14_evk with DM_VIDEO enabled
- fix banner string overwriting the logo on small displays
- fix splash warning when building for ARM64
- fix STM32 DSI driver to probe only on supported hardware
- fix memory corruption with DSI panel drivers
2020-06-28 10:12:25 -04:00
Patrick Wildt
673eb44e91 rockchip: correctly set vop0 or vop1
The EDP_LCDC_SEL bit has to be set correctly to select vop0 or
vop1, but so far we have set it in both conditions, which is not
correct.

Can someone verify this is the correct way round?  vop1 -> set,
vop0 -> clear?

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-28 09:56:11 +08:00
Yannick Fertre
bccb385a83 video: orisetech_otm8009a: fill characteristics of DSI data link
Fill characteristics of DSI data link to platform data instead of
mipi device to avoid memory corruption.

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-06-28 01:28:03 +02:00
Yannick Fertre
ac824e80ea video: raydium_rm68200: fill characteristics of DSI data link
Fill characteristics of DSI data link to platform data instead of
mipi device to avoid memory corruption.

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-06-28 01:26:55 +02:00
Yannick Fertre
7084dd8c4b video: stm32: stm32_dsi: copy DSI fields
Copy the DSI data link characteristics from panel
platform data to mipi DSI device.

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-06-28 01:25:52 +02:00
Yannick Fertre
670eda3293 video: check hardware version of DSI
Check the hardware version of DSI. Versions 1.30 & 1.31 are only
supported.

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Philippe Cornu <philippe.cornu@st.com>
2020-06-28 01:22:24 +02:00
Ye Li
8cee2006ca video: vidconsole: avoid multiple lines overwrite logo
Fix the bug that multiple lines wraps to overwrite logo bmp
display.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # bpi-m1+, bpi-m64
2020-06-28 00:28:59 +02:00
Ye Li
bab68b2d88 video: bmp: support 8bits BMP drawing on 24/32 bpp framebuffer
Update video bmp code so that we can display 8 bits logo on
24 or 32 bpp framebuffer.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # bpi-m1+, bpi-m64
2020-06-28 00:18:37 +02:00
Alexander Kochetkov
5e15dcb4cb rockchip: clk: rk3188: change APLL to safe 600MHz
The commit 84a6a27ae3 ("rockchip: rk3188: init CPU freq in clock
driver") changed ARM clock from 600MHz to 1600MHz. It made boot
unstable due to the fact that PMIC at the start generates insufficient
voltage for operation. See also: commit f4f57c58b5 ("rockchip:
rk3188: Setup the armclk in spl").

Fixes commit 84a6a27ae3 ("rockchip: rk3188: init CPU freq in clock
driver").

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-27 23:23:00 +08:00
Tom Rini
a60becc8c7 Convert CONFIG_ATMEL_HLCD to Kconfig
This converts the following to Kconfig:
   CONFIG_ATMEL_HLCD

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:04 -04:00
Tom Rini
348d183e54 Convert CONFIG_AT91_GPIO to Kconfig
This converts the following to Kconfig:
   CONFIG_AT91_GPIO

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:04 -04:00
Tom Rini
b40fa97286 Convert CONFIG_ARM_PL180_MMCI to Kconfig
This converts the following to Kconfig:
   CONFIG_ARM_PL180_MMCI

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:04 -04:00
Tom Rini
0735ac8522 Convert CONFIG_AM335X_LCD to Kconfig
This converts the following to Kconfig:
   CONFIG_AM335X_LCD

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:04 -04:00
Simon Glass
aef43ea060 bdinfo: dm: Update fb_base when using driver model
Update this value with the address of a video device so that it shows with
the 'bd' command.

It would be better to obtain the address from the uclass by looking in
struct video_uc_platdata for each device. We can move over to that once
DM_VIDEO migration is complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:13 -04:00
Tom Rini
f0e236c8d6 Xilinx changes for v2020.10
Versal:
 - xspi bootmode fix
 - Removing one clock from clk driver
 - Align u-boot memory setting with OS by default
 - Map TCM and OCM by default
 
 ZynqMP:
 - Minor DT improvements
 - Reduce console buffer for mini configurations
 - Add fix for AMS
 - Add support for XDP platform
 
 Zynq:
 - Support for AES engine
 - Enable bigger memory test by default
 - Extend documentation for SD preparation
 - Use different freq for Topic miami board
 
 mmc:
 - minor GD pointer removal
 
 net:
 - Support fixed-link cases by zynq gem
 - Fix phy looking loop in axi enet driver
 
 spi:
 - Cleanup global macros for xilinx spi drivers
 
 firmware:
 - Add support for pmufw reloading
 
 fpga:
 - Improve error status reporting
 
 common:
 - Remove 4kB addition space for FDT allocation
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Merge tag 'xilinx-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2020.10

Versal:
- xspi bootmode fix
- Removing one clock from clk driver
- Align u-boot memory setting with OS by default
- Map TCM and OCM by default

ZynqMP:
- Minor DT improvements
- Reduce console buffer for mini configurations
- Add fix for AMS
- Add support for XDP platform

Zynq:
- Support for AES engine
- Enable bigger memory test by default
- Extend documentation for SD preparation
- Use different freq for Topic miami board

mmc:
- minor GD pointer removal

net:
- Support fixed-link cases by zynq gem
- Fix phy looking loop in axi enet driver

spi:
- Cleanup global macros for xilinx spi drivers

firmware:
- Add support for pmufw reloading

fpga:
- Improve error status reporting

common:
- Remove 4kB addition space for FDT allocation
2020-06-25 09:33:39 -04:00
Tom Rini
922c6d5d00 Merge tag 'mmc-2020-6-24' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- Fix fsl_esdhc_imx tunning mask
- Disable CMD CRC for normal tuning for fsl_esdhc_imx
- Retry CM1 until emmc ready
- Fix sdhci HISPD handling
- Cache-aligned extcsd reading
2020-06-24 09:05:35 -04:00
Patrick van Gelder
945a55050d net: xilinx: axi_emac: Fix endless loop when no PHYs are connected
The index used to iterate over the possible PHYs in axiemac_phy_init was an
unsigned int and decremented. Therefor it was always >= 0 and never exited
the loop.

Signed-off-by: Patrick van Gelder <patrick.vangelder@nl.bosch.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
T Karthik Reddy
33d3f8e577 arm64: xilinx: Print fpga error value in hex
Fpga returns error value when fails, error status should be
printed in hex format.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Ashok Reddy Soma
f44bd3bcfd spi: zynq_[q]spi: Convert config's to macro's
Remove below config options and convert them to macros. They have never
been configured to different values than default one. And also it makes
sense to reduce the config_whitelist.
CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_ZYNQ_QSPI_WAIT
CONFIG_XILINX_SPI_IDLE_VAL

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Michal Simek
26e62cc971 net: gem: Disable PCS autonegotiation in case of fixed-link
Disable PCS autonegotiation if fixed-link node is present in device tree.
This way systems with multiple GEM instances with a combination of
SGMII-fixed and SGMII-PHY will work.

Reported-by: Goran Marinkovic <goran.marinkovic@psi.ch>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:06 +02:00
T Karthik Reddy
ca0c0e07ad fpga: zynqpl: Flush dcache only for non-bitstream data
In case of aes decryption destination address range must be flushed
before transferring decrypted data to destination.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Ibai Erkiaga
c64afba2fb fpga: zynqpl: Check if aes engine is enabled
AES engine cannot be used if has not been enabled at boot time
with an encrypted boot image.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
1d9632a3cc fpga: zynqpl: Check fpga config completion
This patch checks fpga config completion when a bitstream is loaded
into PL.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Siva Durga Prasad Paladugu
3427f4d204 fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes
Correct the PL bitstream loading sequence for zynqaes command by
clearing the loaded PL bitstream before loading the new encrypted
bitstream using the zynq aes command. This was done by setting
the PROG_B same as in case of fpgaload commands.
This patch fixes the issue of loading the encrypted PL bitstream
onto the PL in which a bitstream has already been loaded
successfully.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Michal Simek
4c86e0834a firmware: zynqmp: Change panic logic in zynqmp_pmufw_load_config_object()
There is no need to panic all the time when pmufw config object loading
failed. The patch improves function logic to report permission deny case
and also panic only for SPL case.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-24 13:07:57 +02:00
Rajan Vaja
2b2012d1c1 clk: versal: Remove alt_ref_clk from clock sources
alt_ref_clk is applicable only for PS extended version.
For PS base version there is no separate alt_ref_clk.
It is tied with ref_clk, so remove it from driver.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Michal Simek
aeb3c386c8 mmc: zynq_sdhci: Remove global pointer
Driver is not calling gd anywhere that's why there is not need to define
it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Jagan Teki
f12341a952 mmc: sdhci: Fix HISPD bit handling
SDHCI HISPD bits need to be configured based on desired mmc
timings mode and some HISPD quirks.

So, handle the HISPD bit based on the mmc computed selected
mode(timing parameter) rather than fixed mmc card clock
frequency.

Linux handle the HISPD similar like this in below commit but no
SDHCI_QUIRK_BROKEN_HISPD_MODE,

commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling")

This eventually fixed the mmc write issue observed in
rk3399 sdhci controller.

Bug log for refernece,
=> gpt write mmc 0 $partitions
Writing GPT: mmc write failed
** Can't write to device 0 **
** Can't write to device 0 **
error!

Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Peng Fan <peng.fan@nxp.com>
Peng Fan: added back "ctrl &= ~SDHCI_CTRL_HISPD;" per Jaehoon's suggestion
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> # roc-rk3399-pc
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-24 14:05:30 +08:00
Haibo Chen
fe95905ffe mmc: retry CMD1 in mmc_send_op_cond() until the eMMC is ready
According to eMMC specification v5.1 section 6.4.3, we should issue
CMD1 repeatedly in the idle state until the eMMC is ready even if
mmc_send_op_cond() send CMD1 with argument = 0. Otherwise some eMMC
devices seems to enter the inactive mode after mmc_complete_op_cond()
issued CMD0 when the eMMC device is busy.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-06-24 14:05:30 +08:00
Haibo Chen
ba61676ff9 mmc: fsl_esdhc_imx: disable the CMD CRC check for standard tuning
In current code, we add 1ms dealy after each tuning command for standard
tuning method. Adding this 1ms dealy is because USDHC default check the
CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning
IC logic do not wait for the tuning data sending out by the card, trigger
the buffer read ready interrupt immediately, and step to next cycle. So
when next time the new tuning command send out by USDHC, card may still
not send out the tuning data of the upper command,then some eMMC cards
may stuck, can't response to any command, block the whole tuning procedure.

If do not check the CMD CRC for tuning, then do not has this issue. USDHC
will wait for the tuning data of each tuning command and check them. If the
tuning data pass the check, it also means the CMD line also okay for tuning.

So this patch disable the CMD CRC check for tuning, save some time for the
whole tuning procedure.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2020-06-24 14:05:30 +08:00
Jagan Teki
1a027a90aa nvme: Invalidate dcache before submitting admin cmd
This patch try to avoids eviction of dirty lines during DMA
transfer. The code right now execute the following step:

- allocate the buffer
- start a dma operation using the non-coherent dma buffer
- invalidate cache lines associated with the buffer
- read the buffer

This can lead to reading back not valid information, because the cache
controller could evict dirty cache lines belonging to the buffer *after*
the DMA operation has started to fill the DRAM.
In order to avoid this, a new invalidation is required *before* starting
the DMA operation. The patch just adds an invalidation before submitting
the DMA command.

Example below shows the nvme disk scan result without the following
patch

=> nvme scan
nvme_get_info_from_identify: nn = 544502629, vwc = 100,
sn = dev_0T, mn = `�\�, fr = t_part, mdts = 105

So, invalidating the cache before submitting the admin command,
fix the cpu read.

Cc: André Przywara <andre.przywara@arm.com>
Reported-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-23 14:43:23 -04:00
Ye Li
e168eacde1 gpio: mxc_gpio: change gpio index for i.MX8
Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX
platforms, so we have to adjust the index accordingly.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
2020-06-23 00:08:53 +02:00
Fabio Estevam
89b5bd54c1 net: fec: Allow the PHY node to be retrieved
As we move towards driver model, it is required to let the FEC driver
know how to properly deal with an Ethernet PHY subnode in the device tree.

For example:

 &fec {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
	phy-handle = <&phy>;
 	phy-mode = "rgmii-id";
 	phy-reset-duration = <2>;
 	phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
 	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		phy: ethernet-phy@0 {
			reg = <0>;
			qca,clk-out-frequency = <125000000>;
		};
	};
 };

Currently the PHY node pointer is incorrectly associated with the
Ethernel controller instead of the PHY node itself.

This causes the PHY properties, such as "qca,clk-out-frequency" in
the example above to not get parsed.

Fix this problem by populating the phy_of_node node.

Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Tom Rini <trini@konsulko.com>
2020-06-22 17:40:49 +02:00
Fabio Estevam
338d9b032a phy: atheros: ar8035: Fix clock output calculation
The clock ouput frequency is calculated incorrectly for AR8035 due to
wrong masking of priv->clk_25m_reg and priv->clk_25m_mask.

This same issue has been already fixed in the kernel by:

commit b1f4c209d84057b6d40b939b6e4404854271d797
Author: Oleksij Rempel <o.rempel@pengutronix.de>
Date:   Wed Apr 1 11:57:32 2020 +0200

    net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035

    The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set
    for the values that comprise the fields, not zero-bits-set.

    This patch fixes the clock frequency configuration for ATH8030 and
    ATH8035 Atheros PHYs by removing the erroneous "~".

    To reproduce this bug, configure the PHY  with the device tree binding
    "qca,clk-out-frequency" and remove the machine specific PHY fixups.

    Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding")
    Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
    Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
    Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk>
    Tested-by: Russell King <rmk+kernel@armlinux.org.uk>
    Signed-off-by: David S. Miller <davem@davemloft.net>

Apply the same fix in the U-Boot driver.

Tested on a i.MX6 Hummingboard.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Tested-by: Tom Rini <trini@konsulko.com>
2020-06-22 17:40:41 +02:00
Tom Rini
6ccbd1590f Merge branch 'net' of https://gitlab.denx.de/u-boot/custodians/u-boot-sh into next
- Convert pcnet and eepro100 ethernet drivers to DM
2020-06-20 18:52:51 -04:00
Tom Rini
5575f79bda Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi into next
- Convert fsl_espi to driver model (Chuanhua)
- Enable am335x baltos to DM_SPI (Jagan)
- Drop few powerpc board which doesn't have DM enabled (Jagan)
2020-06-19 16:25:50 -04:00
Tom Rini
04909251fd - migrate remaining imx5/imx6qd boards to DM_VIDEO
- use 'vidconsole' stdout in nitrogen6x upgrade script
 - add option for selection of the vidconsole commands
   lcdputs and setcurs
 - allow building ipuv3 driver with disabled CONFIG_PANEL
 - make backlight and panel drivers optional
 - remove useless code from ipuv3 driver
 - extend existing DM_VIDEO work-around for console name
   to support 'vga'
 - remove non-DM code in ipuv3
 -----BEGIN PGP SIGNATURE-----
 
 iGwEABECACwWIQSC4hxrSoIUVfFO0kRM6ATMmsalXAUCXuvRkA4cYWd1c3RAZGVu
 eC5kZQAKCRBM6ATMmsalXMpeAJkB/FzsJ3O7putHrbLKOrLRF3zZYwCfQxa9jKuh
 DXNTYVrHS/43T8ijGYo=
 =7G75
 -----END PGP SIGNATURE-----

Merge tag 'video-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-video into next

- migrate remaining imx5/imx6qd boards to DM_VIDEO
- use 'vidconsole' stdout in nitrogen6x upgrade script
- add option for selection of the vidconsole commands
  lcdputs and setcurs
- allow building ipuv3 driver with disabled CONFIG_PANEL
- make backlight and panel drivers optional
- remove useless code from ipuv3 driver
- extend existing DM_VIDEO work-around for console name
  to support 'vga'
- remove non-DM code in ipuv3
2020-06-18 16:59:16 -04:00
Jon Hunter
fb264efbd2 firmware: PSCI: Fix PSCI support for OF live trees
When CONFIG_OF_LIVE is enabled, dev_of_offset() cannot be used and
if used returns an invalid offset. This causes the call to
fdt_stringlist_get() in the psci_probe() to fail to read the 'method'
property from the PSCI node for the device and hence prevents PSCI
from working. Fix this by using the ofnode_read_string() API instead
of the fdt_stringlist_get() because this will handle reading the
property both when CONFIG_OF_LIVE is enabled or disabled.

Due to the above problem and since commit 81ea00838c ("efi_loader:
PSCI reset and shutdown") was added, the EFI system reset has been
broken for Tegra210 and Tegra196 platforms. This also fixes the EFI
system reset for these Tegra platforms.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-06-18 13:14:50 -07:00
Anatolij Gustschin
fb3dd9c005 video: ipuv3: remove non-DM code
All ipuv3 users have been converted, drop obsolete code.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-06-18 19:38:50 +02:00
Marek Vasut
d789a8259e net: pcnet: Add Kconfig entries
Add Kconfig entries for the pcnet driver and convert MIPS malta
to use those.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:41 +02:00
Marek Vasut
59edb2668e net: pcnet: Add DM support
With all the changes in place, add support for DM into the
pcnet driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:41 +02:00
Marek Vasut
dea9b6014b net: pcnet: Split common and non-DM functions
Pull the common parts of functions out so they can be reused by both
DM and non-DM code paths. The recv() function had to be reworked to
fit into this scheme and this means it now only receives one packet
at a time instead of spinning in an endless loop.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:41 +02:00
Marek Vasut
1023a1e6a9 net: pcnet: Wrap name and enetaddr into private data
Instead of using the non-DM-only name and enetaddr in struct eth_device,
add pointers into the private data which can either point to that non-DM
name or a DM one later on.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:41 +02:00
Marek Vasut
3b2d63a739 net: pcnet: Wrap iobase into private data
Instead of using the non-DM-only iobase in struct eth_device, add
one into the private data to make DM and non-DM operation possible.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
fdf6cbe54d net: pcnet: Pass private data through dev->priv
Get rid of the global point to private data, and rather pass it
thought dev->priv. Also remove the unnecessary check for lp being
non-NULL, since it is always NULL at this point.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
60074d9d3e net: pcnet: Wrap devbusfn into private data
Instead of using eth_device priv for this PCI devbusfn, free it
so it could be used for driver private data, and wrap devbusfn
into those driver private data.

Note that using the name dev for the variable is a trick left for
later, when DM support is in place, so dm_pci_virt_to_mem() can be
used with minimal ifdeffery.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
d20e857e6b net: pcnet: Drop useless forward declarations
Remove those as they are not needed anymore.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
69e08bd735 net: pcnet: Move initialize function at the end
Move the function at the end of the driver, so we could drop
various forward declarations later. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
246d2bfcf2 net: pcnet: Move private data allocation to initialize
The private data allocation does not have to be done every time the
NIC is initialized at run time, move the allocation to initialize
function, which means it will be done only once when the driver
starts.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
ae38e96c23 net: pcnet: Replace memset+malloc with calloc
This combination of functions can be replaced with calloc(),
make it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
1c38c36eb9 net: pcnet: Simplify private data allocation
The current code is horribly complex. Both the RX and TX buffer
descriptors are 16 bytes in size, the init block is 32 bytes in
size, so simplify the code such that the entire private data of
the driver are allocated cache aligned and the RX and TX buffer
descriptors are part of the private data.

This removes multiple malloc calls and cache flushes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
e4797c3161 net: pcnet: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
1524e409ef net: pcnet: Drop PCNET_HAS_PROM
All of one PCNET users has this option set, make this default
and drop this config option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
97d5c14559 net: pcnet: Drop typedef struct pcnet_priv_t
Use struct pcnet_priv all over the place instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
6463b73e0b net: eepro100: Add Kconfig entries
Add Kconfig entries for the eepro100 driver and convert various boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
af8ecdf7e5 net: eepro100: Add DM support
Add support for driver model to the driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
8835103e24 net: eepro100: Split common parts of non-DM functions out
Split the common code from the non-DM code, so it can be reused by
the DM code later. As always, the recv() function had to be split
into the actual receiving part and free_pkt part to fit with the
DM.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
43b738350c net: eepro100: Drop bd_t pointer from read_hw_addr()
The pointer is unused, so drop it. Rename the function to start
with the eepro100_ prefix.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
fb8307e52a net: eepro100: Add RX/TX rings into the private data
The RX/TX DMA descriptor rings are per-device-instance private data,
so move them into the private data.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
39daab2376 net: eepro100: Pass device private data into mdiobus
Instead of doing ethernet device lookup by name every time there
is an MDIO access, pass the driver private data via mdiobus priv
to the MDIO bus accessors.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
389da9743c net: eepro100: Pass device private data around
This patch replaces the various uses of struct eth_device for accessing
device private data with struct eepro100_priv, which is compatible both
with DM and non-DM operation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
bd159c6185 net: eepro100: Introduce device private data
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
fa9e12102d net: eepro100: Pass PCI BDF into bus_to_phys()/phys_to_bus()
This is a trick in preparation for adding DM support. By passing in
the PCI BDF into the bus_to_phys()/phys_to_bus() macros and calling
that dev, we can substitute dev with udevice when DM support lands
and do minor adjustment to the macros to support both DM and non-DM
operation. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
acdf5d8882 net: eepro100: Drop inline keyword
Drop the inline keyword from the static functions, the compiler has a
much better overview and can decide how to inline those functions much
better.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
a6c06ec8f6 net: eepro100: Fix EE_*_CMD macros
Those macros depended on specific variable names to be declared
at their usage sites, fix this by adding an argument to those
macros and also protect the argument with braces.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
66fed7300d net: eepro100: Factor out MII registration
Pull the MII registration code into a separate function. Moreover,
properly free memory in case any of the registration or allocation
functions fail, so this fixes an existing memleak.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
6c7d3f6b3f net: eepro100: Switch from malloc()+memset() to calloc()
Replace malloc()+memset() combination with calloc(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
3a15684dc6 net: eepro100: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
047a800dd6 net: eepro100: Reorder functions in the driver
Move the functions around in the driver to prepare it for DM conversion.
Drop forward declarations which are not necessary anymore. No functional
change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
d47cf87db9 net: eepro100: Remove volatile misuse
Remove all the remaining use of the 'volatile' keyword, as this is
no longer required. All the accesses which might have needed this
use of 'volatile' have been repaired properly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
5116aae111 net: eepro100: Add cache management
Add cache invalidation and flushes wherever the DMA descriptors are
written or read, otherwise this driver cannot work reliably on any
systems where caches are enabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
95655b921b net: eepro100: Factor out tx_ring command issuing
This code is replicated in the driver thrice almost verbatim, factor
it out into a separate function and clean it up. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
46df32ef2f net: eepro100: Replace purge_tx_ring() with memset()
This function zeroes-out all the descriptors in the TX ring,
use memset() instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
81bdeea2fe net: eepro100: Use standard I/O accessors
The current eepro100 driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
some systems as the accesses can get out of order. So convert the direct
volatile dereferences to use the normal in/out macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
f3878f5c28 net: eepro100: Fix camelcase
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types INDENTED_LABEL -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
b013173079 net: eepro100: Fix remaining checkpatch issues
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl -f --fix --fix-inplace drivers/net/eepro100.c

This fixes all the remaining errors except a couple of comments which
are longer than 80 characters, all the volatile misuse and all the
camelcase, that needs a separate patch.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
614e95152d net: eepro100: Fix indented label
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types INDENTED_LABEL -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
7a30873585 net: eepro100: Fix pointer location
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types POINTER_LOCATION -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
773af836da net: eepro100: Fix parenthesis alignment
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types PARENTHESIS_ALIGNMENT -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
9b12ff9911 net: eepro100: Fix braces
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types BRACES -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
db9f1818bf net: eepro100: Fix spacing
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types SPACING -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
e5352c6bbe net: eepro100: Use plain debug()
Convert all the ifdef DEBUG to plain debug(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:39 +02:00
Marek Vasut
aba283d838 net: eepro100: Clean up comments
Clean the comments up to they trigger fewer checkpatch warnings,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:39 +02:00
Marek Vasut
0a5be6c5fd net: eepro100: Remove EEPRO100_SROM_WRITE
This code is never enabled, last board that used it was ELPPC which
was removed some 5 years ago, so just remove this code altogether.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:39 +02:00
Anatolij Gustschin
22b897a123 video: extend stdout video console work-around for 'vga'
cfb_console driver uses 'vga' console name and we still have board
environments defining this name. Re-use existing DM_VIDEO work-
around for console name to support 'vga' name in stdout environment.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Soeren Moch <smoch@web.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-06-18 19:30:14 +02:00
Anatolij Gustschin
db755b36d2 video: ipuv3: remove some useless code to reduce binary size
To enable DM_VIDEO we must decrease binary size to fix build
breakage for some boards, so drop not needed code. Also add
!DM_VIDEO guards which can be later removed when last non DM
users will be converted.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-06-18 19:29:33 +02:00
Anatolij Gustschin
e26e520046 video: make backlight and panel drivers optional
Not all boards use these drivers, so allow to disable them to fix
building boards with U-Boot binary image size restrictions.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-18 19:28:36 +02:00
Anatolij Gustschin
0b12f76f72 video: ipuv3: fix building with disabled panel driver
Panel code might be disabled for some boards, make this
driver code optional.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-06-18 19:27:49 +02:00
Anatolij Gustschin
39b95556f9 video: make vidconsole commands optional
Converting some boards to DM_VIDEO results in build breakage due
to increased code size. Make video console specific commands
optional to reduce binary size.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-18 19:26:54 +02:00
Chuanhua Han
8d50551dc7 dm: spi: Convert Freescale ESPI driver to driver model
Modify the Freescale ESPI driver to support the driver model.
Also resolved the following problems:

===================== WARNING ======================
This board does not use CONFIG_DM_SPI. Please update
the board before v2019.04 for no dm conversion
and v2019.07 for partially dm converted drivers.
Failure to update can lead to driver/board removal
See doc/driver-model/MIGRATION.txt for more info.
====================================================
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-18 21:47:08 +05:30
Tom Rini
83fdb43882 Merge tag 'ti-v2020.10-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next
- DM conversion for OMAP4, OMAP5 platforms.
- Other minor fixes for Nokia RX51, am33, am57, am654.
2020-06-18 10:07:49 -04:00
Tom Rini
eab48865f9 net: cpsw: Add __maybe_unused to generated inlines
We generate a number of helper inline functions to make accesses easier.
However not all permutations of each function will be used and clang
will warn about unused ones.  Decorate all of them with __maybe_unused
because of this.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-06-16 17:00:02 +05:30
Tom Rini
2af17e2573 mmc: omap_hsmmc: Add guards around omap_hsmmc_get_cfg()
We only call the function omap_hsmmc_get_cfg in the case of OMAP34XX or
when we have to iodelay recalibration.  Add guards for these checks as
clang will otherwise warn.

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-06-16 17:00:02 +05:30
Tom Rini
a37f765219 gpio: omap_gpio: Fix unused function warning in non-DM case
In the case of non-DM_GPIO the function get_gpio_index() will never be
called, and clang will warn about this.  Move this to be with the other
non-DM code for easier removal later.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-06-16 17:00:02 +05:30
Bin Liu
5b9ee0fc6f phy: omap-usb2-phy: disable phy charger detect
AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which
could cause enumeration failure with some USB hubs.  Disabling the
USB2_PHY Charger Detect function will put D+ into the normal state.

Using property "ti,dis-chg-det-quirk" in the DT usb2-phy node to
enable this workaround for AM654x PG1.0.

Signed-off-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
2020-06-16 17:00:02 +05:30
Mark Kettenis
e88d6979d1 regulator: fix: enable gpio when requested
The fix in commit b7adcdd073 has the side-effect that the regulator
will be disabled when requesting the relevant gpio in
regulator_common_ofdata_to_platdata() and enabled in
regulator_pre_probe() when the regulator was already enabled.
This leads to a short interruption in the 3.3V power to the PCIe
slot on the firefly-rk3399 which makes an ADATA SX8000NP NVMe SSD
unhappy.

Fix this by setting the GPIOD_IS_OUT_ACTIVE flag again when the
'regulator-boot-on' property is set, but check for this property
explicitly instead of relying on the "boot_on" member of
the uclass platdata.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Patrice Chotard <patrice.chotard@st.com>
2020-06-15 16:37:01 -04:00
Tom Rini
bb1ff1371e Merge tag 'mmc-2020-6-15' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- fsl_esdhc sdr104 and hs200 fix and error path fix
- fsl_esdhc workaround 3.3v io issue
- ca_dw_mmc cleanup
- presidio-asic emmc DT update.
2020-06-15 10:20:35 -04:00
Marek Vasut
50a17a69be mmc: fsl_esdhc: Gracefully fail on unsupported voltage switch
Unsupported voltage on voltage switch is not an error, do not
print error message in such a case. This happens e.g. if the
eMMC is already in 1V8 mode or when testing 1V2 mode operation
on systems which only do 3V3/1V8 switching.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-06-15 09:45:22 +08:00
Marek Vasut
406df85345 mmc: fsl_esdhc: Fix SDR104 and HS200 support
The 3V3/1V8 switching could never have worked on any of the iMXes
ever since 51313b49f2 ("mmc: fsl_esdhc: support SDR104 and HS200"),
because that commit uses priv->vqmmc_dev when switching voltages on
mode switch, while local vqmmc_dev in probe to store the regulator
pointer. Those are two different variables with the same name. So
the priv->vqmmc_dev was always NULL and thus voltage switch between
modes never really suceeded.

Fix this by assigning priv->vqmmc_dev with value of the vqmmc_dev
in probe.

Fixes: 51313b49f2 ("mmc: fsl_esdhc: support SDR104 and HS200")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-06-15 09:45:22 +08:00
Arthur Li
dbd8a8dfe7 mmc: ca_dw_mmc: Misc cleanup of driver
- Rename DT compatible name
- Remove uneccessary if-statement to support 8-bit buswidth
- Remove redundant error msg
- Use symbolic constants in switch statement

Signed-off-by: Arthur Li <arthur.li@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Peng Fan <peng.fan@nxp.com>
CC: Jaehoon Chung <jh80.chung@samsung.com>
CC: Tom Rini <trini@konsulko.com>
2020-06-15 09:45:22 +08:00
Yangbo Lu
c927d65873 mmc: fsl_esdhc: workaround for hardware 3.3v IO reliability issue
When eSDHC operates at 3.3v, damage can accumulate in an internal
level shifter at a higher than expected rate. The faster the interface
runs, the more damage accumulates. This issue now is found on LX2160A
eSDHC1 for only SD card.

The hardware workaround is recommended to use an on-board level shifter
that is 1.8v on SoC side and 3.3v on SD card side.

For boards without hardware workaround, this option could be enabled,
ensuring 1.8v IO voltage and disabling eSDHC if no card.
This option assumes no hotplug, and u-boot has to make all the way to
to linux to use 1.8v UHS-I speed mode if has card.
If you do not want the workaround for better user experience, of course
you can choose to not select it running eSDHC in unsafe mode.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-06-15 09:45:22 +08:00
Yangbo Lu
9abf648436 mmc: fsl_esdhc: read register once for card inserted status
No need to poll register for card inserted status.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-06-15 09:45:22 +08:00
Tom Rini
07672c478e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- eth/r8152: update the firmware
2020-06-14 12:01:14 -04:00
Hayes Wang
65f7551b6e eth/r8152: update the firmware
Update the firmware to improve compatibility for none-intel USB
host controller. The more information is as following.

The device has auto-installed driver feature - via switch CD-ROM/NIC
mode. But in some corner cases, it would switch to CD-ROM unexpected.
This issue results in Lan Function Disabled.

While USB PHY transits to P3 from P0 due to the absent of transmitter
control, it would issues undefined signal to its link partner.
Some Down Stream Port misidentify the undefined signal as wakeup
signal. So the link state will not keep in suspend even the system
is idle.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-06-14 13:36:29 +02:00
Faiz Abbas
c78ae11e07 mmc: davinci_mmc: Cleanup to use dt in U-boot and static platdata in SPL
Cleanup this driver to use dt in U-boot and static platdata in SPL.
This requires the following steps:

1. Move all platdata assignment from probe() to ofdata_to_platdata().
   This function is only called in U-boot.
2. Replicate all the platdata assignment being done in
   ofdata_to_platdata() in the omapl138 board file. This data is used in
   the SPL case where SPL_OF_CONTROL is not enabled.
3. Remove SPL_OF_CONTROL and related configs from omapl138_lcdk_defconfig

This cleanup effectively reverts 3ef94715cc ('mmc: davinci: fix mmc boot in SPL')

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2020-06-13 23:12:17 +05:30
Tom Rini
f9e3d2e147 patman improvements to allow it to work with Zephyr
change to how sequence numbers are assigned to devices
 minor fixes and improvements
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Merge tag 'dm-pull-12jun20' of git://git.denx.de/u-boot-dm into next

patman improvements to allow it to work with Zephyr
change to how sequence numbers are assigned to devices
minor fixes and improvements
2020-06-13 09:01:01 -04:00
Marek Vasut
46c8b18734 net: rtl8139: Add DM support
Add support for driver model to the driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
d8afb8b28e net: rtl8139: Read HW address from EEPROM only on probe
Do not re-read the HW address from the EEPROM on every start of
transfer, otherwise the user will not be able to adjust ethaddr
as needed. Read the address only once, when the card is detected.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
2df3a51510 net: rtl8139: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
6a4a5c194d net: rtl8139: Split out common and non-DM functions
Split the driver into common and non-DM functionality, so that the
DM support can later re-use the common code, while we retain the
non-DM code until all the platforms are converted.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
26f59c28bd net: rtl8139: Pass private data into rtl8139_eeprom_delay()
Instead of always calling rtl8139_eeprom_delay() with priv->ioaddr,
call it with priv and let the function access priv->ioaddr. This
reduces code duplication and has no impact, since the compiler will
inline this as needed anyway.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
3feb6f7ff6 net: rtl8139: Introduce device private data
Introduce rtl8139_pdata, which is a super-structure around eth_device
and tracks per-device state, here the device IO address, PCI BDF, RX
and TX ring position. Pass this structure around instead of the old
non-DM eth_device in preparation for DM conversion.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
8ff1d4a9c8 net: rtl8139: Clean up bus_to_phys()/phys_to_bus() macros
These macros depended on the dev variable being declared wherever
they were used. This is wrong and will not work with DM anyway, so
pass only the PCI BFD into these macros, which fixes the dependency
and prepares them for DM support as well.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
f4385539f1 net: rtl8139: Use dev->iobase instead of custom ioaddr
Replace the use of custom static ioaddr variable with common dev->iobase,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
1ba8d98445 net: rtl8139: Switch from malloc()+memset() to calloc()
Replace malloc()+memset() combination with calloc(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
9962dd25b1 net: rtl8139: Factor out device name assignment
Pull the device name setting into a separate function, as this
will be shared between DM/non-DM variants.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Dan Murphy
8882238cc4 net: phy: Add DP8382x phy registration to TI PHY init
Add the DP8382X generic PHY registration to the TI PHY init file.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-06-12 13:17:23 -04:00
Dan Murphy
bc0e578f90 net: phy: Add support for TI PHY init
ti_phy_init function was allocated to the DP83867 PHY.  This function
name is to generic for a specific PHY.  The function can be moved to a
TI specific file that can register all TI PHYs that are defined in the
defconfig.  The ti_phy_init file will contain all TI PHYs initialization
so that only phy_ti_init can be called from the framework.

In addition to the above the config flag for the DP83867 needs to be changed
in the Kconfig and dependent defconfig files. The config flag that was
used for the DP83867 was also generic in nature so a more specific
config flag for the DP83867 was created.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-06-12 13:17:23 -04:00
Florin Chiculita
9c6de508a6 net: phy: add phyid search in vendor specific space
There are devices accesible through mdio clause-45, such as
retimers, that do not have PMA or PCS blocks.
This patch adds MDIO_MMD_VEND1 on the list of device addresses
where phyid is searched. Previous order of devices was kept.

Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
2020-06-12 13:17:23 -04:00
Tom Warren
a7a435e7d4 net: rt8169: WAR for DHCP not getting IP after kernel boot/reboot
This is a WAR for DHCP failure after rebooting from the L4T kernel. The
r8169.c kernel driver is setting bit 19 of the rt816x HW register 0xF0,
which goes by FuncEvent and MISC in various driver source/datasheets.
That bit is called RxDv_Gated_En in the r8169.c kernel driver. Clear it
here at the end of probe to ensure that U-Boot can get an IP assigned
via DHCP.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-06-12 13:17:23 -04:00
Bryan O'Donoghue
baafd99d13 net: phy: micrel: ksz8061 implement errata 80000688A fix
Linux commit 232ba3a51cc2 ('net: phy: Micrel KSZ8061: link failure after
cable connect') implements a fix for the above errata.

This patch replicates that errata fix in an ksz8061 specific init routine.

Signed-off-by: Bryan O'Donoghue <bod@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Michael Walle
be1a6e9425 dm: uclass: don't assign aliased seq numbers
If there are aliases for an uclass, set the base for the "dynamically"
allocated numbers next to the highest alias.

Please note, that this might lead to holes in the sequences, depending
on the device tree. For example if there is only an alias "ethernet1",
the next device seq number would be 2.

In particular this fixes a problem with boards which are using ethernet
aliases but also might have network add-in cards like the E1000. If the
board is started with the add-in card and depending on the order of the
drivers, the E1000 might occupy the first ethernet device and mess up
all the hardware addresses, because the devices are now shifted by one.

Also adapt the test cases to the new handling and add test cases
checking the holes in the seq numbers.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexandru.marginean@nxp.com>
Tested-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Michal Simek <michal.simek@xilinx.com> [on zcu102-revA]
2020-06-11 20:52:11 -06:00
Michael Walle
c03b7612ea usb: provide a device tree node to USB devices
It is possible to specify a device tree node for an USB device. This is
useful if you have a static USB setup and want to use aliases which
point to these nodes, like on the Raspberry Pi.
The nodes are matched against their hub port number, the compatible
strings are not matched for now.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 20:52:11 -06:00
Pratyush Yadav
b59889bf34 regmap: Check for out-of-range offsets before mapping them
In regmap_raw_{read,write}_range(), offsets are checked to make sure
they aren't out of range. But this check happens _after_ the address is
mapped from physical memory. Input should be sanity-checked before using
it. Mapping the address before validating it leaves the door open to
passing an invalid address to map_physmem(). So check for out of range
offsets _before_ mapping them.

This fixes a segmentation fault in sandbox when -1 is used as an offset
to regmap_{read,write}().

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
2020-06-11 20:52:11 -06:00
Jagan Teki
807f0ff68a spi: davinci: Drop non-dm code
Now all boards which are using davinci SPI driver
have moved to SPL_DM so drop the unneeded non-dm code.

Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2020-06-11 15:14:04 +05:30
Jagan Teki
beeb34ac0c spi: atmel: Drop atmel_spi.h
atmel_spi.h has register offsets, and atmel_spi_slave
structure, move it into .c file for better readability
and drop atmel_spi.h

Cc: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11 15:14:04 +05:30
Jagan Teki
0984500146 spi: atmel: Remove nondm code
atmel spi driver now accessible only when DM_SPI enabled.

So, remove nondm code.

Cc: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11 15:14:04 +05:30
Jagan Teki
a9d3cab8a4 spi: atmel: Drop CONFIG_SYS_SPI_WRITE_TOUT
Drop CONFIG_SYS_SPI_WRITE_TOUT there is no code usage.

Cc: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11 15:14:04 +05:30
Jagan Teki
62b02a6634 spi: fsl_dspi: Drop nondm code
Drop the nondm code from fsl_dspi.c since there
is no board or any other code using for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11 15:14:04 +05:30
Jagan Teki
726c0343a8 spi: Zap SOFT_SPI (non-dm)
- Deadline for DM migration already passed by months.
- Sent couple of zap patches and
- No response on dm conversation
hence removed the driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 15:14:04 +05:30
Jagan Teki
7e07b37277 spi: mxs: Code cleanup
Order the macros, private structures and simple functions
in a proper way to have more code readability.

No functionality changed.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11 15:14:03 +05:30
Jagan Teki
c9a9823f26 spi: mxs: Drop nondm code
Deadline for DM migration already passed by months
and no response on full dm conversation hence removed
the nondm code.

Note: Look like there is no user for nondm code
for this driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11 15:14:03 +05:30
Tom Rini
be79009f3b Fixes for 2020.07
-----------------
 
 - mx53: mx53menlo Convert to DM_ETH, fix fail boot
 - imx8mp_evk: fix boot issue
 - MX6, display5: fix environment
 - drop warnings (watchdog) for i.MX8mm i.mx8mp
 - enable bootaux for i.MX8M
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/695929999
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Merge tag 'u-boot-imx-20200609' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2020.07
-----------------

- mx53: mx53menlo Convert to DM_ETH, fix fail boot
- imx8mp_evk: fix boot issue
- MX6, display5: fix environment
- drop warnings (watchdog) for i.MX8mm i.mx8mp
- enable bootaux for i.MX8M

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/695929999
2020-06-09 09:17:24 -04:00
Tom Rini
08649c3d50 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- DM_ETH support for P2041RDB, T1024RDB, P5040DS, P3041DS, P4080DS, bug
  fixes
- Add TBI PHY access through MII
- DDR: Rework errata workaround for A008109, A008378, 009942
2020-06-08 08:51:59 -04:00
Marek Vasut
661d9afe14 power: pmic: Add SPL Kconfig entry for PFUZE100
Add Kconfig entry for the PFUZE PMIC, SPL variant.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-06-08 10:42:50 +02:00
Heinrich Schuchardt
ca3ba71b9e virtio: VIRTIO_RNG depends on DM_RNG
Add the missing Kconfig dependency and let VIRTIO_RNG default to yes.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-05 04:04:41 +02:00
Michal Simek
4cc24aeaf4 serial: Add missing Kconfig dependencies for debug consoles
Debug console is the part of serial driver in the same file. It means to be
able to enable debug console you also need to enable driver itself.
That's why add all dependecies and list only debug consoles which are
enabled based on driver selection to avoid compilation error when user
asks for certain debug console but driver is not enable for it.

Error:
aarch64-linux-gnu-ld.bfd: common/built-in.o: in function `putc':
/home/monstr/data/disk/u-boot/common/console.c:513: undefined reference to `printch'
aarch64-linux-gnu-ld.bfd: common/built-in.o: in function `puts':
/home/monstr/data/disk/u-boot/common/console.c:563: undefined reference to `printch'

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Fix ns16550 dependency, add ZYNQ_SERIAL, change S5P]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04 15:05:45 -04:00
Tom Rini
c2a38411d1 serial: Convert ARM_DCC to Kconfig
The symbol "CONFIG_ARM_DCC" is used to control building
drivers/serial/arm_dcc.c.  Provide a simple Kconfig entry for this.

Cc: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Tom McLeod <tom.mcleod@opalkelly.com>
Cc: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-04 15:04:11 -04:00
Jaiprakash Singh
164a5af436 ddr: Rework errata A008109, A008378, 009942 workaround
Move errata A008109, A008378, 009942 workaround implementation from
compute_fsl_memctl_config_regs() to  fsl_ddr_set_memctl_regs()
and add register write after each workaround implementation.

Signed-off-by: Jaiprakash Singh <Jaiprakash.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04 18:53:20 +05:30
Joakim Tjernlund
73af094c84 ddr: fsl: Impl. Erratum A008109
Impl. erratum as descibed in errata doc.
Enable A008109 for T1040 and T1024

Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04 18:53:20 +05:30
Hou Zhiqiang
a0f47e012f net: tsec: Access TBI PHY through the corresponding MII
When an eTSEC is configured to use TBI, configuration of the
TBI is done through the MIIM registers for that eTSEC.
For example, if a TBI interface is required on eTSEC2, then
the MIIM registers starting at offset 0x2_5520 are used to
configure it.

Fixes: 9a1d6af55e ("net: tsec: Add driver model ethernet support")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04 18:53:20 +05:30
Hou Zhiqiang
bf67eb325b net: tsec: Access eTSEC registers using virtual address
The current code accesses eTSEC registers using physical
address directly, it's not correct, though no problem on
current platforms. It won't work on platforms, which does
not support 1:1 virtual-physical address map.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04 18:53:20 +05:30
Madalin Bucur
2932c5a802 net: tsec: fsl_mdio: add DM MDIO support
Allow the MDIO devices to be probed based on the device tree.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04 18:53:14 +05:30
Pragnesh Patel
1ba43d29eb clk: sifive: fu540-prci: Release ethernet clock reset
U-Boot ethernet works with FSBL flow where releasing ethernet clock
reset is part of FSBL itself but with the SPL, We need to release
ethernet clock reset explicitly for U-Boot proper. With this change
Release ethernet clock reset code in FSBL might not be needed or
unaffected.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-04 09:44:09 +08:00
Pragnesh Patel
378c7094af clk: sifive: fu540-prci: Add ddr clock initialization
Release ddr clock reset once clock is initialized

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Pragnesh Patel
79e49b081f clk: sifive: fu540-prci: Add clock enable and disable ops
Added clock enable and disable functions in prci ops

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Pragnesh Patel
c514a94abf sifive: fu540: add ddr driver
Add driver for fu540 to support ddr initialization in SPL.
This driver is based on FSBL
(https://github.com/sifive/freedom-u540-c000-bootloader.git)

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-04 09:44:08 +08:00
Pragnesh Patel
05307213c6 misc: add driver for the SiFive otp controller
Added a misc driver to handle OTP memory in SiFive SoCs.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Tom Rini
0d8f35b58c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- Toshiba spinand (Yoshio)
- SPI/SPI Flash cleanup (Jagan)
- Remove SH SPI (Jagan)
2020-06-03 12:27:51 -04:00
Tom Rini
f1a69b8c73 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- H6 emac support
- USB PHY H6 logic alignment
2020-06-03 11:52:13 -04:00
Madalin Bucur
3374264df9 drivers: net: qe: deselect QE when DM_ETH is enabled
A compilation error appears when QE is compiled with DM_ETH
enabled:

drivers/qe/uec.c: In function 'init_phy':
drivers/qe/uec.c:425:28: error: dereferencing pointer to incomplete type 'struct eth_device'
  uec = (uec_private_t *)dev->priv;
                            ^~
drivers/qe/uec.c: In function 'uec_initialize':
drivers/qe/uec.c:1357:43: error: invalid application of 'sizeof' to incomplete type 'struct eth_device'
  dev = (struct eth_device *)malloc(sizeof(struct eth_device));
                                           ^~~~~~

The patch disables CONFIG_QE when CONFIG_DM_ETH is set.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-03 12:14:27 +05:30
Madalin Bucur
94472223c6 drivers: net: e1000: with DM_ETH needs DM_PCI too
Compilation error occur when DM_ETH is enabled without DM_PCI.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-03 12:14:27 +05:30
Frédéric Danis
4f6abf159a bootcount_ext: Add Ext4 build dependency
This config option depends on EXT4 support.
If Ext4 write capability is not selected, it generate write error messages
and is unable to maintain boot counter.

Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
2020-06-02 17:27:04 -04:00
Marcin Juszkiewicz
d67df1ee5f kconfig: fix typo for OHCI host and add to DM list
Description said that OHCI is not supported for driver model
while it was converted too.

Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
2020-06-02 17:27:04 -04:00
Marcin Juszkiewicz
3e2aea790e kconfig: mark SPL/TPL options for DM_KEYBOARD
All three options had the same description.

Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
2020-06-02 17:27:04 -04:00
Simon Glass
72be237561 usb: ohci: Add header file for ARCH_DMA_MINALIGN
This is defined in the asm/cache.h header file. Update this header file to
include it so it gets the same value consistently across U-Boot.

This fixes 'usb host' on omapl138_lcdk.

Fixes: 90526e9fba ("common: Drop net.h from common header")
Reported-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-06-02 13:06:10 -04:00
Simon Glass
609b90a6a9 x86: spi: Rewrite logic for obtaining the SPI memory map
At present this logic does not work on link and samus, since their SPI
controller is not a PCI device, but a child of the PCH.

Unfortunately, fixing this involves a lot of extra logic. Still, this was
requested in the review of the fix-up patch, so here it is.

Fixes: 92842147c3 ("spi: ich: Add support for get_mmap() method")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
2020-06-02 09:16:13 +08:00
Samuel Holland
99ac86187d net: sun8i_emac: Add support for the H6 variant
The H6 EMAC is very similar to the H3 variant, except that it uses the
same pinmux as R40. Add support for it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 22:38:37 +05:30
Samuel Holland
abdbefba2a net: sun8i_emac: Use consistent clock bitfield definitions
While the R40 uses a different register for EMAC clock configuration
than other chips, the register has a very similar layout. Reuse the
existing bitfield definitions in this file, since they match.

This allows the driver to compile on the H6 platform, where the
CCM_GMAC_CTRL definitions are not present.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 22:38:22 +05:30
Roman Stratiienko
462a9c7a9c phy: sun4i-usb: Align H6 initialization logic with the kernel
H6 SOC needs additional initialization of PHY registers. Corresponding
changes can be found in the kernel patch [1].

Without this changes there is no enumeration of 'musb' gadget.

[1] - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ae409cc7c3cdb9ac4a1dba3eae70efec3d6b6c79

Fixes: 35fa673e0e ("sunxi: phy: Add USB PHY support for Allwinner H6")
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 22:37:51 +05:30
Jagan Teki
c862b91d93 mtd: sf: Drop plat from sf_probe
dm_spi_slave_platdata used in sf_probe for printing
plat->cs value and there is no relevant usage apart
from this.

We have enough debug messages available in SPI and SF
areas so drop this plat get and associated bug statement.

Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Jagan Teki
46e4cdff1e mtd: spi: Call sst_write in _write ops
Currently spi-nor code is assigning _write ops for SST
and other flashes separately. 

Just call the sst_write from generic write ops and return
if SST flash found, this way it avoids the confusion of
multiple write ops assignment during the scan and makes
it more feasible for code readability.

No functionality changes.

Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Jagan Teki
f12f96cfaf sf: Drop spl_flash_get_sw_write_prot
The get_sw_write_prot API is used to get the write-protected
bits of flash by reading the status register and other wards
it's API for reading register bits.

1) This kind of requirement can be achieved using existing
   flash operations and flash locking API calls instead of
   making a separate flash API.
2) Technically there is no real hardware user for this API to
   use in the source tree.
3) Having a flash operations API for simple register read bits
   also make difficult to extend the flash operations.
4) Instead of touching generic code, it is possible to have
   this functionality inside spinor operations in the form of
   flash hooks or fixups for associated flash chips.

Considering all these points, this patch drops the get_sw_write_prot
and associated code bases.

Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Jagan Teki
3ee152b965 mtd: spi: Use CONFIG_IS_ENABLED to prevent ifdef
Use CONFIG_IS_ENABLED to prevent ifdef in sf_probe.c

Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Jagan Teki
84673b4550 spi: Zap sh_spi driver
sh_spi driver is deprecated, no active updates and
no board user, hence dropped the same.

Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Jagan Teki
e24241c310 spi: Kconfig: Move MSCC_BB_SPI, FSL_QSPI into DM_SPI
- MSCC_BB_SPI
- FSL_QSPI

Both are fully dm-driven, let's move them into DM_SPI
side definition.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Jagan Teki
072114d9e0 spi: Kconfig: Drop redundant CF_SPI definition
CF_SPI kconfig option defined twice with DM_SPI
and non DM_SPI.

Drop the non DM_SPI side kconfig definition.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Jagan Teki
558d06e0a9 spi Drop spi_init()
spi_init doesn't exist anywhere in the code.

Drop it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Tom Rini
9452b7496f Merge tag 'u-boot-rockchip-20200531' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix mmc of path after syncfrom kernel dts;
- Add dwc3 host support with DM for rk3399;
- Add usb2phy and typec phy for rockchip platform;
- Migrate board list doc to rockchip.rst;
- Add rk3399 Pinebook Pro board support;
- Update dram_init in board_init and add memory node in SPL;
2020-05-31 20:07:39 -04:00
Tom Rini
8309157ff1 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- ehci-mx6, eth/r8152 bugfixes
2020-05-30 20:11:06 -04:00
Tom Rini
a08e0a28eb Patman changelog enhancements
Sandbox SPI flash doc update
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Merge tag 'dm-pull-30may20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

Patman changelog enhancements
Sandbox SPI flash doc update
2020-05-30 11:37:32 -04:00
Stefan Roese
979afd14c3 dm: core: Reorder include files in read.c
Including the assembler headers before including common.h etc leads to
compilation errors upon MIPS64 based platforms using OF_LIVE. This
patch reorders the include files to the "correct" oder.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
Frank Wang
604ab3ecda driver: usb: drop legacy rockchip xhci driver
We have changed to use dwc3 generic driver for usb3.0 host, so the
legacy Rockchip's xHCI driver is not needed, and drop it.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30 07:38:50 +08:00
Frank Wang
5d422ab26d usb: dwc3: add make compatible for rockchip platform
RK3399 Type-C PHY is required that must hold whole USB3.0 OTG controller
in resetting to hold pipe power state in P2 before initializing the PHY.
This commit fixed it and added device compatible for rockchip platform.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30 07:38:50 +08:00
Marek Vasut
73021d11d4 usb: ehci-mx6: Print error code on failure
Print the error code if the regulator enable fails, otherwise the error
message is rather useless and confusing.

Signed-off-by: Marek Vasut <marex@denx.de>
2020-05-29 19:23:36 +02:00
Marek Vasut
10bcafb8ac usb: ehci-mx6: Handle fixed regulators correctly
The regulator-fixed would return -ENOSYS when enabled/disabled,
because this operation is not supported, but this is not an error
e.g. on systems where the VBUS cannot be controlled, so if this
is the error code reported by the regulator core, consider it a
success and continue.

Signed-off-by: Marek Vasut <marex@denx.de>
2020-05-29 19:18:55 +02:00
Hayes Wang
3da0291ba9 eth/r8152: fix assigning the wrong endpoint
Although I think it never occurs, the code doesn't make sense, because
it may allow to assign an IN endpoint to ss->ep_out.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-05-29 19:18:55 +02:00
Frank Wang
646979425a usb: dwc3: amend UTMI/UTMIW phy interface setup
Let move 8/16-bit UTMI+ interface initialization into DWC3 core init
that is convenient for both DM_USB and u-boot traditional process.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 18:13:19 +08:00
Jagan Teki
fafaa02290 usb: dwc3: Enable AutoRetry feature in the controller
By default when core sees any transaction error (CRC or overflow) it
replies with terminating retry ACK (Retry=1 and Nump == 0).

Enabling this Auto Retry feature in controller will make the core send
a non-terminanting ACK upon such transaction errors. That is, ACK TP
with Retry=1 and Nump != 0.

Doing so will give controller a chance to recover from transient error
conditions.

Reference from below Linux commit,

commit <b138e23d3dff> ("usb: dwc3: core: Enable AutoRetry feature
in the controller")

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 18:13:19 +08:00
Jagan Teki
dc18413adb usb: dwc3: Add disable u2mac linestate check quirk
This patch adds a quirk to disable USB 2.0 MAC linestate check
during HS transmit. Refer the dwc3 databook, we can use it for
some special platforms if the linestate not reflect the expected
line state(J) during transmission.

When use this quirk, the controller implements a fixed 40-bit
TxEndDelay after the packet is given on UTMI and ignores the
linestate during the transmit of a token (during token-to-token
and token-to-data IPGAP).

On some rockchip platforms (e.g. rk3399), it requires to disable
the u2mac linestate check to decrease the SSPLIT token to SETUP
token inter-packet delay from 566ns to 466ns, and fix the issue
that FS/LS devices not recognized if inserted through USB 3.0 HUB.

Reference from below Linux commit,

commit <65db7a0c9816> ("usb: dwc3: add disable u2mac linestate
check quirk")

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 18:13:19 +08:00
Frank Wang
b34f8b5de0 usb: dwc3: add dis_u2_freeclk_exists_quirk
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when the clock control input is active.

Refer to commit 27f83eeb6b42("usb: dwc3: add dis_u2_freeclk_exists_quirk")
in Linux Rockchip Kernel.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-29 18:13:19 +08:00
Frank Wang
7bb6270839 usb: dwc3: add dis_enblslpm_quirk
Add a quirk to clear the GUSB2PHYCFG.ENBLSLPM bit, which controls
whether the PHY receives the suspend signal from the controller.

Refer to commit ec791d149bca("usb: dwc3: Add dis_enblslpm_quirk")
in Linux Kernel.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-29 18:13:19 +08:00
Jagan Teki
214de08767 phy: rockchip: Add Rockchip USB TypeC PHY driver
Add USB TYPEC PHY driver for rockchip platform.

Referenced from Linux TypeC PHY driver, currently
supporting usb3-port and dp-port need to add it
in the future.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 18:13:19 +08:00
Jagan Teki
ac97a9ece1 phy: rockchip: Add Rockchip USB2PHY driver
Add Rockchip USB2PHY driver with initial support.

This will help to use it for EHCI controller in host
mode, and USB 3.0 controller in otg mode.

More functionality like charge, vbus detection will
add it in future changes.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 18:13:19 +08:00
Jagan Teki
e1b413d1a9 clk: rk3399: Enable/Disable TCPHY clocks
Enable/Disable TCPHY clock for rk3399 platform.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 18:08:49 +08:00
Jagan Teki
80e191119e clk: rk3399: Set empty for TCPHY assigned-clocks
Due to v5.7-rc1 sync the SD controller nodes in rk3399.dtsi
have SCLK_UPHY0_TCPDCORE, SCLK_UPHY1_TCPDCORE assigned-clocks
which are usually required for Linux and don't require to
handle them in U-Boot.

  assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
  assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;

So, mark them as empty in clock otherwise device probe on
those typec phy driver would fail.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 18:08:49 +08:00
Jagan Teki
f7dd12a7e7 clk: rk3399: Enable/Disable the USB2PHY clk
Enable/Disable the USB2PHY clk for rk3399.

CLK is clear in enable and set in disable functionality.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 18:08:49 +08:00
Mark Kettenis
dbc5e28604 pci: Make Rockchip PCIe voltage regulators optional
The vpcie*-supply properties are optional and these are absent on
boards like the ROCKPro64 and Firefly RK3399 where the voltage is
supplied by always-on regulators that are already enabled upon
boot.  Make these regulators optional and properly check their
presence before attempting to enable them.

Makes PCIe work on un U-Boot on the boards mentioned above.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
2020-05-29 17:59:49 +08:00
Jagan Teki
4648108c63 clk: rk3399: Fix eMMC get_clk reg offset
Actual eMMC get_clk register is clksel_con22 instead of
clksel_con21.

Fix it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 17:58:33 +08:00
Eugen Hristev
b24dc83f15 misc: i2c_eeprom: implement different probe test eeprom offset
Because of this commit :
5ae84860b0 ("misc: i2c_eeprom: verify that the chip is functional at probe()")
at probe time, each eeprom is tested for read at offset 0.

The Atmel AT24MAC402 eeprom has different mapping. One i2c slave address is
used for the lower 0x80 bytes and another i2c slave address is used for the
upper 0x80 bytes. Because of this basically the i2c master sees 2 different
slaves. We need the upper bytes because we read the unique MAC address from
this EEPROM area.

However this implies that our slave address will return error on reads
from address 0x0 to 0x80.

To solve this, implemented an offset field inside platform data that is by
default 0 (as it is used now), but can be changed in the compatible table.

The probe function will now read at this offset and use it, instead of blindly
checking offset 0.

This will fix the regression noticed on these EEPROMs since the commit
abovementioned that introduces the probe failed issue.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-05-28 06:51:06 +02:00
Heinrich Schuchardt
da585c3c68 i2c: observe scl_count in i2c_deblock_gpio_loop()
When compiling with -Wtype-limits we see this error:

drivers/i2c/i2c-uclass.c: In function ‘i2c_deblock_gpio_loop’:
drivers/i2c/i2c-uclass.c:517:21: error: comparison of
unsigned expression >= 0 is always true [-Werror=type-limits]
  517 |  while (scl_count-- >= 0) {
      |

Don't loop forever.

Fixes: 1f746a2c82 ("i2c: Make deblock delay and SCL clock configurable")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-28 05:52:46 +02:00
Raul E Rangel
f6f9a01689 i2c: designware_i2c: Check if the device is powered
If the device doesn't return a version that means the device is
non-functional.

The dw_i2c_regs had invalid offsets for the version field. I got the
correct value from the DesignWare databook. It also matches what the
Picasso PPR says.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Tested on chromebook_coral:
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-28 05:50:47 +02:00
Simon Glass
bcf08503f5 i2c: designware_i2c: Tidy up use of NULL priv
At present we still have pre-driver-model code in this driver and it makes
things a bit confusing. In particular calc_bus_speed() is called with priv
as NULL if not using driver model.

This results in spk_cnt and comp_param1 being read from an invalid address
if not using driver model. For comp_param1 this may not cause problems if
reading from addresses close to 0 happens to be allowed, as high speed is
only supported by DM code. But spk_cnt is subsequently used to calculate
the bus periods and so this may cause problems (e.g. on spear600 board
which has not been migrated yet).

Add a new parameter regs parameter to calc_bus_speed() and add more
comments to this function and to _dw_i2c_set_bus_speed(), which calls it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-28 05:50:00 +02:00
Yoshio Furuyama
d5ce263100 mtd: spinand: toshiba: Support for new Kioxia Serial NAND
Add support for new Kioxia products.
The new Kioxia products support program load x4 command, and have
HOLD_D bit which is equivalent to QE bit.

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/aa69e455beedc5ce0d7141359b9364ed8aec9e65.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-28 01:24:03 +05:30
Yoshio Furuyama
5f8d677839 mtd: spinand: toshiba: Rename function name to change suffix and prefix (8Gbit)
The suffix was changed from "G" to "J" to classify between 1st generation
and 2nd generation serial NAND devices (which now belong to the Kioxia
brand).
As reference that's
1st generation device of 1Gbit product is "TC58CVG0S3HRAIG"
2nd generation device of 1Gbit product is "TC58CVG0S3HRAIJ".

The 8Gbit type "TH58CxG3S0HRAIJ" is new to Kioxia's serial NAND lineup and
the prefix was changed from "TC58" to "TH58".

Thus the functions were renamed from tc58cxgxsx_*() to tx58cxgxsxraix_*().

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/0dedd9869569a17625822dba87878254d253ba0e.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-28 01:24:03 +05:30
Vignesh Raghavendra
64b69f8c89 phy: Fix possible NULL pointer deference
It is possible that users of generic_phy_*() APIs may pass a valid
struct phy pointer but phy->dev can be NULL, leading to NULL pointer
deference in phy_dev_ops().

So call generic_phy_valid() to verify that phy and phy->dev are both
valid.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-05-25 11:54:53 -04:00
Tom Rini
9c5fef5774 Merge git://git.denx.de/u-boot-usb
- DM support for OMAP
- DWC3 fix
- Typo fix in eth/r8152
2020-05-22 22:58:50 -04:00
Tom Rini
5b6b2c6bf8 Merge branch 'net' of git://git.denx.de/u-boot-socfpga
- ks8851 cleanups and DM migration
2020-05-22 22:58:16 -04:00
Marek Vasut
df4c4834fc net: ks8851: Add Kconfig entries
Convert CONFIG_KS8851_MLL and CONFIG_KS8851_MLL_BASEADDR to Kconfig

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
1d476de7c8 net: ks8851: Add DM support
Add support for U-Boot DM and DT probing.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
9c9f3fc162 net: ks8851: Receive one packet per recv call
Instead of reading out the entire FIFO and possibly overwriting U-Boot
memory, read out one packet per recv call, pass it to U-Boot network
stack, and repeat. It is however necessary to cache RXFC value, because
reading that one out clears it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
f725912624 net: ks8851: Split non-DM specific bits from common code
Split network handling functions into non-DM specific parts and
common code in preparation for conversion to DM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
b7c6ae2e82 net: ks8851: Pass around driver private data
Introduce a private data structure for this driver with embedded
struct eth_device and pass it around. This prepares the driver to
work with both DM and non-DM systems.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
8ec27b01bc net: ks8851: Checkpatch cleanup
Fix various checkpatch complaints.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
eb69d8bf3c net: ks8851: Clean up chip ID readout
There is only one chip ID in the table of chip IDs for this chip.
Read out the chip ID instead and mask off the last "revision" bit
to check the chip ID, this works for all chips in the family. Then
drop the chip ID passing around.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
63f22f5998 net: ks8851: Remove type_frame_head
The packet status and length information should be extracted from the
FIFO per-packet. Adjust the code such that it reads the packet meta
data and then the packet afterward, if applicable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
b043597673 net: ks8851: Trim down struct ks_net
Most of the entries in the structure are useless, remove them. Inline
the rest of uses where applicable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
6a45731364 net: ks8851: Use 16bit RXQCR access
Per KS8851-16MLL, the RXQCR is a 16bit register. Use 16bit accessors
to it consistently and drop the ks_wrreg8() function altogether, as
it is not used anymore.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
8b41a16711 net: ks8851: Remove RXQCR cache
The cached RXQCR value is never updated, remove the cache and just use
the bits in the cache directly in the code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
e3b54cda68 net: ks8851: Replace malloc()+memset() with calloc()
Replace combination of malloc()+memset() with calloc() as the behavior
is exactly the same and the amount of code is reduced. Moreover, remove
printf() in the fail path, as it is useless, and return proper -ENOMEM
return code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Tom Rini
f53c2dc162 Merge tag 'u-boot-rockchip-20200522' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix rk3288 chromebook veyron support;
- Add pcie driver support for rk3399;
- other fixes for rk3399 boards
2020-05-22 10:28:38 -04:00
Tom Rini
a9f793a30d - Fix i.MX8QXP boot hang when getting CPU temperature
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Merge tag 'imx8qxp-fixes' of https://gitlab.denx.de/u-boot/custodians/u-boot-video

- Fix i.MX8QXP boot hang when getting CPU temperature
2020-05-22 10:28:26 -04:00
Hayes Wang
2cff87f7ab eth/r8152: fix typo in register name
The PAL_BDC_CR should be PLA_BDC_CR.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-05-22 15:22:37 +02:00
Chunfeng Yun
58221d7e87 usb: dwc3: fix NULL pointer issue
The phy_bulk pointer *usb_phys is used before allocated,
fix it by using a phy_bulk variable instead in
xhci_dwc3_platdata struct

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-05-22 15:22:36 +02:00
Adam Ford
94ed66194f usb: ehci-omap: Add Support for DM_USB and OF_CONTROL
The omap3.dtsi file shows the usbhshost node with two sub-nodes
for ohci and ehci.  This patch file creates the usbhshost, and
pulls the portX-mode information.  It then locates the EHCI
sub-node, and initializes the EHCI controller with the info
pulled from the usbhshost node.

There is still more to do since there isn't an actual link
between the 'phys' reference and the corresponding phy driver,
and there is no nop-xceiv driver yet.

In the meantime, the older style reference to
CONFIG_OMAP_EHCI_PHYx_RESET_GPIO is still needed to pull
the phy out of reset until the phy driver is completed and the
phandle reference is made.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-05-22 15:22:35 +02:00
Jagan Teki
89f2fa0b5e pci: Add Rockchip PCIe PHY controller driver
Yes, it is possible to have a dedicated UCLASS PHY driver
for this Rockchip PCIe PHY but there are some issues on
Generic PHY framework to support the same.

The Generic PHY framework is unable to get the PHY if
the PHY parent is of a different uclass.

Say if we try to get the PCIe PHY then the phy-uclass
will look for PHY in the first instance if it is not
in the root node it will try to probe the parent by
assuming that the actual PHY is inside the parent PHY
of UCLASS_PHY. But, in rk3399 hardware representation
PHY like emmc, usb and pcie are part of syscon which
is completely a different of UCLASS_SYSCON.

Example:

grf: syscon@ff770000 {
   compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
   reg = <0x0 0xff770000 0x0 0x10000>;
   #address-cells = <1>;
   #size-cells = <1>;

   pcie_phy: pcie-phy {
       compatible = "rockchip,rk3399-pcie-phy";
       clocks = <&cru SCLK_PCIEPHY_REF>;
       clock-names = "refclk";
       #phy-cells = <1>;
       resets = <&cru SRST_PCIEPHY>;
       drive-impedance-ohm = <50>;
       reset-names = "phy";
       status = "disabled";
   };
};

Due to this limitation, this patch adds a separate PHY
driver for Rockchip PCIe. This might be removed in future
once Generic PHY supports this limitation.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> #roc-rk3399-pc
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-22 20:53:20 +08:00
Jagan Teki
99d59069c0 pci: Add Rockchip PCIe controller driver
Add Rockchip PCIe controller driver for rk3399 platform.

Driver support Gen1 by operating as a Root complex.

Thanks to Patrick for initial work.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> #roc-rk3399-pc
2020-05-22 20:53:20 +08:00
Jagan Teki
912f633d01 clk: rk3399: Enable/Disable the PCIEPHY clk
Enable/Disable the PCIEPHY clk for rk3399.

CLK is clear in both enable and disable functionality.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> #roc-rk3399-pc
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-22 20:53:20 +08:00
Jagan Teki
30d09a2f17 clk: rk3399: Add enable/disable clks
Yes, most of the high speed peripheral clocks
in rk3399 enabled by default.

But it would be better to handle them via clk
enable/disable API for handling proper reset
conditions like 'usb reset' over command line.

So, enable USB, GMAC clock via enable/disable ops.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil.m@amarulasolutions.com> # roc-rk3399-pc
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> #roc-rk3399-pc
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-22 20:53:20 +08:00
Anatolij Gustschin
4e7413a998 thermal: imx_scu_thermal: prevent boot hang with zero pdata
Should initialization of pdata values have failed for some reason,
we end up in endless loop when getting the CPU temperature value
and can not boot. Check alert value in pdata and only retry reading
temperature if alert value is not zero. Also shorten the temperature
info string.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-05-22 13:29:25 +02:00
Anatolij Gustschin
74e8fb03bd cpu: imx8: use intended cpu-thermal device when getting temp value
This fixes getting DT alert and critical pdata values in imx_scu_thermal
driver. On i.MX8QXP using not initialized alert pdata value resulted in
boot hang and endless loop outputting:
CPU Temperature (47200C) has beyond alert (0C), close to critical (0C) waiting...

While at it, preset CPU type values once to avoid multiple calls
of device_is_compatible() for same property.

Fixes: 3ee6ea443e ("cpu: imx_cpu: Print the CPU temperature for iMX8QM A72")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-05-22 13:27:46 +02:00
Anatolij Gustschin
69365540cf cpu: imx8: fix type and rate detection
CPU type and rate detection is broken, for A35 cpu we get A53:
...
sc_pm_get_clock_rate: resource:0 clk:2: res:3
Could not read CPU frequency: -22
CPU:   NXP i.MX8QXP RevB A53 at 0 MHz at 47C

Fixes: 55bc96f3b6 ("cpu: imx8: fix get core name and rate")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-05-22 13:26:33 +02:00
Masahiro Yamada
1c193c0c6e mtd: rawnand: denali: deassert write protect pin
[ Linux commit 9afbe7c0140f663586edb6e823b616bd7076c00a ]

If the write protect signal from this IP is connected to the NAND
device, this IP can handle the WP# pin via the WRITE_PROTECT
register.

The Denali NAND Flash Memory Controller User's Guide describes
this register like follows:

  When the controller is in reset, the WP# pin is always asserted
  to the device. Once the reset is removed, the WP# is de-asserted.
  The software will then have to come and program this bit to
  assert/de-assert the same.

    1 - Write protect de-assert
    0 - Write protect assert

The default value is 1, so the write protect is de-asserted after
the reset is removed. The driver can write to the device unless
someone has explicitly cleared register before booting the kernel.

The boot ROM of some UniPhier SoCs (LD4, Pro4, sLD8, Pro5) is the
case; the boot ROM clears the WRITE_PROTECT register when the system
is booting from the NAND device, so the NAND device becomes read-only.

Set it to 1 in the driver in order to allow the write access to the
device.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-05-22 11:21:06 +09:00
Masahiro Yamada
7a2704369c mtd: rawnand: denali: configure SPARE_AREA_SKIP_BYTES only for denali_spl
This CONFIG option is only used in denali_spl.c

Move it close to SPL_NAND_DENALI, and make it depend on SPL_NAND_DENALI.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-22 11:21:06 +09:00
Tom Rini
b0b13f4114 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add DM_ETH support for lx2160aqds, ls2080aqds, ls1088aqds
- QSI related fixes on ls1012a, ls2080a, ls1046a, ls1088a, ls1043a based
  platforms
- Bug-fixes/updtaes related to ls1046afrwy, fsl-mc, msi-map property
2020-05-20 08:46:56 -04:00
Jan Kiszka
cf2d07f004 drivers: crypto: mod_exp_sw: Re-add DM_FLAG_PRE_RELOC
This driver is safe to use in SPL without relocation. Denying
DM_FLAG_PRE_RELOC prevents its usability for verifying the main U-Boot
or other artifacts from the SPL unless needless enabling the full driver
set (SPL_OF_PLATDATA).

Fixes: 17e1174085 ("drivers: crypto: rsa_mod_exp: avoid DM_FLAG_PRE_RELOC")
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Marek Vasut <marex@denx.de>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2020-05-19 14:01:47 -04:00
Razvan Ionut Cirjan
d5b0af047a net: fsl-mc: fixup DPC: add /board/ports node if missing
The DPC fixup for MAC address and enet_if is not made if
/board/ports node is missing in DPC file.
Add /board/ports or /ports nodes if them are missing.

Signed-off-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Reviewed-by: Ioana Ciornei <Ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:08 +05:30
Laurentiu Tudor
21a00d130e drivers: net: fsl-mc: fixup msi-map property
Similarly to iommu-map, the msi-map property must also be fixed up
in the device tree, in order for the icid -> streamid translation
be possible in the MSI case as well.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Diana Craciun <diana.craciun@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:07 +05:30
Madalin Bucur
9b2e892eb6 driver: net: fm: minor fix in DM ETH support
Bus callback functions for read/write/reset need to be set only for
DM_ETH, moving endif a bit lower.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:07 +05:30
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
07e1114671 Fix some checkpatch warnings in calls to udelay()
Fix up some incorrect code style in calls to functions in the linux/time.h
header, mostly udelay().

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
1af3c7f422 common: Drop linux/stringify.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
eb41d8a1be common: Drop linux/bug.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00