Commit graph

67 commits

Author SHA1 Message Date
Hannes Schmelzer
60df809f62 board/BuR/brsmarc1: initial commit
This commit adds support for the B&R brsmarc1 SoM.

The SoM is based on TI's AM335x SoC.
Mainly vxWorks 6.9.4.x is running on the board,
doing some PLC stuff on various carrier boards.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-08-12 13:33:37 -04:00
Niel Fourie
6e171b661e ARM: am335x: Add phyCORE AM335x R2 support
Support for Phytech phyCORE AM335x R2 SOM (PCL060) on the Phytec
phyBOARD-Wega AM335x.

CPU  : AM335X-GP rev 2.1
Model: Phytec AM335x phyBOARD-WEGA
DRAM:  256 MiB
NAND:  256 MiB
MMC:   OMAP SD/MMC: 0
eth0: ethernet@4a100000

Working:
 - Eth0
 - i2C
 - MMC/SD
 - NAND
 - UART
 - USB (host)

Device trees were taken from Linux mainline:
commit 37624b58542f ("Linux 5.1-rc7")

Signed-off-by: Niel Fourie <lusus@denx.de>
Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Marek Vasut <marex@denx.de>
2019-07-13 11:11:28 -04:00
Marek Vasut
b2a2bf41ac arm: mach-omap2: am33xx: Init pinmux before clock
The board_early_init_f() inits clock before initing pinmux. However,
the clock configuration code might need to adjust PMIC settings of a
PMIC on I2C bus (e.g. board/ti/am335x/board.c does that). If the I2C
bus pin muxing is not configured before attempting to communicate
with the PMIC, the communication will silently fail and the prcm_init()
may configure fast enough CPU clock that the default voltage provided
by the PMIC would be insufficient and the platform would become
unstable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Tom Rini <trini@konsulko.com>
2019-07-11 14:11:20 -04:00
Brad Griffis
1dbd9a7b17 arm: mach-omap2: am33xx: ddr: update value for ext_phy_ctrl_36
for suspend/resume robustness

update value for ext_phy_ctrl_36 for suspend/resume robustness
with hardware leveling enabled.

Match recommended values from EMIF Tools app note:

http://www.ti.com/lit/an/sprac70/sprac70.pdf

Signed-off-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-05-05 08:48:50 -04:00
Brad Griffis
7b5774e4bd arm: mach-omap2: am33xx: Disable EMIF_DEVOFF immediately before hw leveling
In case of RTC+DDR resume, need to restore EMIF context
before initiating hardware leveling.

Signed-off-by: Brad Griffis <bgriffis@ti.com>
[j-keerthy@ti.com Fixed the am335x build issues]
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-05-05 08:48:50 -04:00
Brad Griffis
6fe3e5ba66 arm: mach-omap2: am33xx: Enable HW Leveling in the rtc+ddr path
Enable HW leveling in RTC+DDR path. The mandate is to enable
HW leveling bit and then wait for 1 ms before accessing any
register.

Signed-off-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-05-05 08:48:50 -04:00
Brad Griffis
84cf295f84 arm: mach-omap2: am33xx: ddr: Add 1ms delay to avoid L3 error
Add 1ms delay to avoid L3 timeout error during suspend resume.

Signed-off-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-05-05 08:48:50 -04:00
Brad Griffis
82195797a4 arm: mach-omap2: am33xx: ddr: programming of EXT_PHY_CTRL1 and EXT_PHY_CTRL1_SHADOW
Adjust DQS skew in case where invert_clkout=1 is used.
Match recommended values from EMIF Tools app note:

http://www.ti.com/lit/an/sprac70/sprac70.pdf

Signed-off-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-05-05 08:48:50 -04:00
Sjoerd Simons
4512380420 am335x, guardian: Add support for the bosch guardian board
Add support for the Bosch Guardian board.

CPU  : AM335X-GP rev 2.1
Model: Bosch AM335x Guardian
I2C:   ready
DRAM:  256 MiB
NAND:  512 MiB
MMC:   OMAP SD/MMC: 0

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Felix Brack <fb@ltec.ch>
2019-04-12 08:05:48 -04:00
Vignesh R
6d82517836 configs: Don't use SPI_FLASH_BAR as default
Now that new SPI NOR layer uses stateless 4 byte opcodes by default,
don't enable SPI_FLASH_BAR. For SPI controllers that cannot support
4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c,
renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to
not break functionality.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:22 +05:30
Tien Fong Chee
f4b4092474 spl: Kconfig: Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPL_FS_EXT4
Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPLY_FS_EXT4 so both
obj-$(CONFIG_$(SPL_)FS_EXT4) and CONFIG_IS_ENABLED(FS_EXT4) can be
used to control the build in both SPL and U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01 09:14:21 -05:00
Tien Fong Chee
0c3a9ed409 spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT
Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT so
obj-$(CONFIG_$(SPL_)FS_FAT) can be used to control the build in both
SPL and U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01 09:12:48 -05:00
Andrew F. Davis
0fd1359c5a ARM: mach-omap2: Kconfig: Allow OMAP5 devices to set entry point
Like AM33xx and AM43xx, DRA7xx and AM57xx devices may need to
have an non-standard boot address in memory. This may be due
to the device being a high security variant, which place the
Initial SoftWare (ISW) after certificates and secure software.

Allow these devices to set this from Kconfig.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-01-26 08:13:55 -05:00
Jean-Jacques Hiblot
7a43dd7aa6 arm: am33xx: Register USB controllers if DM_USB is used but not OF_CONTROL
When DM_USB is used, either the USB controllers are bound when the DTB
is parsed (when OF_CONTROL is enabled) or they are bound using the
U_BOOT_DEVICES() macro.
In the later case, the platform data is passed in a struct ti_musb_platdata
because it cannot be read from the DTB.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:10 +01:00
Felix Brack
bfaaacd3b2 arm: am335x-pdu001: Move from embedded to separate DTB
There is no need for an embedded device tree for this board so let the
build process generate a separate u-boot.dtb file instead.

Signed-off-by: Felix Brack <fb@ltec.ch>
2018-12-12 12:14:23 -05:00
Jean-Jacques Hiblot
1514244cc1 ti: remove usage of DM_I2C_COMPAT and don't disable DM_I2C in SPL
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
API when DM_I2C is used. The goal is to eventually remove DM_I2C_COMPAT
when all I2C "clients" have been migrated to use the DM API.
This a step in that direction for the TI based platforms.
Build tested with buildman:
buildman -dle am33xx ti omap3 omap4 omap5 davinci keystone

boot tested with:
am335x_evm, am335x_boneblack, am335x_boneblack_vboot (DM version),
am57xx_evm, dra7xx_evm, k2g_evm, am437x_evm

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10 07:15:21 +01:00
Jean-Jacques Hiblot
2b30b38b26 omap: detect the board after DM is available
In order to use DM_I2C, we need to move the board detection after the
early SPL initialization.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10 06:14:47 +01:00
Jean-Jacques Hiblot
0e6e67c667 am335x: Register the I2C controllers if DM_I2C is used.
If DM_I2C is used , the I2C controllers must be registered as U_BOOT_DEVICE
because OF_CONTROL is not used in the SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10 06:12:42 +01:00
Michal Simek
08a00cba06 dm: Change CMD_DM enabling
CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30 07:18:48 -04:00
Michal Simek
5ed063d10f Kconfig: Sort bool, default, select and imply options
Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-07-30 07:18:48 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Russ Dill
025a0d40e1 ARM: am33xx: Inhibit re-initialization of DDR during RTC-only
This inhibits the re-inititialization of DDR during an RTC-only resume. If
this is not done, an L3 NOC error is produced as the DDR gets accessed
before the re-init has time to complete. Tested on AM437x GP EVM.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
[j-keerthy@ti.com Ported to Latest Master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
2018-04-06 17:04:33 -04:00
Dave Gerlach
e18945ad22 am43xx: Do not allow EMIF to control DDR_RESET in rtconly config
Prevent EMIF control of DDR_RESET line on DDR3 am43xx platforms for
am43xx_evm_rtconly_config. Without this DDR is unstable and can become
corrupted after multiple iterations of RTC+DDR mode.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[j-keerthy@ti.com Ported to latest master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-06 17:04:33 -04:00
Tero Kristo
7619badb9c ARM: AM43xx: Add support for RTC only + DDR in self-refresh mode
Kernel stores information to the RTC_SCRATCH0 and RTC_SCRATCH1 registers
for wakeup from RTC-only mode with DDR in self-refresh. Parse these
registers during SPL boot and jump to the kernel resume vector if the
device is waking up from RTC-only modewith DDR in Self-refresh.

The RTC scratch register layout used is:

SCRATCH0 : bits00-31 : kernel resume address
SCRATCH1 : bits00-15 : RTC magic value used to detect valid config
SCRATCH1 : bits16-31 : board type information populated by bootloader

During the normal boot path the SCRATCH1 : bits16-31 are updated with
the eeprom read board type data. In the rtc_only boot path the rtc
scratchpad register is read and the board type is determined and
correspondingly ddr dpll parameters are set. This is done so as to avoid
costly i2c read to eeprom.

RTC-only +DRR in self-refresh mode support is currently only enabled for
am43xx_evm_rtconly_config.
This is not to be used with epos evm builds.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
[j-keerthy@ti.com Rebased to latest u-boot master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-06 17:04:33 -04:00
Masahiro Yamada
b08c8c4870 libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.

This commit moves the header code:
  include/libfdt.h         -> include/linux/libfdt.h
  include/libfdt_env.h     -> include/linux/libfdt_env.h

and replaces include directives:
  #include <libfdt.h>      -> #include <linux/libfdt.h>
  #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>

Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:16:28 -05:00
Faiz Abbas
b442e16b87 am33xx: board: Call spl_early_init() to support sdram_init()
With driver model enabled in SPL, sdram_init() requires device tree
and malloc to be initialized.
Therefore call spl_early_init() in early_system_init().

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-28 12:27:33 -05:00
Felix Brack
85ab0452fe arm: add support for PDU001
This patch adds support for the PDU001 board.

Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-28 12:27:32 -05:00
Lokesh Vutla
9b88a4bda2 arm: am33xx: Avoid writing into reserved DPLL divider
DPLL DRR doesn't have an M4 divider. But the clock driver is trying
to configure M4 divider as 4(writing into a reserved register).
Fixing it by making M4 divider as -1.

Reported-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:24 -05:00
Hannes Schmelzer
3215192922 mach-omap2: add AM335x Display PLL register definition
Adds the register definition of the Display DPLL

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:16:34 +01:00
Felix Brack
c07bf9bea7 am33xx: Add a function to query MPU voltage in uV
For the DM TPS65910 driver I'm working on, querying the MPU voltage
should return a value in uV. This value can then be used by the
regulator's standard function set_value to set the MPU voltage.

Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-11-17 07:43:32 -05:00
Masahiro Yamada
9b643e312d treewide: replace with error() with pr_err()
U-Boot widely uses error() as a bit noisier variant of printf().

This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:

  # define __compiletime_error(message) __attribute__((error(message)))

This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux.  (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)

Let's convert error() into now treewide-available pr_err().

Done with the help of Coccinelle, excluing tools/ directory.

The semantic patch I used is as follows:

// <smpl>
@@@@
-error
+pr_err
 (...)
// </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-04 11:59:44 -04:00
Felix Brack
7cc238f2ee arm: am33xx: Make pin multiplexing functions optional
This patch provides default implementations of the two functions
set_uart_mux_conf and set_mux_conf_regs. Hence boards not using
them do not need to provide their distinct empty definitions.

Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-09-22 07:40:04 -04:00
Simon Glass
72c3033fd1 Convert CONFIG_CMD_SPL to Kconfig
This converts the following to Kconfig:
   CONFIG_CMD_SPL

Note that trats does not actually use SPL, so this option can no-longer be
set.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-11 15:41:57 -04:00
Andrew F. Davis
ddf013458d arm: mach-omap2: am33xx: Add FDT fixup suport for AM33xx/AM43xx boards
Similar to what is done with OMAP5 class boards we need to
perform fixups common to this SoC class, add support for this here
and add HS fixups.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2017-07-22 22:22:44 -04:00
Alexandru Gagniuc
409a81ddd4 am33xx: board: Refactor USB initialization into separate function
The declaration of otg*_plat and otg*_board_data is guarded by
CONFIG_USB_MUSB_*, but their use in arch_misc_init is not. The
ifdef flow goes something like:

if (CONFIG_USB_MUSB_* && other_conditions)
	declare usb_data
if (other_conditions)
	use usb_data

Thus when CONFIG_USB_MUSB_* is not declared, we try to use the
data structures, but these structures aren't defined.

To fix this, move the USB initialization code into the same #ifdef
which guards the declaration of the data structures. Since the DM_USB
vs legacy cases are completely different, use two versions of
arch_misc_init(), for readability.

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-11 22:49:39 -04:00
Tom Rini
ab86dc7948 ARM: ti816x: Fix enabling GPIO0, enable GPIO1 as well
The TI816x has 2 GPIO banks.  For bank 0 we had been clearing the enable
bit when setting BIT(8).  Correct this by setting it to BIT(1) | BIT(8)
after we set and wait for BIT(1) (aka PRCM_MOD_EN).  Enable GPIO1 as
well so that when CMD_GPIO is enabled it won't crash probing the second
bank.  Enable CMD_GPIO on ti816x_evm.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-07-11 22:41:56 -04:00
Lokesh Vutla
4bd754d8ab arm: omap: Detect boot mode very early
ROM stores the boot params information in a known location
and passes it to SPL. This information needs to be copied
very early during boot or else there is a chance of getting
corrupted by SPL. So move this boot device detection very early
during boot.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:26:04 -04:00
Semen Protsenko
00bbe96eba arm: omap: Unify get_device_type() function
Refactor OMAP3/4/5 code so that we have only one get_device_type()
function for all platforms.

Details:
 - Add ctrl variable for AM33xx and OMAP3 platforms (like it's done for
   OMAP4/5), so we can obtain status register in common way
 - For now ctrl structure for AM33xx/OMAP3 contains only status register
   address
 - Run hw_data_init() in order to assign ctrl to proper structure
 - Remove DEVICE_MASK and DEVICE_GP definitions as they are not used
   (DEVICE_TYPE_MASK and GP_DEVICE are used instead)
 - Guard structs in omap_common.h with #ifdefs, because otherwise
   including omap_common.h on non-omap4/5 board files breaks compilation

Buildman script was run for all OMAP boards. Result output:
    arm: (for 38/616 boards)
        all +352.5
        bss -1.4
        data +3.5
        rodata +300.0
        spl/u-boot-spl:all +284.7
        spl/u-boot-spl:data +2.2
        spl/u-boot-spl:rodata +252.0
        spl/u-boot-spl:text +30.5
        text +50.4
    (no errors to report)

Tested on AM57x EVM and BeagleBoard xM.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Rework the guards as to not break TI81xx]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-09 20:34:53 -04:00
Tom Rini
f2d78c1ced am33xx: Finish migration of CONFIG_AM33XX/AM43XX
Almost all users of CONFIG_AM33XX/AM43XX have been migrated.  Finish
moving the last few over to Kconfig, and put all of the boards under the
appropriate Kconfig chocie now.  This board choice is non-optional, so
remove that keyword on am33xx.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-09 20:34:09 -04:00
Tom Rini
8bb687fdc1 t81xx: Migrate TI81XX/TI816X/TI814X symbols to Kconfig
The symbol CONFIG_TI81XX is used for the parts that are common to the
TI816x and TI814x SoCs and are not part of CONFIG_ARCH_OMAP2PLUS nor
CONFIG_AM33XX.  It however has so few uses that we can just modify the
code to check for both and drop the symbol. The symbols CONFIG_TI816X
and CONFIG_TI814X are for the repective SoCs.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 11:02:25 -04:00
Tom Rini
8627733941 ti816x: Rework DDR initialization sequence
The ti816x/am389x SoC is the first generation in what U-Boot calls the
"am33xx" family.  In the first generation of this family the DDR
initialization sequence is quite different from all of the subsequent
generations.  Whereas with ti814x (second generation) we can easily work
the minor differenced between that and am33xx (third generation), our
attempts to do this for ti816x weren't sufficient.  Rather than add a
large amount of #ifdef logic to make this different sequence work we add
a new file, ti816x_emif4.c to handle the various required undocumented
register writes and sequence and leverage what we can from
arch/arm/mach-omap2/am33xx/ddr.c still.  As DDR2 has similar problems
today but I am unable to test it, we drop the DDR2 defines from the code
rather than imply that it works by leaving it.  We also remove a bunch
of other untested code about changing the speed the DDR runs at.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 11:02:23 -04:00
Lokesh Vutla
878d885620 arm: amx3xx: Add support for early debug
For early debug, the following configs needs to be enabled:

CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_OMAP=y
CONFIG_DEBUG_UART_BASE=0x44e09000
CONFIG_DEBUG_UART_CLOCK=48000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-12 08:37:15 -04:00
Lokesh Vutla
fbd6295da4 arm: am33xx: Add support for mulitiple PLL input frequencies
am335x supports various sysclk frequencies which can be determined
using sysboot pins. PLLs should be configures based on this
sysclk frequency. Add PLL configurations for all supported
frequencies.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-12 08:37:14 -04:00
Lokesh Vutla
59041a5084 arm: am33xx: Fix MPU opp selection
Update MPU frequencies and voltages as per the latest
DM[1] dated: OCT 2011 Revised APRIL 2016, Section 5.4.
Below is the consolidated data:

MPU values for PG 2.0 and later(Package ZCZ and ZCE):

 -------------------------------------------------------
|	|	  ZCZ		|	  ZCE		|
|-------------------------------------------------------|
|	| VDD[V]   | ARM [MHz]	| VDD[V]   | ARM [MHz]  |
|-------|----------|------------|----------|------------|
| NITRO |  1.325   |   1000     |   NA     |    NA      |
|-------|----------|------------|----------|------------|
| TURBO |   1.26   |    800	|   NA     |    NA      |
|-------|----------|------------|----------|------------|
|OPP120 |   1.20   |    720     |   NA     |    NA      |
|-------|----------|------------|----------|------------|
|OPP100 |   1.10   |    600     |   1.10   |    600     |
|-------|----------|------------|----------|------------|
| OPP50 |   0.95   |    300     |   0.95   |    300     |
 -------------------------------------------------------

There is no eFuse blown on PG1.0 Silicons due to which there is
no way to detect the maximum frequencies supported. So default
to OPP100 for which both frequency and voltages are common on both
the packages.

[1] http://www.ti.com/lit/ds/symlink/am3356.pdf

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-12 08:37:12 -04:00
Lokesh Vutla
238205f1b3 configs: am335x_evm: Enable SPL_DM
Enable SPL_DM on all AM335x based TI platforms.

http://patchwork.ozlabs.org/patch/751300/
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-11 22:21:29 -04:00
Lokesh Vutla
3a517fdc2b configs: am335x_evm: Use omap2 generic spl load script
No reason to use a separate load script for am33xx than using
omap-common load script.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-11 22:21:28 -04:00
Lokesh Vutla
86282798b0 arch: arm: omap: Declare size of ddr very early
Declare the size of ddr very early in spl, so that this can be
used to enable cache.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
2017-05-11 22:03:41 -04:00
Pau Pajuelo
09533e5de7 igep003x: Add support for IGEP SMARC AM335x
The IGEP SMARC AM335x is an industrial processor module with
following highlights:

  o AM3352 TI processor (Up to AM3359)
  o Cortex-A8 ARM CPU
  o SMARC form factor module
  o Up to 512 MB DDR3 SDRAM / 512 MB FLASH
  o WiFi a/b/g/n and Bluetooth v4.0 on-board
  o Ethernet 10/100/1000 Mbps and 10/100 Mbps controller on-board
  o JTAG debug connector available
  o Designed for industrial range purposes

Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08 11:57:27 -04:00
Ladislav Michl
a96c08f509 igep0033: Rename to igep003x
Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034)
can use the same source files.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08 11:57:26 -04:00
Simon Glass
76b00aca4f board_f: Drop setup_dram_config() wrapper
By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 16:36:51 -04:00