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arm: mach-omap2: am33xx: Disable EMIF_DEVOFF immediately before hw leveling
In case of RTC+DDR resume, need to restore EMIF context before initiating hardware leveling. Signed-off-by: Brad Griffis <bgriffis@ti.com> [j-keerthy@ti.com Fixed the am335x build issues] Signed-off-by: Keerthy <j-keerthy@ti.com>
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2 changed files with 14 additions and 3 deletions
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@ -481,9 +481,6 @@ static void rtc_only(void)
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rtc_only_prcm_init();
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sdram_init();
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/* Disable EMIF_DEVOFF for normal operation and to exit self-refresh */
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writel(0, &prm_device->emif_ctrl);
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/* Check EMIF4D_SDRAM_CONFIG[31:29] SDRAM_TYPE */
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/* Only perform leveling if SDRAM_TYPE = 3 (DDR3) */
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sdrc = readl(AM43XX_EMIF_BASE + AM43XX_SDRAM_CONFIG_OFFSET);
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@ -80,6 +80,11 @@ static void configure_mr(int nr, u32 cs)
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*/
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void config_sdram_emif4d5(const struct emif_regs *regs, int nr)
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{
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#ifdef CONFIG_AM43XX
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struct prm_device_inst *prm_device =
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(struct prm_device_inst *)PRM_DEVICE_INST;
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#endif
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writel(0xA0, &emif_reg[nr]->emif_pwr_mgmt_ctrl);
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writel(0xA0, &emif_reg[nr]->emif_pwr_mgmt_ctrl_shdw);
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writel(regs->zq_config, &emif_reg[nr]->emif_zq_config);
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@ -126,6 +131,15 @@ void config_sdram_emif4d5(const struct emif_regs *regs, int nr)
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writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
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writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
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#ifdef CONFIG_AM43XX
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/*
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* Disable EMIF_DEVOFF
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* -> Cold Boot: This is just rewriting the default register value.
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* -> RTC Resume: Must disable DEVOFF before leveling.
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*/
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writel(0, &prm_device->emif_ctrl);
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#endif
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/* Perform hardware leveling for DDR3 */
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if (emif_sdram_type(regs->sdram_config) == EMIF_SDRAM_TYPE_DDR3) {
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writel(readl(&emif_reg[nr]->emif_ddr_ext_phy_ctrl_36) |
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