mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-24 13:43:28 +00:00
ti: remove usage of DM_I2C_COMPAT and don't disable DM_I2C in SPL
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C API when DM_I2C is used. The goal is to eventually remove DM_I2C_COMPAT when all I2C "clients" have been migrated to use the DM API. This a step in that direction for the TI based platforms. Build tested with buildman: buildman -dle am33xx ti omap3 omap4 omap5 davinci keystone boot tested with: am335x_evm, am335x_boneblack, am335x_boneblack_vboot (DM version), am57xx_evm, dra7xx_evm, k2g_evm, am437x_evm Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
parent
ad95da1f3c
commit
1514244cc1
11 changed files with 161 additions and 98 deletions
|
@ -403,6 +403,7 @@ static void init_ddr3param(struct ddr3_spd_cb *spd_cb,
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static int ddr3_read_spd(ddr3_spd_eeprom_t *spd_params)
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{
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int ret;
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#ifndef CONFIG_DM_I2C
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int old_bus;
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i2c_init(CONFIG_SYS_DAVINCI_I2C_SPEED, CONFIG_SYS_DAVINCI_I2C_SLAVE);
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@ -413,7 +414,13 @@ static int ddr3_read_spd(ddr3_spd_eeprom_t *spd_params)
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ret = i2c_read(0x53, 0, 1, (unsigned char *)spd_params, 256);
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i2c_set_bus_num(old_bus);
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#else
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struct udevice *dev;
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ret = i2c_get_chip_for_busnum(1, 0x53, 1, &dev);
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if (!ret)
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ret = dm_i2c_read(dev, 0, (unsigned char *)spd_params, 256);
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#endif
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if (ret) {
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printf("Cannot read DIMM params\n");
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return 1;
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@ -14,6 +14,7 @@
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/**
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* clk_synthesizer_reg_read - Read register from synthesizer.
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* dev: i2c bus device (not used if CONFIG_DM_I2C is not set)
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* @addr: addr within the i2c device
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* buf: Buffer to which value is to be read.
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*
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@ -21,13 +22,14 @@
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* be send along with enabling byte read more, and then read can happen.
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* Returns 0 on success
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*/
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static int clk_synthesizer_reg_read(int addr, uint8_t *buf)
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static int clk_synthesizer_reg_read(struct udevice *dev, int addr, u8 *buf)
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{
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int rc;
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/* Enable Bye read */
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addr = addr | CLK_SYNTHESIZER_BYTE_MODE;
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#ifndef CONFIG_DM_I2C
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/* Send the command byte */
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rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
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if (rc)
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@ -35,26 +37,46 @@ static int clk_synthesizer_reg_read(int addr, uint8_t *buf)
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/* Read the Data */
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return i2c_read(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
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#else
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/* Send the command byte */
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rc = dm_i2c_reg_write(dev, addr, *buf);
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if (rc)
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printf("Failed to send command to clock synthesizer\n");
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/* Read the Data */
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rc = dm_i2c_reg_read(dev, addr);
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if (rc < 0)
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return rc;
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*buf = (u8)rc;
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return 0;
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#endif
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}
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/**
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* clk_synthesizer_reg_write - Write a value to register in synthesizer.
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* dev: i2c bus device (not used if CONFIG_DM_I2C is not set)
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* @addr: addr within the i2c device
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* val: Value to be written in the addr.
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*
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* Enable the byte read mode in the address and start the i2c transfer.
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* Returns 0 on success
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*/
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static int clk_synthesizer_reg_write(int addr, uint8_t val)
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static int clk_synthesizer_reg_write(struct udevice *dev, int addr, u8 val)
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{
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uint8_t cmd[2];
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u8 cmd[2];
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int rc = 0;
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/* Enable byte write */
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cmd[0] = addr | CLK_SYNTHESIZER_BYTE_MODE;
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cmd[1] = val;
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#ifndef CONFIG_DM_I2C
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rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2);
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#else
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rc = dm_i2c_write(dev, addr, cmd, 2);
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#endif
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if (rc)
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printf("Clock synthesizer reg write failed at addr = 0x%x\n",
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addr);
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@ -72,30 +94,42 @@ static int clk_synthesizer_reg_write(int addr, uint8_t val)
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int setup_clock_synthesizer(struct clk_synth *data)
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{
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int rc;
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uint8_t val;
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u8 val = 0;
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struct udevice *dev = NULL;
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#ifndef CONFIG_DM_I2C
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rc = i2c_probe(CLK_SYNTHESIZER_I2C_ADDR);
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if (rc) {
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printf("i2c probe failed at address 0x%x\n",
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CLK_SYNTHESIZER_I2C_ADDR);
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return rc;
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}
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rc = clk_synthesizer_reg_read(CLK_SYNTHESIZER_ID_REG, &val);
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#else
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rc = i2c_get_chip_for_busnum(0, CLK_SYNTHESIZER_I2C_ADDR, 1, &dev);
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if (rc) {
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printf("failed to get device for synthesizer at address 0x%x\n",
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CLK_SYNTHESIZER_I2C_ADDR);
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return rc;
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}
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#endif
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rc = clk_synthesizer_reg_read(dev, CLK_SYNTHESIZER_ID_REG, &val);
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if (val != data->id)
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return rc;
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/* Crystal Load capacitor selection */
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rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_XCSEL, data->capacitor);
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rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_XCSEL,
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data->capacitor);
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if (rc)
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return rc;
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rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_MUX_REG, data->mux);
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rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_MUX_REG,
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data->mux);
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if (rc)
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return rc;
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rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV2_REG, data->pdiv2);
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rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_PDIV2_REG,
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data->pdiv2);
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if (rc)
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return rc;
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rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV3_REG, data->pdiv3);
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rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_PDIV3_REG,
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data->pdiv3);
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if (rc)
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return rc;
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@ -909,6 +909,7 @@ void prcm_init(void)
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enable_basic_uboot_clocks();
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}
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#if !defined(CONFIG_DM_I2C)
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void gpi2c_init(void)
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{
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static int gpi2c = 1;
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@ -919,3 +920,4 @@ void gpi2c_init(void)
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gpi2c = 0;
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}
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}
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#endif
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@ -70,8 +70,9 @@ static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
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void do_board_detect(void)
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{
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enable_i2c0_pin_mux();
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#ifndef CONFIG_DM_I2C
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i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
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#endif
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if (ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
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CONFIG_EEPROM_CHIP_ADDRESS))
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printf("ti_i2c_eeprom_init failed\n");
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@ -328,8 +329,14 @@ static void scale_vcores_bone(int freq)
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if (board_is_bone() && !strncmp(board_ti_get_rev(), "00A1", 4))
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return;
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#ifndef CONFIG_DM_I2C
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if (i2c_probe(TPS65217_CHIP_PM))
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return;
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#else
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if (power_tps65217_init(0))
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return;
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#endif
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/*
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* On Beaglebone White we need to ensure we have AC power
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@ -421,9 +428,13 @@ void scale_vcores_generic(int freq)
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* 1.10V. For MPU voltage we need to switch based on
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* the frequency we are running at.
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*/
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#ifndef CONFIG_DM_I2C
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if (i2c_probe(TPS65910_CTRL_I2C_ADDR))
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return;
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#else
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if (power_tps65910_init(0))
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return;
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#endif
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/*
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* Depending on MPU clock and PG we will need a different
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* VDD to drive at that speed.
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@ -451,8 +462,10 @@ void gpi2c_init(void)
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if (first_time) {
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enable_i2c0_pin_mux();
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#ifndef CONFIG_DM_I2C
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i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
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CONFIG_SYS_OMAP24_I2C_SLAVE);
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#endif
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first_time = false;
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}
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}
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@ -329,12 +329,23 @@ static unsigned short detect_daughter_board_profile(void)
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{
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unsigned short val;
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#ifndef CONFIG_DM_I2C
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if (i2c_probe(I2C_CPLD_ADDR))
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return PROFILE_NONE;
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if (i2c_read(I2C_CPLD_ADDR, CFG_REG, 1, (unsigned char *)(&val), 2))
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return PROFILE_NONE;
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#else
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struct udevice *dev = NULL;
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int rc;
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rc = i2c_get_chip_for_busnum(0, I2C_CPLD_ADDR, 1, &dev);
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if (rc)
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return PROFILE_NONE;
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rc = dm_i2c_read(dev, CFG_REG, (unsigned char *)(&val), 2);
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if (rc)
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return PROFILE_NONE;
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#endif
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return (1 << (val & PROFILE_MASK));
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}
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@ -43,6 +43,8 @@ static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
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#ifdef CONFIG_TI_I2C_BOARD_DETECT
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void do_board_detect(void)
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{
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/* Ensure I2C is initialized for EEPROM access*/
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gpi2c_init();
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if (ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
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CONFIG_EEPROM_CHIP_ADDRESS))
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printf("ti_i2c_eeprom_init failed\n");
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@ -386,8 +388,13 @@ void scale_vcores_generic(u32 m)
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{
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int mpu_vdd, ddr_volt;
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#ifndef CONFIG_DM_I2C
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if (i2c_probe(TPS65218_CHIP_PM))
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return;
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#else
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if (power_tps65218_init(0))
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return;
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#endif
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switch (m) {
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case 1000:
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@ -439,8 +446,13 @@ void scale_vcores_idk(u32 m)
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{
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int mpu_vdd;
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#ifndef CONFIG_DM_I2C
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if (i2c_probe(TPS62362_I2C_ADDR))
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return;
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#else
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if (power_tps62362_init(0))
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return;
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#endif
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switch (m) {
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case 1000:
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@ -462,14 +474,12 @@ void scale_vcores_idk(u32 m)
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puts("Unknown MPU clock, not scaling\n");
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return;
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}
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/* Set VDD_MPU voltage */
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if (tps62362_voltage_update(TPS62362_SET3, mpu_vdd)) {
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printf("%s failure\n", __func__);
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return;
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}
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}
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void gpi2c_init(void)
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{
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/* When needed to be invoked prior to BSS initialization */
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@ -477,8 +487,10 @@ void gpi2c_init(void)
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if (first_time) {
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enable_i2c0_pin_mux();
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#ifndef CONFIG_DM_I2C
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i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
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CONFIG_SYS_OMAP24_I2C_SLAVE);
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#endif
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first_time = false;
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}
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}
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@ -614,20 +626,32 @@ void sdram_init(void)
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/* setup board specific PMIC */
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int power_init_board(void)
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{
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struct pmic *p;
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int rc;
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#ifndef CONFIG_DM_I2C
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struct pmic *p = NULL;
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#endif
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if (board_is_idk()) {
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power_tps62362_init(I2C_PMIC);
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rc = power_tps62362_init(0);
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if (rc)
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goto done;
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#ifndef CONFIG_DM_I2C
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p = pmic_get("TPS62362");
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if (p && !pmic_probe(p))
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puts("PMIC: TPS62362\n");
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if (!p || pmic_probe(p))
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goto done;
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#endif
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puts("PMIC: TPS62362\n");
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} else {
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power_tps65218_init(I2C_PMIC);
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rc = power_tps65218_init(0);
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if (rc)
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goto done;
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#ifndef CONFIG_DM_I2C
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p = pmic_get("TPS65218_PMIC");
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if (p && !pmic_probe(p))
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puts("PMIC: TPS65218\n");
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if (!p || pmic_probe(p))
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goto done;
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#endif
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puts("PMIC: TPS65218\n");
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}
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done:
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return 0;
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}
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@ -623,7 +623,7 @@ void am57x_idk_lcd_detect(void)
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{
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int r = -ENODEV;
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char *idk_lcd = "no";
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uint8_t buf = 0;
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u8 buf = 0;
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/* Only valid for IDKs */
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if (board_is_x15() || board_is_am572x_evm())
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@ -633,6 +633,7 @@ void am57x_idk_lcd_detect(void)
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if (board_is_am571x_idk() && !am571x_idk_needs_lcd())
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goto out;
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#ifndef CONFIG_DM_I2C
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r = i2c_set_bus_num(OSD_TS_FT_BUS_ADDRESS);
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if (r) {
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printf("%s: Failed to set bus address to %d: %d\n",
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@ -657,6 +658,32 @@ void am57x_idk_lcd_detect(void)
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OSD_TS_FT_REG_ID, r);
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goto out;
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}
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#else
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struct udevice *dev;
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r = i2c_get_chip_for_busnum(OSD_TS_FT_BUS_ADDRESS,
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OSD_TS_FT_CHIP_ADDRESS, 1, &dev);
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if (r) {
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printf("%s: Failed to get I2C device %d/%d (ret %d)\n",
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__func__, OSD_TS_FT_BUS_ADDRESS, OSD_TS_FT_CHIP_ADDRESS,
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r);
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/* AM572x IDK has no explicit settings for optional LCD kit */
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if (board_is_am571x_idk())
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printf("%s: Touch screen detect failed: %d!\n",
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__func__, r);
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goto out;
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}
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/* Read FT ID */
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r = dm_i2c_reg_read(dev, OSD_TS_FT_REG_ID);
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if (r < 0) {
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printf("%s: Touch screen ID read %d:0x%02x[0x%02x] failed:%d\n",
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__func__, OSD_TS_FT_BUS_ADDRESS, OSD_TS_FT_CHIP_ADDRESS,
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OSD_TS_FT_REG_ID, r);
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goto out;
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}
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buf = (u8)r;
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#endif
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switch (buf) {
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case OSD_TS_FT_ID_5606:
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@ -14,43 +14,7 @@
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#include "board_detect.h"
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#if defined(CONFIG_DM_I2C_COMPAT)
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/**
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* ti_i2c_set_alen - Set chip's i2c address length
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* @bus_addr - I2C bus number
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* @dev_addr - I2C eeprom id
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* @alen - I2C address length in bytes
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*
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* DM_I2C by default sets the address length to be used to 1. This
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* function allows this address length to be changed to match the
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* eeprom used for board detection.
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*/
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int __maybe_unused ti_i2c_set_alen(int bus_addr, int dev_addr, int alen)
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{
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struct udevice *dev;
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struct udevice *bus;
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int rc;
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|
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rc = uclass_get_device_by_seq(UCLASS_I2C, bus_addr, &bus);
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if (rc)
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return rc;
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rc = i2c_get_chip(bus, dev_addr, 1, &dev);
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if (rc)
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return rc;
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rc = i2c_set_chip_offset_len(dev, alen);
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if (rc)
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return rc;
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return 0;
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}
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#else
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int __maybe_unused ti_i2c_set_alen(int bus_addr, int dev_addr, int alen)
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{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_DM_I2C) || defined(CONFIG_DM_I2C_COMPAT)
|
||||
#if !defined(CONFIG_DM_I2C)
|
||||
/**
|
||||
* ti_i2c_eeprom_init - Initialize an i2c bus and probe for a device
|
||||
* @i2c_bus: i2c bus number to initialize
|
||||
|
@ -83,17 +47,7 @@ static int __maybe_unused ti_i2c_eeprom_init(int i2c_bus, int dev_addr)
|
|||
static int __maybe_unused ti_i2c_eeprom_read(int dev_addr, int offset,
|
||||
uchar *ep, int epsize)
|
||||
{
|
||||
int bus_num, rc, alen;
|
||||
|
||||
bus_num = i2c_get_bus_num();
|
||||
|
||||
alen = 2;
|
||||
|
||||
rc = ti_i2c_set_alen(bus_num, dev_addr, alen);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
return i2c_read(dev_addr, offset, alen, ep, epsize);
|
||||
return i2c_read(dev_addr, offset, 2, ep, epsize);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -127,7 +81,7 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
|
|||
u32 hdr_read;
|
||||
int rc;
|
||||
|
||||
#if defined(CONFIG_DM_I2C) && !defined(CONFIG_DM_I2C_COMPAT)
|
||||
#if defined(CONFIG_DM_I2C)
|
||||
struct udevice *dev;
|
||||
struct udevice *bus;
|
||||
|
||||
|
@ -185,10 +139,6 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
|
|||
*/
|
||||
byte = 2;
|
||||
|
||||
rc = ti_i2c_set_alen(bus_addr, dev_addr, byte);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read, 4);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
@ -202,10 +152,6 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
|
|||
*/
|
||||
byte = 1;
|
||||
if (rc) {
|
||||
rc = ti_i2c_set_alen(bus_addr, dev_addr, byte);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = i2c_read(dev_addr, 0x0, byte, (uint8_t *)&hdr_read,
|
||||
4);
|
||||
}
|
||||
|
|
|
@ -251,6 +251,7 @@ int board_fit_config_name_match(const char *name)
|
|||
#if defined(CONFIG_DTB_RESELECT)
|
||||
static int k2g_alt_board_detect(void)
|
||||
{
|
||||
#ifndef CONFIG_DM_I2C
|
||||
int rc;
|
||||
|
||||
rc = i2c_set_bus_num(1);
|
||||
|
@ -260,7 +261,17 @@ static int k2g_alt_board_detect(void)
|
|||
rc = i2c_probe(K2G_GP_AUDIO_CODEC_ADDRESS);
|
||||
if (rc)
|
||||
return rc;
|
||||
#else
|
||||
struct udevice *bus, *dev;
|
||||
int rc;
|
||||
|
||||
rc = uclass_get_device_by_seq(UCLASS_I2C, 1, &bus);
|
||||
if (rc)
|
||||
return rc;
|
||||
rc = dm_i2c_probe(bus, K2G_GP_AUDIO_CODEC_ADDRESS, 0, &dev);
|
||||
if (rc)
|
||||
return rc;
|
||||
#endif
|
||||
ti_i2c_eeprom_am_set("66AK2GGP", "1.0X");
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -27,8 +27,10 @@
|
|||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
|
||||
|
||||
/* Power */
|
||||
#ifndef CONFIG_DM_I2C
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_I2C
|
||||
#endif
|
||||
#define CONFIG_POWER_TPS65218
|
||||
#define CONFIG_POWER_TPS62362
|
||||
|
||||
|
|
|
@ -74,24 +74,10 @@
|
|||
/* Timer information. */
|
||||
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
|
||||
|
||||
/*
|
||||
* Disable DM_* for SPL build and can be re-enabled after adding
|
||||
* DM support in SPL
|
||||
*/
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#undef CONFIG_DM_I2C
|
||||
#endif
|
||||
|
||||
/* I2C IP block */
|
||||
/* If DM_I2C, enable non-DM I2C support */
|
||||
#if !defined(CONFIG_DM_I2C)
|
||||
#define CONFIG_I2C
|
||||
#ifndef CONFIG_DM_I2C
|
||||
#define CONFIG_SYS_I2C
|
||||
#else
|
||||
/*
|
||||
* Enable CONFIG_DM_I2C_COMPAT temporarily until all the i2c client
|
||||
* devices are adopted to DM
|
||||
*/
|
||||
#define CONFIG_DM_I2C_COMPAT
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
Loading…
Reference in a new issue