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arm: mach-omap2: am33xx: ddr: programming of EXT_PHY_CTRL1 and EXT_PHY_CTRL1_SHADOW
Adjust DQS skew in case where invert_clkout=1 is used. Match recommended values from EMIF Tools app note: http://www.ti.com/lit/an/sprac70/sprac70.pdf Signed-off-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
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1 changed files with 10 additions and 2 deletions
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@ -256,8 +256,16 @@ static void ext_phy_settings_hwlvl(const struct emif_regs *regs, int nr)
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* Enable hardware leveling on the EMIF. For details about these
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* magic values please see the EMIF registers section of the TRM.
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*/
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writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1);
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writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1_shdw);
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if (regs->emif_ddr_phy_ctlr_1 & 0x00040000) {
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/* PHY_INVERT_CLKOUT = 1 */
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writel(0x00040100, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1);
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writel(0x00040100, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1_shdw);
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} else {
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/* PHY_INVERT_CLKOUT = 0 */
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writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1);
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writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1_shdw);
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}
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writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_22);
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writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_22_shdw);
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writel(0x00600020, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_23);
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