arm: mach-omap2: am33xx: ddr: programming of EXT_PHY_CTRL1 and EXT_PHY_CTRL1_SHADOW

Adjust DQS skew in case where invert_clkout=1 is used.
Match recommended values from EMIF Tools app note:

http://www.ti.com/lit/an/sprac70/sprac70.pdf

Signed-off-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
This commit is contained in:
Brad Griffis 2019-04-29 09:59:28 +05:30 committed by Tom Rini
parent 6c74e94a65
commit 82195797a4

View file

@ -256,8 +256,16 @@ static void ext_phy_settings_hwlvl(const struct emif_regs *regs, int nr)
* Enable hardware leveling on the EMIF. For details about these
* magic values please see the EMIF registers section of the TRM.
*/
writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1);
writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1_shdw);
if (regs->emif_ddr_phy_ctlr_1 & 0x00040000) {
/* PHY_INVERT_CLKOUT = 1 */
writel(0x00040100, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1);
writel(0x00040100, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1_shdw);
} else {
/* PHY_INVERT_CLKOUT = 0 */
writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1);
writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1_shdw);
}
writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_22);
writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_22_shdw);
writel(0x00600020, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_23);