Commit graph

638 commits

Author SHA1 Message Date
Pavel Machek
51fb455f82 socfpga: fix clock manager register definition
Structure defining clock manager hardware was wrong, leading to
wrong registers being accessed and hang in MMC init.

This fixes structure to match hardware.

Signed-off-by: Pavel Machek <pavel@denx.de>
2014-08-29 15:50:50 -04:00
Bo Shen
da55c66ec9 MMC: atmel_mci: enable high speed mode support
If the MCI IP version >= 0x300, it supports hight speed mode
option, this patch enable it.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-08-01 20:01:33 +03:00
Bo Shen
cd60ebd430 MMC: atmel_mci: refactor setting the mode register
The mode register is different between MCI IP version.
So, according to MCI IP version to set the mode register.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-08-01 20:01:09 +03:00
Chin Liang See
6ace153d13 mmc/dw_mmc: Fix clock divider calculation error for bypass mode
To fix the clock divider calculation error when the controller
clock same as the operating frequency. This is known as bypass
mode. In this mode, the divider should be 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
2014-08-01 19:45:32 +03:00
Marek Vasut
dae0f5c644 mmc: s3c: Add SD driver
Implement SD driver for the S3C24xx family. This implementation
is currently only capable of using the PIO transfers, DMA is not
supported.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-08-01 19:24:34 +03:00
Lubomir Rintel
64973023df bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flag
Seems like the controller doesn't support the flag. None of the hi-speed cards
I've tried could be read, while they successfully worked with the quirk enabled.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
2014-08-01 18:57:02 +03:00
DrEagle
3fe3b4fb1c ARM: kirkwood: add mvsdio driver
This patch add Marvell kirkwood MVSDIO/MMC driver
and enable it for Sheevaplugs and OpenRD boards.

Signed-off-by: Gerald Kerma <drEagle@doukki.net>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-08-01 18:44:56 +03:00
Albert ARIBAUD
740f41d3cb Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master' 2014-07-28 10:12:45 +02:00
Jeroen Hofstee
750121c350 mmc: prevent some warnings with make W=1
Add missing prototypes for global functions and
make local functions static.

cc: panto@antoniou-consulting.com
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-07-18 17:53:24 -04:00
Jeroen Hofstee
cee9ab7cb6 dirvers: mmc: use __weak
use weak instead of alias to prevent some clang warnings.
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-07-18 17:53:23 -04:00
Hans de Goede
b6ae6765c5 sunxi: Remove mmc DMA support
The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the
dma descriptors on the stack, and then exits while the dma transfer is in
progress, so the dma engine is reading stack memory which at that point may
be re-used. So far we've gotten away with this by luck, but recent u-boot
changes have shifted the stack start address by 16 bytes, which combined
with dma alignment now exposes this problem.

Since we end up just busy waiting for the dma engine anyway, this commit
fixes things by simply removing the dma code, resulting in smaller bug-free
code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-07-06 20:12:44 +01:00
Jeroen Hofstee
2b9912e6a7 includes: move openssl headers to include/u-boot
commit 18b06652cd "tools: include u-boot version of sha256.h"
unconditionally forced the sha256.h from u-boot to be used
for tools instead of the host version. This is fragile though
as it will also include the host version. Therefore move it
to include/u-boot to join u-boot/md5.h etc which were renamed
for the same reason.

cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-06-19 11:19:04 -04:00
Darwin Rambo
3d6a5a4dfc mmc: free allocated memory on initialization errors
Cleanup to balance malloc/free calls.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-06-12 15:21:12 +03:00
Stephen Warren
d4622df342 mmc: return meaningful error codes from mmc_select_hwpart
Rather than just returning -1 everywhere, try to return something
meaningful from mmc_select_hwpart(). Note that most other MMC functions
don't do this, including functions called from mmc_select_hwpart(), so
I'm not sure how effective this will be. Still, it's one less place with
hard-coded -1.

Suggested-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-06-12 14:15:59 +03:00
Albert ARIBAUD
cc49da249c Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2014-06-02 08:43:48 +02:00
Wu, Josh
9902c7b6f1 mmc: atmel_mci: fix print incorrect buffer content for debug
Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix checkpatch line length warning]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-05-27 00:10:46 +02:00
Ian Campbell
e24ea55c04 sunxi: mmc support
On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote:
> > +	case 1:
> > +#if CONFIG_MMC1_PG

> Are you sure that this is correct and shouldn't be:
>
> +#ifdef CONFIG_MMC1_PG
>
> ?

It's "correct" in so far as it works (the boards.cfg config stuff
#defines things to 1), but I think you are right that it isn't the
preferred style. But...

> A quick scan through this patch series shows that this define
> is not set at all. Perhaps its outdated? Or is it used to support
> some other sunxi SoC? Not sure, perhaps it should be removed for
> now.

...I had thought that it was to support some other board which wasn't
being upstreamed right now, so eventually useful and harmless for now,
but I've just checked and it isn't actually used by any of the boards in
u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it.
Rather than resend the entire series, here is v5.1 of this patch.

> Other than this please add my:
>
> Reviewed-by: Stefan Roese <sr@denx.de>

Thanks!

8<---------------------------------

>From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001
From: Ian Campbell <ijc@hellion.org.uk>
Date: Fri, 7 Mar 2014 04:29:39 +0000
Subject: [PATCH v5.1 7/8] sunxi: mmc support

This adds support for the MMC controller on the Allwinner A20 (sun7i)
processor.

Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Luke Leighton <lkcl@lkcl.net>
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Wills Wang <wills.wang.open@gmail.com>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
Cc: Aaron Maoye <leafy.myeh@allwinnertech.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: Tom Rini <trini@ti.com>
2014-05-25 16:26:43 +02:00
Tom Rini
10dc77716f esdhc/usdhc: Fix warning when CONFIG_SYS_FSL_ESDHC_USE_PIO is not set
In 7168977 we made calls to check_and_invalidate_dcache_range()
conditional on !CONFIG_SYS_FSL_ESDHC_USE_PIO.  Only define this function
in this case as well.

Signed-off-by: Tom Rini <trini@ti.com>
2014-05-23 09:19:05 -04:00
Tom Rini
638b3e8342 Merge branch 'master' of git://git.denx.de/u-boot-mmc 2014-05-23 08:13:59 -04:00
Stephen Warren
d235628434 mmc: provide a select_hwpart implementation for get_device()
This enables specifying which eMMC HW partition to target for any U-Boot
command that uses the generic get_partition() function to parse its
command-line arguments.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-05-23 12:11:44 +03:00
Pierre Aubert
91fdabc67a eMMC: add support for operations in RPMB partition
This patch adds functions for read, write and authentication
key programming for the Replay Protected Memory Block partition
in the eMMC.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
2014-05-23 11:52:51 +03:00
Andrew Gabbasov
6b2221b008 mmc: Handle switch error status bit in MMC card status
MMC switch command for unsupported feature (e.g. bus width) sets a switch
error bit in card status. This bit should be checked, and, if it's set,
no access with new controller settings should be performed.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2014-05-23 11:34:33 +03:00
Mateusz Zalega
d803fea576 mmc: postponed needless timer initialization
mmc_init() doesn't call get_timer() anymore if MMC is already
initialized.

<panto> Minor formatting fix.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
2014-05-23 11:19:53 +03:00
Ye.Li
716897760f esdhc/usdhc: Fix PIO mode bug in fsl_esdhc driver
When configure the fsl_esdhc driver to PIO mode by defining
"CONFIG_SYS_FSL_ESDHC_USE_PIO", the SD/MMC read and write will fail.

Two bugs in the driver to cause the issue:
1. The read buffer was invalidated after reading from DATAPORT register,
which should be only applied to DMA mode. The valid data in cache was
overwritten by physical memory.
2. The watermarks are not set in PIO mode, will cause according state not
be set.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2014-05-22 18:52:45 +03:00
Albert ARIBAUD
05d134b084 Merge remote-tracking branch 'u-boot/master'
Conflicts:
	boards.cfg

Conflicts were trivial once u-boot-arm/master boards.cfg was
reformatted (commit 6130c146) to match u-boot/master's own
reformatting (commit 1b37fa83).
2014-05-20 10:05:42 +02:00
Jaehoon Chung
9b8c9a3c09 mmc: s5p_sdhci: add the s5p_sdhci_core_init function
To reuse the code, added the s5p_sdhci_core_init function.
Before applied this patch, didn't use the 8-bit mode at exynos baord.
Because it didn't set "MMC_MODE_8BIT".

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung
e09bd85329 mmc: exynos_dw_mmc: enable the DDR mode
Set the ddr mode capability by default.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung
045bdcd0b2 mmc: dw_mmc: support the DDR mode
Support the DDR mode at dw-mmc controller

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung
d22e3d46a9 mmc: support the DDR mode for eMMC
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung
8caf46d189 mmc: remove the unnecessary define and fix the wrong bit control
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Lukasz Majeski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung
959198f7ca mmc: exynos_dw_mmc: restore the property into host
Restore the platdata(property of dt) into host struct.
Then data's information is maintained and reused anywhere.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Stephen Warren
f175603f7c ARM: tegra: set CONFIG_SYS_MMC_MAX_DEVICE
If CONFIG_API is ever to be enabled on Tegra, this define must be set,
since api/api_storage.c uses it.

A couple of annoyting things about CONFIG_SYS_MMC_MAX_DEVICE

1) It isn't documented in README. The same is true for a lot of similar
   defines used by api_storage.c.

2) It doesn't represent MAX_DEVICE but rather NUM_DEVICES, since the
   valid values are 0..n-1 not 0..n.

However, I this patch does not address those shortcomings.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13 10:41:31 -07:00
Chunhe Lan
0b2e13d9cc powerpc/85xx: Add T4240RDB board support
T4240RDB board Specification
----------------------------
Memory subsystem:
   6GB DDR3
   128MB NOR flash
   2GB NAND flash

Ethernet:
   Eight 1G SGMII ports
   Four 10Gbps SFP+ ports

PCIe:
   Two PCIe slots

USB:
   Two USB2.0 Type A ports

SDHC:
   One SD-card port

SATA:
   One SATA port

UART:
   Dual RJ45 ports

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
[York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]
2014-05-13 08:24:32 -07:00
Prabhakar Kushwaha
1eaa742d85 driver: Add support of image load for MMC & SPI in SPL
Add support of loading image, binary for MMC and SPI during SPL boot.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:50 -07:00
Prabhakar Kushwaha
613ab32c47 driver/mmc: fix compile warnings
Fix following compile warnings
fsl_esdhc_spl.c: In function 'mmc_boot':
fsl_esdhc_spl.c:35:10: warning: unused variable 'byte_num' [-Wunused-variable]
fsl_esdhc_spl.c:35:7: warning: unused variable 'i' [-Wunused-variable]
fsl_esdhc_spl.c:34:8: warning: unused variable 'val' [-Wunused-variable]
fsl_esdhc_spl.c:33:6: warning: unused variable 'blklen' [-Wunused-variable]
fsl_esdhc_spl.c:105:7: warning: 'tmp_buf' may be used uninitialized in this
function [-Wuninitialized]

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:48 -07:00
Albert ARIBAUD
519fdde9e6 Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	arch/arm/cpu/arm926ejs/mxs/Makefile
	include/configs/trats.h
	include/configs/trats2.h
	include/mmc.h
2014-04-08 09:25:08 +02:00
Haijun.Zhang
1336e2d343 mmc:eSDHC: Workaround for data timeout issue on Txxx SoC
1. The Data timeout counter value in eSDHC_SYSCTL register is
not working as it should be, so add quirks to enable this
workaround to fix it to the max value 0xE.

2. Add CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround.

* Update of patch for change mmc interface by
	Pantelis Antoniou <panto@antoniou-consulting.com>

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 13:25:01 +03:00
Andrew Gabbasov
8a573022c3 mmc: fsl_esdhc: add controller reset in case of data related errors too
The controller reset is performed now if command error occurs.
This commit adds the reset for the case of data related errors too.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 13:17:12 +03:00
Andrew Gabbasov
fb823981c5 mmc: fsl_esdhc: fix calculation of timeout for data transactions
Calculation of the timeout value should be based on actual clock value,
written to controller registers. Since mmc->tran_speed is either the
maximum allowed speed, or the preliminary value, that is be not yet
set to registers, the actual timeout, taken by the controller, based
on its clock settings, may be much longer than expected, based on
mmc->tran_speed value. In particular it happens at early initialization
stage, when typical value of mmc->tran_speed is 20MHz or 26MHz, while
actual clock setting, configured in the controller, is 400kHz.
It's more correct to use mmc->clock value for timeout calculation instead.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 13:16:56 +03:00
Tom Rini
33ace362fd mmc: Add 'mmc rst-function' sub-command
Some eMMC chips may need the RST_n_FUNCTION bit set to a non-zero value
in order for warm reset of the system to work.  Details on this being
required will be part of the eMMC datasheet.  Also add using this
command to the dra7xx README.

* Whitespace fix by panto

Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 13:02:58 +03:00
Nobuhiro Iwamatsu
74c32ef58d mmc: sh_mmcif: Fix warning by unused variable
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 12:55:48 +03:00
Nobuhiro Iwamatsu
cd2bf4846c mmc: sh_mmcif: Fix compile error
BY commit "mmc: Split mmc struct, rework mmc initialization (v2)",
sh_mmcif has compile error. This fixes compile error.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Pantelis Antoniou <panto@antoniou-consulting.com>
Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 12:55:31 +03:00
Tom Rini
0b2da7e209 blackfin: mmc: Correct mmc_host_is_spi and bfin_sdh.c
In the recent mmc cleanup, the mmc_host_is_spi macro was broken and
bfin_sdh.c had mmc->bus_width turned into mmc_bus_width(mmc), both of
which were incorrect.

Signed-off-by: Tom Rini <trini@ti.com>
2014-03-28 16:55:29 -04:00
Pantelis Antoniou
93bfd61677 mmc: Split mmc struct, rework mmc initialization (v2)
The way that struct mmc was implemented was a bit of a mess;
configuration and internal state all jumbled up in a single structure.

On top of that the way initialization is done with mmc_register leads
to a lot of duplicated code in drivers.

Typically the initialization got something like this in every driver.

	struct mmc *mmc = malloc(sizeof(struct mmc));
	memset(mmc, 0, sizeof(struct mmc);
	/* fill in fields of mmc struct */
	/* store private data pointer */
	mmc_register(mmc);

By using the new mmc_create call one just passes an mmc config struct
and an optional private data pointer like this:

	struct mmc = mmc_create(&cfg, priv);

All in tree drivers have been updated to the new form, and expect
mmc_register to go away before long.

Changes since v1:

* Use calloc instead of manually calling memset.
* Mark mmc_register as deprecated.

Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-03-24 12:58:56 +02:00
Pantelis Antoniou
22cb7d334e mmc: Convert mmc struct's name array to a pointer
Using an array is pointless; even more pointless (and scary) is using
sprintf to fill it without a format string.

Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-03-24 11:32:10 +02:00
Pantelis Antoniou
ab769f227f mmc: Remove ops from struct mmc and put in mmc_ops
Remove the in-structure ops and put them in mmc_ops with
a constant pointer to it.

This makes the mmc structure smaller as well as conserving
code space (in theory).

All in-tree drivers are converted as well; this is done in a
single patch in order to not break git bisect.

Changes since V1:
Fix compilation b0rked issue on omap platforms where OMAP_GPIO was
not set.

Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-03-24 11:32:10 +02:00
Piotr Wilczek
3577fe8be9 drivers:mmc:sdhci: enable support for DT
This patch enables support for device tree for sdhci driver.
Non DT case is still supported.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-03-12 19:54:59 +09:00
Michal Simek
345d3c0f01 mmc: zynq: Add OF initialization support
Enable initialize sdhci from DTB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-03-04 09:27:35 -05:00
Tom Rini
eeb72e6761 Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	arch/arm/cpu/armv7/config.mk
	board/ti/am43xx/mux.c
	include/configs/am43xx_evm.h

Signed-off-by: Tom Rini <trini@ti.com>
2014-02-26 16:49:58 -05:00
Darwin Rambo
7a9d0ad009 mmc: kona: Add Kona mmc driver
Add support for the Kona SDHCI found on Broadcom mobile SoCs.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Reviewed-by: Tim Kryger <tkryger@linaro.org>
2014-02-22 19:30:41 +01:00
Tom Rini
130fbeb1c5 blackfin: Add <asm/clock.h> to numerous drivers
With d6a320d we moved some clock externs out of blackfin_local.h and
into clock.h but now need to include <asm/clock.h> in more drivers to
avoid warnings.

Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Tom Rini <trini@ti.com>
2014-02-20 12:00:27 -05:00
Tom Rini
c4d376fd1c Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-02-17 14:22:02 -05:00
Tom Rini
614b2bf1c9 cmd_mmc.c: Drop open/close mmc sub-commands
The open and close mmc sub-commands implement a hard-coded set of values
specific to the SMDK5250 platform.  Remove these commands as what they
did can be done instead with a series of mmc dev / bootpart / bootbus
commands instead now.

Cc: Amar <amarendra.xt@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 18:17:49 +02:00
Tom Rini
5a99b9de1a cmd_mmc.c: Add bootbus mmc sub-command
Add a bootbus sub-command to the mmc command to allow for setting
the boot_bus_width, reset_boot_bus_width and boot_mode fields of
BOOT_BUS_WIDTH (EXT_CSD[177]).

Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 18:17:49 +02:00
Tom Rini
792970b0a3 cmd_mmc.c: Add 'partconf' command to mmc
Add a partconf sub-command to the mmc command to allow for setting
the boot_ack, boot_partition and partition_access fields of
PARTITION_CONFIG (formerly BOOT_CONFIG, EXT_CSD[179]).  Part of this
requires changing the check for 'part' from an strncmp to a strcmp, like
the rest of the sub-commands.

Cc: Andy Fleming <afleming@gmail.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 18:17:49 +02:00
Siva Durga Prasad Paladugu
f9ec45d1d9 mmc: Enabled quirk SDHCI_QUIRK_BROKEN_R1B
As per the below commit
"mmc: sdhci: add the quirk for broken r1b response"
(sha1: 3a6383207b)
need to add quirk SDHCI_QUIRK_BROKEN_R1B, when the
response type is R1b.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 17:47:19 +02:00
Rajeshwari S Shinde
d3e016cc28 MMC: DWMMC: Correct the CLKDIV register value
This patch corrects the divider value written to CLKDIV register.
Since SDCLKIN is divided inside controller by the DIVRATIO value set
in the CLKSEL register, we need to use the same output clock value to
calculate the CLKDIV value.
as per user manual: cclk_in = SDCLKIN / (DIVRATIO + 1)

Input parameter to mmc_clk is changed to dwmci_host, since
we need the same to read DWMCI_CLKSEL register.

This improves the read timing values for channel 0 on SMDK5250
from 0.288sec to 0.144sec

Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 17:42:26 +02:00
Stephen Warren
def816a2ba mmc: set rca to 1 for MMC cards
U-Boot currently sets MMC cards' RCA register to 0. This value is
reserved according to the specification. Use a value of 1 instead, just
like the Linux kernel.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 17:34:06 +02:00
Stephen Warren
a73ca4789f mmc: tegra: support Tegra124
Tegra124's MMC controller is very similar to earlier SoC generations,
and can be supported by the same driver.

However, there are some non-backwards-compatible HW differences, and
hence a new DT compatible value must be used to describe the HW. This
patch updates the driver to support that new compatible value.

That said, the HW differences are only relevant when enabling certain
high-performance transfer modes. Since the driver is currently very
simple and doesn't enable those modes, we don't actually need to address
any of these HW differences in the code yet, hence the simple nature of
this patch.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:45 -07:00
Masahiro Yamada
4d764244bd drivers: delete unused header files
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:07 -05:00
Haijun.Zhang
d47e3d2707 esdhc: Detecting 8 bit width before mmc initialization
The upper 4 data signals of esdhc are shared with spi flash.
So detect if the upper 4 pins are assigned to esdhc before
enable sdhc 8 bit width.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-22 08:56:34 -08:00
Haijun.Zhang
f7e27cc5ee esdhc: Workaround for card can't be detected on T4240QDS
Card detection pin is ineffective on T4240QDS Rev1.0.
There are two cards can be connected to board.
1. eMMC card is built-in board, can not be removed. so
   For eMMC card it is always there.
2. Card detecting pin is functional for SDHC card in Rev2.0.

This workaround force sdhc driver scan and initialize the card
regardless of whether the card is inserted or not in case Rev1.0.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-22 08:56:15 -08:00
Minkyu Kang
a4d481ed81 mmc: dwmmc: mode change to 0644
Don't know why but, file permission was changed

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-01-14 09:44:21 -05:00
Chin Liang See
c5c1af2176 socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA
To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specific files (SOCFPGA handoff files)

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-01-09 11:53:55 +02:00
Markus Niebel
ab71188ce8 mmc: add setdsr support
The eMMC and the SD-Card specifications describe the optional SET_DSR command.
During measurements at our lab we found that some cards implementing this feature
having really strong driver strengts per default. This can lead to voltage peaks
above the specification of the host on signal edges for data sent from a card to
the host.

Since availability of a given card type may be shorter than the time a certain
hardware will be produced it is useful to have support for this command (Alternative
would be changing termination resistors and adapting the driver strength of the
host to the used card.)

Following proposal for an implementation:

- new field that reflects CSD field DSR_IMP in struct mmc
- new field for design specific DSR value in struct mmc
- board code can set DSR value in mmc struct just after registering an controller
- mmc_startup sends the the stored DSR value before selecting a card, if DSR_IMP is set

Additionally the mmc command is extended to make is possible to play around with different
DSR values.

The concept was tested on a i.MX53 based platform using a Micron eMMC card where the default
DSR is 0x0400 (12mA) but in our design 0x0100 (0x0100) were enough. To use this feature for
instance on a mx53loco one have to add a call to mmc_set_dsr() in board_mmc_init() after
calling fsl_esdhc_initialize() for the eMMC.

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-01-09 11:47:51 +02:00
Darwin Rambo
30e6d979fa mmc: Minor cleanup of sdhci.c
Fixup prints to show where the print is done from, and
a few minor formatting/grammar issues.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-01-09 11:36:56 +02:00
Alexey Brodkin
2a7a210e2c mmc/dwmmc: use bounce buffer for data exchange between CPU and MMC controller
Bounce buffer implementation takes care of proper data buffer alignemt
and correct flush/invalidation of data cache at once so we no longer
depend on input data variety and make sure CPU and MMC controller deal
with expected data in case of enabled data cache.

Bounce buffer requires to add its definition (CONFIG_BOUNCE_BUFFER) in
board configuration, otherwise corresponding library won't be compiled
and linker will fail to build resulting executable.

Difference since v1 - fixed compile-time warning with type casting to
"void *":

Slight edit to remove UTF8 characters in the commit message.

Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>

====
passing argument 2 of 'bounce_buffer_start' discards 'const' qualifier
from pointer target type
====

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Amar <amarendra.xt@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Andy Fleming <afleming@gmail.com>
2014-01-09 11:29:02 +02:00
Chin Liang See
fd26b5490b mmc/dwmmc: Using calloc instead malloc
To enhance the SDMMC DesignWare driver to use calloc instead of
malloc. This will avoid the incident that uninitialized members
of mmc structure are later used for NULL comparison.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-01-08 19:02:41 +02:00
Kuo-Jung Su
adebb98ba1 mmc: add Faraday FTSDC021 SDHCI controller support
Faraday FTSDC021 is a controller which is compliant with
SDHCI v3.0, SDIO v2.0 and MMC v4.3.

However this driver is only verified with SD memory cards.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
CC: Andy Fleming <afleming@gmail.com>
2013-12-08 14:23:05 +02:00
Priyanka Jain
4520a2f28e powerpc: mmc: Add corenet devices support in esdhc spl
Existing eSDHC SPL framework assumes booting from sd-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.

So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-12-08 14:17:28 +02:00
Alexey Brodkin
9108b315f2 mmc/dwmmc: modify FIFO threshold only if value explicitly set
If platform provides "host->fifoth_val" it will be used for
initialization of DWMCI_FIFOTH register. Otherwise default value will be
used.

This implementation allows:
 * escape unclear and recursive calculations that are currently in use
 * use whatever custom value for DWMCI_FIFOTH initialization if any
particular SoC requires it

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Amar <amarendra.xt@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-12-08 14:08:47 +02:00
Jaehoon Chung
18ab675597 mmc: dw_mmc: remove the exynos specific code in dw-mmc.c
dw-mmc.c is the general driver file.
So, remove the exynos specific code at dw-mmc.c.
Instead, exynos specific cod can be move into exynos-dw_mmc.c.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-08 14:07:07 +02:00
Masahiro Yamada
710f1d3d5f drivers: convert makefiles to Kbuild style
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-10-31 13:26:01 -04:00
Haijun.Zhang
ef38f3ffb9 powerpc/esdhc: Add 3.3v voltage support in esdhc capacity register
T4240QDS eSDHC host capabilities reigster should have VS33 bit define.
Add quirk CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 to deal with capacity
missing

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-10-31 09:55:34 +02:00
Haijun.Zhang
a54d681132 esdhc: memset mmc struct before putting into use
struct mmc should be clear to all '0' after malloc to avoid
unexpect variable value.

Like mmc->has_init = xxx.
In this case mmcinfo will believe the card had been initialized before
and skip the initialization.

Test on P5040 and T4240,
Error Log:

=> mmcinfo
Device: FSL_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 0-bit
=>

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Signed-off-by: Xie Shaohui-B21989 <B21989@freescale.com>
Tested-by: Ryan Barnett <rjbarnet@rockwellcollins.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-10-31 09:55:34 +02:00
Haijun.Zhang
511948b2cb Powerpc/esdhc: Add simple description of esdhc register
Add some descriptions for esdhc register for easily using.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-10-31 09:55:34 +02:00
Haijun.Zhang
5f9b9f867d powerpc/esdhc: Map register for eSDHC Host Controller V3.0
eSDHC host controller has new register to support SD Spec 3.0.
And the according host controller version was Freescale eSDHC
Version 3.0.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-10-31 09:55:33 +02:00
Rajeshwari Shinde
6f0b7caa67 DWMMC: SMDK5420: Disable SMU for eMMC
SMDK5420 has a new Security Management Unit added
for dwmmc driver, hence, configuring the control
registers to support booting via eMMC.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-10-31 09:55:33 +02:00
Przemyslaw Marczak
56b34bc617 mmc: sdhci: Avoid commands errors by simple timeout adaptation.
Old command timeout value was too small and it caused I/O errors which
led to uncompleted read/write/erase operations and filesystem errors.
Timeout adaptation fixes this issue.

Changes in sdhci_send_command() function:
- change timeout variable to static
- increase default command timeout to 100 ms
- add definition of max command timeout value,
  which can be redefined in each board config file
- wait for card ready state for max defined time
  if it doesn't exceed defined maximum or return COMM_ERR

Once successfully increased timeout value will be used in next function
call. This fix was tested on Goni, Trats, Trats2 boards by testing UMS
on MMC storage.

Changes v2:
- move global variable cmd_timeout into function sdhci_send_command()
- change condition "==" to ">=" when comparing time with timeout
- print information about timeout increasing and card busy timeout

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-10-31 09:55:33 +02:00
Jaehoon Chung
b44fe83a58 mmc: dw_mmc: change the callback function name.
To prevent the confusion, use the get_mmc_clk() instead of mmc_clk().
get_mmc_clk() is more exactly name.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-10-31 09:55:33 +02:00
Oliver Metz
1937e5aa3b mmc: Fix erase_grp_size for partitioned card
EXT_CSD_ERASE_GROUP_DEF is lost every time after a reset or
 power off. Set it if device has enhanced partitions.

Signed-off-by: Oliver Metz <oliver@freetz.org>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-10-31 09:55:33 +02:00
Tom Rini
6297872cd5 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-10-02 11:45:22 -04:00
Juhyun \(Justin\) Oh
2c011847c1 Fix wrong sdhci host control register read and write
The patch fixes the improper read and write of sdhci
host control register for sdma transfer.

The problem comes when reading and writing 1 byte long
host control register with the sdhci_readl() and
sdhci_writel(). The misuse of these functions overwrite
the value of the next registers which are in 4 bytes boundary.

This patch replaces four byte register read/write functions
with one byte read/write ones. Beside, it eliminates
unnecessary bit operation. i.e. or-ing zero against a variable.

Signed-off-by: Juhyun (Justin) Oh <Juhyun_Oh@sigmadesigns.com>
2013-09-20 19:02:29 +03:00
Mischa Jonker
21bd5761a6 mmc/dw_mmc: Allocate the correct amount of descriptors
This fixes two issues:
 * a descriptor was allocated for every block, while a descriptor can
   take 8 blocks
 * there was an off-by-one error in the descriptor preparation: there
   were two last descriptors, one with length==0

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Andy Fleming <afleming@gmail.com>
2013-09-20 18:59:11 +03:00
Mischa Jonker
2136d22630 mmc/dw_mmc: Fix DMA descriptor corruption
In dwmci_prepare_data, the descriptors are allocated for DMA transfer.
These are allocated using the ALLOC_CACHE_ALIGN_BUFFER. This macro uses
the stack to allocate these descriptors. This becomes a problem if the
DMA transfer continues after the processor leaves the function in which
the descriptors were allocated.

Therefore, I have moved the allocated of the buffers up one level, to
dwmci_send_cmd(). The DMA transfer should be complete when leaving this
function.

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Andy Fleming <afleming@gmail.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-09-20 18:59:11 +03:00
Paul Burton
da61fa5f42 mmc: don't support write & erase for SPL builds
For SPL builds this is just dead code since we'll only need to read.
Eliminating it results in a significant size reduction for the SPL
binary, which may be critical for certain platforms where the binary
size is highly constrained.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-09-20 18:58:55 +03:00
Fabio Estevam
3f786a8b6f mmc: fsl_esdhc: Check the result from malloc()
malloc can fail, so we should better check its return value before using it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-09-20 17:55:36 +02:00
Paul Burton
5619682664 mmc: don't call *printf or puts when SPL & !CONFIG_SPL_LIBCOMMON_SUPPORT
If we don't have CONFIG_SPL_LIBCOMMON_SUPPORT defined then stdio
& *printf functions are unavailable & calling them will cause a link
failure.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-09-17 20:03:44 +03:00
Lubomir Popov
152ba36362 ARM: OMAP: Enable 8-bit eMMC access for OMAP4/5/DRA7xx
Enable 8-bit host capability for HSMMC2 and/or HSMMC3. CONFIG_HSMMC2_8BIT
(for OMAP4/5/DRA7xx) and/or CONFIG_HSMMC3_8BIT (for DRA7xx only) must be
defined in the board header if an 8-bit eMMC device is connected to the
corresponding port.

Fix the "No status update" error that appeared for eMMC devices by
inserting a 20 us delay between writing arguments and command. This
solution has been proposed by Michael Cashwell <mboards@prograde.net>.

A minor cosmetic fix in a comment as well.

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
2013-09-17 20:03:44 +03:00
Oleksandr Tyshchenko
61a6cc27bc omap_hsmmc: omap4+/am335x: modify MMC controller internal fsm reset func
"mmc_send_cmd: timeout: No status update" error sometimes happens in
omap_hsmmc driver func mmc_send_cmd() when the MMC controller card
identification and selection sequence is executed for eMMC on OMAP4
boards.

It happens due to incorrect execution of CMD line reset procedure
for OMAP4. Because CMD(DAT) lines reset procedures are slightly
different for OMAP3 and OMAP4(AM335x,OMAP5,DRA7xx).

According to OMAP3 TRM:
Set SRC(SRD) bit in MMCHS_SYSCTL register to 0x1 and wait until
it returns to 0x0.

According to OMAP4(AM335x,OMAP5,DRA7xx) TRMs, CMD(DATA) lines reset
procedure steps must be as follows:
1. Initiate CMD(DAT) line reset by writing 0x1 to SRC(SRD) bit in
   MMCHS_SYSCTL register (SD_SYSCTL for AM335x).
2. Poll the SRC(SRD) bit until it is set to 0x1.
3. Wait until the SRC(SRD) bit returns to 0x0
  (reset procedure is completed).

Unfortunately, at present omap_hsmmc driver has support only for
OMAP3. And as result step #2 is missing for OMAP4(AM335x,OMAP5,DRA7xx).
This sometimes leads to the fact that the waiting loop which is
required in step #3 does not executed, because SRC bit does not set
yet (at the moment of checking a condition of a loop execution).
And as a result this can cause to timeout error when sending a
next command.

In the particular case (working with eMMC witch do not respond to
some SD specific command) due to incorrect reset sequence after
command SD_CMD_SEND_IF_COND which finished with CTO flag within
64 clock cycles, the next command MMC_CMD_APP_CMD leads to a
timeout error within 1s.

So, extend CMD(DATA) lines reset procedure in func
mmc_reset_controller_fsm() by adding the missing step #2 for
OMAP4+/AM335x boards.

Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-09-17 20:03:44 +03:00
Oleksandr Tyshchenko
c30054ba94 mmc: Remove unused variable backup from mmc_send_cmd()
Do not call a memset for unused variable backup every time.
Remove unused variable from function.

Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-09-17 20:03:44 +03:00
Jaehoon Chung
113e5dfcd7 mmc: sdhci: use the SDHCI_QUIRK_USE_WIDE8 for samsung SoC
Samsung SoC is supported the WIDE8, even if Controller version is v2.0.
So add the SDHCI_QUIRK_USE_WIDE8 for Samsung-SoC.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-09-17 20:03:43 +03:00
Albert ARIBAUD
19d829fa60 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts:
	drivers/serial/serial.c

The conflict above was a trivial case of adding one init
function in each branch, and manually resolved in merge.
2013-09-05 11:15:26 +02:00
Amaury Pouly
49b0415a80 mmc: mxsmmc: Enable MMC HC support
Enable support for high-capacity eMMC and MMC cards. The MXS MMC
driver has no problem with those.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Amaury Pouly <amaury.pouly@gmail.com>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
2013-08-23 15:53:21 +02:00
York Sun
bf90256623 SPDX-License-Identifier: clean up license header
This patch cleans up license header in these files:
	board/freescale/p1022ds/spl.c
	drivers/mmc/fsl_esdhc_spl.c
	drivers/mtd/spi/fsl_espi_spl.c

Signed-off-by: York Sun <yorksun@freescale.com>
2013-08-20 10:15:37 -07:00
Ying Zhang
bb0dc1084f powerpc: mpc85xx: Support booting from SD Card with SPL
The code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.

The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are two stage uboot images:
	* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that
	ddr spd code can get the interleaving mode setting in env. It loads
	final uboot image from offset 96KB.
	* final uboot image, size is variable depends on the functions enabled.

Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-20 09:47:26 -07:00
Tom Rini
aaf5e82560 Merge branch 'master' of git://git.denx.de/u-boot-nds32 2013-07-25 08:51:51 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Gabor Juhos
dbb713baa6 mmc: ftsdc010_mci: fix build error if CONFIG_FTSDC010_SDIO is not defined
The FTSDC010_DCR_FIFO_RST symbol is conditionally
defined in <faraday/ftsdc010.h> and it is available
available when CONFIG_FTSDC010_SDIO is enabled.

However the actual driver code unconditionally uses
the FTSDC010_DCR_FIFO_RST constant and this causes
build error if CONFIG_FTSDC010_SDIO is not enabled.

The following error happens when compiling for the
adp-ag101 board:

  ftsdc010_mci.c: In function 'ftsdc010_request':
  ftsdc010_mci.c:178: error: 'FTSDC010_DCR_FIFO_RST' undeclared (first use in this function)
  ftsdc010_mci.c:178: error: (Each undeclared identifier is reported only once
  ftsdc010_mci.c:178: error: for each function it appears in.)

The patch ensures that the FTSDC010_DCR_FIFO_RST
symbol gets used only if CONFIG_FTSDC010_SDIO is
defined.

Compile tested only.

Cc: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Reviewed-by: Kuo-Jung Su <dantesu@faraday-tech.com>
2013-07-24 11:49:17 +08:00
Dirk Behme
a61da72bda fsl_esdhc: Touch only relevant sys ctrl bits
Dealing with the sys ctrl register should touch only the
relevant bits and not accidently the whole register. On i.MX6,
the sys control register contains bits which shouldn't be reset to
0, e.g. SYS_CTRL[3-0] and IPP_RST_N (SYS_CTRL[23]).

Do this by read/modify/write instead of just a 32bit write.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-07-16 18:44:23 -05:00
Alexey Brodkin
ca6d4d0f8f drivers/mmc/dw_mmc - remove extra arch specific "asm/arch/clk.h" inclusion
1. No contents of "asm/arch/clk.h" is used within "dw_mmc.c".
2. If arch doesn't have "asm/arch/clk.h" driver won't build.

Without mentioned inclusion dw_mmc driver could be built for arches
other than ARM. For ARM driver still builds without it.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Amar <amarendra.xt@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-07-16 18:44:22 -05:00
Haijun.Zhang
b8e5b07225 Powerpc: eSDHC: Fix mmc read write err in uboot of T4240QDS board
Fill the right command type when using CMD12 to stop data transfer.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
CC: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-07-16 18:44:22 -05:00
Sascha Silbe
ff8fef5666 Fix block device accesses beyond 2TiB
With CONFIG_SYS_64BIT_LBA, lbaint_t gets defined as a 64-bit type,
which is required to represent block numbers for storage devices that
exceed 2TiB (the block size usually is 512B), e.g. recent hard drives.

For some obscure reason, the current U-Boot code uses lbaint_t for the
number of blocks to read (a rather optimistic estimation of how RAM
sizes will evolve), but not for the starting address. Trying to access
blocks beyond the 2TiB boundary will simply wrap around and read a
block within the 0..2TiB range.

We now use lbaint_t for block start addresses, too. This required
changes to all block drivers as the signature of block_read(),
block_write() and block_erase() in block_dev_desc_t changed.

Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
2013-06-26 10:26:06 -04:00
Tom Rini
348e47f766 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-06-22 07:38:12 -04:00
Albert ARIBAUD
69f14dc2fd Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Conflicts:
	spl/Makefile
2013-06-19 12:53:59 +02:00
Rajeshwari Shinde
ed7bdc03eb MMC: DWMMC: Fix FIFO_DEPTH calculation
Current DWMMC driver used to give FIFO underrun/overrun error every 3rd time
for mmc rescan command.
In current code FIFO_DEPTH is getting calculated after reading the default FIFOTH
register and extracting the RX_WMARK bits from it i.e (RX_WMARK = FIFO_DEPTH/2 -1).
Instead of storing the correct value, we were recalculating the FIFO_DEPT each
time which is not correct.

Based on "[PATCH V9 3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues"
http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/160247

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-17 11:03:42 +09:00
Tom Rini
dfdb3d37dd Merge branch 'master' of git://www.denx.de/git/u-boot-mmc 2013-06-14 16:06:49 -04:00
Stephen Warren
f866a46d6e mmc: report capacity for the selected partition
Enhance the MMC core to calculate the size of each MMC partition, and
update mmc->capacity whenever a partition is selected. This causes:

mmc dev 0 1 ; mmcinfo

... to report the size of the currently selected partition, rather than
always reporting the size of the user partition.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-13 16:52:19 -05:00
Andrew Gabbasov
01b77353e4 fsl_esdhc: Do not clear interrupt status bits until data processed
After waiting for the command completion event, the interrupt status
bits, that occured to be set by that time, are cleared by writing them
back. It is supposed, that it should be command related bits (command
complete and may be command errors).

However, in some cases the DMA already completes by that time before
the full transaction completes. The corresponding DINT bit gets set
and then cleared before even entering the loop, waiting for data part
completion. That waiting loop never gets this bit set, causing the
operation to hang. This is reported to happen, for example, for write
operation of 1 sector to upper area (block #7400000) of SanDisk Ultra II
8GB card.

The solution could be to explicitly clear only command related interrupt
status bits. However, since subsequent processing does not rely on
any command bits state, it could be easier just to remove clearing
of any bits at that point, leaving them all until all data processing
completes. After that the whole register will be cleared at once.

Also, on occasion, interrupts masking moved to before writing the command,
just for the case there should be no chance of interrupt between the first
command and interrupts masking.

Reported-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-13 16:52:19 -05:00
Fabio Estevam
c2137b10a4 mmc: fsl_esdhc: Fix hang after 'save' command
Since commit 48e0b2bd (powerpc/esdhc: Correct judgement for DATA PIO mode)
we see mx6 systems to hang after doing a 'save' command.

Revert this commit since the original 'ifdef' logic from 7b43db92
(drivers/mmc/fsl_esdhc.c: fix compiler warnings) was the correct one.

Reported-by: Tapani Utriainen <tapani@technexion.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-13 16:52:19 -05:00
Ruud Commandeur
a586c0aa21 mmc write bug fix
This patch fixes a bug related to mmc writes.

When doing fatwrites on an SD-Card, MMC bus problems can occur. Depending
on the size of the file, "MMC0: Bus busy timeout!" is reported, resulting
in an SD-Card that is no longer responding.
It appears to be, that set_cluster can be called with a size being zero.
That can be with a file that has a size being an exact multiple
(including 0) of the clustersize, but also for files that are smaller than
the size of one cluster.
The same problem occurs if the "mmc write" command is given with a block
count being 0.

By adding a check for the block count being zero in mmc_write_blocks
(drivers/mmc.c), this problem is solved.

Signed-off-by: Ruud Commandeur <rcommandeur@clb.nl>
Cc: Tom Rini <trini@ti.com>
Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Mats Karrman <Mats.Karrman@tritech.se>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-13 16:46:57 -05:00
Jagannadha Sutradharudu Teki
1695b29a5d mmc: sdhci: Enable 8-bit bus width only for 3.0 spec onwards
CAP register don't have any information for 8-bit buswidth support
on 2.0 sdhci spec, only from 3.0 onwards bit[18] got this information.

Due to this misassignment in sdhci, mmc is setting 8-bit buswidth using
mmc_set_bus_width even if controller doesn't support.
Below change has code information.
"mmc: Properly determine maximum supported bus width"
(sha1: 7798f6dbd5)

Bug log: <mmc plus and emmc cards)
-------
zynq-uboot> mmcinfo
Error detected in status(0x208100)!
Device: zynq_sdhci
Manufacturer ID: fe
.....

So enable 8-bit support only for 3.0 spec using CAP and for below 3.0
assign mmc->host_caps = MMC_MODE_8BIT on respective platform driver
if host have a support.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-13 16:44:49 -05:00
Amar
3690d6d66b MMC: APIs to support resize of EMMC boot partition
This patch adds APIs to access(open / close) and to resize boot partiton of EMMC.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-13 17:35:14 +09:00
Amar
a082a2dde0 EXYNOS5: DWMMC: Added FDT support for DWMMC
This patch adds FDT support for DWMMC, by reading the DWMMC node data
from the device tree and initialising DWMMC channels as per data
obtained from the node.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-13 17:35:14 +09:00
Amar
9c50e35ff2 DWMMC: Initialise dwmci and resolve EMMC read write issues
This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence modified the fifo size
computation to resolve EMMC read write issues.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-13 17:35:13 +09:00
Balaji T K
a5d439c2d3 mmc: omap_hsmmc: Update pbias programming
Update pbias programming sequence for OMAP5 ES2.0/DRA7

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10 08:43:10 -04:00
Albert ARIBAUD
a19b0dd62d Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	common/cmd_fpga.c
	drivers/usb/host/ohci-at91.c
2013-05-30 14:45:06 +02:00
Haijun.Zhang
48e0b2bd2b powerpc/esdhc: Correct judgement for DATA PIO mode
The logic for the whether to configure for polling or DMA
was mistakenly reversed in this patch:

Commit 7b43db9211
drivers/mmc/fsl_esdhc.c: fix compiler warnings

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
CC: Sun Yusong-R58495 <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-15 18:18:16 -05:00
Kuo-Jung Su
f6c3b34697 mmc: update Faraday FTSDC010 for rw performance
Faraday FTSDC010 is a MMC/SD host controller.
Although there is already a driver in current u-boot release,
which is modified from eSHDC and contributed by Andes Tech.
Its performance is too terrible on Faraday A36x SoC platforms,
so I turn to implement this new version of driver which is
10+ times faster than the old one.

It's carefully designed to be compatible with Andes chips,
so it should be safe to replace it.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-15 18:18:15 -05:00
Ying Zhang
ade8a1a6d3 drivers/mmc: move spl_mmc.c to common/spl
The mpc85xx repuires a special layout on the memory device that is
connected to the eSDHC controller interface. But the file spl_mmc.c
didn't handle this specfic case, there needs a special treatmen, in
the powerpc drictory. So, there is no longer to keep spl_mmc.c on
mpc85xx, CONFIG_SPL_FRAMEWORK is not set.

When CONFIG_SPL_MMC_SUPPORT is set and CONFIG_SPL_FRAMEWORK is not
set, there was an error in drivers/mmc/spl_mmc.c:

drivers/mmc/libmmc.o:(.got2+0x8): undefined reference to `spl_image'.

Now, the solution is to move the file "spl_mmc.c" to directory "common/spl".

Signed-off-by: Ying Zhang <b40530@freescale.com>
2013-05-15 08:41:03 -04:00
Bo Shen
93e3236ccb mmc: atmel_mci: add mmc card support
add mmc card support with atmel mci driver

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-12 16:48:11 +02:00
Bo Shen
aac4b69b2c mmc: atmel_mci: using IP version for different setting
Using IP version for different setting
  - Higher version supports 8bit mode
  - Higher version bus width setting is different

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-05-12 16:47:05 +02:00
Albert ARIBAUD
cac423a730 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2013-05-11 22:24:28 +02:00
Albert ARIBAUD
ec7023db8d Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts:
	drivers/mtd/nand/mxc_nand_spl.c
	include/configs/m28evk.h
2013-05-11 09:25:36 +02:00
Albert ARIBAUD
e825b100d2 Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master' 2013-05-11 00:06:03 +02:00
Nishanth Menon
384bcae013 palmas: rename twl6035_mmc1_poweron_ldo with an palmas generic function
Since TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs,
rename twl6035_mmc1_poweron_ldo by a more generic palmas_mmc1_poweron_ldo
function.

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-05-10 08:25:55 -04:00
Nishanth Menon
cb199102b0 twl6035: rename to palmas
TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs
Rename twl6035 to palmas to allow reuse across multiple current and
future platforms

As part of this change, change the CONFIG_TWL6035_POWER to
CONFIG_PALMAS_POWER and update usage of header file accordingly.

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-05-10 08:25:54 -04:00
Fabio Estevam
88227a1d8a mmc: fsl_esdhc: Use calloc()
A malloc() followed by memset() can be simply replaced by calloc().

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-06 16:26:25 -05:00
Jaehoon Chung
a68aac4947 mmc: sdhci: return error when failed add_sdhci().
If failed the add_host(), it is reasonable that return value of
add_sdhci().

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-06 16:26:24 -05:00
Vipin Kumar
1f4ca2547c sdhci: Add sdhci support for spear devices
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-06 16:26:24 -05:00
Davide Bonfanti
3ba36d603a davinci, mmc: Added a delay reading ext CSD register
Without this additional delay, some eMMC don't negotiate properly bus width
Tested on:
 - Toshiba THGBM2G8D8FBAIB
 - Toshiba THGBM4G4D1HBAR
 - Micron MTFC4GMVEA (the one giving the problem)
 - Hynix H26M64002BNR
 - SanDisk SDIN5E1-32G

Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-06 16:26:24 -05:00
Che-Liang Chiou
e95504497e mmc: Split device init to decouple OCR-polling delay
Most of time that MMC driver spends on initializing a device is polling
OCR (operation conditions register).  To decouple this polling loop,
device init is split into two parts: The first part fires the OCR query
command, and the second part polls the result.  So the caller is now no
longer bound to the OCR-polling delay; he may fire the query, go
somewhere and then come back later for the result.

To use this, call mmc_set_preinit() on any device which needs this.

This can save significant amounts of time on boot (e.g. 200ms) by
hiding the MMC init time behind other init.

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-06 16:12:38 -05:00
Egbert Eich
0472fbfd32 part/dev_desc: Add log2 of blocksize to block_dev_desc data struct
log2 of the device block size serves as the shift value used to calculate
the block number to read in file systems when implementing avaiable block
sizes.
It is needed quite often in file systems thus it is pre-calculated and
stored in the block device descriptor.

Signed-off-by: Egbert Eich <eich@suse.com>
2013-05-01 16:24:02 -04:00
Simon Glass
8bfa195e4e mmc: Define a constant for the maximum block size
The number 512 appears quite a bit in the mmc code. Add a constant for this
so that it can be used here and in other parts of the code (e.g. SPL code
which loads from mmc).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@google.com>
2013-05-01 16:24:01 -04:00
Peter Korsgaard
2e222105c5 spl_mmc: cleanup variable types
block_read returns unsigned long, so it doesn't make sense to check for
< 0. and neither does marking the header structure as const and then
casting away the constness to load data into it.

Also cleanup some unneeded pointer casting while we're at it.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-05-01 16:24:00 -04:00
Michal Simek
293eb33fcb mmc: Add support for Xilinx Zynq sdhci controller
Add support for SD, MMC and eMMC card on Xilinx Zynq.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-04-30 11:39:27 +02:00
Stefan Roese
0499218dbc imx: Move some header files from arch-mxs to imx-common
The following headers are moved to a i.MX common location:

- regs-common.h
- regs-apbh.h
- regs-bch.h
- regs-gpmi.h
- dma.h

This way this header can be re-used also by other i.MX platforms.
For example the i.MX6 which will need it for the upcoming NAND
support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2013-04-22 10:22:22 +02:00
Jaehoon Chung
1741c64d64 mmc: check the revision for sd3.0
Support to check whether the SD3.0 or not.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Rommel Custodio <sessyargc@gmail.com>
2013-04-17 10:58:51 -04:00
Jaehoon Chung
64f4a6192f mmc: support the correct card version for eMMC
eMMC vesrion is supported up to v4.5.
But bootloader isn't saw the exact eMMC version.
After applied this patch,
if use the mmcinfo command, then can see the exactly mmc version.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Rommel Custodio <sessyargc@gmail.com>
2013-04-17 10:58:51 -04:00
Albert ARIBAUD
345be0b267 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-04-14 11:45:06 +02:00
Andrew Gabbasov
9b74dc56fb fsl_esdhc: Fix DMA transfer completion waiting loop
Rework the waiting for transfer completion loop condition
to continue waiting until both Transfer Complete and DMA End
interrupts occur. Checking of DLA bit in Present State register
looks not needed in addition to interrupts status checking,
so it can be removed from the condition. Also, DMA Error
condition is added to the list of data errors, checked in the loop.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2013-04-14 11:22:47 +02:00
Eric Nelson
54899fc8fe fsl_esdhc: flush cache after IO completion
The cache should invalidate the read buffer for
the SD card interface after the transfer complete,
not command-complete.

Tested-by: Andrew Gabbasov <Andrew_Gabbasov@mentor.com>
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-04-14 11:20:53 +02:00
Albert ARIBAUD
be08abc242 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-04-04 11:49:32 +02:00
Stephen Warren
5eaa215607 ARM: bcm2835: fix get_timer() to return ms
Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer
driver to conform to this.

Have the timer implementation export a custom API get_timer_us() for use
by the BCM2835 MMC API, which needs us resolution for a HW workaround.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-04-04 08:14:54 +02:00
Abbas Raza
aad4659a2f mmc: i.MX6: fsl_esdhc: Define maximum bus width supported by a board
Maximum bus width supported by some i.MX6 boards is not 8bit like
others. In case where both host controller and card support 8bit transfers,
they agree to communicate on 8bit interface while some boards support only 4bit interface.
Due to this reason the mmc 8bit default mode fails on these boards. To rectify this,
define maximum bus width supported by these boards (4bit). If max_bus_width is not
defined, it is 0 by default and 8bit width support will be enabled in host
capabilities otherwise host capabilities are modified accordingly.

It is tested with a MMCplus card.

Signed-off-by: Abbas Raza <Abbas_Raza@mentor.com>
cc: stefano Babic <sbabic@denx.de>
cc: Andy Fleming <afleming@gmail.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2013-04-03 11:26:28 +02:00
Albert ARIBAUD
412665b461 Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2013-03-26 09:51:09 +01:00
Peter Korsgaard
173ddc5b68 mmc: omap_hsmmc.c: only register getcd/getwp callbacks if gpio could be used
Gets rid of warnings from omap_gpio:
ERROR : check_gpio: invalid GPIO -1

(and undefined behaviour as the -1 error code is interpreted as gpio value)

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
2013-03-24 12:49:12 -04:00
Peter Korsgaard
d4e1da4e09 mmc: mmc_getcd/getwp: use sensible defaults
Let mmc_getcd() return true and mmc_getwp() false if mmc driver doesn't
provide handlers for them.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Add braces around first if test in each case to fix warning]
Signed-off-by: Tom Rini <trini@ti.com>
2013-03-24 12:49:12 -04:00
Stephen Warren
9a4fbe4fbd mmc: add bcm2835 driver
This adds a simple driver for the BCM2835's SD controller.

Workarounds are implemented for:
* Register writes can't be too close to each-other in time, or they will
  be lost.
* Register accesses must all be 32-bit, so implement custom accessors.

This code was extracted from:
git://github.com/gonzoua/u-boot-pi.git master
which was created by Oleksandr Tymoshenko.

Portions of the code there were obviously based on the Linux kernel at:
git://github.com/raspberrypi/linux.git rpi-3.6.y
commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley.

swarren changed the following for upstream:
* Removed hack udelay()s in bcm2835_sdhci_raw_writel(); setting
  SDHCI_QUIRK_WAIT_SEND_CMD appears to solve the issues.
* Remove register logging from read*/write* functions.
* Sort out confusion with min/max_freq values passed to add_sdhci().
* Use more descriptive variable names and calculations in IO accessors.
* Simplified and commented twoticks_delay calculation.
* checkpatch fixes.

Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Andy Fleming <afleming@gmail.com>
2013-03-20 15:31:25 +01:00
Albert ARIBAUD
b27673ccbd Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master' 2013-03-15 20:50:43 +01:00
Albert ARIBAUD
6579d15c58 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-03-15 15:18:31 +01:00
Tom Warren
2d348a1652 mmc: Tegra: Add SD bus power/voltage function and MMC pad init call.
Tegra30 requires the SD Bus Voltage & Power bits be set in the SD
Power Control register. Tegra20 works w/o them set, but do it anyway
for those SoCs as it's part of the SD spec. Also call a common
board pad init routine (pad_init_mmc) in mmc_reset(), used by
Tegra30 only for now.

Note that Tegra20 SD/MMC HW differs enough from Tegra20 that a
new compatible entry is used in the fdt compat_names/id tables.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:44 -07:00
Tom Warren
c9aa831ee2 Tegra: MMC: Add DT support to MMC driver for all T20 boards
tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc.
Tested on Seaboard, fully functional.

Tamonten boards (medcom-wide, plutux, and tec) use a different/new
dtsi file w/common settings.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:42 -07:00
Łukasz Majewski
ce0c1bc135 mmc:sdhci:fix: Change default interrupts enabled at SDHCI initialization
This patch changes sdhci_init()'s behavior to NOT enable all interrupt
sources by default. Moreover interrupt signaling has been disabled.

This patch do not enable interrupts which aren't served in u-boot
(they are defined at sdhci.h but NOT used elsewhere):
- SDHCI_INT_CARD_INSERT, SDHCI_INT_CARD_REMOVE, SDHCI_BUS_POWER,
  SDHCI_INT_CARD_REMOVE, SDHCI_INT_CARD_INT

Special care shall be put on SDHCI_INT_CARD_INT, which indicates
interrupt generated by SD card.
According to "SD Host Controller Simplified Spec. ver 3.00" when bit 8
(Card Interrupt Status Enable) at "Normal Interrupt Status Enable
Register" (offset 0x34) is set, the card interrupt detection is started.
Then eMMC card may cause the SD controller to set this bit and then this
interrupt is passed to booted OS and might cause kernel crash.

To sum up:
- Only enable interrupts, which are served at u-boot
- This cleanup as a side effect fixes SDHCI's CARD INTERRUPT problem at
  Linux kernel (versions 3.6+, sdhci controller)
- Keep masked bits at "Normal Interrupt Signal Enable Register" (0x38h)

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-03-12 19:50:49 +09:00
Tom Rini
76b40ab41e Merge u-boot/master into u-boot-ti/master
In master we had already taken a patch to fix the davinci GPIO code for
CONFIG_SOC_DM646X and in u-boot-ti we have additional patches to support
DA830 (which is CONFIG_SOC_DA8XX && !CONFIG_SOC_DA850).  Resolve these
conflicts manually and comment the #else/#endif lines for clarity.

Conflicts:
	arch/arm/include/asm/arch-davinci/gpio.h
	drivers/gpio/da8xx_gpio.c

Signed-off-by: Tom Rini <trini@ti.com>
2013-03-11 12:16:13 -04:00
Lokesh Vutla
c43c8339fe ARM: OMAP4+: Make control module register structure generic
A seperate omap_sys_ctrl_regs structure is defined for
omap4 & 5. If there is any change in control module for
any of the ES versions, a new structure needs to be created.
In order to remove this dependency, making the register
structure generic for all the omap4+ boards.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:10 -04:00
Nikita Kiryanov
e3913f56a2 omap_hsmmc: add driver check for write protection
Add check for write protection in omap mmc driver.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-08 16:41:13 -05:00
Nikita Kiryanov
d23d8d7e06 mmc: add support for write protection
Add generic mmc write protection functionality.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2013-03-08 16:41:13 -05:00
Nikita Kiryanov
e874d5b001 omap_hsmmc: implement driver check for card detection
Implement driver check for card detection.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2013-03-08 16:41:13 -05:00
Nikita Kiryanov
cc22b0c012 omap_hsmmc: introduce omap_hsmmc_data struct
Currently there's no appropriate place to store driver specific data
because the pointer that is meant for that (priv) is being used to
store the base address of mmc registers.

Introduce a new struct for storing driver specific data.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2013-03-08 16:41:13 -05:00
Nikita Kiryanov
5964dadd03 omap_hsmmc: fix out of bounds array access
There are 3 MMC/SD/SDIO controllers in OMAP SoCs, but only 2 structs
are defined for devices. This leads to data being written outside of
array bounds on systems that use all 3 controllers.

Update hsmmc_dev array to the correct size.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2013-03-08 16:41:12 -05:00
Marek Vasut
3430e0bd2a mxs: mmc: spi: dma: Better wrap the MXS differences
This patch streamlines the differences between the MX23 and MX28 by
implementing a few helper functions to handle different DMA channel
mapping, different clock domain for SSP block and fixes a few minor
bugs.

First of all, the DMA channel mapping is now fixed in dma.h by defining
the actual channel map for both MX23 and MX28. Thus, MX23 now does no
longer use MX28 channel map which was wrong. Also, there is a fix for
MX28 DMA channel map, where the last four channels were incorrect.

Next, because correct DMA channel map is in place, the mxs_dma_init_channel()
call now bases the channel ID starting from SSP port #0. This removes the
need for DMA channel offset being added and cleans up the code. For the
same reason, the SSP0 offset can now be used in mxs_dma_desc_append(), thus
no need to adjust dma channel number in the driver either.

Lastly, the SSP clock ID is now retrieved by calling mxs_ssp_clock_by_bus()
which handles the fact that MX23 has shared SSP clock for both ports, while
MX28 has per-port SSP clock.

Finally, the mxs_ssp_bus_id_valid() pulls out two implementations of the
same functionality from MMC and SPI driver into common code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2013-03-07 17:22:56 +01:00
Sonic Zhang
187f32fac3 blackfin: bf60x: add rsi/sdh support
Add rsi/sdh support for bf60x.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
2013-03-04 13:42:07 +08:00
Tom Rini
951c6baaf4 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-02-12 10:18:31 -05:00
Simon Glass
e9adeca3fc ppc: arm: Move sdhc_clk into arch_global_data
This is used by both powerpc and arm, but I think it still qualifies as
architecture-specific.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:44 -05:00
Marek Vasut
e5b380ac68 mxs: mmc: Fix the MMC driver for MX23
The MX23 has different layout of DMA channels. Fix the MMC
driver to support MX23.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-28 11:43:01 +01:00
Marek Vasut
90bc2bf297 mxs: mmc: Allow overriding default card detect implementation
Some MXS based boards do not implement the card-detect signal. Allow
user to specify alternate card-detect implementation.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-28 11:43:01 +01:00
Otavio Salvador
8000d8a826 mxs: mmc: Fix MMC reset on iMX23
This does the same reset mask as done in v3.7 Linux kernel code.
The block is properly configured for MMC operation that way.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-28 11:43:01 +01:00
Marek Vasut
1a3c5ffe4f mmc: Limit the number of used SSP ports on MX23
The MX23 can only use two SSP ports.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:21 +01:00
Otavio Salvador
bf48fcb61b mxs: clock: Use 'mxs' prefix for methods
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:20 +01:00
Marek Vasut
14e26bcfa7 mxs: ssp: Pull out the SSP bus to regs conversion
Create function which converts SSP bus number to SSP register pointer.
This functionality is reimplemented multiple times in the code, thus
make one common implementation. Moreover, make it a switch(), since the
SSP ports are not mapped in such nice linear fashion on MX23, therefore
having it a switch will simplify things there.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:19 +01:00
Marek Vasut
59b6defa2b mxs: mmc: Drop unused members from struct mxsmmc_priv
The clock data are not used by the driver, drop them.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:19 +01:00
Albert ARIBAUD
7528cf5f01 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-01-08 14:59:37 +01:00
Shawn Guo
fb8302bfc5 fsl_esdhc: add MMC_MODE_HC host_caps
All esdhc variants we know should support high capacity MMC cards,
so let's add MMC_MODE_HC host_caps unconditionally to support those
MMC cards (capacity > 2 GB).

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-01-05 17:56:42 +01:00
Minkyu Kang
2c601c7208 Merge branch 'master' of git://git.denx.de/u-boot into resolve
Conflicts:
	README
	board/samsung/universal_c210/universal.c
	drivers/misc/Makefile
	drivers/power/power_fsl.c
	include/configs/mx35pdk.h
	include/configs/mx53loco.h
	include/configs/seaboard.h
2012-12-10 14:13:27 +09:00
Andy Fleming
7798f6dbd5 mmc: Properly determine maximum supported bus width
At some point, a confusion arose about the use of the bit
definitions in host_caps for bus widths, and the value
in ext_csd. By coincidence, a simple shift could convert
between one and the other:

MMC_MODE_1BIT = 0, EXT_CSD_BUS_WIDTH_1 = 0
MMC_MODE_4BIT = 0x100, EXT_CSD_BUS_WIDTH_4 = 1
MMC_MODE_8BIT = 0x200, EXT_CSD_BUS_WIDTH_8 = 2

However, as host_caps is a bitmask of supported things,
there is not, in fact, a one-to-one correspondence. host_caps
is capable of containing MODE_4BIT | MODE_8BIT, so nonsensical
things were happening where we would try to set the bus width
to 12.

The new code clarifies the very different namespaces:

host_caps/card_caps = bitmask (MMC_MODE_*)
ext CSD fields are just an index (EXT_CSD_BUS_WIDTH_*)
mmc->bus_width integer number of bits (1, 4, 8)

We create arrays to map between the namespaces, like in Linux.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2012-11-27 17:48:46 -06:00
Stephen Warren
1981539914 mmc: tegra: use bounce buffer APIs
Tegra's MMC driver does DMA, and hence needs cache-aligned buffers. In
some cases (e.g. user load commands) this cannot be guaranteed by callers
of the MMC APIs. To solve this, modify the Tegra MMC driver to use the
new bounce_buffer_*() APIs.

Note: Ideally, all U-Boot code will always provide address- and size-
aligned buffers, so a bounce buffer will only ever be needed for user-
supplied buffers (e.g. load commands). Ensuring this removes the need
for performance-sucking bounce buffer cache management and memcpy()s.
The one known exception at present is the SCR buffer in sd_change_freq(),
which is only 8 bytes long. Solving this requires enhancing struct
mmc_data to know the difference between buffer size and transferred data
size, or forcing all callers of mmc_send_cmd() to have allocated buffers
using ALLOC_CACHE_ALIGN_BUFFER(), which while true in this case, is not
enforced in any way at present, and so cannot be assumed by the core MMC
code.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:49 -06:00
Stephen Warren
84d35b2863 common: rework bouncebuf implementation
The current bouncebuf API requires all parameters to be passed to both
bounce_buffer_start() and bounce_buffer_stop(). Modify the bouncebuf
start function to accept a state structure as a parameter, and only
require that state struct to be passed to the stop function. This
simplifies usage of the bounce buffer by clients.

Don't modify the data pointer, but rather store the temporary buffer in
this state struct. The bouncebuf code ensures that client code can
always use a single buffer pointer in the state structure, irrespective
of whether a bounce buffer actually had to be allocated.

Move cache management logic into the bounce buffer code, so that each
client doesn't have to duplicate this. I believe there's no need to
invalidate the buffer before a DMA operation, since flushing the cache
should prevent any write-backs.

Update the MXS MMC driver for this change.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:48 -06:00
Mela Custodio
688c2d140b mmc: add no simultaenous power and vdd
Bring in the code from Linux kernel.

Added to Linux kernel by:
commit e08c1694d9e2138204f2b79b73f0f159074ce2f5
Author: Andres Salomon <dilinger@queued.net>
Date:   Fri Jul 4 10:00:03 2008 -0700

Some HW balks when writing both voltage setting and power up at the same
time to SDHCI_POWER_CONTROL register.

Signed-off-by: Rommel G Custodio <sessyargc@gmail.com>
CC: Andy Fleming <afleming@freescale.com>

v2: fix attribution and SOB
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:48 -06:00
Taylor Hutt
babce5f64e mmc: Fix interpretation of MMC_CMD_ALL_SEND_CID
The interpretation of the data returned by the MMC_CMD_ALL_SEND_CID
command was incorrect with respect to the JEDEC Standard No. 84-A441.

This change makes the interpretation correct with respect to the
defined fields of the CID register.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:47 -06:00
Jaehoon Chung
d0ebbb8dfa EXYNOS: mmc: support DesignWare Controller for Samsung-SoC
Support DesignWare MMC Controller for Samsung Specific.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-11-27 17:26:47 -06:00
Stephen Warren
8c0ec0dbc4 mmc: tegra: support 4-bit operation too on 8-bit slots
If a board has all 8 data lines routed, the SD/MMC controller can still
operate in 4-bit (or presumably even 1-bit) mode. Adjust Tegra's MMC
driver to report the 4-bit capability even for 8-bit slots.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:41 -07:00
Tom Rini
6acc7c3cbc Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-11-05 07:42:00 -07:00
Kim Phillips
eafa90a16c drivers/mmc/fsl_esdhc.c: sparse fixes
fsl_esdhc.c:71:6: warning: symbol 'esdhc_xfertyp' was not declared. Should it be static?
fsl_esdhc.c:413:6: warning: symbol 'set_sysctl' was not declared. Should it be st

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:37 -07:00
Kim Phillips
fdbb873eb0 drivers/mmc/mmc.c: sparse fixes
mmc.c:137:5: warning: symbol 'mmc_send_cmd' was not declared. Should it be static?
mmc.c:203:5: warning: symbol 'mmc_send_status' was not declared. Should it be static?
mmc.c:247:5: warning: symbol 'mmc_set_blocklen' was not declared. Should it be static?
mmc.c:440:5: warning: symbol 'mmc_read_blocks' was not declared. Should it be static?
mmc.c:510:5: warning: symbol 'mmc_go_idle' was not declared. Should it be static?
mmc.c:532:1: warning: symbol 'sd_send_op_cond' was not declared. Should it be static?
mmc.c:597:5: warning: symbol 'mmc_send_op_cond' was not declared. Should it be static?
mmc.c:661:5: warning: symbol 'mmc_send_ext_csd' was not declared. Should it be static?
mmc.c:683:5: warning: symbol 'mmc_switch' was not declared. Should it be static?
mmc.c:705:5: warning: symbol 'mmc_change_freq' was not declared. Should it be static?
mmc.c:775:5: warning: symbol 'sd_switch' was not declared. Should it be static?
mmc.c:796:5: warning: symbol 'sd_change_freq' was not declared. Should it be static?
mmc.c:935:6: warning: symbol 'mmc_set_ios' was not declared. Should it be static?
mmc.c:953:6: warning: symbol 'mmc_set_bus_width' was not declared. Should it be static?
mmc.c:1108:26: warning: dubious: !x & y
mmc.c:960:5: warning: symbol 'mmc_startup' was not declared. Should it be static?
mmc.c:1243:5: warning: symbol 'mmc_send_if_cond' was not declared. Should it be s

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:37 -07:00
Albert ARIBAUD
f04821a8ca Merge remote-tracking branch 'u-boot-imx/master' 2012-10-27 11:43:17 +02:00
Albert ARIBAUD
4c25761337 Merge remote-tracking branch 'u-boot-atmel/master' 2012-10-26 07:54:25 +02:00
Jaehoon Chung
757bff49ba mmc: dw-mmc: support DesignWare MMC Controller
Support the DesginWare MMC Controller.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:56:25 -05:00
Marek Vasut
48cf9dc63c mmc: pxa: Remove the old non-generic PXA MMC driver
This driver is no longer used and it's remaining users were converted
to the new generic PXA MMC driver. Thus, remove this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:56:25 -05:00
Tushar Behera
13243f2eaf mmc: sdhci: Add a quirk to add delay during completion of sdhci_send_cmd
MMC host controller requires a delay between every sdhci_send_cmd()
execution. In s5p_mmc driver (s5p_sdhci replaces this driver), a delay
of 1000us was provided after every mmc_send_cmd() call. Adding a quirk
in current sdhci driver to replicate the behaviour.

Without this delay, MMC initialization on Origen board fails with
following error messages.

Timeout for status update!
mmc fail to send stop cmd

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:36 -05:00
Jaehoon Chung
804c7f4221 mmc: sdhci: add the DMA select for SDMA
In host-control register, DMA select bit field is present.
BUt in sdhci.c, didn't select for DMA.
if set CONFIG_MMC_SDMA, we need to set SDMA-select bit.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:36 -05:00
Jaehoon Chung
5d48e42247 mmc: sdhci: increase the timeout value for data transfer
Timeout value is tunable.
When run read/write operation, sometime returned the timeout error.
Because the timeout value is too short.
So increased the enough timeout value.
(This timeout value is used to prevent the infinite loop.)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:36 -05:00
Marek Vasut
d6b2e5085c mmc: Fix mmc_spi error on cmd->flags field
The recent removal of the cmd->flags field caused error in the
debuging code of mmc_spi. Fix this:

mmc_spi.c: In function 'mmc_spi_request':
mmc_spi.c:179:2: error: 'struct mmc_cmd' has no member named 'flags'

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:35 -05:00
Marek Vasut
49a627f8a1 MMC: Remove the MMC bounce buffer
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:35 -05:00
Marek Vasut
4e6d81d1a4 MMC: MXS: Convert MXS MMC driver to generic bounce buffer
Implement necessary code to use the generic bounce buffer routines
inside this driver. This replaces the MMC bounce buffer, which is
to be removed.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 02:53:35 -05:00
Wu, Josh
9924ca6e9b mmc: at91: use max timeout value. It will avoid some situation that timeout happened.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-10-17 11:29:52 +02:00
Wu, Josh
1db7377a70 mmc: at91: add multi block read/write support.
Since the at91sam9263, the mmc hardware support multi blocks read/write. So this driver enable it.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-10-17 11:28:54 +02:00
Benoît Thébaudeau
a2ac1b3a7d mxc: Fix SDHC multi-instance clock
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).

This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Andy Fleming <afleming@gmail.com>
2012-10-16 12:35:10 +02:00
Tom Warren
150c24936b Tegra20: Move some include files to arch-tegra for sharing with Tegra30
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.

All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Tom Rini
3f7f2414ef ARM: SPL: Convert davinci to CONFIG_SPL_FRAMEWORK
- Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs.
- Remove duplicated code.
- Add spl_boot_device() that returns the statically chosen boot device.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 11:20:10 -07:00
Tom Rini
47f7bcae8c SPL: Move the omap SPL framework to common/spl
Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL
framework, enable on all of the previously using boards.  We move the
spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/.  We leave
the NAND one in-place as we plan to replace it later in this series.

We use common/spl to avoid linker problems with respect to merging
constant strings in objects.   Otherwise all strings in common/ will be
linked in and kept which grows SPL in size too much.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:59 -07:00
Tom Rini
495dbd72dd Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-09-21 14:53:13 -07:00
Albert ARIBAUD
d193c1b6eb Merge remote-tracking branch 'u-boot-imx/master' 2012-09-21 00:26:19 +02:00
Tom Warren
29f3e3f248 Tegra: Change Tegra20 to Tegra in common code, prep for T30
Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.

Upcoming Tegra30 port will use common code/defines/names where possible.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2012-09-10 13:01:24 -07:00
Stephen Warren
29159057a1 mmc: detect boot sectors using EXT_CSD_BOOT_MULT too
Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT
bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such
devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set.

Note that the Linux kernel enables access to boot partitions solely based
on the value of EXT_CSD_BOOT_MULT; EXT_CSD_PARTITIONING_SUPPORT only
influences access to "general" partitions.

eMMC devices affected by this issue exist on various NVIDIA Tegra
platforms (and presumably many others too), such as Harmony (plug-in eMMC),
Seaboard, Springbank, and Whistler (plug-in eMMC).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Andy Fleming
95b01c47ed mmc: Remove incorrect cmd->flags usage
There were a couple of drivers that were actually using the flags
field of the cmd structure, despite the fact that no one ever
*set* that field. When we removed the field, those drivers failed
to compile. Replaced the references with the correct usage of
resp_type.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-06 15:23:13 -05:00
Marek Vasut
97ed12cedf MX28: MMC: Avoid DMA DCache race condition
This patch prevents dcache-related problem. The problem manifested
itself on the SPI driver, this is just a port to the MMC driver.

The scenario is the same. In case an "mmc read" is issued to a
buffer which was written right before it and data cache is enabled,
the cache eviction might happen during the DMA transfer into the
buffer, therefore corrupting the buffer. Clear any cache lines that
might contain the buffer to prevent such issue.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2012-09-06 14:17:55 +02:00
Jaehoon Chung
b09ed6e4fe mmc: s5p_sdhci: add the set_mmc_clk for cmu control
Samsung SoC use the cmu control to set clock.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05 17:33:26 -05:00
Jaehoon Chung
8458e0283f mmc: s5p_sdhci: fixed wrong function argument
Useless code is removed, and get buswidth value.
buswidth value will be used to choice the 4bit or 8bit.
(Now used 4bit mode in sdhci.c by default)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05 17:33:26 -05:00
Jaehoon Chung
b268660ced mmc: s5p_sdhci: set the SDHCI_QUIRK_BROKEN_R1B
Samsung SoC is broken busy waiting for R1b type.
And clk delay control value is modified the previosuly value.
(that value used at the s5p_mmc.c)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05 17:33:26 -05:00
Joe Hershberger
470dcc7511 mmc: Add a SDHCI quirk for boards that have no CD
Some boards have no Card Detect wired.  In that case, set the CD test
bits in the standard interface.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05 17:33:25 -05:00
Joe Hershberger
073cfd1c04 mmc: Fix version check for clock API in sdhci driver
When setting up the clocks in the sdhci driver, the "spec version"
must be masked off.  Otherwise any time the vendor version is not 0,
the check will allways assume the interface is version 3.  This breaks
when the interface is actually version 1 or 2.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05 17:33:25 -05:00
Benoît Thébaudeau
6bb4b4bc35 mmc_get_dev: Return error if mmc_init fails
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05 17:32:42 -05:00
Stephen Warren
8948ea8302 mmc: detect boot sectors using EXT_CSD_BOOT_MULT too
Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT
bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such
devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set.

Note that the Linux kernel enables access to boot partitions solely based
on the value of EXT_CSD_BOOT_MULT; EXT_CSD_PARTITIONING_SUPPORT only
influences access to "general" partitions.

eMMC devices affected by this issue exist on various NVIDIA Tegra
platforms (and presumably many others too), such as Harmony (plug-in eMMC),
Seaboard, Springbank, and Whistler (plug-in eMMC).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05 17:32:41 -05:00
Mikhail Kshevetskiy
122efd4389 MMC: u-boot-spl may be compiled without partition support
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05 17:32:41 -05:00
Yoshihiro Shimoda
cdfd1ac6df mmc: fix capacity calculation when EXT_CSD_SEC_CNT is used
Since the type of "ext_csd" was array of char, the following
calculation might fail when the value of ext_csd[EXT_CSD_SEC_CNT]
was minus.

	capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
			| ext_csd[EXT_CSD_SEC_CNT + 1] << 8
			| ext_csd[EXT_CSD_SEC_CNT + 2] << 16
			| ext_csd[EXT_CSD_SEC_CNT + 3] << 24;

So, this patch changes the type of "ext_csd" to array of u8.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05 17:32:41 -05:00
Yoshihiro Shimoda
97a7b9928a mmc: sh_mmcif: enable MMC_MODE_HC
The controller can control high capacity cards. So, the patch adds
the flag. If the flag is not set, "mmcinfo" will fail when a high
capacity card is used.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05 17:32:41 -05:00
Jongman Heo
5b0c942f89 mmc: fix wrong timeout check in mmc_send_status()
(!timeout) condition check in mmc_send_status() can never be met,
because do-while loop ends up with negative timeout value, -1.

Fix the check to handle TIMEOUT case correctly.

Signed-off-by: Jongman Heo <jongman.heo@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05 17:32:41 -05:00
Kaspter Ju
67cbbf25c5 mmc: Remove unused item flags in struct mmc_cmd
Signed-off-by: Kaspter Ju <nigh0st3018@gmail.com>
2012-09-02 16:56:17 +02:00
Benoît Thébaudeau
16e43f354d fsl_esdhc: Remove cache snooping for i.MX
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() is used on i.MX, like in
arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init().

Since no_snoop was only used on i.MX, get rid of it BTW.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
2012-09-01 14:58:30 +02:00
Otavio Salvador
fa7a51cb82 mxs: Convert sys_proto.h prefixes to 'mxs'
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:25 +02:00
Allen Martin
00a2749d7b tegra20: rename tegra2 -> tegra20
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01 14:58:21 +02:00
John Rigby
10ed93dcdd u8500: Separating mmc config parameters from driver
Configuration in vexpress and u8500.v1 is different from what
is needed in u8500.v2.  As such, card configuration specifics need
to reside in the board file rather than the driver.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:20 +02:00
Marek Vasut
abb85be793 MX28: Fix MXS MMC DMA issues
The DMA didn't work properly because the DMA descriptor wasn't
properly cleaned after it was used once. Also, the DMA_ENABLE bit
was enabled/disabled too late.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-09-01 14:58:17 +02:00
Marek Vasut
20255900b9 MX28: Transfer small blocks via PIO in MXS MMC
Large blocks (> 512b) shall be transfered via DMA to make
things a bit faster.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-09-01 14:58:17 +02:00
Marek Vasut
869833285b MX28: Split out the PIO and DMA transfer functions
Move DMA and PIO data transfer parts into separate functions.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-09-01 14:58:17 +02:00
Marek Vasut
401650a19c MX28: Fix up the MMC driver DMA mode
The DMA mode didn't properly configure the DMA_ENABLE bit in CTRL1.
Also, it was using SSP0 DMA channel for all SSP devices.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-09-01 14:58:17 +02:00
Otavio Salvador
9c471142bc mxs: prefix register structs with 'mxs' prefix
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00
Lad, Prabhakar
0d986e61e2 da850/omap-l138: Add support to read u-boot image from MMC/SD
DA850/OMAP-L138 does not support strict MMC/SD boot mode. SPL will
be in SPI flash and U-Boot image will be in MMC/SD card. SPL will
do the low level initialization and then loads the u-boot image
from MMC/SD card.

Define CONFIG_SPL_MMC_LOAD macro in the DA850/OMAP-L138
configuration file to enable this feature.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
2012-09-01 14:58:09 +02:00
Jerry Huang
975324a7d9 FSL/eSDHC: enable the clock to detect the SD card
For FSL low-end processors (VVN2.2), in order to detect the SD card,
we should enable PEREN, HCKEN and IPGEN to enable the clock.
Otherwise, after booting the u-boot, and then inserting the SD card,
the SD card can't be detected.
For SDHC VVN2.3 IP, these bits are reserved, and SDCLKEN is used.
And when accessing to these reserved bit, no any impact happened.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Andy Fleming <afleming@gmail.com>
CC: Marek Vasut <marex@denx.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-07-13 17:04:50 -05:00
Jerry Huang
d2d8afae33 SD/MMC: check the card status during erase operation
Use the function 'mmc_send_status' to check the card status.
only when the card is ready, driver can send the next erase command
to the card, otherwise, the erase will failed:
=> mmc erase 0 1
MMC erase: dev # 0, block # 0, count 1 ... 1 blocks erase: OK
=> mmc erase 0 2
MMC erase: dev # 0, block # 0, count 2 ... mmc erase failed
1 blocks erase: ERROR
=> mmc erase 0 4
MMC erase: dev # 0, block # 0, count 4 ... mmc erase failed
1 blocks erase: ERROR

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Andy Fleming <afleming@gmail.com>
CC: Marek Vasut <marex@denx.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-07-13 17:04:50 -05:00
Łukasz Majewski
40242bc394 mmc:fix Call mmc_init() when executing mmc_get_dev()
This code adds call to mmc_init(), for partition related commands (e.g.
fatls, fatinfo etc.).

It is safe to call mmc_init() multiple times since mmc->has_init flag
prevents from multiple initialization.

The FAT related code calls get_dev high level method and then uses
elements from mmc->block_dev, which is uninitialized until the mmc_init
(and thereof mmc_startup) is called.

This problem appears on boards, which don't use mmc as the default
place for envs

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-07-13 17:04:50 -05:00
Jaehoon Chung
ad5fd92289 mmc: remove the hard setting for tran_speed
mmc_set_clock is set to the hard-coding.
But i think good that use the tran_speed value.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-07-13 17:04:49 -05:00
Eric Nelson
e576bd90f9 i.MX: fsl_esdhc: allow use with cache enabled.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-07-13 16:20:57 -05:00
Tom Warren
3f82d89d3d mmc: tegra2: rename tegra2_mmc.* to tegra_mmc.*
In anticipation of Tegra3 support, continue removing/renaming
Tegra2-specific files. No functional changes (yet).
Updated copyrights to 2012.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:20 +02:00
Wolfgang Denk
ee3a55fdf0 Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (167 commits)
  OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer
  ARM: omap3: Add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_MMC_SUPPORT
  ARM: omap3: Set SPL stack size to 8KB, image to 54KB.
  arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx
  OMAP4: Set fdt_high for OMAP4 devices to enable booting with Device Tree
  omap4: do not enable auxiliary cores
  omap4: do not enable fs-usb module
  omap4: panda: disable uart2 pads during boot
  igep00x0: change mpurate from 500 to auto
  igep00x0: enable the use of a plain text file
  tegra2: trivially enable 13 mhz crystal frequency
  tegra: Enable keyboard for Seaboard
  tegra: Switch on console mux and use environment for console
  tegra: Add tegra keyboard driver
  tegra: fdt: Add keyboard definitions for Seaboard
  tegra: fdt: Add keyboard controller definition
  tegra: Add keyboard support to funcmux
  input: Add support for keyboard matrix decoding from an fdt
  input: Add generic keyboard input handler
  input: Add linux/input.h for key code support
  fdt: Add fdtdec functions to read byte array
  tegra: Enable LP0 on Seaboard
  tegra: fdt: Add EMC data for Tegra2 Seaboard
  tegra: i2c: Add function to find DVC bus
  fdt: tegra: Add EMC node to device tree
  tegra: Add EMC settings for Seaboard
  tegra: Turn off power detect in board init
  tegra: Set up warmboot code on Nvidia boards
  tegra: Setup PMC scratch info from ap20 setup
  tegra: Add warmboot implementation
  tegra: Set up PMU for Nvidia boards
  tegra: Add PMU to manage power supplies
  tegra: Add EMC support for optimal memory timings
  tegra: Add header file for APB_MISC register
  tegra: Add tegra_get_chip_type() to detect SKU
  tegra: Add flow, gp_padctl, fuse, sdram headers
  tegra: Add crypto library for warmboot code
  tegra: Add functions to access low-level Osc/PLL details
  tegra: Move ap20.h header into arch location
  Add AES crypto library
  i2c: Add TPS6586X driver
  Add abs() macro to return absolute value
  fdt: Add function to return next compatible subnode
  fdt: Add function to locate an array in the device tree
  i.MX28: Avoid redefining serial_put[cs]()
  i.MX28: Check if WP detection is implemented at all
  i.MX28: Add battery boot components to SPL
  i.MX28: Reorder battery status functions in SPL
  i.MX28: Add LRADC init to i.MX28 SPL
  i.MX28: Add LRADC register definitions
  i.MX28: Shut down the LCD controller before reset
  i.MX28: Add LCDIF register definitions
  i.MX28: Implement boot pads sampling and reporting
  i.MX28: Improve passing of data from SPL to U-Boot
  M28EVK: Add SD update command
  M28EVK: Implement support for new board V2.0
  FEC: Abstract out register setup
  MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged
  i.MX28: Add delay after CPU bypass is cleared
  spi: mxs: Allow other chip selects to work
  spi: mxs: Introduce spi_cs_is_valid()
  mx53loco: Remove unneeded gpio_set_value()
  mx53loco: Add CONFIG_REVISION_TAG
  mx53loco: Turn on VUSB regulator
  mx53loco: Add mc34708 support and set mx53 frequency at 1GHz
  pmic: dialog: Avoid name conflicts
  imx: Add u-boot.imx as target for ARM9 i.MX SOCs
  i.MX2: Include asm/types.h in arch-mx25/imx-regs.h
  imx: usb: There is no such register
  i.MX25: usb: Set PORTSCx register
  imx: nand: Support flash based BBT
  i.MX25: This architecture has a GPIO4 too
  i.MX25: esdhc: Add mxc_get_clock infrastructure
  i.MX6: mx6q_sabrelite: add SATA bindings
  i.MX6: add enable_sata_clock()
  i.MX6: Add ANATOP regulator init
  mx28evk: add NAND support
  USB: ehci-mx6: Fix broken IO access
  M28: Scan only first 512 MB of DRAM to avoid memory wraparound
  Revert "i.MX28: Enable additional DRAM address bits"
  M28: Enable FDT support
  mx53loco: Add support for 1GHz operation for DA9053-based boards
  mx53loco: Allow to print CPU information at a later stage
  mx5: Add clock config interface
  imx-common: Factor out get_ahb_clk()
  i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flow
  mx31pdk: Allow booting a zImage kernel
  mx6qarm2: Allow booting a zImage kernel
  mx6qsabrelite: Allow booting a zImage kernel
  mx28evk: Allow booting a zImage kernel
  m28evk: Allow to booting a dt kernel
  mx28evk: Allow to booting a dt kernel
  mx6qsabrelite: No need to set the direction for GPIO3_23 again
  pmic: Add support for the Dialog DA9053 PMIC
  MX53: mx53loco: Add SATA support
  MX53: Add support to ESG ima3 board
  SATA: add driver for MX5 / MX6 SOCs
  MX53: add function to set SATA clock to internal
  SATA: check for return value from sata functions
  MX5: Add definitions for SATA controller
  NET: fec_mxc.c: Add a way to disable auto negotiation
  Define UART4 and UART5 base addresses
  EXYNOS: Change bits per pixel value proper for u-boot.
  EXYNOS: support TRATS board display function
  LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI
  EXYNOS: support EXYNOS MIPI DSI interface driver.
  EXYNOS: support EXYNOS framebuffer and FIMD display drivers.
  LCD: add data structure for EXYNOS display driver
  EXYNOS: add LCD and MIPI DSI clock interface.
  EXYNOS: definitions of system resgister and power management registers.
  SMDK5250: fix compiler warning
  misc:pmic:samsung Convert TRATS target to use MAX8997 instead of MAX8998
  misc:pmic:max8997 MAX8997 support for PMIC driver
  TRATS: modify the trats's configuration
  ARM: Exynos4: ADC: Universal_C210: Enable LDO4 power line for ADC measurement
  EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc
  arm: ea20: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
  arm: cam_enc_4xx: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
  cm-t35: add I2C multi-bus support
  include/configs: Remove CONFIG_SYS_64BIT_STRTOUL
  include/configs: Remove CONFIG_SYS_64BIT_VSPRINTF
  omap3: Introduce weak misc_init_r
  omap730p2: Remove empty misc_init_r
  omap5912osk: Remove empty misc_init_r
  omap4+: Remove CONFIG_ARCH_CPU_INIT
  omap4: Remove CONFIG_SYS_MMC_SET_DEV
  OMAP3: pandora: drop console kernel argument
  OMAP3: pandora: revise GPIO configuration
  ...
2012-05-20 21:31:26 +02:00
Marek Vasut
c7527b70f9 i.MX28: Check if WP detection is implemented at all
If the WP function is NULL, simply assume the card is always RW.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:36 +02:00
Balaji T K
dd23e59d59 omap5: pbias ldo9 turn on
Add omap5 pbias configuration for mmc1/sd lines
and set voltage for sd data i/o lines

Signed-off-by: Balaji T K <balajitk@ti.com>
2012-05-15 08:31:25 +02:00
SRICHARAN R
002a2c0c66 OMAP4/5: Make the sysctrl structure common
Make the sysctrl structure common, so that it can
be used in generic functions across socs.
Also change the base address of the system control module, to
include all the registers and not simply the io regs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:24 +02:00
Jonathan Solnit
bbbc1ae921 ARM:OMAP+:MMC: Add parameters to MMC init
Add parameters to the OMAP MMC initialization function so the board can
mask host capabilities and set the maximum clock frequency.  While the
OMAP supports a certain set of MMC host capabilities, individual boards
may be more restricted and the OMAP may need to be configured to match
the board.  The PRG_SDMMC1_SPEEDCTRL bit in the OMAP3 is an example.

Signed-off-by: Jonathan Solnit <jsolnit@gmail.com>
2012-05-15 08:31:22 +02:00
Jaehoon Chung
442d55685e mmc: support the sdhci instead of s5p_mmc for samsung-soc
In driver mmc, generic s5p_sdhci code is implemented.
s5p_mmc file  is dupulicated.
we are good that use the generic sdhci.
This patch supported the sdhci  for Samsung-SoC.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Lei Wen<leiwen@marvell.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2012-05-08 18:02:22 -05:00
Jaehoon Chung
236bfecff8 mmc: add the quirk to use the sdhci for samsung-soc
To support the Samsung-SoC, added the basically functions.
Samsung-SoC didn't used the SDHCI_CTRL_HISPD.
And added set_control_reg callback for s3c64xx.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Lei Wen<leiwen@marvell.com>
2012-05-08 18:02:22 -05:00
Jaehoon Chung
3a6383207b mmc: sdhci: add the quirk for broken r1b response
When response type is R1b, mask value is added the SDHCI_INT_DAT_END.
but in while(), didn't check that flag.
So sdhci controller didn't work fine.
CMD6 didn't always complete.

So add the quirks for broken r1b response
and add the timeout value to prevent the infinite loop.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Lei Wen<leiwen@marvell.com>
2012-05-08 18:02:22 -05:00
Marek Vasut
e7205905e7 i.MX28: Lower the amount of blocks transfered in one DMA cycle
Some MMC cards, like my ancient 32.0MB SanDisk RS-MMC cards had issue if b_max
was set to 0x40 and DMA was enabled. Lower this value to 0x20, which allows
these cards to work too.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-08 18:02:22 -05:00
Dirk Behme
7a5b80297b mmc: fsl_esdhc: Poll until card is not busy anymore
This patch imports parts of two patches from the Freescale U-Boot with the following
commit messages:

ENGR00156405 ESDHC: Add workaround for auto-clock gate errata ENGcm03648
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=e436525a70fe47623d346bc7d9f08f12ff8ad787
The errata, not applicable to USDHC, causes ESDHC to shut off clock to the card
when auto-clock gating is enabled for commands with busy signalling and no data
phase. The card might require the clock to exit the busy state, so the workaround
is to disable the auto-clock gate bits in SYSCTL register for such commands. The
workaround also entails polling on DAT0 bit in the PRSSTAT register to learn when
busy state is complete. Auto-clock gating is re-enabled at the end of busy state.

ENGR00156670-1 ESDHC/USDHC: Remove delay before each cmd and some bug fixes
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=a77c6fec8596891be96b2cdbc742c9824844b92a
Removed delay of 10 ms before each command. There should not be a need to have this
delay after the ENGR00156405 patch that polls until card is not busy anymore before
proceeding to next cmd.

This patch imports the polling part of both patches. The auto-clock gating code
don't apply for i.MX6 as implemented in these two patches.

SYSCTL_RSTA was defined twice. Remove one definition.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Andy Fleming <afleming@freescale.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
2012-05-08 18:02:22 -05:00
Grazvydas Ignotas
25c719e2c3 mmc: omap: handle controller errors properly
According to OMAP3 TRM, when the controller reports certain errors,
driver must perform a software reset. This is done by setting a bit
in SYSCTL and waiting it to clear:
- SRC on command timeout (CTO)
- SRD on data errors (DTO, DCRC and DEB)

This fixes a problem seen on OMAP3 pandora board with some cards
that won't work with a message printed multiple times:
  timedout waiting on cmd inhibit to clear

Code loosely based on Linux omap_hsmmc driver.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Tom Rini <trini@ti.com>
Tested-by: Pali Rohár <pali.rohar@gmail.com>
2012-05-08 18:02:22 -05:00
Grazvydas Ignotas
15ceb1de81 mmc: omap: improve stat wait message
The message didn't state that it's waiting for STAT to _clear_,
and printing the STAT value itself can help to identify problems.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Tom Rini <trini@ti.com>
2012-05-08 18:02:21 -05:00
Grazvydas Ignotas
b1e725f2c6 mmc: omap: follow TRM procedure to power on cards
According to OMAP3 TRM, PBIASLITEPWRDNZ bits must be cleared while MMC
power supply is being enabled and is ramping up (those bits might be
left set by the previous bootloader). It doesn't say what happens if
this procedure is violated, but better not to risk here and do things
as required.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Tom Rini <trini@ti.com>
2012-05-08 18:02:21 -05:00
Łukasz Majewski
6272203641 mmc:fix: Set mmc width according to MMC host capabilities
This patch sets the MMC width according to the MMC host capabilities.
It turned out, that there are some targets (e.g. GONI), which are able
to read data from SPI only at 4 bit mode.
This patch restricts the width number according to the MMC host.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Andy Fleming <afleming@gmail.com>
2012-05-08 18:02:21 -05:00
Mike Frysinger
51d0f7c694 Blackfin: bfin_sdh: drop dos part hardcode
No other driver sets up the part type to DOS in their init, and it
doesn't seem to be needed as `mmcinfo` and `mmc part` stll work, so
drop it.

Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-22 13:00:19 -04:00