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fsl_esdhc: Remove cache snooping for i.MX
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so disable it globally for this architecture. This avoids setting no_snoop for all i.MX boards, and it prevents setting a reserved bit of a reserved register if fsl_esdhc_mmc_init() is used on i.MX, like in arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init(). Since no_snoop was only used on i.MX, get rid of it BTW. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com>
This commit is contained in:
parent
8e99ecd74b
commit
16e43f354d
12 changed files with 20 additions and 20 deletions
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@ -172,7 +172,7 @@ static void setup_iomux_fec(void)
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}
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg esdhc_cfg = { MMC_SDHC1_BASE_ADDR, 1 };
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struct fsl_esdhc_cfg esdhc_cfg = { MMC_SDHC1_BASE_ADDR };
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int board_mmc_getcd(struct mmc *mmc)
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{
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@ -47,8 +47,8 @@ DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg esdhc_cfg[2] = {
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{MMC_SDHC1_BASE_ADDR, 1},
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{MMC_SDHC2_BASE_ADDR, 1},
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{MMC_SDHC1_BASE_ADDR},
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{MMC_SDHC2_BASE_ADDR},
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};
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#endif
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@ -79,8 +79,8 @@ static void setup_iomux_uart(void)
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg esdhc_cfg[2] = {
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{MMC_SDHC1_BASE_ADDR, 1 },
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{MMC_SDHC2_BASE_ADDR, 1 },
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{MMC_SDHC1_BASE_ADDR},
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{MMC_SDHC2_BASE_ADDR},
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};
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int board_mmc_getcd(struct mmc *mmc)
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@ -205,8 +205,8 @@ static void setup_iomux_fec(void)
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg esdhc_cfg[2] = {
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{MMC_SDHC1_BASE_ADDR, 1},
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{MMC_SDHC3_BASE_ADDR, 1},
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{MMC_SDHC1_BASE_ADDR},
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{MMC_SDHC3_BASE_ADDR},
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};
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int board_mmc_getcd(struct mmc *mmc)
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@ -165,8 +165,8 @@ static void setup_iomux_fec(void)
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg esdhc_cfg[2] = {
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{MMC_SDHC1_BASE_ADDR, 1},
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{MMC_SDHC3_BASE_ADDR, 1},
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{MMC_SDHC1_BASE_ADDR},
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{MMC_SDHC3_BASE_ADDR},
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};
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int board_mmc_getcd(struct mmc *mmc)
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@ -129,7 +129,7 @@ static void setup_iomux_fec(void)
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg esdhc_cfg[1] = {
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{MMC_SDHC1_BASE_ADDR, 1},
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{MMC_SDHC1_BASE_ADDR},
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};
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int board_mmc_getcd(struct mmc *mmc)
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@ -116,8 +116,8 @@ static void setup_iomux_enet(void)
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg usdhc_cfg[2] = {
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{USDHC3_BASE_ADDR, 1},
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{USDHC4_BASE_ADDR, 1},
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{USDHC3_BASE_ADDR},
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{USDHC4_BASE_ADDR},
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};
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int board_mmc_getcd(struct mmc *mmc)
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@ -239,8 +239,8 @@ int board_ehci_hcd_init(int port)
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg usdhc_cfg[2] = {
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{USDHC3_BASE_ADDR, 1},
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{USDHC4_BASE_ADDR, 1},
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{USDHC3_BASE_ADDR},
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{USDHC4_BASE_ADDR},
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};
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int board_mmc_getcd(struct mmc *mmc)
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@ -268,8 +268,8 @@ static inline void power_init(void) { }
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg esdhc_cfg[2] = {
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{MMC_SDHC1_BASE_ADDR, 1},
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{MMC_SDHC2_BASE_ADDR, 1},
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{MMC_SDHC1_BASE_ADDR},
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{MMC_SDHC2_BASE_ADDR},
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};
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static iomux_v3_cfg_t efikamx_sdhc1_pads[] = {
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@ -521,7 +521,7 @@ static void setup_fec(void)
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}
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struct fsl_esdhc_cfg esdhc_cfg[1] = {
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{MMC_SDHC1_BASE_ADDR, 1},
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{MMC_SDHC1_BASE_ADDR},
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};
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int get_mmc_getcd(u8 *cd, struct mmc *mmc)
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@ -479,9 +479,10 @@ static int esdhc_init(struct mmc *mmc)
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while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout)
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udelay(1000);
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#ifndef ARCH_MXC
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/* Enable cache snooping */
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if (cfg && !cfg->no_snoop)
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esdhc_write32(®s->scr, 0x00000040);
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esdhc_write32(®s->scr, 0x00000040);
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#endif
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esdhc_write32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
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@ -167,7 +167,6 @@
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struct fsl_esdhc_cfg {
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u32 esdhc_base;
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u32 no_snoop;
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};
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/* Select the correct accessors depending on endianess */
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