mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
Merge branch 'master' of git://git.denx.de/u-boot-nds32
This commit is contained in:
commit
aaf5e82560
25 changed files with 384 additions and 43 deletions
|
@ -15,8 +15,8 @@ LIB = $(obj)lib$(CPU).o
|
|||
|
||||
START = start.o
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||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
|
||||
SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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||||
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
|
||||
START := $(addprefix $(obj),$(START))
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||||
|
||||
all: $(obj).depend $(START) $(LIB)
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||||
|
|
|
@ -17,15 +17,15 @@ LIB = $(obj)lib$(SOC).o
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|||
COBJS-y := cpu.o timer.o
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||||
|
||||
ifndef CONFIG_SKIP_LOWLEVEL_INIT
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||||
SOBJS := lowlevel_init.o
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||||
SOBJS-y := lowlevel_init.o
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||||
endif
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||||
|
||||
ifndef CONFIG_SKIP_TRUNOFF_WATCHDOG
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||||
SOBJS += watchdog.o
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||||
SOBJS-y += watchdog.o
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||||
endif
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||||
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
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SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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||||
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
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||||
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||||
all: $(obj).depend $(LIB)
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||||
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||||
|
|
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@ -22,6 +22,7 @@
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|||
#define SDMC_CR1_A (CONFIG_FTSDMC021_BASE + FTSDMC021_CR1)
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#define SDMC_CR2_A (CONFIG_FTSDMC021_BASE + FTSDMC021_CR2)
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#define SDMC_B0_BSR_A (CONFIG_FTSDMC021_BASE + FTSDMC021_BANK0_BSR)
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#define SDMC_B1_BSR_A (CONFIG_FTSDMC021_BASE + FTSDMC021_BANK1_BSR)
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||||
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#define SDMC_TP1_D CONFIG_SYS_FTSDMC021_TP1
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#define SDMC_TP2_D CONFIG_SYS_FTSDMC021_TP2
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||||
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@ -29,6 +30,7 @@
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|||
#define SDMC_CR2_D CONFIG_SYS_FTSDMC021_CR2
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#define SDMC_B0_BSR_D CONFIG_SYS_FTSDMC021_BANK0_BSR
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#define SDMC_B1_BSR_D CONFIG_SYS_FTSDMC021_BANK1_BSR
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/*
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* parameters for the static memory controller
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@ -80,6 +82,11 @@ lowlevel_init:
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led 0x10
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jal remap
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#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
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led 0x1f
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jal enable_fpu
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#endif
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led 0x20
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ret $r10
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@ -151,12 +158,12 @@ relo_base:
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*/
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led 0x1a
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write32 SDMC_B0_BSR_A, SDMC_B0_BSR_D ! 0x00001100
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write32 SDMC_B1_BSR_A, SDMC_B1_BSR_D ! 0x00001140
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/* clear empty BSR registers */
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led 0x1b
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li $r4, CONFIG_FTSDMC021_BASE
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li $r5, 0x0
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swi $r5, [$r4 + FTSDMC021_BANK1_BSR]
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swi $r5, [$r4 + FTSDMC021_BANK2_BSR]
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swi $r5, [$r4 + FTSDMC021_BANK3_BSR]
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@ -207,6 +214,8 @@ relo_base:
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* - after remap: flash/rom 0x80000000, sdram: 0x00000000
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*/
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led 0x1c
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write32 SDMC_B0_BSR_A, 0x00001000
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write32 SDMC_B1_BSR_A, 0x00001040
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setbf15 AHBC_CR_A, FTAHBC020S_CR_REMAP ! 0x1
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#endif /* #ifdef CONFIG_MEM_REMAP */
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@ -214,6 +223,27 @@ relo_base:
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2:
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ret
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/*
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* enable_fpu:
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* Some of Andes CPU version support FPU coprocessor, if so,
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* and toolchain support FPU instruction set, we should enable it.
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*/
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#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
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enable_fpu:
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mfsr $r0, $CPU_VER /* enable FPU if it exists */
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srli $r0, $r0, 3
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andi $r0, $r0, 1
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beqz $r0, 1f /* skip if no COP */
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mfsr $r0, $FUCOP_EXIST
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srli $r0, $r0, 31
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beqz $r0, 1f /* skip if no FPU */
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mfsr $r0, $FUCOP_CTL
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ori $r0, $r0, 1
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mtsr $r0, $FUCOP_CTL
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1:
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ret
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#endif
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.globl show_led
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show_led:
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li $r8, (CONFIG_DEBUG_LED)
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|
|
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@ -71,7 +71,8 @@ void reset_timer_masked(void)
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#ifdef CONFIG_FTTMR010_EXT_CLK
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lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
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#else
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lastdec = readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2);
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lastdec = readl(&tmr->timer3_counter) /
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(CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
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#endif
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timestamp = 0; /* start "advancing" time stamp from 0 */
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@ -95,8 +96,8 @@ ulong get_timer_masked(void)
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#ifdef CONFIG_FTTMR010_EXT_CLK
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ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
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#else
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ulong now = readl(&tmr->timer3_counter) / \
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(CONFIG_SYS_CLK_FREQ / 2 / 1024);
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ulong now = readl(&tmr->timer3_counter) /
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(CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
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#endif
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debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec);
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|
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@ -17,15 +17,15 @@ LIB = $(obj)lib$(SOC).o
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COBJS-y := cpu.o timer.o
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|
||||
ifndef CONFIG_SKIP_LOWLEVEL_INIT
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SOBJS := lowlevel_init.o
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SOBJS-y := lowlevel_init.o
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endif
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ifndef CONFIG_SKIP_TRUNOFF_WATCHDOG
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SOBJS += watchdog.o
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SOBJS-y += watchdog.o
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endif
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SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
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SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
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all: $(obj).depend $(LIB)
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|
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@ -98,6 +98,11 @@ lowlevel_init:
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led 0x20
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jal remap
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#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
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led 0x2f
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jal enable_fpu
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#endif
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led 0x30
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ret $r10
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@ -273,6 +278,27 @@ relo_base:
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2:
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ret
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||||
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/*
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* enable_fpu:
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* Some of Andes CPU version support FPU coprocessor, if so,
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* and toolchain support FPU instruction set, we should enable it.
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||||
*/
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#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
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enable_fpu:
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mfsr $r0, $CPU_VER /* enable FPU if it exists */
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srli $r0, $r0, 3
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andi $r0, $r0, 1
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beqz $r0, 1f /* skip if no COP */
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||||
mfsr $r0, $FUCOP_EXIST
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srli $r0, $r0, 31
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beqz $r0, 1f /* skip if no FPU */
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||||
mfsr $r0, $FUCOP_CTL
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ori $r0, $r0, 1
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mtsr $r0, $FUCOP_CTL
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1:
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ret
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#endif
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.globl show_led
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show_led:
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li $r8, (CONFIG_DEBUG_LED)
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|
|
|
@ -71,7 +71,8 @@ void reset_timer_masked(void)
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|||
#ifdef CONFIG_FTTMR010_EXT_CLK
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||||
lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
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||||
#else
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lastdec = readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2);
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||||
lastdec = readl(&tmr->timer3_counter) /
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(CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
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||||
#endif
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||||
timestamp = 0; /* start "advancing" time stamp from 0 */
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||||
|
||||
|
@ -95,8 +96,8 @@ ulong get_timer_masked(void)
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|||
#ifdef CONFIG_FTTMR010_EXT_CLK
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||||
ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
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#else
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ulong now = readl(&tmr->timer3_counter) / \
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(CONFIG_SYS_CLK_FREQ / 2 / 1024);
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ulong now = readl(&tmr->timer3_counter) /
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(CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
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#endif
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debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec);
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|
|
|
@ -7,9 +7,7 @@
|
|||
* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
|
||||
* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
* SPDX-License-Identifier: GPL-2.0
|
||||
*
|
||||
* Modifications:
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||||
* 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
|
||||
|
@ -183,6 +181,43 @@ static inline unsigned int readl(unsigned int *addr)
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|||
#define out_8(a, v) __raw_writeb(v, a)
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||||
#define in_8(a) __raw_readb(a)
|
||||
|
||||
/*
|
||||
* Clear and set bits in one shot. These macros can be used to clear and
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||||
* set multiple bits in a register using a single call. These macros can
|
||||
* also be used to set a multiple-bit bit pattern using a mask, by
|
||||
* specifying the mask in the 'clear' parameter and the new bit pattern
|
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* in the 'set' parameter.
|
||||
*/
|
||||
|
||||
#define clrbits(type, addr, clear) \
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out_##type((addr), in_##type(addr) & ~(clear))
|
||||
|
||||
#define setbits(type, addr, set) \
|
||||
out_##type((addr), in_##type(addr) | (set))
|
||||
|
||||
#define clrsetbits(type, addr, clear, set) \
|
||||
out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
|
||||
|
||||
#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
|
||||
#define setbits_be32(addr, set) setbits(be32, addr, set)
|
||||
#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
|
||||
|
||||
#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
|
||||
#define setbits_le32(addr, set) setbits(le32, addr, set)
|
||||
#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
|
||||
|
||||
#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
|
||||
#define setbits_be16(addr, set) setbits(be16, addr, set)
|
||||
#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
|
||||
|
||||
#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
|
||||
#define setbits_le16(addr, set) setbits(le16, addr, set)
|
||||
#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
|
||||
|
||||
#define clrbits_8(addr, clear) clrbits(8, addr, clear)
|
||||
#define setbits_8(addr, set) setbits(8, addr, set)
|
||||
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
|
||||
|
||||
/*
|
||||
* Now, pick up the machine-defined IO definitions
|
||||
* #include <asm/arch/io.h>
|
||||
|
|
190
arch/nds32/include/asm/setup.h
Normal file
190
arch/nds32/include/asm/setup.h
Normal file
|
@ -0,0 +1,190 @@
|
|||
/*
|
||||
* linux/arch/nds32/include/asm/setup.h
|
||||
*
|
||||
* Copyright (C) 1997-1999 Russell King
|
||||
* Copyright (C) 2008 Andes Technology Corporation
|
||||
* Copyright (C) 2013 Ken Kuo (ken_kuo@andestech.com)
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0
|
||||
*
|
||||
* Structure passed to kernel to tell it about the
|
||||
* hardware it's running on. See Documentation/arm/Setup
|
||||
* for more info.
|
||||
*/
|
||||
#ifndef __ASMNDS32_SETUP_H
|
||||
#define __ASMNDS32_SETUP_H
|
||||
|
||||
#define COMMAND_LINE_SIZE 256
|
||||
|
||||
/* The list ends with an ATAG_NONE node. */
|
||||
#define ATAG_NONE 0x00000000
|
||||
|
||||
struct tag_header {
|
||||
u32 size;
|
||||
u32 tag;
|
||||
};
|
||||
|
||||
/* The list must start with an ATAG_CORE node */
|
||||
#define ATAG_CORE 0x54410001
|
||||
|
||||
struct tag_core {
|
||||
u32 flags; /* bit 0 = read-only */
|
||||
u32 pagesize;
|
||||
u32 rootdev;
|
||||
};
|
||||
|
||||
/* it is allowed to have multiple ATAG_MEM nodes */
|
||||
#define ATAG_MEM 0x54410002
|
||||
|
||||
struct tag_mem32 {
|
||||
u32 size;
|
||||
u32 start; /* physical start address */
|
||||
};
|
||||
|
||||
/* VGA text type displays */
|
||||
#define ATAG_VIDEOTEXT 0x54410003
|
||||
|
||||
struct tag_videotext {
|
||||
u8 x;
|
||||
u8 y;
|
||||
u16 video_page;
|
||||
u8 video_mode;
|
||||
u8 video_cols;
|
||||
u16 video_ega_bx;
|
||||
u8 video_lines;
|
||||
u8 video_isvga;
|
||||
u16 video_points;
|
||||
};
|
||||
|
||||
/* describes how the ramdisk will be used in kernel */
|
||||
#define ATAG_RAMDISK 0x54410004
|
||||
|
||||
struct tag_ramdisk {
|
||||
u32 flags; /* bit 0 = load, bit 1 = prompt */
|
||||
u32 size; /* decompressed ramdisk size in _kilo_ bytes */
|
||||
u32 start; /* starting block of floppy-based RAM disk image */
|
||||
};
|
||||
|
||||
/*
|
||||
* this one accidentally used virtual addresses - as such,
|
||||
* it's deprecated.
|
||||
* describes where the compressed ramdisk image lives (virtual address)
|
||||
*/
|
||||
#define ATAG_INITRD 0x54410005
|
||||
|
||||
/* describes where the compressed ramdisk image lives (physical address) */
|
||||
#define ATAG_INITRD2 0x54420005
|
||||
|
||||
struct tag_initrd {
|
||||
u32 start; /* physical start address */
|
||||
u32 size; /* size of compressed ramdisk image in bytes */
|
||||
};
|
||||
|
||||
/* board serial number. "64 bits should be enough for everybody" */
|
||||
#define ATAG_SERIAL 0x54410006
|
||||
|
||||
struct tag_serialnr {
|
||||
u32 low;
|
||||
u32 high;
|
||||
};
|
||||
|
||||
/* board revision */
|
||||
#define ATAG_REVISION 0x54410007
|
||||
|
||||
struct tag_revision {
|
||||
u32 rev;
|
||||
};
|
||||
|
||||
/* initial values for vesafb-type framebuffers. see struct screen_info
|
||||
* in include/linux/tty.h
|
||||
*/
|
||||
#define ATAG_VIDEOLFB 0x54410008
|
||||
|
||||
struct tag_videolfb {
|
||||
u16 lfb_width;
|
||||
u16 lfb_height;
|
||||
u16 lfb_depth;
|
||||
u16 lfb_linelength;
|
||||
u32 lfb_base;
|
||||
u32 lfb_size;
|
||||
u8 red_size;
|
||||
u8 red_pos;
|
||||
u8 green_size;
|
||||
u8 green_pos;
|
||||
u8 blue_size;
|
||||
u8 blue_pos;
|
||||
u8 rsvd_size;
|
||||
u8 rsvd_pos;
|
||||
};
|
||||
|
||||
/* command line: \0 terminated string */
|
||||
#define ATAG_CMDLINE 0x54410009
|
||||
|
||||
struct tag_cmdline {
|
||||
char cmdline[COMMAND_LINE_SIZE];
|
||||
};
|
||||
|
||||
struct tag {
|
||||
struct tag_header hdr;
|
||||
union {
|
||||
struct tag_core core;
|
||||
struct tag_mem32 mem;
|
||||
struct tag_videotext videotext;
|
||||
struct tag_ramdisk ramdisk;
|
||||
struct tag_initrd initrd;
|
||||
struct tag_serialnr serialnr;
|
||||
struct tag_revision revision;
|
||||
struct tag_videolfb videolfb;
|
||||
struct tag_cmdline cmdline;
|
||||
} u;
|
||||
};
|
||||
|
||||
struct tagtable {
|
||||
u32 tag;
|
||||
int (*parse)(const struct tag *);
|
||||
};
|
||||
|
||||
#define tag_member_present(tag, member) \
|
||||
((unsigned long)(&((struct tag *)0L)->member + 1) \
|
||||
<= (tag)->hdr.size * 4)
|
||||
|
||||
#define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size))
|
||||
#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
|
||||
|
||||
#define for_each_tag(t, base) \
|
||||
for (t = base; t->hdr.size; t = tag_next(t))
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define __tag __used __attribute__((__section__(".taglist")))
|
||||
#define __tagtable(tag, fn) \
|
||||
static struct tagtable __tagtable_##fn __tag = { tag, fn }
|
||||
|
||||
/*
|
||||
* Memory map description
|
||||
*/
|
||||
#define NR_BANKS 8
|
||||
|
||||
struct meminfo {
|
||||
int nr_banks;
|
||||
struct {
|
||||
unsigned long start;
|
||||
unsigned long size;
|
||||
int node;
|
||||
} bank[NR_BANKS];
|
||||
};
|
||||
|
||||
/*
|
||||
* Early command line parameters.
|
||||
*/
|
||||
struct early_params {
|
||||
const char *arg;
|
||||
void (*fn)(char **p);
|
||||
};
|
||||
|
||||
#define __early_param(name, fn) \
|
||||
static struct early_params __early_##fn __used \
|
||||
__attribute__((__section__("__early_param"))) = { name, fn }
|
||||
|
||||
#endif
|
||||
#endif
|
|
@ -13,12 +13,15 @@ include $(TOPDIR)/config.mk
|
|||
|
||||
LIB = $(obj)lib$(ARCH).o
|
||||
|
||||
OBJS := board.o cache.o interrupts.o
|
||||
COBJS-y += board.o
|
||||
COBJS-y += cache.o
|
||||
COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
|
||||
COBJS-y += interrupts.o
|
||||
|
||||
all: $(LIB)
|
||||
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(LIB): $(obj).depend $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
||||
#########################################################################
|
||||
|
|
|
@ -10,10 +10,10 @@ include $(TOPDIR)/config.mk
|
|||
|
||||
LIB = $(obj)lib$(BOARD).o
|
||||
|
||||
COBJS := adp-ag101.o
|
||||
COBJS-y := adp-ag101.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
|
||||
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
|
|
@ -35,7 +35,7 @@ int board_init(void)
|
|||
int dram_init(void)
|
||||
{
|
||||
unsigned long sdram_base = PHYS_SDRAM_0;
|
||||
unsigned long expected_size = PHYS_SDRAM_0_SIZE;
|
||||
unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
|
||||
unsigned long actual_size;
|
||||
|
||||
actual_size = get_ram_size((void *)sdram_base, expected_size);
|
||||
|
@ -50,6 +50,14 @@ int dram_init(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void dram_init_banksize(void)
|
||||
{
|
||||
gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
|
||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE;
|
||||
gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
|
||||
gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE;
|
||||
}
|
||||
|
||||
int board_eth_init(bd_t *bd)
|
||||
{
|
||||
return ftmac100_initialize(bd);
|
||||
|
|
|
@ -10,10 +10,10 @@ include $(TOPDIR)/config.mk
|
|||
|
||||
LIB = $(obj)lib$(BOARD).o
|
||||
|
||||
COBJS := adp-ag101p.o
|
||||
COBJS-y := adp-ag101p.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
|
||||
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
|
|
@ -35,7 +35,7 @@ int board_init(void)
|
|||
int dram_init(void)
|
||||
{
|
||||
unsigned long sdram_base = PHYS_SDRAM_0;
|
||||
unsigned long expected_size = PHYS_SDRAM_0_SIZE;
|
||||
unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
|
||||
unsigned long actual_size;
|
||||
|
||||
actual_size = get_ram_size((void *)sdram_base, expected_size);
|
||||
|
@ -50,6 +50,14 @@ int dram_init(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void dram_init_banksize(void)
|
||||
{
|
||||
gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
|
||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE;
|
||||
gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
|
||||
gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE;
|
||||
}
|
||||
|
||||
int board_eth_init(bd_t *bd)
|
||||
{
|
||||
return ftmac100_initialize(bd);
|
||||
|
|
|
@ -11,8 +11,8 @@ LIB = $(obj)lib$(BOARD).o
|
|||
|
||||
COBJS := adp-ag102.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
|
||||
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(call cmd_link_o_target, $(OBJS))
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
#include <netdev.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#include <faraday/ftpci100.h>
|
||||
#include <faraday/ftsdc010.h>
|
||||
#ifdef CONFIG_FTSMC020
|
||||
#include <faraday/ftsmc020.h>
|
||||
|
@ -77,8 +78,6 @@ ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
|
|||
void pci_init_board(void)
|
||||
{
|
||||
/* should be pci_ftpci100_init() */
|
||||
extern void pci_ftpci_init();
|
||||
|
||||
pci_ftpci_init();
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -93,7 +93,7 @@ I) Overview
|
|||
uchar ide_read_register(int dev, unsigned int port);
|
||||
void ide_write_register(int dev, unsigned int port, unsigned char val);
|
||||
void ide_read_data(int dev, ulong *sect_buf, int words);
|
||||
void ide_write_data(int dev, ulong *sect_buf, int words);
|
||||
void ide_write_data(int dev, const ulong *sect_buf, int words);
|
||||
|
||||
The first two functions are called from ide_inb()/ide_outb(), and will
|
||||
default to direct memory access if CONFIG_IDE_AHB is not set, or
|
||||
|
|
|
@ -64,7 +64,7 @@ void ide_write_register(int dev, unsigned int port, unsigned char val)
|
|||
IDE_REG_DA_WRITE(port) | val);
|
||||
}
|
||||
|
||||
void ide_write_data(int dev, ulong *sect_buf, int words)
|
||||
void ide_write_data(int dev, const ulong *sect_buf, int words)
|
||||
{
|
||||
static struct ftide020_s *ftide020 = (struct ftide020_s *) FTIDE_BASE;
|
||||
|
||||
|
|
|
@ -174,7 +174,11 @@ static int ftsdc010_request(struct mmc *mmc, struct mmc_cmd *cmd,
|
|||
len = data->blocksize * data->blocks;
|
||||
|
||||
/* 1. data disable + fifo reset */
|
||||
writel(FTSDC010_DCR_FIFO_RST, ®s->dcr);
|
||||
dcr = 0;
|
||||
#ifdef CONFIG_FTSDC010_SDIO
|
||||
dcr |= FTSDC010_DCR_FIFO_RST;
|
||||
#endif
|
||||
writel(dcr, ®s->dcr);
|
||||
|
||||
/* 2. clear status register */
|
||||
writel(FTSDC010_STATUS_DATA_MASK | FTSDC010_STATUS_FIFO_URUN
|
||||
|
|
|
@ -11,11 +11,11 @@
|
|||
#include <malloc.h>
|
||||
#include <pci.h>
|
||||
|
||||
#include <faraday/ftpci100.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/types.h> /* u32, u16.... used by pci.h */
|
||||
|
||||
#include "pci_ftpci100.h"
|
||||
|
||||
struct ftpci100_data {
|
||||
unsigned int reg_base;
|
||||
unsigned int io_base;
|
||||
|
|
|
@ -405,6 +405,7 @@ static inline int setenv_addr(const char *varname, const void *addr)
|
|||
#endif
|
||||
#ifdef CONFIG_NDS32
|
||||
# include <asm/mach-types.h>
|
||||
# include <asm/setup.h>
|
||||
# include <asm/u-boot-nds32.h>
|
||||
#endif /* CONFIG_NDS32 */
|
||||
#ifdef CONFIG_MIPS
|
||||
|
|
|
@ -20,6 +20,13 @@
|
|||
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
|
||||
/*
|
||||
* Definitions related to passing arguments to kernel.
|
||||
*/
|
||||
#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
|
||||
#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
|
||||
#define CONFIG_INITRD_TAG /* send initrd params */
|
||||
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_MEM_REMAP
|
||||
#endif
|
||||
|
@ -101,7 +108,9 @@
|
|||
#define CONFIG_DOS_PARTITION
|
||||
#define CONFIG_FTSDC010
|
||||
#define CONFIG_FTSDC010_NUMBER 1
|
||||
#define CONFIG_FTSDC010_SDIO
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_EXT2
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
|
@ -220,6 +229,11 @@
|
|||
#define CONFIG_SYS_FTSDMC021_BANK0_BSR (FTSDMC021_BANK_ENABLE | \
|
||||
CONFIG_SYS_FTSDMC021_BANK0_BASE)
|
||||
|
||||
#define CONFIG_SYS_FTSDMC021_BANK1_BASE \
|
||||
(CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE + (PHYS_SDRAM_0_SIZE >> 20))
|
||||
#define CONFIG_SYS_FTSDMC021_BANK1_BSR (FTSDMC021_BANK_ENABLE | \
|
||||
CONFIG_SYS_FTSDMC021_BANK1_BASE)
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
@ -233,9 +247,12 @@
|
|||
#else /* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */
|
||||
#define PHYS_SDRAM_0 0x10000000 /* SDRAM Bank #1 */
|
||||
#endif
|
||||
#define PHYS_SDRAM_1 \
|
||||
(PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
|
||||
|
||||
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
|
||||
#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */
|
||||
#define PHYS_SDRAM_0_SIZE 0x04000000 /* 64 MB */
|
||||
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
|
||||
|
||||
|
|
|
@ -20,6 +20,13 @@
|
|||
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
|
||||
/*
|
||||
* Definitions related to passing arguments to kernel.
|
||||
*/
|
||||
#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
|
||||
#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
|
||||
#define CONFIG_INITRD_TAG /* send initrd params */
|
||||
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_MEM_REMAP
|
||||
#endif
|
||||
|
@ -101,7 +108,9 @@
|
|||
#define CONFIG_DOS_PARTITION
|
||||
#define CONFIG_FTSDC010
|
||||
#define CONFIG_FTSDC010_NUMBER 1
|
||||
#define CONFIG_FTSDC010_SDIO
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_EXT2
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
|
@ -221,6 +230,10 @@
|
|||
#define CONFIG_SYS_FTSDMC021_BANK0_BSR (FTSDMC021_BANK_ENABLE | \
|
||||
CONFIG_SYS_FTSDMC021_BANK0_BASE)
|
||||
|
||||
#define CONFIG_SYS_FTSDMC021_BANK1_BASE \
|
||||
(CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE + (PHYS_SDRAM_0_SIZE >> 20))
|
||||
#define CONFIG_SYS_FTSDMC021_BANK1_BSR (FTSDMC021_BANK_ENABLE | \
|
||||
CONFIG_SYS_FTSDMC021_BANK1_BASE)
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
@ -234,9 +247,12 @@
|
|||
#else /* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */
|
||||
#define PHYS_SDRAM_0 0x10000000 /* SDRAM Bank #1 */
|
||||
#endif
|
||||
#define PHYS_SDRAM_1 \
|
||||
(PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
|
||||
|
||||
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
|
||||
#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */
|
||||
#define PHYS_SDRAM_0_SIZE 0x04000000 /* 64 MB */
|
||||
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
|
||||
|
||||
|
|
|
@ -64,6 +64,8 @@ struct ftpci100_ahbc {
|
|||
#define FTPCI100_BRIDGE_VENDORID 0x159b
|
||||
#define FTPCI100_BRIDGE_DEVICEID 0x4321
|
||||
|
||||
void pci_ftpci_init(void);
|
||||
|
||||
struct pcibar {
|
||||
unsigned int size;
|
||||
unsigned int addr;
|
|
@ -60,7 +60,7 @@ int ide_device_present(int dev);
|
|||
unsigned char ide_read_register(int dev, unsigned int port);
|
||||
void ide_write_register(int dev, unsigned int port, unsigned char val);
|
||||
void ide_read_data(int dev, ulong *sect_buf, int words);
|
||||
void ide_write_data(int dev, ulong *sect_buf, int words);
|
||||
void ide_write_data(int dev, const ulong *sect_buf, int words);
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
Loading…
Reference in a new issue