Commit graph

14654 commits

Author SHA1 Message Date
Bin Meng
2fab2e9c88 riscv: Add a helper routine to print CPU information
This adds a helper routine to print CPU information. Currently
it prints all the instruction set extensions that the processor
core supports.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:55 +08:00
Bin Meng
ce7a8e0740 riscv: Explicitly pass -march and -mabi to the compiler
At present the compiler flag against which architecture and abi
variant the riscv image is built for is not explicitly indicated
which means the default compiler configuration is used. But this
does not work if we want to build a different target (eg: 32-bit
riscv images using a toolchain configured for 64-bit riscv).

Fix this by explicitly passing -march and -mabi to the compiler.
Since generically we don't use floating point in U-Boot, specify
the RV[32|64]IMA ISA and software floating ABI.

This also fix some alignment coding style issues.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:43 +08:00
Bin Meng
3d6015651b riscv: Fix coding style issues in the linker script
There are several coding style issues in the linker script. Fix them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:37 +08:00
Bin Meng
dfb828ed1c riscv: Move the linker script to the CPU root directory
The linker script can be shared by all RISC-V targets. Move it to
a common place.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:31 +08:00
Bin Meng
8cdc6b58d7 riscv: Remove mach type
Since the mach_id is not used by RISC-V, remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:19 +08:00
Bin Meng
4afeedf172 riscv: bootm: Correct the 1st kernel argument to hart id
The first argument of Linux kernel is the risc-v core hart id,
from which the kernel is booted from. It is not the mach_id,
which seems to be copied from arm.

While we are here, this also changes the Linux kernel entry
parameters' type to support both 32-bit and 64-bit.

Note the hart id is hardcoded to zero for now, and we should
change to fill in it with the value read from mhartid CSR of
the hart which this routine is currently running on.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-10-03 17:46:51 +08:00
Bin Meng
3ad4866dd7 riscv: Remove setup.h
This was copied from ARM, and does not apply to RISC-V. While we
are here, bootm.h is eventually removed as its content is only
the inclusion of setup.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:44:44 +08:00
Bin Meng
117a433d9e riscv: kconfig: Normalize architecture name spelling
It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-10-03 17:44:38 +08:00
Tom Rini
592cd5defd Merge branch 'master' of git://git.denx.de/u-boot-spi
This is the PR for SPI-NAND changes along with few spi changes.

[trini: Re-sync changes for ls1012afrwy_qspi*_defconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-02 17:01:46 -04:00
Heiko Stuebner
e4d5fa3db0 rockchip: rk3188: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock
It is good practice to make the setting of gpio-pinctrls explicitly in the
devicetree, and in this case even necessary.
Rockchip boards start with iomux settings set to gpio for most pins and
while the linux pinctrl driver also implicitly sets the gpio function if
a pin is requested as gpio that is not necessarily true for other drivers.

The issue in question stems from uboot, where the sdmmc_pwr pin is set
to function 1 (sdmmc-power) by the bootrom when reading the 1st-stage
loader. The regulator controlled by the pin is active-low though, so
when the dwmmc hw-block sets its enabled bit, it actually disables the
regulator. By changing the pin back to gpio we fix that behaviour.

[picked from the identical linux patch
https://patchwork.kernel.org/patch/10609253/]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-02 09:35:39 +02:00
Heiko Stuebner
598a26a8fb rockchip: rk3188: add u-boot-specific mmc properties
The dwmmc controllers on rk3188 do not have idma support, so need to
use the fifo-mode and it my tests they became confused and stopped
working if the frequency was to high.

While I only tested in somewhat bigger steps, 32MHz for example
hung the controller, while reducing it to 16MHz worked just fine
and is reasonably fast to load a kernel from mmc.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-02 09:35:19 +02:00
Tom Rini
d24c1d0f4d Merge git://git.denx.de/u-boot-dm 2018-09-30 18:16:51 -04:00
Ramon Fried
665e452515 dts: db410c: Add bindings for MSM USB phy
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:36 -04:00
Ramon Fried
2df573e6a5 db410c: serial# env using msm board serial
The serial# environment variable needs to be
defined so it will be used by fastboot as serial
for the endpoint descriptor.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:35 -04:00
Ramon Fried
6b0861a942 dts: db410c: add alias for USB
Alias is required so req-seq will be filled.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:35 -04:00
Tom Rini
b592936d35 Merge branch 'master' of git://git.denx.de/u-boot-video
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-29 22:28:44 -04:00
Rajan Vaja
31b8217e83 dm: test: Add "/firmware" node scan test
Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Mario Six
e6fd018108 test: Add tests for board uclass
Add tests for the new board uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-29 11:49:35 -06:00
Tom Rini
cc49e2bdb8 Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-09-29 11:48:02 -04:00
Tom Rini
d29a583161 Use device tree for mpc85xx with binman. Enabled for T2080QDS.
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Merge tag 'mpc85xx-for-v2018.11-rc1' of git://git.denx.de/u-boot-mpc85xx

Use device tree for mpc85xx with binman. Enabled for T2080QDS.
2018-09-29 11:47:50 -04:00
Tom Rini
27f622d568 Switch to driver model for eSDHC on Layerscape SoCs including LS1021A,
LS1043A, LS1046A, LS1088A, LS2088A.
 Switch to driver model for SATA on LS1021A and LS1043A.
 Add support for LS1012AFRWY rev C board.
 Enable SMMU for LS1043A.
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Merge tag 'fsl-qoriq-for-v2018.11-rc1' of git://git.denx.de/u-boot-fsl-qoriq

Switch to driver model for eSDHC on Layerscape SoCs including LS1021A,
LS1043A, LS1046A, LS1088A, LS2088A.
Switch to driver model for SATA on LS1021A and LS1043A.
Add support for LS1012AFRWY rev C board.
Enable SMMU for LS1043A.
2018-09-29 11:47:32 -04:00
Adam Ford
973fcc8dae ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL
With DM enabled, this patch enables DM_SERIAL and removes
the NS16550 initialization from da850_lowlevel since the driver
will take care of that itself.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:28 -04:00
Adam Ford
96a82d33f8 ARM: DTS: various omap3: Remove cd-inverted from u-boot.dtsi
With the omap_mmc driver no longer supporting cd-inverted, this
patch removes all these references since they are not needed.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:26 -04:00
Adam Ford
f4df405f0e mmc: omap_mmc: Remove invert references
With DM_GPIO and DM_MMC translating GPIO_ACTIVE_LOW, any boards
using the 'cd-invert' option will no longer need to do this.  This
patch removes the support for 'invert' from the MMC driver.

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Fix warning over when !DM_GPIO]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-29 08:06:56 -04:00
Eugen Hristev
57fb8b4654 ARM: dts: at91: sama5d4_xplained: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:44 -04:00
Eugen Hristev
db17fbfd96 ARM: dts: at91: sama5d2_ptc: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:43 -04:00
Eugen Hristev
d656875372 ARM: dts: at91: sama5d27_som1_ek: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:43 -04:00
Eugen Hristev
2b238c6cdb ARM: dts: at91: sama5d3_xplained: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:43 -04:00
Eugen Hristev
7f0110d47e ARM: dts: at91: sama5d2_xplained: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:42 -04:00
Eugen Hristev
cc1bdd23c0 board: sama5d2_ptc_ek: add pda detect call at init time
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:40 -04:00
Eugen Hristev
59e43c3291 board: sama5d3_xplained: add pda detect call at init time
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:40 -04:00
Eugen Hristev
81b8e96511 sandbox: DTS: w1: add node for one wire interface on GPIO
Add a node for the one wire uclass and one wire gpio driver
in sandbox.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:37 -04:00
Jagan Teki
9ad93c0c96 ARM: dts: sun8i: Update A23/A33/r16 dts(i) files from Linux-v4.18-rc3
Update all A23/A33/r16 devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commits.

A23:
commit bc3bd041fe766219a44688b182c260064007f0cc
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Tue Apr 24 17:55:02 2018 +0200

    ARM: dts: sun8i: a23/a33: declare NAND pins

A33:
commit 88fe315d2c0a397ef42d7639addab0e021ae911d
Author: Maxime Ripard <maxime.ripard@bootlin.com>
Date:   Wed Apr 4 11:57:15 2018 +0200

    ARM: dts: sun8i: a33: Add the DSI-related nodes

r16:
commit 9621d0bd1b0d61167e1853ac68cf4869c31bcc96
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Tue Apr 24 17:55:03 2018 +0200

    ARM: dts: nes: add Nintendo NES/SuperNES Classic Edition support

Note:
- Drop pinctrl from sun8i-r16-nintendo-nes-classic-edition.dts since
  sun8i-a23-a33.dtsi is added with Linux sync.
- Don't sync non U-Boot supported dts files
   sun8i-a23-ippo-q8h-v1.2.dts
   sun8i-a23-ippo-q8h-v5.dts
   sun8i-a33-et-q8-v1.6.dts
   sun8i-a33-ippo-q8h-v1.2.dts
   sun8i-r16-nintendo-nes-classic.dts
   sun8i-r16-nintendo-super-nes-classic.dts

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Jagan Teki
b9d59d08a6 ARM: dts: sun7i: Update A20 dts(i) files from Linux-v4.18-rc3
Update all A10 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 5d9ef839f874f4e3923c8a9ae7b136c6c3912cd5
Author: Stefan Mavrodiev <stefan@olimex.com>
Date:   Wed May 16 14:38:08 2018 +0300

    ARM: dts: sun7i: Add Olimex A20-SOM-EVB-eMMC board

Note:
- Update sun7i-a20-primo73.dts as per Linux, since
  this dts is U-Boot specific.
- Drop sun7i-a20-olimex-som-evb-emmc.dts since no board
  added for this.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Jagan Teki
d1d4295aab ARM: dts: sun6i: Update A31/A31s dts(i) files from Linux-v4.18-rc3
Update all A31/A31s devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commit:
commit b240b419db5d624ce7a5a397d6f62a1a686009ec
Merge: 9c2dd8405c0c 518d2f43c358
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Thu Apr 5 21:18:09 2018 -0700

    Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Jagan Teki
13b36face7 ARM: dts: sun5i: Update A10s/A13/gr8/r8 dts(i) files from Linux-v4.18-rc3
Update all A10s/A13/gr8/r8devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commit:
commit 190e3138f9577885691540dca59c2f07540bde04
Merge: cafc87023b0d a7affb13b271
Author: Arnd Bergmann <arnd@arndb.de>
Date:   Tue Mar 27 14:58:00 2018 +0200

    Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Jagan Teki
3c92cca3cd ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3
Update all A10 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 590b0c0cfc6162aeebbf43eaafb9753b56df1532
Author: Pascal Roeleven <dev@pascalroeleven.nl>
Date:   Fri Apr 20 12:21:12 2018 +0200

    ARM: dts: sun4i: Fix incorrect clocks for displays

Note: Update pinctrl-0 for sun4i-a10-inet-3f.dts, sun4i-a10-inet-3w.dts
like other dts file since there dts file are U-Boot specific.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Mario Six
4eea531859 video_osd: Add osd sandbox driver and tests
Add sandbox driver and tests for the new OSD uclass.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-28 18:26:52 +02:00
Jagdish Gediya
432054b947 powerpc: dts: Enable device tree support for T2080QDS
Add device tree for T2080QDS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.

Update board README for device tree usage.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:14:14 -07:00
Jagdish Gediya
3a2f59e244 powerpc: dts: Add u-boot.dtsi to use binman for MPC85xx boards
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:14:06 -07:00
Jagdish Gediya
96699f097a powerpc: mpc85xx: Use binman to embed dtb inside U-Boot
Below is the sequence to embed dtb inside U-Boot,
1. Remove bootpg and resetvec section if needed
2. Append dtb
3. Append bootpg and resetvec section back if removed in step 1

Above procedure is required only when CONFIG_MPC85xx and
CONFIG_OF_SEPARATE are defined.

Add new config CONFIG_MPC85XX_HAVE_RESET_VECTOR to indicate that
image has resetvec section. Step 1 and step 3 described above are
required only if this config is y.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:59 -07:00
Jagdish Gediya
52fcb717b5 powerpc: mpc85xx: Select BINMAN by default
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:55 -07:00
Jagdish Gediya
7d7a8e99e4 powerpc/dts: Makefile changes to clean and build dts
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:38 -07:00
Jagdish Gediya
4d3294b1d5 powerpc/dts: Define '_end' symbol in mpc85xx U-Boot lds files
'board_fdt_blob_setup' function sets up fdt blob at '&_end' so
define '_end' symbol in mpc85xx lds files.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:24 -07:00
Ran Wang
26cbc0d663 armv7: ls102xa: Disable QE before enter deep sleep
Otherwise system will hang after executing wfi.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:01:28 -07:00
Laurentiu Tudor
dc29a4c177 armv8: ls1043a: add icid setup support
Reuse the existing ICID setup code done for LS1046A smmu enablement
and add the equivalent setup for LS1043A chips.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:58:15 -07:00
Laurentiu Tudor
2131079356 armv8: ls1043a: advertise QMan v3 in configuration
The QMan IP block in this SoC is version 3.2 so advertise
this in the SoC configuration header.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:58:03 -07:00
Laurentiu Tudor
6fae6a1fd6 armv8: fsl-layerscape: add missing qe base address define
Add define for QUICC Engine register block base address.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:56:40 -07:00
Nipun Gupta
a78df40cba u-boot: fixup the iommu-map property of fsl-mc node
The iommu-map property in the fsl-mc node is updated by
valid stream-ids by u-boot. This patch is to fixup this
property for LS208x and LS1088.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:55:05 -07:00
Peng Ma
9ed5ec9b53 armv7: dts: fsl-ls1021a: add sata node support enable sata for ls1021a-qds and ls1021a-twr
Add sata node to support this feature.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:53:13 -07:00
Peng Ma
686203737e armv7: fsl: remove sata support
Remove the old implementation in order to enable DM for sata

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:53:03 -07:00
Peng Ma
d92116566b armv8: dts: fsl-ls1043a: add sata node support
Add sata node to support ls1043a.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:52:11 -07:00
Yinbo Zhu
46d471f5b8 armv7: ls1021a: enable esdhc
This patch is to enable eSDHC for ls1021a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:36 -07:00
Yinbo Zhu
2fd425f8e3 armv8: ls1046a: add eSDHC node
This patch is to add eSDHC node for ls1046a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:22 -07:00
Yinbo Zhu
bdccf12839 armv8: ls1043a: add eSDHC node
This patch is to add eSDHC node for ls1043a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:16 -07:00
Yinbo Zhu
585d357522 armv8: ls1088a: add eSDHC node
This patch is to add eSDHC node for ls1088a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:11 -07:00
Yinbo Zhu
99e0071df5 armv8: ls2088a: add eSDHC node
This patch is to add eSDHC node for ls2088a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:50:39 -07:00
Yinbo Zhu
0fdf696721 armv8/ls1088a/ls2088a: esdhc: Add esdhc clock support
This patch adds esdhc clock support for ls1088a and ls2088a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:50:26 -07:00
Yinbo Zhu
c3ced8a6ed ppa/fm/qe: use block layer in ppa/fm/qe driver
At present the MMC subsystem maintains its own list of MMC devices.
This cannot work with driver model when CONFIG_BLK is enabled, use
blk_dread to replace previous mmc read interface, use
mmc_get_blk_desc to get the mmc device property.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
[York S: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:48:51 -07:00
Tom Rini
bbef20d479 Xilinx changes for v2018.11
- Handle BOARD_LATE_INIT via Kconfig
 
 SPL:
 - Enable GZIP for all partitions types(not only for kernel)
 
 ZynqMP:
 - Rearrange pmufw version handling
 - Support newer PMUFW with improved fpga load sequence
 
 Zynq:
 - Cleanup config file
 - Simplify zybo config by enabling option via Kconfig
 
 net:
 - Fix gems max-speed property reading
 - Enable support for fixed-link phys
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Merge tag 'xilinx-for-v2018.11' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.11

- Handle BOARD_LATE_INIT via Kconfig

SPL:
- Enable GZIP for all partitions types(not only for kernel)

ZynqMP:
- Rearrange pmufw version handling
- Support newer PMUFW with improved fpga load sequence

Zynq:
- Cleanup config file
- Simplify zybo config by enabling option via Kconfig

net:
- Fix gems max-speed property reading
- Enable support for fixed-link phys
2018-09-27 08:29:10 -04:00
Tom Rini
0ae8dcfef7 Patch queue for efi - 2018-09-26
A lot of goodness in this release. We're *very* close to running the
 UEFI Shell and SCT natively. The only missing piece are HII protocols.
 
   - FAT write support (needed for SCT)
   - improved FAT directory support (needed for SCT)
   - RTC support with QEMU -M virt
   - Sandbox support (run UEFI binaries in Linux - yay)
   - Proper UTF-16 support
   - EFI_UNICODE_COLLATION_PROTOCOL support (for UEFI Shell)
   - EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL support (for UEFI Shell)
   - Fix window size determination
   - Fix Tegra by explicitly unmapping RAM
   - Clean up handle entanglement
   - Lots of generic code cleanup
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Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-09-26

A lot of goodness in this release. We're *very* close to running the
UEFI Shell and SCT natively. The only missing piece are HII protocols.

  - FAT write support (needed for SCT)
  - improved FAT directory support (needed for SCT)
  - RTC support with QEMU -M virt
  - Sandbox support (run UEFI binaries in Linux - yay)
  - Proper UTF-16 support
  - EFI_UNICODE_COLLATION_PROTOCOL support (for UEFI Shell)
  - EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL support (for UEFI Shell)
  - Fix window size determination
  - Fix Tegra by explicitly unmapping RAM
  - Clean up handle entanglement
  - Lots of generic code cleanup

[trini: Fixup merge conflict in include/configs/qemu-arm.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-26 17:02:46 -04:00
Siva Durga Prasad Paladugu
fbf7fb0f9f fpga: zynqmp: Modify PL bitstream loading sequence
This patch modifies PL bitstream loading sequence as per
latest Xilfpga which supports all variants of bitstream images
generated from vivado and from bootgen. With this new change in
Xilfpga, uboot doesn't need to validate and swap bitstream as it will
be taken care inside Xilfpga. ZynqMP PL driver now checks for supporting
PMUFW version before skipping the validation and swap sequence as there
can be old PMUFW which doesn't supports this feature. In this case, driver
uses old way of PL bitstream loading sequence.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 10:15:00 +02:00
Siva Durga Prasad Paladugu
b94a8271cc arm64: zynqmp: Return pmufw version for zynqmp_pmufw_version()
Modify the zynqmp_pmufw_version() routine to return PMUFW version so
that it can be reused wherever required. Get PMUFW version from PMU
only once at bootup and later just return stored value.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 10:15:00 +02:00
Siva Durga Prasad Paladugu
fe68f2332d arm64: zynqmp: Move PM version related macros to .h
This patch moves the PM version related macros to .h file so that
they can be reused in other files.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 10:15:00 +02:00
Michal Simek
8eb55e1965 arm64: zynqmp: Handle CONFIG_BOARD_LATE_INIT via Kconfig
Disable BOARD_LATE_INIT via Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 10:15:00 +02:00
Bin Meng
d8d81d4a5d config.mk: Remove duplicated -fno-strict-aliasing
Now that we already disable the "strict-aliasing" globally, remove
the duplicates in the nds32/riscv/x86 arch-specific Makefiles.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-25 21:50:34 -04:00
Chris Packham
47cef9c805 xtensa: use asm-generic/atomic.h
Make use of asm-generic/atomic.h.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
2018-09-25 21:49:18 -04:00
Chris Packham
02df9c5a67 mips: use asm-generic/atomic.h
Make use of asm-generic/atomic.h.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-09-25 21:49:18 -04:00
Chris Packham
4d9f7a014d ARM: use asm-generic/atomic.h
Make use of asm-generic/atomic.h retaining the smp_mb_... definitions.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-25 21:49:18 -04:00
Adam Ford
03190a7888 mmc: omap_hsmmc: Fix pbias for omap3_logic to enable CD pin
The MMC card detect pin is connected to gpio127 on omap3_logic.
When setting up the pbias register for MMC, let's also enable
gpio_127 for the card detect.  As part of the package deal,
gpio_126 and gpio_129 are also enabled.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-25 21:49:18 -04:00
Quentin Schulz
484a878273 arm: spear: fix enabling of SSP2 clock
The SSP2 clock is at bit 6 in the register, so the value is 0x40 unlike
the current 0x70 which enables the clock of UART2, SSP1 and SSP2.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Stefan Roese <sr@denx.de>
2018-09-25 21:49:18 -04:00
Quentin Schulz
ac47fbee6d arm: spear: enable SSP1, 2 and 3 clocks when SPI controller driver is built
SPI controllers SSP1, 2 and 3 require to enable their respective clocks.
Let's enable them only when the SPI controller driver is built.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
2018-09-25 21:49:18 -04:00
Patrice Chotard
bad48a4062 ARM: dts: stm32mp1: Add EHCI support for stm32mp157c-ev1 board
Add DT nodes to enable EHCI support

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-25 21:47:39 -04:00
Patrice Chotard
8e9c94d766 ARM: dts: stm32mp1: Add usb gadget support for stm32mp157c-ev1 board
Add DT nodes to enable DWC2 gadget support

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-25 21:47:39 -04:00
AKASHI Takahiro
a47c1b5b87 arm: qemu-arm: enable RTC (PL031) by default
Virtual machine provided by qemu-arm has a ARM PL031 Real Time Clock
device. With this patch, the driver is enabled by default.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:31 +02:00
Alexander Graf
6e6e4b2f73 sandbox: Allow to execute from RAM
With efi_loader, we may want to execute payloads from RAM. By default,
permissions on the RAM region don't allow us to execute from there though.

So let's change the default allocation scheme for RAM to also allow
execution from it. That way payloads that live in U-Boot RAM can be
directly executed.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Alexander Graf
3fcb714758 sandbox: Fix setjmp/longjmp
In sandbox, longjmp returns to itself in an endless loop because
os_longjmp() calls into longjmp() which is provided by U-Boot which
again calls os_longjmp().

Setjmp on the other hand must not return because otherwise the
return freees up stack elements that we need during longjmp().

The only straight forward fix that doesn't involve nasty hacks I
could find is to directly link against the system setjmp/longjmp
implementations. That means we just provide the compiler with
hints that the symbol will be available and actually fill them
out with versions from libc.

This approach should be reasonably platform agnostic

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Simon Glass
428aa0ca56 sandbox: Enhance map_to_sysmem() to handle foreign pointers
At present map_sysmem() maps an address into the sandbox RAM buffer,
return a pointer, while map_to_sysmem() goes the other way.

The mapping is currently just 1:1 since a case was not found where a more
flexible mapping was needed. PCI does have a separate and more complex
mapping, but uses its own mechanism.

However this arrange cannot handle one important case, which is where a
test declares a stack variable and passes a pointer to it into a U-Boot
function which uses map_to_sysmem() to turn it into a address. Since the
pointer is not inside emulated DRAM, this will fail.

Add a mapping feature which can handle any such pointer, mapping it to a
simple tag value which can be passed around in U-Boot as an address.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Simon Glass
fe938fb0df sandbox: Add support for calling abort()
This function is useful to signal that the application needs to exit
immediate. It can be caught with a debugger (e.g. gdb). Add a stub for it
so that it can be called from within sandbox when an internal error
occurs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Simon Glass
613185023f sandbox: Align RAM buffer to the machine page size
At present the sandbox RAM buffer is not aligned to any particular
address boundary. This makes the internal pointers somewhat random with
respect to the associated RAM buffer addresses.

Align the buffer to the page size of the machine to help with this. Note
that there is a header at the start of the allocated pointer. To avoid
returning a pointer which is not aligned to a page boundary, we waste
almost an entire page of memory for each allocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:30 +02:00
Stephen Warren
0797f7f0b7 ARM: tegra: reserve unmapped RAM so EFI doesn't use it
Tegra U-Boot ensures that board_get_usable_ram_top() never returns a value
over 4GB, since some peripherals can't access such addresses. However, on
systems with more than 2GB of RAM, RAM bank 1 does describe this extra
RAM, so that Linux (or whatever OS) can use it, subject to DMA
limitations. Since board_get_usable_ram_top() points at the top of RAM
bank 0, the memory locations describes by RAM bank 1 are not mapped by
U-Boot's MMU configuration, and so cannot be used for anything.

For some completely inexplicable reason, U-Boot's EFI support ignores the
value returned by board_get_usable_ram_top(), and EFI memory allocation
routines will return values above U-Boot's RAM top. This causes U-Boot to
crash when it accesses that RAM, since it isn't mapped by the MMU. One
use-case where this happens is TFTP download of a file on Jetson TX1
(p2371-2180).

This change explicitly tells the EFI code that this extra RAM should not
be used, thus avoiding the crash.

A previous attempt to make EFI honor board_get_usable_ram_top() was
rejected. So, this patch will need to be replicated for any board that
implements board_get_usable_ram_top().

Fixes: aa909462d0 ("efi_loader: efi_allocate_pages is too restrictive")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Stephen Warren
9b5e6396bf efi_loader: simplify ifdefs
Use CONFIG_IS_ENABLED(EFI_LOADER) to avoid explicitly checking CONFIG_SPL
too. This simplifies the conditional.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23 21:55:29 +02:00
Stefan Roese
fdd1a9ff78 mips: mt7628a.dtsi: Add SPI clock-frequency property
This patch adds the clock-frequency property to the SPI controller
DT node. It will be used by the SPI driver to calculate the baud rate.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23 14:27:51 +02:00
Stefan Roese
41f6e6eb64 mips: mt76xx: Add sysreset support
This patch adds the necessary sysreset DT node and enables the required
drivers via Kconfig.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23 14:27:51 +02:00
Stefan Roese
88dc409914 mips: Add Gardena Smart-Gateway board support
The Gardena Smart-Gateway boards have a MT7688 SoC with 128 MiB of RAM
and 8 MiB of flash (SPI NOR) and additional 128MiB SPI NAND storage.

This patch also includes 2 targets. One is the target that can be
programmed into the SPI NOR flash and a 2nd target "xxx-ram" is
added to support loading and booting via an already running U-Boot
version. This allows easy development and testing without the
need to flash the image each time.

Signed-off-by: Stefan Roese <sr@denx.de>
[fixed and regenerated defconfig files]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23 14:27:51 +02:00
Stefan Roese
b02f76a835 mips: Add LinkIt Smart 7688 support
The LinkIt Smart 7688 modules have a MT7688 SoC with 128 MiB of RAM
and 32 MiB of flash (SPI NOR).

This patch also includes 2 targets. One is the target that can be
programmed into the SPI NOR flash and a 2nd target "xxx-ram" is
added to support loading and booting via an already running U-Boot
version. This allows easy development and testing without the
need to flash the image each time.

Signed-off-by: Stefan Roese <sr@denx.de>
[fixed and regenerated defconfig files]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23 14:27:19 +02:00
Stefan Roese
4c835a607b mips: Add basic MediaTek MT7620/88 support
This patch adds basic support for the MediaTek MT7620/88 SoCs. Parts of
the code is copied from the MediaTek GitHub repository:

https://github.com/MediaTek-Labs/linkit-smart-uboot.git

The mt7628a.dtsi file is imported from Linux v4.17.

Support for the LinkIt Smart 7688 module and the Gardena Smart Gateway
both based on the MT7688 will be added in further patches.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 21:18:33 +02:00
Stefan Roese
503f6f759c mips: Add arch/mips/include/asm/atomic.h
This is needed for the UBIFS support. The file is a copy of
arch/xtensa/include/asm/atomic.h

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 21:17:54 +02:00
Daniel Schwierzeck
46203baf66 MIPS: cache: remove config option CONFIG_SYS_MIPS_CACHE_MODE
Caches should be configured to mode CONF_CM_CACHABLE_NONCOHERENT
(or CONF_CM_CACHABLE_COW when a CM is available). There is no
need to make this configurable.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 21:04:10 +02:00
Daniel Schwierzeck
5ef337a037 MIPS: cache: make index base address configurable
The index base address used for the cache initialisation is currently
hard-coded to CKSEG0. Make this value configurable if a MIPS system
needs to have a different address (e.g. in SRAM or ScratchPad RAM).

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 21:02:03 +02:00
Daniel Schwierzeck
b838586086 MIPS: cache: optimise changing of k0 CCA mode
Changing the Cache Coherency Algorithm (CCA) for kernel mode
requires executing from KSEG1. Thus do a jump from KSEG0 to KSEG1
before changing the CCA mode. Jump back to KSEG0 afterwards.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 21:02:03 +02:00
Daniel Schwierzeck
2f85c2be21 MIPS: cache: reimplement dcache_[status, enable, disable]
Those functions are not needed during cache init and can be
implemented in C. Only support the safe disabling of caches when
this is required for booting an OS. Reenabling caches is much
harder to implement if an optional coherency manager must be
supported. As there is no real use-case anyway, dcache_enable
is implemented with an error message.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 21:02:03 +02:00
Daniel Schwierzeck
d1c3d8bdfa MIPS: start.S: make boot config at offset 0x10 configurable
Some MIPS systems store some board-specific boot configuration
in the U-Boot binary at offset 0x10. This is used by Malta boards
and by Lantiq/Intel SoC's when booting from parallel NOR flash.

Convert the hard-coded values to Kconfig options to remove such
board-specific stuff out of the generic start.S code. This also
deprecates the config option CONFIG_SYS_XWAY_EBU_BOOTCFG.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22 20:59:22 +02:00
Philippe Reynes
e98a260eb5 dt: bcm6838: add pinctrl
Add pinctrl node and related syscon node for broadcom bcm6838 SoC.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-09-22 20:49:59 +02:00
Miquel Raynal
a430fa06a4 mtd: move NAND files into a raw/ subdirectory
NAND flavors, like serial and parallel, have a lot in common and would
benefit to share code. Let's move raw (parallel) NAND specific code in a
raw/ subdirectory, to ease the addition of a core file in nand/ and the
introduction of a spi/ subdirectory specific to SPI NANDs.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20 20:10:49 +05:30
Tom Rini
9dc8d155d4 Merge git://git.denx.de/u-boot-imx
- changes in pico-* boards
- fix imx6ull pinmux
2018-09-19 20:35:27 -04:00
Tom Rini
333279af23 Merge git://git.denx.de/u-boot-marvell
- Multiples updates to the turris boards / platform
- Changes / enhancements to the Marvell PHY drivers, mainly
  to support the turris platform
- Many fixes and enhancements to the pxa3xx NAND driver
- Fixes for the UART boot mode in kwboot
- Misc minor changes to other 32bit and 64bit boards
2018-09-19 20:35:05 -04:00
Marek Behún
863949e383 board: turris_mox: Fixup U-Boot's device tree if PCIe connected
If PCIe Mox module is connected we want to have PCIe node enabled
in U-Boot's device tree.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:39 +02:00
Baruch Siach
f26e379b31 dts: mvebu: mcbin: drop redundant SD slot node
Commit 61dccf73d3 (dts: mvebu: a80x0: Enable SD/eMMC interfaces) added
a redundant DT node for SD card slot. Drop it.

Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:38 +02:00
Marek Behún
0f6686e228 arch/arm/dts: Update Turris Mox device tree
Remove smi_pins definition since it is already in armada-37xx.dtsi.
Add assigned-clocks definitions to spi0.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 09:00:38 +02:00
Chris Packham
2fd4284051 ARM: mach-mvebu: handle fall-back to UART boot
The bootROM in the Armada-38x (and similar) SoC has two modes for UART
boot. The first is when the normal boot media is blank (or otherwise
missing the kwb header). The second is when the boot sequence has been
interrupted with the magic byte sequence on the UART lines.

In the first mode the bootROM routine and error code register will
indicate that there was an error booting from the configured media in
bits 7:0. In the second mode there is no error to indicate but the boot
source is provided via bits 31:28.

Handle both situations so that kwboot can be used for both boot
strapping a blank board and for intercepting a regular boot sequence.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Chris Packham
e0977297e8 Revert "arm: mvebu: fix boot from UART when in fallback mode"
This reverts commit e83e2b3900. This
prevents kwboot from overriding the hardware strapped boot source.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Baruch Siach
7e1d32208e arm64: mvebu: armada-8k: support environment in SD/eMMC
Detect the SD/eMMC boot device at run-time. Load the environment from
the boot deice, as well as save to it.

Leave the environment offset the same as in the SPI flash.

Make SD/eMMC 0 the default environment device when the boot device is
not detected.

Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Tom Rini
4e710ebb44 Merge git://git.denx.de/u-boot-dm
- MPC83xx device tree additions (CPU and RAM)
- Fix sandbox build error
- Sync bitrev with Linux
- Various ofnode/DT improvements
2018-09-18 20:42:37 -04:00
Stefano Babic
0eee446ee8 Merge branch 'master' of git://git.denx.de/u-boot into master
Signed-off-by: Stefano Babic <sbabic@denx.de>
2018-09-18 16:53:55 +02:00
Mario Six
d2166319df misc: Add MPC83xx serdes driver
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on
the MPC83xx architecture.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
19fbdca47b cpu: Add MPC83xx CPU driver
Add a CPU driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
fa44b53398 test: Add tests for CPU uclass
Add a sandbox CPU driver, and some tests for the CPU uclass.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 08:12:21 -06:00
Mario Six
2c21749d71 timer: Add MPC83xx timer driver
Add a timer driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
07d538d281 clk: Add MPC83xx clock driver
Add a clock driver for the MPC83xx architecture.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
76fdad1f21 mpc83xx: Add sysreset driver
Add a sysreset driver for the MPC83xx platform.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
08f5b0b23a powerpc: Add read*_*/write*_* macros
Define the read*_*/write*_* macros for the PowerPC platform to be able
to use the macros in wait_bit.h.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Mario Six
e40615565d ram: Add driver for MPC83xx
Add a RAM driver for the MPC83xx architecture.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18 00:01:18 -06:00
Bin Meng
0f1caa9880 sandbox: Enable bitrev library build
Imply CONFIG_BITREVERSE for Sandbox.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18 00:01:18 -06:00
Andy Shevchenko
e599c4e7d8 sandbox: Build with -fPIC
Sandbox is not a real bootloader and it does require
a position independent code to be supported.

Thus, build it with -fPIC explicitly.

Fixes: 16940f720f9b ("Makefile: Don't generate position independent code")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reported-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2018-09-18 00:01:18 -06:00
Tom Rini
b57f1895b6 Merge git://git.denx.de/u-boot-x86 2018-09-17 08:04:25 -04:00
Georgii Staroselskii
6321da5263 x86: cpu: add docstring to scu_ipc_command()
These comments were copied from the Linux kernel driver in
drivers/platform/x86/intel_scu_ipc.c

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 17:35:53 +08:00
Georgii Staroselskii
f7ce2d6e65 x86: tangier: acpi: add I2C6 node
Now that we have I2C#6 working, it's time to add a corresponsing
ACPI binding.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 17:35:53 +08:00
Georgii Staroselskii
f26b260c69 x86: dts: edison: configure I2C#6 pins
Now that we have the pinctrl driver for Merrifield in place we can make
use of it and set I2C#6 pins appropriately.

Initial configuration came from the firmware.  Which quite likely has
been used in the phones, where that is not part of Atom peripheral, is
in use. Thus we need to override the leftover.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 17:35:52 +08:00
Georgii Staroselskii
355c9b757e x86: tangier: pinmux: add API to configure protected pins
This API is going to be used to configure some pins that are protected
for simple modification.

It's not a comprehensive pinctrl driver but can be turned into one
when we need this in the future. Now it is planned to be used only
in one place. So that's why I decided not to pollute the codebase with a
full-blown pinctrl-merrifield nobody will use.

This driver reads corresponding fields in DT and configures pins
accordingly.

The "protected" flag is used to distinguish configuration of SCU-owned
pins from the ordinary ones.

The code has been adapted from Linux work done by Andy Shevchenko
in pinctrl-merrfifield.c

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix build warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 17:35:52 +08:00
Georgii Staroselskii
224742a390 x86: cpu: introduce scu_ipc_raw_command()
This interface will be used to configure properly some pins on
Merrifield that are shared with SCU.

scu_ipc_raw_command() writes SPTR and DPTR registers before sending
a command to SCU.

This code has been ported from Linux work done by Andy Shevchenko.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17 14:34:15 +08:00
Tom Rini
40e44c8bf5 Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2018-09-16 10:32:33 -04:00
Tom Rini
9e45008b39 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-09-16 10:30:16 -04:00
Angelo Dureghello
2c92e4fbc6 m68k: ColdFire mcf5441x, add eSDHC support
This patch adds mcf5441x eSDHC support for the mcf5441x family.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16 00:01:13 +02:00
Angelo Dureghello
faae49543a m68k: fix multiple memory accesses on swap operations
On a
	u32 val = __sw32(*addr);

multiple memory accesses are not welcome, since "addr" may
be an IO peripheral register address.
This patch changes __sw16/32 to perform a single memory
access for the source value.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16 00:01:13 +02:00
Angelo Dureghello
a1ed3a83be m68k: fix mcf5441x total interrupt number
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16 00:01:13 +02:00
Marek Vasut
0e286c529f sh: tmu: Zap get_tbclk and timer_read_counter
Replace those two functions with generic ones by defining the
timer macros in include/config/*.h .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
f02c1f695e sh: tmu: Clean up register usage
The code uses all in all three TMU registers, drop the massive
register layout structures and just define the required timer
registers and use them throughout the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
8b39df9e78 sh: tmu: Inline sh_tmu.h
The header contains only the TMU register layout, just inline it
into the TMU timer implementation and drop the header completely.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
ccce3acfe7 sh: tmu: Clean up CONFIG_SH_TMU_CLK_FREQ
The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2,
while the old SH parts use CONFIG_SYS_CLK_FREQ directly.
Just put this into the TMU implementation and drop the
CONFIG_SH_TMU_CLK_FREQ config option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
ae59a9f8f7 sh: tmu: Inline get_tmu0_clk_rate()
This function just returns CONFIG_SH_TMU_CLK_FREQ, use the constant
directly instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
15f11fc6d7 sh: tmu: Inline tmu_timer_{start,stop}()
These functions are always called for timer = 0, so drop the
timer check. Since these functions are called from one place
only and they are reduced to one line of code, just inline
them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
eb05dcfea2 sh: tmu: Simplify the tmu_bit math
The tmu_bit value evaluates to (ffs(4) >> 1) - 1 = (3 >> 1) - 1 = 0.
Just drop the tmu_bit completely as well as CONFIG_SYS_TMU_CLK_DIV.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
d1da5d6cd8 sh: tmu: Clean up CONFIG_SYS_TMU_CLK_DIV
This constant is always 4 , for all boards that exist. Define it
once in arch/sh/lib/time.c and remove it from the configs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15 03:19:07 +02:00
Marek Vasut
2606deb22b sh: sh7724: Drop EDMR macro
Drop the macro as it is never used and it collides with sh_eth.h macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-09-15 03:19:06 +02:00
Dalon Westergreen
02d8d32591 socfpga: stratix10: fix sdram_calculate_size
Incorrect type of size variable results in 0 being
returned for sdram sizes greater than or equal to
4GB.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2018-09-15 03:17:01 +02:00
Tom Rini
ecb10a41c9 Revert "ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL"
This commit is breaking several variants of da850, so:

This reverts commit 5f389201de.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-14 13:52:15 -04:00
Heiko Schocher
df158705a8 imx: imx6ull: fix pinmux input_val for uart5 rx pin
just try to bring up an imx6ull board with console
on uart5 and found, that input_val for pin
MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX is 7 and
not 5 on imx6ull.

With this patch rx works now.

Signed-off-by: Heiko Schocher <hs@denx.de>
2018-09-14 15:22:52 +02:00
Fabio Estevam
82a8a93327 pico-imx6ul: Convert to SPL
There are two versions of imx6ul pico SOMs: one with 256MB and another
one with 512MB of RAM.

Convert to SPL so that both versions can be supported. This patch
doesn't rework the clock initialization to avoid changing the behavior
in this same patch, so it will be cleaned up in future.

Currently only the 256MB is tested/supported.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-14 15:04:24 +02:00
Adam Ford
5f389201de ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL
With DM enabled, this patch enables DM_SERIAL and removes
the NS16550 initialization from da850_lowlevel since the driver
will take care of that itself.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:42:41 -04:00
Adam Ford
668146128a ARM: mach-omap2: Don't initialize I2C if DM_I2C is enabled
boot-common.c checks to see if I2C is enabled in SPL, but
it doens't check for DM_I2C before initializing it.  This
will now only initialize the I2C is the DM_I2C is not enabled
to avoid initializing it more than once.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11 21:39:02 -04:00
Adam Ford
abb205ded1 ARM: dts: da850-evm-u-boot: Remove redundant entries
With the re-sync from Linux 4.18, several entries in
da850-evm-u-boot.dtsi are no longer necessary, so this patch
removes them.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:38:08 -04:00
Adam Ford
8e12559193 arm: dts: da850: Re-sync da850-evm.dts from Linux 4.18
Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:38:04 -04:00
Tom Rini
d1e15041ab Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2018-09-11 08:50:10 -04:00
Lokesh Vutla
853f7f5018 arm64: dts: k3: Add u-boot specific nodes
Add the minimum dt nodes required to boot. These nodes
will get deleted as kernel gets these nodes added in the
main dts files.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
ea8ad1d9b6 arm64: dts: k3: Add Support for AM654 SoC
Add initial DT support for AM654 EVM that runs on A53.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
0911d95263 board: ti: am654: a53: Add initial support for am654
Add initial support for AM654 based EVM running on A53. Enable
4GB of DDR available on the EVM so that kernel DTB file
can be updated accordingly.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[Andreas: Added 4GB ddr support]
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
3980b16137 gpio: do not include <asm/arch/gpio.h> for ARCH_K3
As no gpio.h is defined in arch/arm/mach-k3/include/,
to avoid compilation failure, do not include asm/arch/gpio.h.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
82f29fd513 armv8: K3: am654: Add support for generating build targets
Update Makefile to generate
- tispl.bin: First stage bootloader on ARMv8 core
- u-boot.img: Second stage bootloader on ARMv8 core.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
e091832f25 armv8: K3: am654: Add custom MMU support
Add MMU mappings for AM654 SoC.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Andreas Dannenberg
c68721d93a arm: K3: am654: Unlock control module registers during init
By default the device control module registers are locked,
preventing any writes to its registers.
Unlock those registers as part of the init flow.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
e00646099f arm: K3: am654: Add support for boot device detection
AM654 allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, ROM stores a value at a particular
address. Add support for reading this information and determining
the boot media correctly.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
f70b72e353 arm: K3: Update _start instruction
On K3 family SoCs, once the ROM loads image on R5, M3 resets R5 and
expects to start executing from 0x0. In order to handle this ROM
updates the boot vector of R5 such that first 64 bytes of image load
address are mapped to 0x0.

In this case, it is SPL's responsibility to jump to the proper image
location. So, update the PC with address of reset vector(like how
other exception vectors are handled), instead of branching to reset.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
ed0e605124 arm: K3: Add support for AM654 SoC definition
The AM654 device is designed for industrial automation and PLC
controller class platforms among other applications. Introduce
base support for AM654 SoC.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
586bde93eb arm: K3: Add initial support for TI's K3 generation of SoCs
Add support for Texas Instruments' K3 Generation Processor
families.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11 08:32:55 -04:00
Masahiro Yamada
e39eed8f47 ARM: uniphier: remove ad-hoc clock enabling for EHCI
The MIO clock is enabled by default, and the STDMAC clock is
enabled by the clk driver.  The ad-hoc way to enable the clock
is no longer needed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11 20:37:19 +09:00
Masahiro Yamada
c3ab1e118f mmc: uniphier-sd: sync with Linux
Sync with the driver code and the binding recently merged in Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11 20:37:18 +09:00
Masahiro Yamada
33aae6b5ed ARM: dts: uniphier: sync DT with Linux 4.19-rc1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11 20:37:16 +09:00
Vikas Manocha
d22336aad9 arm: armv7m: clean up armv7m unified code compilation
unified syntax should be selected by config ARM_ASM_UNIFIED

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2018-09-10 21:19:33 -04:00
Vikas Manocha
680223a2da arm: armv7m: remove un-necessary If then instruction
With gas option -mimplicit-it=always, IT block is inserted by the assembler
for thumb2.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2018-09-10 21:19:33 -04:00
Vikas Manocha
17d2887a9e arm: stm32: Remove redundant thumb build selection
All armv7m arch builds are thumb & SYS_THUMB_BUILD is already selected by
CPU_ARMV7M.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2018-09-10 21:19:33 -04:00
Quentin Schulz
d2d908d258 arm: spear: enable GPIO3 and 4 clocks when the GPIO controller driver is built
There are multiple GPIOs that can be used with the same driver depending
on the CONFIG_GPIO_BASE defined in the controller driver.

GPIO3 and 4 require a clock to be enabled so let's enable them when the
driver is built.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
2018-09-10 21:19:32 -04:00
Thomas Fitzsimmons
3f20321ad8 board: arm: Add support for Broadcom BCM7260
Add support for loading U-Boot on the Broadcom 7260 SoC.  This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
2018-09-10 21:19:31 -04:00
Adam Ford
93b283d49f ARM: CPU: arm926ejs: Consolidate cache routines to common file
Four different boards had different options for enabling cache
that were virtually all the same.  This consolidates these
common functions into arch/arm/cpu/arm926ejs/cache.c

This also has the positive side-effect of enabling cache on
the Davinci (da850) boards.

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Add mach-at91 to the list of consolidations]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-10 21:19:16 -04:00
Eugen Hristev
51330c72f0 at91: fix devicetree warnings
This commit fixes various devicetree warnings in the at91 devicetrees
like:
arch/arm/dts/sama5d36ek_cmp.dtb: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

These warnings make buildman report failed builds for most of at91 boards.
Thus, fixing it.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-10 20:48:18 -04:00
Eugen Hristev
6e18adaf11 ARM: dts: Makefile: fix build for at91family
For at91family, makefile was building unwanted DTBs
Moved them under specific target configuration.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-10 20:48:18 -04:00
Masahiro Yamada
dee37fc99d Remove <inttypes.h> includes and PRI* usages in printf() entirely
In int-ll64.h, we always use the following typedefs:

  typedef unsigned int         u32;
  typedef unsigned long        uintptr_t;
  typedef unsigned long long   u64;

This does not need to match to the compiler's <inttypes.h>.
Do not include it.

The use of PRI* makes the code super-ugly.  You can simply use
"l" for printing uintptr_t, "ll" for u64, and no modifier for u32.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-10 20:48:17 -04:00
Masahiro Yamada
3747bdbb2b arch: types.h: factor out fixed width typedefs to int-ll64.h
All architectures have the same definition for s8/16/32/64
and u8/16/32/64.

Factor out the duplicated code into <asm-generic/int-ll64.h>.

BTW, Linux unified the kernel space definition into int-ll64.h
a few years ago as you see in Linux commit 0c79a8e29b5f
("asm/types.h: Remove include/asm-generic/int-l64.h").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-10 20:48:16 -04:00
Masahiro Yamada
9865543ae6 Remove CONFIG_USE_STDINT
You do not need to use the typedefs provided by compiler.

Our compilers are either IPL32 or LP64.  Hence, U-Boot can/should
always use int-ll64.h typedefs like Linux kernel, whatever the
typedefs the compiler internally uses.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-10 20:48:16 -04:00
Adam Ford
de39dc7162 arm: armv7-a: Compile and tune for armv7-a instead of armv5
arch/arm/Makefile references armv5 for backwards compatibility with
older compilers.  This patch removes those references to armv5,
since by now newer compilers are required which should have armv7
support enabled.

The Makefile also also has a list of options for mtune, but the
entry for CONFIG_CPU_V7A is empty, so this patch tunes the
CPU_V7A architecture to generic-armv7-a.

The following size changed apply to omap3_logic using GCC.

Stock
text data bss dec hex filename
50910 429 67580 118919 1d087 spl/u-boot-spl
540713 22700 327072 890485   d9675 u-boot

Without Armv5
text data bss dec hex filename
50916 429 67580 118925   1d08d spl/u-boot-spl
540719 22700 327064 890483   d9673 u-boot

mtune=generic-armv7-a
text data bss dec hex filename
50932 429 67580 118941   1d09d spl/u-boot-spl
540519 22700 327080 890299   d95bb u-boot

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-10 20:48:16 -04:00
Chen-Yu Tsai
792b204798 ARM: Specify aligned address for secure section instead of using attributes
In commit a1274cc94a ("ARM: Page align secure section only when it is
executed in situ"), we used output section attributes (the "ALIGN"
keyword after the colon) to specify the alignment requirements. Using
the constant "COMMONPAGE" there was recently broken in binutils 2.31 [1].

Binutils maintainer Alan Modra suggested the former method would still
work. Since both methods achieve the same result, this patch does just
that. This fixes the "reboot after bootm" issue we've been seeing on
sunxi when booting non-secure.

  [1] https://sourceware.org/bugzilla/show_bug.cgi?id=23571

Suggested-by: Alan Modra <amodra@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-07 09:11:42 -04:00
Adam Ford
548c35ff6e ARM: dts: logicpd-torpedo-37xx-devkit-u-boot: Fix MMC Card Detect
When re-syncing the DTS files from the kernel, something caused
the MMC driver to no longer detect the MMC card. Undoing the
CD-invert appears to fix the issue.

Fixes: e6ea2390cd ("ARM: DTS: Resync LogicPD-Torpedo-37xx-devkit
with Linux 4.18-RC4")

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-05 16:01:22 -04:00
Tom Rini
8a51db1d54 Merge tag 'arc-updates-for-2018.09' of git://git.denx.de/u-boot-arc
Minor changes for ARC

1. Fix CPU clock value in HSDK's .dts so time is counted properly.
2. Enable bootelf command on EMDK
2018-09-05 11:39:03 -04:00
Eugeniy Paltsev
13e57722fe ARC: HSDK: Fix timer frequency value
CPU (and hence cpu timers) on HSDK board runs at 500MHz after
preloader so fix wrong CPU frequency value in hsdk.dts

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2018-09-05 18:11:45 +03:00
Tom Rini
b2f90c461e Merge branch 'master' of git://git.denx.de/u-boot-imx 2018-09-04 17:45:53 -04:00
Anson Huang
57b620255e imx: mx7: add system suspend/resume support
This patch adds system suspend/resume support,
when linux kernel enters deep sleep mode, SoC will go
into below mode:

 - CA7 platform goes into STOP mode;
 - SoC goes into DSM mode;
 - DDR goes into self-refresh mode;
 - CPU0/SCU will be powered down.

When wake up event arrives:

 - SoC DSM mdoe exits;
 - CA7 platform exit STOP mode, SCU/CPU0 power up;
 - Invalidate L1 cache;
 - DDR exit self-refresh mode;
 - Do secure monitor mode related initialization;
 - Jump to linux kernel resume entry.

Belwo is the log of 1 iteration of system suspend/resume:

[  338.824862] PM: suspend entry (deep)
[  338.828853] PM: Syncing filesystems ... done.
[  338.834433] Freezing user space processes ... (elapsed 0.001 seconds) done.
[  338.842939] OOM killer disabled.
[  338.846182] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
[  338.869717] PM: suspend devices took 0.010 seconds
[  338.877846] Disabling non-boot CPUs ...
[  338.960301] Retrying again to check for CPU kill
[  338.964953] CPU1 killed.
[  338.968104] Enabling non-boot CPUs ...
[  338.973598] CPU1 is up
[  339.267155] mmc1: queuing unknown CIS tuple 0x80 (2 bytes)
[  339.275833] mmc1: queuing unknown CIS tuple 0x80 (7 bytes)
[  339.284158] mmc1: queuing unknown CIS tuple 0x80 (6 bytes)
[  339.385065] PM: resume devices took 0.400 seconds
[  339.389836] OOM killer enabled.
[  339.392986] Restarting tasks ... done.
[  339.398990] PM: suspend exit

The resume entry function has to initialize stack pointer before calling
C code, otherwise there will be an external abort occur, in additional,
invalidate L1 cache must be done in secure section as well, so this
patch also adds assembly code back and keep it as simple as possible.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
2018-09-04 08:47:23 +02:00
Anson Huang
b059837850 imx: mx7: add gpc initialization for low power mode
Add i.MX7D GPC initialization for low power mode
support like system suspend/resume from linux kernel:

 - Pending IOMUXC IRQ to workaround GPC state machine issue;
 - Mask all GPC interrupts for M4/C0/C1;
 - Configure SCU timing;
 - Configure time slot ack;
 - Configure C0/C1 power up/down timing;
 - Configure wakeup source mechanism;
 - Disable DSM/RBC related settings.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-09-04 08:47:23 +02:00
Anson Huang
11e52bca84 imx: mx7: psci: improve cpu hotplug flow
This patch improves cpu hotplug, previous cpu_off
implementation is NOT safe, a CPU can NOT power down
itself in runtime, it will cause system bus hang due
to pending transaction. So need to use other online
CPU to kill it when it is ready for killed.

Here use SRC parameter register and a magic number
of ~0 as handshake for killing a offline CPU,
when the online CPU checks the psci_affinity_info,
it will help kill the offline CPU according to
the magic number stored in SRC parameter register.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-09-04 08:47:23 +02:00
Martin Kaiser
69f78cf840 watchdog: mx25: use the imx_watchdog driver for mx25
The existing imx_watchdog driver is compatible with mx25 chipsets.
Add a WDOG1_BASE_ADDR define for the base address and enable the driver
in watchdog's Makefile.

To use the driver, a board must define CONFIG_IMX_WATCHDOG and
CONFIG_HW_WATCHDOG.

This fixes an issue when booting an mx25 chip via usb/serial. In this
case, the boot rom will always enable the watchdog. If u-boot is running
in interactive mode and the watchdog is not serviced, the system is
rebooted when the watchdog expires.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-09-04 08:47:23 +02:00
Ye Li
25baafc44c dts: imx6ul_evk: Add DTS files for 14x14 EVK and 9x9 EVK boards
Add the board DTS files for 14x14 EVK and 9x9 EVK. They are necessary
for converting to use u-boot DM driver.

Two -u-boot.dtsi are added to modify compatible string of SPI flash
device to "spi-flash".

Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04 08:47:23 +02:00
Ye Li
9e1e6f6fe8 dts: imx6ul: Update alias to support DM
Add spi0 alias for qspi for enabling DM SPI.
Change usb alias for usbotg1 and usbotg2 for enabling DM USB

Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04 08:47:23 +02:00
Ye Li
3b82335015 imx: imx7d-sdb: Add DM QSPI support
On iMX7D SabreSD board, the QSPI has pins conflict with EPDC (default).
To use QSPI, users have to rework the board (de-populate R388-R391, R396-R399
populate R392-R395, R299, R300). So we add new DTS file and new defconfig
dedicated for QSPI.

Other changes to support the DM QSPI:
 - Add QSPI node and alias spi0.
 - Modify spi4 (spi-gpio) node and add alias spi5 for it to avoid req
   conflict
 - Add EPDC node in imx7d.dtsi and disable it in imx7d-sdb-qspi.dts to
   align with kernel and also present the conflict.
 - Add -u-boot.dtsi to modify compatible string of mx25l51245g@0 to
   "spi-flash"
 - Remove iomux settings of qspi in board codes which is not needed
   for DM driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04 08:47:23 +02:00
Ye Li
0925ee2185 imx: imx6sx-sabreauto: convert to use DM QSPI driver
To support DM QSPI driver:
 - Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string
   to "spi-flash" and add "num-cs" property.
 - Enable DM SPI and DM SPI FLASH configurations
 - Remove iomux settings of qspi1 in board codes which is not needed
   for DM driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04 08:47:23 +02:00
Ye Li
536c5c7a33 imx: imx6sx-sdb: Enable DM QSPI driver
To support DM QSPI driver
 - Add spi0 and spi1 alias for qspi1 and qspi2.
 - Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string
   to "spi-flash" and add "num-cs" property.
 - Enable DM SPI/QSPI relavent configurations
 - Remove iomux settings of qspi2 in board codes which is not needed
   for DM driver.
 - Add sf default settings. So running "sf probe" can detect the flash

Signed-off-by: Ye Li <ye.li@nxp.com>
2018-09-04 08:47:23 +02:00
Tom Rini
4b69e870e9 Merge branch 'master' of git://git.denx.de/u-boot-rockchip 2018-08-30 10:06:19 -04:00
Bin Meng
e69cc6bc42 x86: zimage: Remove acpi_rsdp_addr propagation to kernel boot parameters
As of today, the proposal of adding "acpi_rsdp_addr" to the kernel
boot protocol does not make its way to the kernel mainline. This
creates some confusion if we leave it in the U-Boot code base.
Remove it for now until we have a clear picture with kernel upstream.

Note this eventually does a partial revert to commit 3469bf4274
("x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters")

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-30 11:23:15 +08:00
Bin Meng
1fdeacd32c x86: zimage: Support booting Linux kernel from an EFI payload
At present Linux kernel loaded from U-Boot as an EFI payload does
not boot. This fills in kernel's boot params structure with the
required critical EFI information like system table address and
memory map stuff so that kernel can obtain essential data like
runtime services and ACPI table to boot.

With this patch, now U-Boot as an EFI payload becomes much more
practical: it is another option of kernel bootloader, ie, can be
a replacement for grub.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-30 11:23:14 +08:00
Bin Meng
aac79251c7 x86: efi: payload: Install E820 map from EFI memory map
This implements payload-specific install_e820_map() to get E820 map
from the EFI memory map descriptors.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-30 09:56:58 +08:00
Kever Yang
feb64f9d51 rockchip: dts: fix unnecessary '-cells' warning
Fix warning below:
unnecessary #address-cells/#size-cells without "ranges" or child "reg"
property

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-08-29 20:44:50 +02:00
Masahiro Yamada
c6cca10b9c cmd: ubi: change 'default y' for SUNXI to 'imply' in Kconfig
It is not preferred to put SUNXI-specific code in the common place.

Change it to 'imply' property of ARCH_SUNXI.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-08-26 12:24:03 -04:00
Tom Rini
a376702f76 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-08-24 16:11:12 -04:00
Tom Rini
15fd1b7903 Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-08-24 16:11:01 -04:00
Thomas Fitzsimmons
a5e34fc0b6 board: arm: bcmstb: Declare get_ticks in timer.h
In an earlier proposed patch, bcmstb.c implemented timer_read_counter,
but it was updated to implement get_ticks instead.  This patch updates
the declaration in timer.h accordingly.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
2018-08-24 13:20:19 -04:00
Marek Vasut
a029f540c5 ARM: dts: socfpga: Add missing NAND reset
The NAND reset is missing from DT, so the reset manager cannot unreset the NAND.
Add the missing DT reset entry.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:21 +02:00
Marek Vasut
b67f80148e ARM: dts: socfpga: Drop ad-hoc UART clock frequency encoding from DT
The UART clock frequency can be obtained from the clock framework by the
ns16550 driver, so drop this redundant DT node.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:21 +02:00
Marek Vasut
331c372210 ARM: socfpga: Convert Arria10 to timer framework
Switch the Arria10 from ad-hoc hardcoded timer to timer framework
and the DW APB timer driver. This allows the A10 to extract timer
information, like timer rate, from clock framework and thus DT
instead of having it hardcoded in U-Boot configuration files.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:20 +02:00
Marek Vasut
cca9af63a3 ARM: dts: socfpga: Flag timer clock as pre-reloc
Flag timer clock as DM pre-reloc, so that a timer driver can be used and
it can extract information about it's clock rate using the clock framework.
This patch also moves some of the pre-reloc flags into the core dtsi file,
this is because the timer is not board specific, but rather is used on all
boards.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:20 +02:00
Marek Vasut
0b8f6378cb ARM: socfpga: Reorder Arria10 SPL
The Arria10 SPL is a complete mess of calls to functions which are
called in the wrong context and it is surprise it works at all. This
patch tries to clean that mess up by shuffling the function calls
around and moving the calls into the correct context. Due to the
delicate nature of the reordering, this is done in one huge patch.

The following changes happen in this patch:
- Security policy init and NIC301 happens first in board_init_f()
- The clock init happens very early in board_init_f() in SPL only
- arch_early_init_r() only registers the FPGA, just like on Gen5
- arch_early_init_r() is never called from any _f() function
- Dedicated FPGA pins are inited in board_init_f() as on Gen5

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:20 +02:00
Ley Foon Tan
8497cb9b25 arm: socfpga: stratix10: Fix mailbox urgent command with urgent register
According to mailbox spec, software should send urgent command with
urgent register instead of COUT location. This patch write urgent
command index to urgent register.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:20 +02:00
Ley Foon Tan
db3b5e9898 arm: socfpga: stratix10: Enable EMAC to FPGA bridge based on handoff
Code checking and setting EMAC use fpga is in
populate_sysmgr_fpgaintf_module(). So, call to sysmgr_pinmux_init()
instead of populate_sysmgr_pinmux().
In sysmgr_pinmux_init(), it will call to both populate_sysmgr_pinmux()
and populate_sysmgr_fpgaintf_module().

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-24 12:05:20 +02:00