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https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
sh: tmu: Clean up CONFIG_SH_TMU_CLK_FREQ
The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2, while the old SH parts use CONFIG_SYS_CLK_FREQ directly. Just put this into the TMU implementation and drop the CONFIG_SH_TMU_CLK_FREQ config option. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This commit is contained in:
parent
ae59a9f8f7
commit
ccce3acfe7
31 changed files with 5 additions and 38 deletions
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@ -22,7 +22,11 @@ static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;
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unsigned long get_tbclk(void)
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{
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return CONFIG_SH_TMU_CLK_FREQ / 4;
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#ifdef CONFIG_RCAR_GEN2
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return CONFIG_SYS_CLK_FREQ / 8;
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#else
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return CONFIG_SYS_CLK_FREQ / 4;
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#endif
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}
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unsigned long timer_read_counter(void)
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@ -91,7 +91,6 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 33333333
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __MIGO_R_H */
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@ -37,8 +37,6 @@
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0xffffffff\0" \
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@ -112,7 +112,6 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 33333333
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __AP325RXA_H */
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@ -100,7 +100,6 @@
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#else
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#define CONFIG_SYS_CLK_FREQ 44444444
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#endif
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __AP_SH4A_4A_H */
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@ -91,7 +91,6 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 50000000
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __ARMADILLO_800EVA_H */
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@ -52,7 +52,6 @@
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
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/* ENV setting */
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#if !defined(CONFIG_MTD_NOR_FLASH)
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@ -131,7 +131,6 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 41666666
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __ECOVEC_H */
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@ -69,7 +69,6 @@
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/* Clock */
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#define CONFIG_SYS_CLK_FREQ 66666666
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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/* Ether */
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@ -33,8 +33,6 @@
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0xffffffff\0" \
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@ -33,8 +33,6 @@
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0xffffffff\0" \
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@ -34,8 +34,6 @@
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0xffffffff\0" \
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@ -49,7 +49,6 @@
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/* Clocks */
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#define CONFIG_SYS_CLK_FREQ 24000000
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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/* UART */
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@ -60,7 +60,6 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 33333333
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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/* PCMCIA */
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@ -82,7 +82,6 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 33333333
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __MS7722SE_H */
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@ -62,7 +62,6 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 33333333
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __MS7750SE_H */
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@ -38,8 +38,6 @@
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0xffffffff\0" \
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@ -98,7 +98,6 @@
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#else
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#define CONFIG_SYS_CLK_FREQ 44444444
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#endif
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __R0P7734_H */
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@ -46,7 +46,6 @@
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* SuperH Clock setting
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*/
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#define CONFIG_SYS_CLK_FREQ 60000000
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */
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@ -71,7 +71,6 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 33333333
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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/* PCI Controller */
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@ -58,7 +58,6 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 33333333
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
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#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
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@ -47,7 +47,6 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 36000000
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
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#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
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@ -46,7 +46,6 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 66125000
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
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#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
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@ -75,6 +75,5 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 48000000
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __SH7752EVB_H */
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@ -75,6 +75,5 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 48000000
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __SH7753EVB_H */
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@ -87,6 +87,5 @@
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 48000000
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __SH7757LCR_H */
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@ -69,7 +69,6 @@
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/* Clock */
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#define CONFIG_SYS_CLK_FREQ 66666666
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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/* Ether */
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@ -126,7 +126,6 @@
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/* Board Clock */
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/* The SCIF used external clock. system clock only used timer. */
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#define CONFIG_SYS_CLK_FREQ 50000000
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __SH7785LCR_H */
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@ -78,7 +78,6 @@
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#else
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#define CONFIG_SYS_CLK_FREQ 33333333
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#endif /* CONFIG_T_SH7706LSR */
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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/* Network device */
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@ -38,8 +38,6 @@
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0xffffffff\0" \
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@ -42,8 +42,6 @@
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0xffffffff\0" \
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