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ARM: dts: stm32mp1: Add usb gadget support for stm32mp157c-ev1 board
Add DT nodes to enable DWC2 gadget support Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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4 changed files with 55 additions and 0 deletions
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@ -321,6 +321,12 @@
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bias-disable;
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};
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};
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usbotg_hs_pins_a: usbotg_hs-0 {
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pins {
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pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
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};
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};
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};
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pinctrl_z: pin-controller-z@54004000 {
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@ -25,6 +25,10 @@
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regulator-always-on;
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};
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&usbotg_hs {
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g-tx-fifo-size = <576>;
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};
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/* SPL part **************************************/
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&qspi {
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u-boot,dm-spl;
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@ -60,3 +64,4 @@
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&flash0 {
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u-boot,dm-spl;
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};
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@ -96,6 +96,14 @@
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};
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};
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&usbotg_hs {
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pinctrl-names = "default";
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pinctrl-0 = <&usbotg_hs_pins_a>;
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phys = <&usbphyc_port1 0>;
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phy-names = "usb2-phy";
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status = "okay";
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};
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&usbphyc {
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status = "okay";
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};
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@ -106,6 +106,26 @@
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};
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};
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pm_domain {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32mp157c-pd";
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pd_core_ret: core-ret-power-domain@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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#power-domain-cells = <0>;
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label = "CORE-RETENTION";
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pd_core: core-power-domain@2 {
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reg = <2>;
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#power-domain-cells = <0>;
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label = "CORE";
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};
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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@ -654,6 +674,22 @@
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status = "disabled";
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};
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usbotg_hs: usb-otg@49000000 {
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compatible = "st,stm32mp1-hsotg", "snps,dwc2";
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reg = <0x49000000 0x10000>;
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clocks = <&rcc USBO_K>;
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clock-names = "otg";
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resets = <&rcc USBO_R>;
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reset-names = "dwc2";
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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g-rx-fifo-size = <256>;
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g-np-tx-fifo-size = <32>;
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g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
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dr_mode = "otg";
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power-domains = <&pd_core>;
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status = "disabled";
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};
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rcc: rcc@50000000 {
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compatible = "st,stm32mp1-rcc", "syscon";
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reg = <0x50000000 0x1000>;
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