Commit graph

2354 commits

Author SHA1 Message Date
Simon Glass
ec107f04b6 rockchip: chromebook_minnie: Enable sound
Enable sound for this board, which has the same codec as jerry.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
615e9b3cce rockchip: px5: add timer0 dts node as tick timer
Let's use rockchip timer before stimer patches can be merged.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
4d9dd40d68 rockchip: px5 update dts for spl/tpl
TPL need dmc to init ddr sdram, and emmc, boot-order.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
d55dbfed16 rockchip: rk322x: dts: enable uart2 for SPL/TPL
When we use DM_SERIAL for serial driver, we need enable the
dts node for the debug console.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Tom Rini
8d7f06bbbe Merge branch 'master' of git://git.denx.de/u-boot-sh
- RZ/A1 addition.
- Old board removal.
2019-05-07 09:38:00 -04:00
Chris Brandt
ba932bc846 ARM: dts: renesas: Add RZ/A1 GR-Peach board
Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach,
which is a cheap development platform with RZ/A1H SoC. The
DTs are imported from Linux 5.0.11, commit d5a2675b207d .

Currently supported are UART, ethernet and RPC SPI. The board
can be booted from RPC SPI by writing the u-boot.bin binary
to the beginning of the SPI NOR, e.g. using the "sf" command.
The board can also be booted via JTAG by setting text base to
0x20020000, loading u-boot.bin there via JTAG and executing it
from that address.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Chris Brandt
3529596442 ARM: dts: renesas: Add RZ/A1 platform code
Add platform code and DTs for Renesas RZ/A1 R7S72100 SoC.
Distinguishing feature of this SoC is that it has up to
10 MiB of on-SoC static RAM (SRAM).

The DTs are imported from Linux 5.0.11, commit d5a2675b207d .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Ley Foon Tan
bc17990876 arm: dts: Stratix10: Add SDRAM node
Add SDRAM device tree node.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-06 12:44:17 +02:00
Patrice Chotard
d51761ffc6 ARM: dts: stm32: Add qspi support for stm32f469-disco board
Add device tree nodes to support qspi for stm32f469-disco board.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06 09:50:28 +02:00
Patrice Chotard
78d5b61c0a ARM: dts: stm32: Set spi-rx/tx-bus-width to 4 for stm32f769-disco
As mx66l512 qspi flash supports quad input fast program and
quad input fast read, set spi-tx_bus-width and spi-rx_bus-width
to 4.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06 09:50:27 +02:00
Patrice Chotard
2f2f68fd91 ARM: dts: stm32: Remove useless spi-nor compatible string
Compatible string "micron,n25q128a13" is useless, remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06 09:50:27 +02:00
Patrice Chotard
7d549cc91f ARM: dts: stm32: Set spi-rx/tx-bus-width to 4 for stm32f746-disco
As n25q128 qspi flash supports quad input fast program and
quad input fast read, set spi-tx_bus-width and spi-rx_bus-width
to 4.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06 09:50:27 +02:00
Patrice Chotard
3fdc11b396 ARM: dts: stm32: Set spi-rx/tx-bus-width to 4 for stm32f746-eval
As n25q512a qspi flash supports quad input fast program and
quad input fast read, set spi-tx_bus-width and spi-rx_bus-width
to 4.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06 09:50:27 +02:00
Patrice Chotard
48769a2824 ARM: dts: stm32: add qspi flash compatible string for stm32f746-eval
Add missing flash compatible string to be able to read/write into
qspi flash.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06 09:50:27 +02:00
Patrice Chotard
b42721d644 ARM: dts: stm32: add qspi flash compatible string for stm32f769-disco
Add missing flash compatible string to be able to read/write into
qspi flash.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06 09:50:26 +02:00
Patrice Chotard
c987e086d9 ARM: dts: stm32: Fix qspi memory map size for stm32f7 boards
stm32f746-disco embeds a 16Mb qspi flash, stm32f746-eval and
stm32f769-disco embeds a 64Mb qspi flash.
Update the reg property accordingly

Remove deprecated memory-map property.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-05-06 09:50:26 +02:00
Tom Rini
4862830b69 Merge git://git.denx.de/u-boot-socfpga
- Misc MMC, FPGA bridge, general SoCFPGA fixes
2019-05-03 14:23:01 -04:00
Tom Rini
b362fe0848 Merge branch '2019-05-03-master-imports'
- Various btrfs fixes
- Various TI platform fixes
- Other fixes (cross build, taurus update, Kconfig help text)
2019-05-03 07:30:55 -04:00
Adam Ford
d66f4fe982 ARM: dts: logicpd-som-lv: Fix MMC1 card detect
The card detect pin was incorrectly using IRQ_TYPE_LEVEL_LOW
instead of GPIO_ACTIVE_LOW when reading the state of the CD pin.

Without this patch, MMC1 won't be detected.

This is the same patch submitted to linux-omap, but I was hoping
to get it applied to U-Boot without having to wait for the
linux adoption and then backporting.

Fixes: 5448ff33f2 ("ARM: DTS: Resync Logic PD SOM-LV 37xx
devkit with Linux 4.18-RC4")

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-05-03 07:30:31 -04:00
Vagrant Cascadian
59a1df084f ti: Add device-tree for am335x-pocketbeagle.
Add device-tree files from linux 5.1-rc7 needed to complete support
for PocketBeagle.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-05-03 07:30:31 -04:00
Andreas Dannenberg
7202af927b arm: dts: k3-am654: Sync IOPAD macros with Linux
Transition to the IOPAD macros as used in Linux in which the pin mux
mode is specified using a dedicated parameter while also dropping the
related MUX_MODEx macros that are no longer needed. This transition
will allow us to keep both Linux and U-Boot DTS in sync more easily.
While at it also align the file name of the include file itself and
update any references accordingly.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-05-03 07:30:31 -04:00
Heiko Schocher
0cac0fb022 at91: cleanup taurus port
- at91sam9g20-taurus.dts: use labels
- cleanup taurus port to compile clean with
  current mainline again. SPL has no serial
  output anymore, so it fits into SRAM.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-05-03 07:30:31 -04:00
Andreas Dannenberg
12df71cd74 armv7R: dts: k3: am654: Switch DMSC TX message thread ID
Switch from using the high priority DMSC transmit message queue used
by the secure R5 MCU island boot context to the low priority message
queue. While the change in priority is irrelevant for the current boot
architecture it however gives us access to a deeper message queue that
will allow us to buffer more messages. This is an important aspect when
sending several messages without requesting and waiting for a response
in a row which is a communication scheme used during core shutdown for
example. See AM654 TISCI User Guide for additional details.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-05-03 07:23:17 -04:00
Tom Rini
3570ea1f98 Improvements and new features:
- improved SPI driver for better read throughput
 - refactors initialisation of debug UART init
 - restructures header file paths
 - adds pinctrl improvements
 
 Adds Kever as a co-custodian.
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Merge tag 'rockchip-for-2019.07' of git://git.denx.de/u-boot-rockchip

Improvements and new features:
- improved SPI driver for better read throughput
- refactors initialisation of debug UART init
- restructures header file paths
- adds pinctrl improvements

Adds Kever as a co-custodian.
2019-05-01 11:52:04 -04:00
Tom Rini
b4ee6daad7 Porting to DM and i.MX8
------------------------
 
 - warp7 to DM
 - kp_imx53 to DM
 - Warnings in DT
 - MX8QM support
 - colibri-imx6ull to DM
 - imx7d-pico to DM
 - ocotp for MX8
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Merge tag 'u-boot-imx-20190426' of git://git.denx.de/u-boot-imx

Porting to DM and i.MX8
------------------------

- warp7 to DM
- kp_imx53 to DM
- Warnings in DT
- MX8QM support
- colibri-imx6ull to DM
- imx7d-pico to DM
- ocotp for MX8
2019-05-01 07:25:51 -04:00
Jagan Teki
ed9c9059f2 rockchip: rk3399: Add Orangepi RK3399 support
Add initial support for Orangepi RK3399 board.

Specification
- Rockchip RK3399
- 2GB/4GB DDR3
- 16GB eMMC
- SD card slot
- RTL8211E 1Gbps
- AP6356S WiFI/BT
- HDMI In/Out, DP, MIPI DSI/CSI
- Mini PCIe
- Sensors, Keys etc
- DC12V-2A and DC5V-2A

Commit details about Linux DTS sync:
"arm64: dts: rockchip: Add support for the Orange Pi RK3399"
(sha1: d3e71487a790979057c0fdbf32f85033639c16e6)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Jagan Teki
e05b4a4fa8 rockchip: dts: rk3399: Create initial rk3399-u-boot.dtsi
u-boot,dm-pre-reloc is required for SDMMC booted rk3399 boards and
which is U-Boot specific devicetrees binding.

Move it on global rk3399-u-boot.dtsi file and rest of the U-Boot
bindings will move it future based on the requirement.

This would help to sync the devicetrees from Linux whenever required
instead of adding specific nodes.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Jagan Teki
288dbc66da rockchip: dts: rk3399: Sync rk3399-opp from Linux
Sync rk3399-opp.dtsi from Linux.

Linux commit details about the rk3399-opp.dtsi sync:
"arm64: dts: rockchip: use SPDX-License-Identifier"
(sha1: 4ee99cebd486238ac433da823b95cc5f8d8a6905)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Simon Goldschmidt
7110259f55 dts: arm: socfpga: fix socfpga_de10_nano console
Booting this board failed as the initial console isn't found since
commit c402e81702 ("dts: arm: socfpga: merge gen5 devicetrees from linux")

The uart0 devicetree entry was missing "clock-frequency = <100000000>:"
since that commit

Fixes: c402e81702 ("dts: arm: socfpga: merge gen5 devicetrees from linux")
Reported-by: rafael mello <rafaelmello_3@hotmail.com>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-29 20:33:23 +02:00
Heinrich Schuchardt
b85d155199 arm: dts: add missing vexpress device trees
Add the device trees for

* vexpress_ca5x2_defconfig
* vexpress_ca9x4_defconfig
* vexpress_ca15_tc2_defconfig

as available in Linux 5.1 rc5.

We are using the vexpress_ca15_tc2_defconfig and vexpress_ca9x4_defconfig
for Travis testing via QEMU.

The UEFI base Embedded Base Boot Requirements Specification (EBBR) requires
that an embedded board either provides a device tree or an ACPI table.

All block devices are meant to be moved to the driver model. On ARM this
requires a device tree.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-04-26 18:58:22 -04:00
Chris Packham
d55254ab77 ARM: kirkwood: add db-88f6281-bp board
This is Marvell's Kirkwood development board. It has the following
features

 - 512M DDR2
 - 2 PCI connectors
 - 1 x1 PCI-e interface
 - 1 Gigabit Ethernet Port
 - 2 SATA Ports
 - USB 2.0 Interface
 - SDIO
 - 128M NAND Flash
 - 16M SPI Flash

It can be strapped to boot from SPI or NAND so there are two defconfigs
(one per boot media).

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-26 07:35:38 +02:00
Stefan Roese
9408665709 arm: kirkwood: dts: Add openrd-* dtb makefile build targets
The following Kirkwood dtb build targets are currently missing:

kirkwood-openrd-base.dtb
kirkwood-openrd-client.dtb
kirkwood-openrd-ultimate.dtb

This patch adds them to the Makefile to fix the build error.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-26 07:35:38 +02:00
Pierre-Jean Texier
6b503f9e65 warp7: Switch to DM USB
This commit switches to DM USB for warp7 and warp7_bl33 defconfigs.

Signed-off-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-04-25 19:21:00 +02:00
Pierre-Jean Texier
0710726d04 warp7: Switch to DM Serial
This commit switches to DM SERIAL for warp7 and warp7_bl33 defconfigs.

Signed-off-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-04-25 19:20:32 +02:00
Marcel Ziswiler
d32273b91c ARM: dts: colibri-imx6ull: update device tree
Fix compatible node to use regular Toradex notation.
Annotate device tree with standard Colibri pin muxing comments.
Use open-drain I2C pin muxings.
Alphabetically re-order iomuxc nodes.
Rename snvs-ad7879-int-grp touch interrupt node as per Linux device tree.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25 19:18:50 +02:00
Marcel Ziswiler
d487351959 ARM: dts: colibri-imx6ull: add osc32k_32k_out pinctrl
Add GPIO1_IO03__OSC32K_32K_OUT pin muxing.
While at it also fix indentation of pinfunc header file.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25 19:18:46 +02:00
Marcel Ziswiler
7b69baea42 ARM: dts: i.MX6Q: fix avoid_unnecessary_addr_size warnings
Re-synced the device tree with Linux 5.0.

This fixes the following warnings:

w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
 port@2/endpoint@0:reg: property has invalid length (4 bytes)
 (#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
 port@2/endpoint@1:reg: property has invalid length (4 bytes)
 (#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
 port@2/endpoint@2:reg: property has invalid length (4 bytes)
 (#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
 port@2/endpoint@3:reg: property has invalid length (4 bytes)
 (#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
 port@2/endpoint@4:reg: property has invalid length (4 bytes)
 (#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
 port@3/endpoint@1:reg: property has invalid length (4 bytes)
 (#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
 port@3/endpoint@2:reg: property has invalid length (4 bytes)
 (#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
 port@3/endpoint@3:reg: property has invalid length (4 bytes)
 (#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
 port@3/endpoint@4:reg: property has invalid length (4 bytes)
 (#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@2/endpoint@0: Relying on default #address-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@2/endpoint@0: Relying on default #size-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@2/endpoint@1: Relying on default #address-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@2/endpoint@1: Relying on default #size-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@2/endpoint@2: Relying on default #address-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@2/endpoint@2: Relying on default #size-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@2/endpoint@3: Relying on default #address-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@2/endpoint@3: Relying on default #size-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@2/endpoint@4: Relying on default #address-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@2/endpoint@4: Relying on default #size-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@3/endpoint@1: Relying on default #address-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@3/endpoint@1: Relying on default #size-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@3/endpoint@2: Relying on default #address-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@3/endpoint@2: Relying on default #size-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@3/endpoint@3: Relying on default #address-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@3/endpoint@3: Relying on default #size-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@3/endpoint@4: Relying on default #address-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
 /soc/ipu@2800000/port@3/endpoint@4: Relying on default #size-cells
 value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_unnecessary_addr_size):
 Failed prerequisite 'avoid_default_addr_size'

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-25 19:16:24 +02:00
Parthiban Nallathambi
d8d33b6d4d imx: Add variscite DART-6UL Evaluation Kit
Port for the DART-6UL Evaluation Kit SBC. Based on the variscite
DART-6UL iMX6ULL SoM.

CPU:   Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 43C
Reset cause: POR
Model: Variscite DART-6UL Evaluation Kit
Board: Variscite DART-6UL Evaluation Kit
DRAM:  512 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial@02020000
Out:   serial@02020000
Err:   serial@02020000
Net:   FEC0

Working:
 - Eth0
 - i2c
 - MMC/SD
 - eMMC
 - USB host
 - UART 1

Note: LCDIF porting needs DM_VIDEO
https://lists.denx.de/pipermail/u-boot/2019-April/365506.html

Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-04-25 19:16:24 +02:00
Filip Brozovic
8e10571f09 dts: imx6ull: add USB aliases to support DM
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2019-04-25 19:16:24 +02:00
Joris Offouga
4e267b92fb pico-imx7d: Convert DM MMC
This patch enable convert DM MMC for imx7d-pico board and variant.

Before the DM conversion only usdhc3 was enabled and therefore it appeared
as MMC 0 to u-boot. After enabling MMC DM though usdhc3 defaults to MMC 2,
which left unattended would drive changes to existing pico-pi bootscripts and
environment variables that rely on mmc 0.

Setup the alias of mmc0 and usdhc3 so that existing pico-imx7d boot code will
work unmodified.

When converting to DM_MMC it is necessary that SPL initializes eMMC
by itself, so move the original eMMC initialization from U-Boot
proper to SPL.

Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-04-25 19:16:24 +02:00
Marcel Ziswiler
270f1fb7b2 arm: dts: imx8dx: add lpuart1, lpuart2, lpuart3
Add support for lpuart1, lpuart2 and lpuart3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25 19:16:24 +02:00
Joris Offouga
7c748933e3 Arm: imx7d-pico: Import all Linux device tree for Pico i.MX7D SOM
This patch imports the Linux kernel base board imx7d-pico.dtsi,
pi board imx7d-pico-pi.dts and hobbit board imx7d-pico-hobbit.dts
from Linux v5.1-rc1.

Signed-off-by: Joris Offouga <offougajoris@gmail.com>
2019-04-25 19:16:24 +02:00
Marcel Ziswiler
9233c3d377 ARM: dts: colibri-imx6ull: fix uart-has-rtscts property
Remove vendor pre-fix fsl, from uart-has-rtscts property.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25 17:03:25 +02:00
Marcel Ziswiler
5d67b73c1a colibri-imx6ull: migrate fec to using driver model
Migrate Ethernet FEC to using driver model.
Drop PHY_MICREL_KSZ90X1 which slipped in from Apalis iMX6.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25 17:03:25 +02:00
Marcel Ziswiler
87b32297f5 colibri-imx6ull: migrate usb to using driver model
Migrate USB to using driver model.
Add USBH_PEN GPIO regulator.
While at it also add alias e.g. as required for UMS.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25 17:03:25 +02:00
Marcel Ziswiler
535800d33f colibri-imx6ull: migrate mmc to using driver model
Migrate MMC to using driver model.
Migrate USDHC to using pinctrl.
While at it also add GPIO1_IO03__OSC32K_32K_OUT pin muxing.
While at it also update copyright period.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25 17:03:25 +02:00
Marcel Ziswiler
75b942df87 colibri_vf: fix ethernet by adding explicit phy node
The implicit fallback mechanism for searching the whole MDIO bus for at
least one PHY has been gone with the following commit b882005a18
("drivers/net/fec: phy_init: remove redundant logic"). This lead to the
Ethernet driver erroring out as follows:

Net:   Could not get PHY for FEC0: addr -19
eth-1: fec@400d1000
Colibri VFxx # dhcp
Could not get PHY for FEC0: addr -19
Could not get PHY for FEC0: addr -19
Could not get PHY for FEC0: addr -19
Could not get PHY for FEC0: addr -19
No ethernet found.
Could not get PHY for FEC0: addr -19
Colibri VFxx #

This commit adds an explicit PHY node which makes it work again.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25 17:03:25 +02:00
Peng Fan
0d331c035a imx: support i.MX8QM MEK board
Add i.MX8QM MEK board support.
Included a basic dts, enabled SPL FIT

Boot log as below:
U-Boot SPL 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800)
Normal Boot
Trying to boot from MMC2_2

U-Boot 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800)

CPU:   NXP i.MX8QM RevB A53 at 142933 MHz

Model: Freescale i.MX8QM MEK
Board: iMX8QM MEK
Build: SCFW 9330215b
Boot:  SD1
DRAM:  6 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment

In:    serial@5a060000
Out:   serial@5a060000
Err:   serial@5a060000
Net:
Error: ethernet@5b040000 address not set.
eth-1: ethernet@5b040000
Hit any key to stop autoboot:  0

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 17:03:25 +02:00
Peng Fan
b18da229a3 arm: dts: introduce dtsi for i.MX8QM
Introduce basic dtsi for i.MX8QM, only support SDHC/FEC/LPUART.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 17:03:25 +02:00
Lukasz Majewski
e626fcb6e2 DTS: Enable USB host support (including regulators) on HSC|DDC boards
This commit enables the support for K&P's HSC|DDC imx53 based boards.
It was also necessary to provide device tree description for regulators
to avoid board specific code definition.

The GPIO pin description responsible for VBUS control has been moved from
"hog" group to usbh1 dedicated one.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-25 17:03:25 +02:00
Lukasz Majewski
552b1b3142 DTS: Provide USB host DTS description for i.MX53 devices
This code has been ported from Linux kernel - tag v5.1-rc2.
The difference from the kernel is the removal of:
fsl,usbmisc = <&usbmisc 1>;
fsl,usbphy = <&usbphy1>;

properties, which are not needed for correct u-boot operation (as PHY
setup is done in ehci-mx5.c file itself).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-25 17:03:25 +02:00
Lukasz Majewski
fc77d4d6db DTS: Add esdhc3 device tree description tuning for HSC|DDC boards
In this commit the esdhc3 controller is enabled as well as it is remaped
to mmc0 to not break legacy code.

The pinctrl setup (e.g. 0x1e4) is the same as one from in-board file
definition.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-25 17:03:25 +02:00
Peng Fan
e5b8f7e665 imx8qxp: mek: enable dm-spl for pm
with u-boot,dm-spl added for imx8qx-pm node, and SPL_SIMPLE_BUS enabled,
the bind and probe code in board file could be removed.

Also we need to enlarge SYS_MALLOC_F_LEN to avoid calloc fail.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 17:03:25 +02:00
Tom Rini
c2bb9c5b9e STM32 MCUs update:
_ DT rework and alignment with DT kernel v4.20
 _ mmc: arm_pl180_mmci: Synchronize compatible with kernel v4.20
 _ mmc: stm32_sdmmc2: Synchronize properties with kernel v4.20
 _ configs: update for F746/769 boards
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Merge tag 'u-boot-stm32-mcu-20190423' of https://github.com/pchotard/u-boot

STM32 MCUs update:
- DT rework and alignment with DT kernel v4.20
- mmc: arm_pl180_mmci: Synchronize compatible with kernel v4.20
- mmc: stm32_sdmmc2: Synchronize properties with kernel v4.20
- configs: update for F746/769 boards
2019-04-24 12:26:39 -04:00
Tom Rini
ceb6ddbc73 - Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
 - Add support for the Libretech-AC AML-S805X-AC board
 - Add Amlogic AXG reset compatible
 - Add I2C support for Amlogic AXG
 - Fix AXG PIN and BANK pinctrl definitions
 - Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
 - Add initial support for Amlogic G12A SoC and U200 board
 - Enable PHY_REALTEK for selected boards
 - Fix Khadas VIM2 README
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Merge tag 'u-boot-amlogic-20190423' of git://git.denx.de/u-boot-amlogic

- Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
- Add support for the Libretech-AC AML-S805X-AC board
- Add Amlogic AXG reset compatible
- Add I2C support for Amlogic AXG
- Fix AXG PIN and BANK pinctrl definitions
- Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
- Add initial support for Amlogic G12A SoC and U200 board
- Enable PHY_REALTEK for selected boards
- Fix Khadas VIM2 README
2019-04-24 12:26:25 -04:00
Fabien Parent
def2fc05f6 ARM: MediaTek: Add support for MT8516 SoC
Add support for MediaTek MT8516 SoC. This include the file
that will initialize the SoC after boot and its device tree.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-04-23 17:57:26 -04:00
Shawn Guo
7c798a11d4 poplar: enable Ethernet driver support
The 'phy' reset of gmac device in kernel device tree is not generic
enough for u-boot to use, so we need to overwrite the 'resets' property
as needed.  With this device tree fixup and poplar_defconfig changes,
Ethernet starts working on Poplar board.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-23 17:57:25 -04:00
Philippe Reynes
4ae0542de7 dt: bcm963158: enable led controller
Enable the led controller in the device tree
of the board bcm963158.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-23 17:57:22 -04:00
Philippe Reynes
cfbb03be1c dt: bcm63158: add led controller
Add the led controller in the bcm63158 device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-23 17:57:22 -04:00
Philippe Reynes
9689921921 dt: bcm968580xref: enable led controller
Enable the led controller in the device tree
of the board bcm968580xref.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-23 17:57:14 -04:00
Patrice Chotard
c89b87cbfc ARM: dts: stm32: Update sdmmc binding for stm32mp157c-ed1
Update some sdmmc properties which have been updated with
v4.19 DT bindings:
      - st,dirpol becomes st,sig-dir
      - st,negedge becomes st,neg-edge
      - st,pin-ckin becomes st,use-ckin

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:31:56 +02:00
Patrice Chotard
e4995e61c9 ARM: dts: stm32: Update sdmmc binding for stm32h743i-eval
Update some sdmmc properties which have been updated with
v4.19 DT bindings:
      - st,dirpol becomes st,sig-dir
      - st,negedge becomes st,neg-edge
      - st,pin-ckin becomes st,use-ckin

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:31:52 +02:00
Patrice Chotard
60121266c9 ARM: dts: stm32: Restore old usart1 clock bindings for stm32f7
As U-boot stm32f clock driver doesn't support new
bindings for auxiliary clocks (clocks = <&rcc 1 ....>),
restore old bindings for usart1 to get console output.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:31:21 +02:00
Patrice Chotard
13ba6d0e6f ARM: dts: stm32: Sync DT with v4.20 kernel for stm32h7
Synchronize stm32h7 device tree with kernel v4.20.
U-boot DT files and pinctrl bindings are updated,
useless nodes are removed and gpio compatible added.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:31:17 +02:00
Patrice Chotard
1056303148 ARM: dts: Migrate U-boot nodes to U-boot DT files for stm32h7
In order to prepare and ease future DT synchronization with kernel
DT, migrate all U-boot specific nodes/properties/addons to
U-boot DT files.

As sdmmc is not yet supported on kernel side, sdmmc nodes
are located in eval-u-boot and disco-u-boot DT files.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:31:11 +02:00
Patrice Chotard
fe63d3cfb7 ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7
Synchronize stm32f7 device tree with kernel v4.20.

All pinctrl bindings are updated.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:31:06 +02:00
Patrice Chotard
01aabf97d1 ARM: dts: stm32: Migrate U-boot nodes to U-boot DT files for stm32f7
In order to prepare and ease future DT synchronization with kernel
DT, migrate all U-boot specific nodes/properties/addons to
U-boot DT files.

Migrate also DT nodes which are not yet available on kernel DT side
as ethernet, ltdc and qspi nodes.

Fix ethernet_mii pins and add missing qspi_pins for stm32746g-eval

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:31:01 +02:00
Patrice Chotard
71dfd5f3f5 ARM: dts: stm32: Sync DT files with v4.20 kernel for stm32f4
Synchronize stm32f7 device tree with kernel v4.20.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:30:57 +02:00
Patrice Chotard
933f84cab9 ARM:dts: stm32: sort nodes by alphabetical order in f4 u-boot files
Sort nodes alphabetically to be coherent with all others STM32 DT files.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:30:52 +02:00
Neil Armstrong
f9e605437e ARM: dts: Import Amlogic G12A u200 DT from Linux 5.1-rc1
Import Linux 5.1-rc1 DT from 9e98c678c2d6 ("Linux 5.1-rc1") for the
meson-g12a-u200 board, the meson-g12a.dtsi and the corresponding bindings.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-04-23 11:19:09 +02:00
Philippe Reynes
7526582441 dt: bcm6858: add led controller
Add the led controller in the bcm6858 device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22 18:13:24 -04:00
Philippe Reynes
b2aa518a62 dt: bcm963158: enable nand controller
Enable the nand controller in the device tree
of the board bcm963158.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22 12:06:39 -04:00
Philippe Reynes
6242e9a82a dt: bcm63158: add nand controller
Add the nand controller in the bcm63158 device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22 12:06:38 -04:00
Philippe Reynes
2463ad34b0 dt: bcm968580xref: enable nand controller
Enable the nand controller in the device tree
of the board bcm968580xref.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22 12:06:38 -04:00
Philippe Reynes
24e27a180a dt: bcm6858: add nand controller
Add the nand controller in the bcm6858 device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22 12:06:30 -04:00
Tom Rini
8a94262435 Second set of u-boot-atmel features and fixes for 2019.07 cycle
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Merge tag 'u-boot-atmel-2019.07-b' of git://git.denx.de/u-boot-atmel

Second set of u-boot-atmel features and fixes for 2019.07 cycle
2019-04-22 10:28:21 -04:00
Tom Rini
6c5f8dd540 Merge branch 'master' of git://git.denx.de/u-boot-usb
- Various fastboot, dwc2/stm32 updates
2019-04-21 19:00:04 -04:00
Tom Rini
b4fde1633e Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Various stratix10, gen5 updates
2019-04-21 18:59:30 -04:00
Patrick Delaunay
6fe7dd3327 stm32mp1: add stusb1600 support for DK1 and DK2 board
The DK1 and DK2 boards use the USB Type-C controller STUSB1600.
This patch updates:
- the device tree to add the I2C node in the DT
- the board stm32mp1 to probe this I2C device and use this controller
  to check cable detection.
- the DWC2 driver to support a new dt property
  "u-boot,force-b-session-valid" which forces B session and
  device mode; it is a workaround because the VBUS sensing and
  ID detection isn't available with stusb1600.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-21 10:26:52 +02:00
Patrick Delaunay
c31000c534 stm32mp1: migrate USBOTG device to driver model
Use the DWC2 device driver with DM_USB_GADGET support and
cleanup the USB support in STM32MP1 board.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-21 10:26:52 +02:00
Patrick Delaunay
c50151d43f phy: usbphyc: Binding update of vdda supply
Move supply vdda1v1 and vdda1v8 in usbphyc node and
no more in port

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-21 10:26:51 +02:00
Clément Péron
517ee64205 arm: dts: h6: Add Beelink GS1 initial support
Beelink GS1 is an Allwinner H6 based TV box,
which support:
- Allwinner H6 Quad-core 64-bit ARM Cortex-A53
- GPU Mali-T720
- 2GB LPDDR3 RAM
- 16GB eMMC
- AXP805 PMIC
- 1Gbps GMAC via RTL8211E
- USB 2.0 and 3.0 Host
- HDMI port
- S/PDIF port
- 5V/2A DC power supply
- Wi-Fi/BT via Fn-Link 6222B-SRB (RTL8222BS)

Linux commit details about the sun50i-h6-beelink-gs1.dts sync:
"arm64: dts: allwinner: h6: Introduce Beelink GS1 board"
(sha1: 089bee8dd119ba084dee6b17a2e1a53df4f30193)

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-18 22:14:34 +05:30
Razvan Stefanescu
fe5963d63e ARM: dts: at91-sama5d2-icp: Add MACB node
MACB has a fixed link connection to KSZ8563 switch port.

Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
2019-04-18 09:43:22 +03:00
Eugen Hristev
f085452d85 board: atmel: add SAMA5D2 ICP board
The SAMA5D2 ICP Board features the SAMA5D27 SoC,
together with QSPI Flash, Wilc3000 wireless device and
EtherCat support.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-18 09:43:22 +03:00
Ley Foon Tan
2c494e62c3 arm: dts: Stratix10: Add QSPI node
Merge qspi dts node from Linux.
Commit 0cb140d07fc75fb (arm64: dts: stratix10: Add QSPI support for Stratix10)

Add -u-boot.dtsi files for non Linux dts properties and
update properties for Uboot.
- add u-boot,dm-pre-reloc
- add alias for spi0
- change compatible for flash
- support quad read and quad write
- change maximum frequency to 100MHz

Tested on Stratix 10 SoC devkit.
SOCFPGA_STRATIX10 # sf probe 0:0
SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-04-17 22:20:17 +02:00
Ley Foon Tan
62e6278d1e arm: dts: Stratix10: Modify stratix10 socdk memory node
The stratix10 socdk ships with 4GB of memory.  Modify the
device tree to represent this.  Note that to access 4GB of
memory in Stratix 10, due to the IO space from 2GB to 4GB,
we use the fact that the DDR controller ignores upper address
bits outside of the configured DRAM's size.  This means that
, the 4GB DRAM is mapped to memory every 4GB.

For an 8GB memory, you can either live with the 2GB IO space,
and loose access to that memory from the processor, or use
the same trick:

Loose 2GB of memory:
        memory {
                device_type = "memory";
                /* 8GB */
		/* first 2GB */
                reg = <0 0x00000000 0 0x80000000>,
		/* last 4GB */
                      <1 0x00000000 1 0x00000000>;
                u-boot,dm-pre-reloc;
        };

or to map it all:
        memory {
                device_type = "memory";
                /* 8GB */
		/* first 2GB */
                reg = <0 0x00000000 0 0x80000000>,
		/* next 6GB */
                      <2 0x80000000 1 0x80000000>;
                u-boot,dm-pre-reloc;
        };

Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-04-17 22:20:17 +02:00
Simon Goldschmidt
29873c74f3 arm: socfpga: move gen5 SDR driver to DM
To clean up reset handling for socfpga gen5, port the DDR driver to DM
using UCLASS_RAM and implement proper reset handling.

This gets us rid of one ad-hoc call to socfpga_per_reset().

The gen5 driver is implemented in 2 distinct files. One of it (containing
the calibration training) is not touched much and is kept at using
hard coded addresses since the code grows even more otherwise.

SPL is changed from calling hard into the DDR driver code to just
probing UCLASS_RESET and UCLASS_RAM. It is happy after finding a RAM
driver after that.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17 22:20:16 +02:00
Simon Goldschmidt
7357c2cbc0 arm: socfpga: gen5: add reset & sdr node to SPL devicetrees
The SPL for socfpga gen5 currently takes all peripherals out of reset
unconditionally. To implement proper reset handling for peripherals,
the reset node has to be provided with the SPL dts.

In preparation to move the DDR driver to DM, the sdr node is required
in SPL, too.

This patch adds "u-boot,dm-pre-reloc" to U-Boot specific dtsi addon
files so that the reset manager and SDR driver correctly probe in SPL.
It centralizes these settings into a common file since in contrast to
boot-type specific nodes, "soc", "rst" and "sdr" are always needed.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17 22:20:16 +02:00
Simon Goldschmidt
42a37d9774 arm: socfpga: gen5: sync devicetrees to Linux
This is again a sync to linux-next + pending patches in Dinh's tree at
commit 1c909b2dfe6a ("ARM: dts: socfpga: update more missing reset
properties")'

It adds missing peripheral reset properties to socfpga.dtsi and removes
U-Boot specific leftovers from socfpga_cyclone5_socrates.dts.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-17 22:20:15 +02:00
Uri Mashiach
ecb76eff56 arm: am57xx: cl-som-am57x: remove board support
U-Boot support for the CL-SOM-AM57x module is no longer required.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
2019-04-17 09:20:26 -04:00
Tom Rini
4b37f36d68 Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- Convert DM_MMC and DM_SCSI
- A20, R40, H6 Linux dts(i) sync
- CLK, RESET support for sunxi, sun8_emac net drivers
2019-04-17 09:19:45 -04:00
Tom Rini
14b8c420b8 Xilinx/FPGA changes for v2019.07
fpga:
 - Add support for external data in FIT
 - Extend testing for external data case
 - Inform user about a need to run post config on Zynq
 
 arm:
 - Tune zynq command functions
 - Fix internal variable setting
 
 arm64:
 - Add support for zc39dr decoding
 - Disable WDT for zcu100
 - Small changes in reset_reason()
 - Some DT changes (spi)
 - Tune qspi-mini configuration
 - Remove useless eeprom setting
 - Fix two sdhci boot case
 
 spi:
 - Fix tap delay programming
 
 clk:
 - Enable i2c in SPL
 
 net:
 - Fix gem phydev handling
 - Remove phy detection code from gem driver
 
 general:
 - Correct EXT_DTB usage for MULTI_DTB_FIT configuration
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Merge tag 'xilinx-for-v2019.07' of git://git.denx.de/u-boot-microblaze

Xilinx/FPGA changes for v2019.07

fpga:
- Add support for external data in FIT
- Extend testing for external data case
- Inform user about a need to run post config on Zynq

arm:
- Tune zynq command functions
- Fix internal variable setting

arm64:
- Add support for zc39dr decoding
- Disable WDT for zcu100
- Small changes in reset_reason()
- Some DT changes (spi)
- Tune qspi-mini configuration
- Remove useless eeprom setting
- Fix two sdhci boot case

spi:
- Fix tap delay programming

clk:
- Enable i2c in SPL

net:
- Fix gem phydev handling
- Remove phy detection code from gem driver

general:
- Correct EXT_DTB usage for MULTI_DTB_FIT configuration
2019-04-17 09:19:13 -04:00
Tom Rini
88d5ab3d67 UniPhier SoC updates for v2019.07
- Sync DT with Linux 5.1-rc4
 
 - Enable CONFIG_SUPPORT_EMMC_RPMB for uniphier_v8_defconfig
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Merge tag 'uniphier-v2019.07' of git://git.denx.de/u-boot-uniphier

UniPhier SoC updates for v2019.07

- Sync DT with Linux 5.1-rc4

- Enable CONFIG_SUPPORT_EMMC_RPMB for uniphier_v8_defconfig
2019-04-17 09:16:38 -04:00
Jagan Teki
6c90036f7b ARM: dts: sun8i-r40-bananapi-m2-berry: Enable AHCI
Enable ahci node for BPI-M2-Berry, this would require since
we have DM_SCSI enabled on the respective SoC.

Unable to sync the same node from Linux, since the similar change
is still in Linux ML.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
36b53ab24e ARM: dts: a20-wits-pro-a20-dkt: Enable AHCI
Enable ahci node for a20-wits-pro-a20-dkt, this would require since
we have DM_SCSI enabled on the respective SoC.

Right now, ahci enabled in -u-boot.dtsi and will remove once same
supported by Linux.

Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
328c5f09c9 ARM: dts: a20-m5: Enable AHCI
Enable ahci node for sun7i-a20-m5.dts, this would require since
we have DM_SCSI enabled on the respective SoC.

No need to send patch to Linux for this change, since this
dts is U-Boot specific.

Cc: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
0cc47a8ead arm: allwinner: dts: a20: Sync A20 dts(i) files from Linux 5.1-rc2
Sync sun7i-a20 dts(i) files from Linux 5.1-rc2

Linux commit details about the sun7i-a20* sync:
"ARM: dts: sun7i: bananapi: Add GPIO banks regulators"
(sha1: 09c6572290f018d73ec2e812e28bada34d41815f)

Here are U-Boot specific dts changes.

- s/uart0_pins_a/uart0_pb_pins for
  sun7i-a20-ainol-aw1.dts
  sun7i-a20-m5.dts
  sun7i-a20-primo73.dts
  sun7i-a20-yones-toptech-bd1078.dts
  sunxi-itead-core-common.dtsi
- s/gmac_pins_mii_a/gmac_rgmii_pins for
  sun7i-a20-m5.dts
- drop i2c0, i2c1 pins from
  sunxi-itead-core-common.dtsi
- drop mmc0 pins from
  sun7i-a20-primo73.dts

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
3705d4965f arm: allwinner: r40: Sync R40 dts(i) files from Linux 5.1-rc2
Sync sun8i-r40 dts(i) files from Linux 5.1-rc2

Linux commit details about the sun8i-r40* sync:
"ARM: dts: sun8i: r40: bananapi-m2-ultra: Add Bluetooth device node"
(sha1: 1e5f1db4ccd8348a21da55bff82f4263000879ef)

Linux commit details about the sun8i-v40* sync:
"ARM: dts: sunxi: Fix I2C bus warnings"
(sha1: 0729b4af5753b65aa031f58c435da53dbbf56d19)

Cc: Pablo Sebastián Greco <pgreco@centosproject.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Masahiro Yamada
cd33feda6b ARM: dts: uniphier: sync with Linux 5.1-rc4
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-04-17 07:22:23 +09:00
Siva Durga Prasad Paladugu
3b4146f133 arm64: zynqmp: Define label for flash node
Define a label for flash node so that it can be
referenced easily as required.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00