Commit graph

72856 commits

Author SHA1 Message Date
Simon Glass
671c454368 doc: describe the md command
Provide a man-page for the md command.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-02 15:53:37 -05:00
Simon Glass
ef1080470d binman: Indicate how to make binman verbose
Add notes about how to make binman produce verbose logging when building.

Add a comment on how to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-02 15:53:37 -05:00
Simon Glass
1a9e75bd5d spl: Drop duplicate 'Jumping to U-Boot' message
This is printed twice but we only need one message, since there is very
little processing in between them. Drop the second one, since all branches
of the switch() already have output. Update the U-Boot message to include
the phase being jumped to.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-02 15:53:37 -05:00
Patrick Delaunay
2740edaf47 arm: remove set_dacr/get_dacr functions
Remove the unused function set_dacr/get_dacr

Serie-cc: Ard Biesheuvel <ardb@kernel.org>
Serie-cc: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02 15:53:37 -05:00
Patrick Delaunay
8ca0f51c59 arm: cp15: remove weak function arm_init_domains
Remove the unused weak function arm_init_domains used to change the
DACR value.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02 15:53:37 -05:00
Patrick Delaunay
cd3eadc2bb arm: omap2: remove arm_init_domains
Remove the arm_init_domains and the DACR update, as it is now done
in ARMv7 CP15 level.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02 15:53:37 -05:00
Patrick Delaunay
503eea4519 arm: cp15: update DACR value to activate access control
Update the initial value of Domain Access Control Register (DACR)
and set by default the access permission to client (DACR_Dn_CLIENT = 1U)
for each of the 16 domains and no more to all-supervisor
(DACR_Dn_MANAGER = 3U).

This patch allows to activate the domain checking in MMU against the
permission bits in the translation tables and avoids prefetching issue
on ARMv7 [1].

Today it was already done for OMAP2 architecture
./arch/arm/mach-omap2/omap-cache.c::arm_init_domains
introduced by commit de63ac278c ("ARM: mmu: Set domain permissions
to client access") which fixes lot of speculative prefetch aborts seen
on OMAP5 secure devices.

[1] https://developer.arm.com/documentation/ddi0406/b/System-Level-Architecture/Virtual-Memory-System-Architecture--VMSA-/Memory-access-control/The-Execute-Never--XN--attribute-and-instruction-prefetching

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reported-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02 15:53:37 -05:00
Patrick Delaunay
9b39d249e0 arm: cosmetic: align TTB_SECT define value
Align TTB_SECT define value with previous value.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02 15:53:37 -05:00
Patrick Delaunay
342e1abd5c arm: remove TTB_SECT_XN_MASK in DCACHE_WRITETHROUGH
The normal memory (other that DCACHE_OFF) should be executable by default,
only the device memory (DCACHE_OFF) used for peripheral access should have
the bit execute never (TTB_SECT_XN_MASK).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02 15:53:37 -05:00
Patrick Delaunay
aad8414794 stm32mp: update the mmu configuration for SPL and prereloc
Overidde the weak function dram_bank_mmu_setup() to set the DDR
(preloc case) or the SYSRAM (in SPL case) executable before to enable
the MMU and configure DACR.

This weak function is called in dcache_enable/mmu_setup.

This patchs avoids a permission access issue when the DDR is marked
executable (by calling mmu_set_region_dcache_behaviour with
DCACHE_DEFAULT_OPTION) after MMU setup and domain access permission
activation with DACR in dcache_enable.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02 15:53:37 -05:00
Patrick Delaunay
1419e5b516 stm32mp: update MMU config before the relocation
Mark the top of ram, used for relocated U-Boot as a normal memory
(cacheable and executable) to avoid permission access issue when
U-Boot jumps to this relocated code.

When MMU is activated in pre-reloc stage; only the beginning of
DDR is marked executable.

This patch avoids access issue when DACR is correctly managed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02 15:53:37 -05:00
Harald Seiler
35b65dd8ef reset: Remove addr parameter from reset_cpu()
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to.  This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value.  Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.

Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g.  COLD vs WARM resets).  As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).

To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely.  Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.

This transformation was done with the following coccinelle patch:

    @@
    expression argvalue;
    @@
    - reset_cpu(argvalue)
    + reset_cpu()

    @@
    identifier argname;
    type argtype;
    @@
    - reset_cpu(argtype argname)
    + reset_cpu(void)
    { ... }

Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-02 14:03:02 -05:00
Harald Seiler
3394f398b5 Revert "lpc32xx: cpu: add support for soft reset"
This reverts commit 576007aec9.

The parameter passed to reset_cpu() no longer holds a meaning as all
call-sites now pass the value 0.  Thus, branching on it is essentially
dead code and will just confuse future readers.

Revert soft-reset support and just always perform a hard-reset for now.
This is a preparation for removal of the reset_cpu() parameter across
the entire tree in a later patch.

Fixes: 576007aec9 ("lpc32xx: cpu: add support for soft reset")
Cc: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Harald Seiler <hws@denx.de>
2021-03-02 14:03:02 -05:00
Harald Seiler
10b86ef9b3 board: ns3: Remove superfluous reset logic
The current implementation of reset_cpu() in the ns3 board code does not
archieve what it is supposed to (according to the comments), due to
a number of reasons:

 1. The argument to reset_cpu() is _not_ actually passed from the
    `reset` command, but is set to 0 in all call-sites (in this
    specific case, see arch/arm/lib/reset.c).  Thus, performing
    different kinds of resets based on its value will not work as
    expected.

 2. Contrary to its documentation, the passed argument is not
    interpreted, but a static `L3_RESET` define is used.  The other
    comment properly notes that this will always perform a L3 reset,
    though.

 3. The "parsing" of the static `L3_RESET` value is not even using the
    upper and lower nibble as stated in the comment, but uses the last
    two decimal digits of the value.

This is currently one of the only implementations left in U-Boot, which
make "use" of the value passed to reset_cpu().  As this is done under
false assumption (the value does not have any meaning anymore), it makes
sense to bring it into line with the rest and start ignoring the
parameter.

This is a preparation for removal of the reset_cpu() parameter across
the entire tree in a later patch.

Fixes: b5a152e7ca ("board: ns3: default reset type to L3")
Cc: Bharat Gooty <bharat.gooty@broadcom.com>
Cc: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-02 11:24:29 -05:00
Harald Seiler
5075bf28d6 nds32: Remove dead reset_cpu() implementation
nds32 is one of the only architectures which still have a reset_cpu()
implementation that makes use of the `addr` parameter.  The rest of
U-Boot now ignores it and passes 0 everywhere.  It turns out that even
here, reset_cpu() is no longer referenced anywhere; reset is either not
implemented (e.g. ae3xx) or realized using a WDT (e.g. ag101).

Remove this left-over implementation in preparation for the removal of
the `addr` parameter in the entire tree.

Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-03-02 11:24:29 -05:00
Tom Rini
20ecfbe931 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-03-02 09:36:23 -05:00
Matthias Brugger
fae165b5a1 configs: rpi4_32: Enable iProc RNG200
Enable the RNG driver for RPi4 with 32 bit.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-03-02 13:53:53 +01:00
Matthias Brugger
3ac05239b4 rng: iproc_rng200: Enable support for RPi4 armv7
On the RPi4 armv7 build we have the situationt that we use physical
addresses of 64 bit, while the virtual addresses are 32 bit.
Remap the base address in this scenario via map_physmem().

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-03-02 13:53:48 +01:00
Matthias Brugger
02675393d0 MAINTAINERS: Update info for Raspberry Pi
Add RPi config files and custodian repository.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-03-02 13:53:38 +01:00
Bharat Gooty
76cffd5795 drivers: mmc: iproc_sdhci: enable HS200 mode
Add tuning functionality which is needed for HS200 mode.
For HS200, program the correct needed 1.8 voltage

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-03-02 13:53:37 +01:00
Matthias Brugger
60a376b093 configs: RPi2: Disable EFI Grub workaround
The EFI Grub workaround isn't needed with Grub version 2.04 or higher.
This version was published over a year ago, so disable the workaround
to reduce boot time.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-03-02 13:53:36 +01:00
Claudiu Beznea
8bad34a709 pinctrl: at91-pio4: add support for slew-rate
SAMA7G5 supports slew rate configuration. Adapt the driver for this.
For switching frequencies lower than 50MHz the slew rate needs to
be enabled. Since most of the pins on SAMA7G5 fall into this category
enabled the slew rate by default.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-03-02 09:28:33 +02:00
Claudiu Beznea
f031bb304d dt-bindings: pinctrl: at91-pio4: add slew-rate
Document slew-rate DT binding for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-03-02 09:28:33 +02:00
Tom Rini
c5219c4a18 Prepare v2021.04-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-03-01 22:46:41 -05:00
Marek Vasut
7034478a2f ARM: imx: Include u-boot.img in u-boot-with-spl.imx if OF_SEPARATE=y
The u-boot-with-spl.imx is a concatenation of SPL and u-boot.uim.
The u-boot.uim is u-boot.bin wrapped in uImage. In case OF_SEPARATE
is enabled, the u-boot.bin does not contain control DT for U-Boot,
and so u-boot.uim does not contain the DT, and so u-boot-with-spl.imx
does not contain the DT, and a system where u-boot-with-spl.imx is
written to offset 1024B to the start of storage no longer boots, as
it is missing DT.

In case OF_SEPARATE is enabled, u-boot.img contains both u-boot.bin
and the necessary DTs. Therefore, use u-boot.img instead of u-boot.uim
to generate u-boot-with-spl.imx when OF_SEPARATE is enabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2021-03-01 16:51:11 +01:00
Heinrich Schuchardt
e86ad666d0 log: convert pr_*() to logging
In drivers we use a family of printing functions including pr_err() and
pr_cont(). CONFIG_LOGLEVEL is used to control which of these lead to output
via printf().

Our logging functions allow finer grained control of output. So replace
printf() by the matching logging functions. The usage of CONFIG_LOGLEVEL
remains unchanged.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-01 09:54:11 -05:00
Marek Behún
1afb9f2222 fs: btrfs: do not fail when offset of a ROOT_ITEM is not -1
When the btrfs_read_fs_root() function is searching a ROOT_ITEM with
location key offset other than -1, it currently fails via BUG_ON.

The offset can have other value than -1, though. This can happen for
example if a subvolume is renamed:

  $ btrfs subvolume create X && sync
  Create subvolume './X'
  $ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: X$
        location key (270 ROOT_ITEM 18446744073709551615) type DIR
        transid 283 data_len 0 name_len 1
        name: X
  $ mv X Y && sync
  $ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: Y$
        location key (270 ROOT_ITEM 0) type DIR
        transid 285 data_len 0 name_len 1
        name: Y

As can be seen the offset changed from -1ULL to 0.

Do not fail in this case.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: David Sterba <dsterba@suse.com>
Cc: Qu Wenruo <wqu@suse.com>
Cc: Tom Rini <trini@konsulko.com>
2021-03-01 09:53:46 -05:00
Marek Vasut
076dc92ac6 ARM: imx: Do not hard-code MX8M MMU table DRAM entry offset
Instead of hard-coding the offset of DRAM entries in MMU table all over
the code, auto-detect the offset. This removes error-prone code which
would break e.g. in case the MMU table is modified.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
5d42ea5535 ARM: dts: imx8mq-evk: Remove u-boot,off-on-delay-us property
Commit 247bbeb74c ("ARM: dts: imx8m: increase off-on delay on the SD Vcc
regulator") caused the imx8mq-evk board to not be able to store the
environment variables in the SD card.

Remove the u-boot,off-on-delay-us property to fix the regression.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
325bb40f21 tools: imx8mimage: Restore the original __ALIGN_MASK() macro
Since commit c738adb8db ("tool: Move ALIGN_MASK to header as common MACRO")
the i.MX8MQ EVK board no longer boots.

The reason is that imx8mimage.c used a custom __ALIGN_MASK() macro, so
restore the original macro to fix the boot and rename it accordingly.

Reported-by: Lukas Rusak <lorusak@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Ye Li <ye.li@nxp.com>
2021-03-01 10:21:36 +01:00
Ye Li
f19d1a946c arm: dts: imx8mp-evk: Add FEC PHY reset timing
Add phy-reset-duration and phy-reset-post-delay to FEC node for PHY
reset, otherwise the PHY does not work correctly.

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-03-01 10:21:36 +01:00
Adam Ford
5d9b166401 imx: Add 2GB lpddr support for i.MX8MN Beacon EmbeddedWorks devkit.
There is a second lpddr configuration with 2GB of RAM, but this requires
different RAM timings, so in addition to adding the timing file, a
separate defconfig is necessary.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-03-01 10:21:36 +01:00
Peter Bergin
e8e2703a30 doc: board: freescale: imx8mp_evk: update to newer versions and change ATF_LOAD_ADDR
Update imx-atf and firmware-imx to latest released versions.

Update address of ATF_LOAD_ADDR that has changed to 0x970000 in imx-atf
commit 48733cb4e773a7584ced601de9d717efa3d73815.

Add 'O=' to make and build in separate directory as one issue has been noticed
where it was trouble building directly inside u-boot source dir. Restructure the workflow
and copy binaries after defconfig to ensure that build directory is created.

Signed-off-by: Peter Bergin <peter@berginkonsult.se>
Cc: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2021-03-01 10:21:36 +01:00
Marek Vasut
fb4c3387bc ARM: imx: Add missing FEC ethernet quirk for MX8M
The MX8M also contains a gigabit MAC, so define FEC_QUIRK_ENET_MAC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Ye Li
aacf04fb43 mx6sabre: Fix boot failure
CONFIG_SPL_LEGACY_IMAGE_SUPPORT is necessary for mx6sabresd and
mx6sabreauto, because u-boot is packed as legacy image not FIT.
However, this config is not set when CONFIG_SPL_LOAD_FIT is enabled.
Must enable it explicitly, otherwise will fail to boot like below.

U-Boot SPL 2021.04-rc2 (Feb 20 2021 - 16:43:04 -0800)
Trying to boot from MMC1
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-03-01 10:21:36 +01:00
Haibo Chen
0ba116a319 mmc: fsl_esdhc_imx: fix the DTOCV to 0xE
On imx6Q/imx6DL, we find if config the DTOCV to 0~3, it will impact
cmd6 behavior, after cmd6 get transfer complete interrupt, the data0
line will keep low over 5 seconds. This should be a IC bug on imx6Q/DL.
For other platforms, do not has this issue.

To fix this issue, fix the DTOCV to 0xE, the max setting, this also align
with Linux configuration.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
b03df2d1c6 mx23evk: Add myself as maintainer
I would like to help supporting this board, so add myself
as a maintainer.

Now that the board has been converted to DM, also add
its devicetree in the MAINTAINERS files entry.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
23013aa961 mx23evk: Convert to driver model
Make the conversion to driver model as it is mandatory.

Successfully tested booting Linux from the SD card.

Dropped splash screen support as this needs to be properly
converted to DM and tested.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
c6f2b4cabf mx23-evk: Import devicetree file from Linux
Import the imx23-evk devicetree files from Linux kernel
version 5.11.

This is in preparation for converting the mx23evk_defconfig
target to driver model.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
a2eb1be1a5 mx51evk: Add myself as maintainer
I would like to help supporting this board, so add myself
as a maintainer.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
07fc671d7e mx51evk: Convert to driver model
Make the conversion to driver model as it is mandatory.

Tested booting the Linux kernel from the SD card.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
1f3b3e7919 imx51-babbage: Import devicetree files from Linux
Import the imx51-babbage devicetree files from Linux kernel
version 5.11-rc7.

This is in preparation for converting the mx51evk_defconfig
target to driver model.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
c3e6f99e73 mmc: fsl_esdhc_imx: Add a compatible for i.MX51
Add a compatible for i.MX51 so that i.MX51 can use this driver
via driver model.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
9a68a2be8e mx53loco: Add myself as maintainer
I would like to help supporting this board, so add myself
as a maintainer.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
21755161b2 ARM: dts: imx53-qsb: Describe the esdhc1 card detect pin
The micro SD card slot uses GPIO3_13 as card detect pin, so describe
it in the devicetree.

This was noticed when converting imx53-qsb board to driver model
in U-Boot as the micro SD card was not getting detected.

After this change it is possible to load the dtb and zImage
from the SD card and boot Linux.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
5c8db4922d mx53loco: Convert to driver model
Make the conversion to driver model as it is mandatory.

Remove the SATA support for now as the i.MX53 support has not
been added yet.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
a48c22bc52 imx53-qsb: Import devicetree files from Linux
Import the imx53-qsb devicetree files from Linux kernel
version 5.11-rc7.

This is in preparation for converting the mx53loco_defconfig
target to driver model.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Oleksandr Suvorov
91026456f4 board: toradex: move RGMII delays to PHY side
The RGMII link delays can be set on either MAC or PHY side. Set the
rgmii-id PHY mode for FEC and remove FEC_ENET_ENABLE_.XC_DELAY
setting, so that these definitions aren't used anymore throughout
the U-Boot.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Oleksandr Suvorov
e5da517c28 ARM: imx8: Add missing FEC ENET quirk for i.MX8/i.MX8X
Both NXP SoCs i.MX8 and i.MX8X have ENET gigabit MAC.
Define FEC_QUIRK_ENET_MAC for the imx8 platform and remove this
definition from configs of boards, based on MX8/MX8X.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Frieder Schrempf
3bbe1a7faf Respect that some compression algos can be enabled separately for SPL
Some compression algorithms currently can be enabled for SPL and
U-Boot proper separately. Therefore take into account USE_HOSTCC
is well as CONFIG_IS_ENABLED() in these cases to prevent compiling these
functions in case of a host tool build.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-03-01 10:21:36 +01:00