mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
mx53loco: Convert to driver model
Make the conversion to driver model as it is mandatory. Remove the SATA support for now as the i.MX53 support has not been added yet. Signed-off-by: Fabio Estevam <festevam@gmail.com>
This commit is contained in:
parent
a48c22bc52
commit
5c8db4922d
4 changed files with 20 additions and 133 deletions
|
@ -652,6 +652,7 @@ dtb-$(CONFIG_MX28) += \
|
|||
imx28-xea.dtb
|
||||
|
||||
dtb-$(CONFIG_MX53) += imx53-cx9020.dtb \
|
||||
imx53-qsb.dtb \
|
||||
imx53-kp.dtb \
|
||||
imx53-m53menlo.dtb
|
||||
|
||||
|
|
|
@ -18,10 +18,8 @@
|
|||
#include <env.h>
|
||||
#include <linux/errno.h>
|
||||
#include <asm/mach-imx/mx5_video.h>
|
||||
#include <netdev.h>
|
||||
#include <i2c.h>
|
||||
#include <input.h>
|
||||
#include <mmc.h>
|
||||
#include <fsl_esdhc_imx.h>
|
||||
#include <asm/gpio.h>
|
||||
#include <power/pmic.h>
|
||||
|
@ -62,127 +60,6 @@ static void setup_iomux_uart(void)
|
|||
imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
|
||||
}
|
||||
|
||||
#ifdef CONFIG_USB_EHCI_MX5
|
||||
int board_ehci_hcd_init(int port)
|
||||
{
|
||||
/* request VBUS power enable pin, GPIO7_8 */
|
||||
imx_iomux_v3_setup_pad(MX53_PAD_PATA_DA_2__GPIO7_8);
|
||||
gpio_direction_output(IMX_GPIO_NR(7, 8), 1);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static void setup_iomux_fec(void)
|
||||
{
|
||||
static const iomux_v3_cfg_t fec_pads[] = {
|
||||
NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__FEC_MDIO, PAD_CTL_HYS |
|
||||
PAD_CTL_DSE_HIGH | PAD_CTL_PUS_22K_UP | PAD_CTL_ODE),
|
||||
NEW_PAD_CTRL(MX53_PAD_FEC_MDC__FEC_MDC, PAD_CTL_DSE_HIGH),
|
||||
NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__FEC_RDATA_1,
|
||||
PAD_CTL_HYS | PAD_CTL_PKE),
|
||||
NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__FEC_RDATA_0,
|
||||
PAD_CTL_HYS | PAD_CTL_PKE),
|
||||
NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__FEC_TDATA_1, PAD_CTL_DSE_HIGH),
|
||||
NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__FEC_TDATA_0, PAD_CTL_DSE_HIGH),
|
||||
NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__FEC_TX_EN, PAD_CTL_DSE_HIGH),
|
||||
NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__FEC_TX_CLK,
|
||||
PAD_CTL_HYS | PAD_CTL_PKE),
|
||||
NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__FEC_RX_ER,
|
||||
PAD_CTL_HYS | PAD_CTL_PKE),
|
||||
NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__FEC_RX_DV,
|
||||
PAD_CTL_HYS | PAD_CTL_PKE),
|
||||
};
|
||||
|
||||
imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
|
||||
}
|
||||
|
||||
#ifdef CONFIG_FSL_ESDHC_IMX
|
||||
struct fsl_esdhc_cfg esdhc_cfg[2] = {
|
||||
{MMC_SDHC1_BASE_ADDR},
|
||||
{MMC_SDHC3_BASE_ADDR},
|
||||
};
|
||||
|
||||
int board_mmc_getcd(struct mmc *mmc)
|
||||
{
|
||||
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
|
||||
int ret;
|
||||
|
||||
imx_iomux_v3_setup_pad(MX53_PAD_EIM_DA11__GPIO3_11);
|
||||
gpio_direction_input(IMX_GPIO_NR(3, 11));
|
||||
imx_iomux_v3_setup_pad(MX53_PAD_EIM_DA13__GPIO3_13);
|
||||
gpio_direction_input(IMX_GPIO_NR(3, 13));
|
||||
|
||||
if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
|
||||
ret = !gpio_get_value(IMX_GPIO_NR(3, 13));
|
||||
else
|
||||
ret = !gpio_get_value(IMX_GPIO_NR(3, 11));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
|
||||
PAD_CTL_PUS_100K_UP)
|
||||
#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
|
||||
PAD_CTL_DSE_HIGH)
|
||||
|
||||
int board_mmc_init(struct bd_info *bis)
|
||||
{
|
||||
static const iomux_v3_cfg_t sd1_pads[] = {
|
||||
NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, SD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, SD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, SD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, SD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, SD_PAD_CTRL),
|
||||
MX53_PAD_EIM_DA13__GPIO3_13,
|
||||
};
|
||||
|
||||
static const iomux_v3_cfg_t sd2_pads[] = {
|
||||
NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__ESDHC3_CMD,
|
||||
SD_CMD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__ESDHC3_CLK, SD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__ESDHC3_DAT0, SD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__ESDHC3_DAT1, SD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__ESDHC3_DAT2, SD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__ESDHC3_DAT3, SD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__ESDHC3_DAT4, SD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__ESDHC3_DAT5, SD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__ESDHC3_DAT6, SD_PAD_CTRL),
|
||||
NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__ESDHC3_DAT7, SD_PAD_CTRL),
|
||||
MX53_PAD_EIM_DA11__GPIO3_11,
|
||||
};
|
||||
|
||||
u32 index;
|
||||
int ret;
|
||||
|
||||
esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
|
||||
esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
|
||||
|
||||
for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
|
||||
switch (index) {
|
||||
case 0:
|
||||
imx_iomux_v3_setup_multiple_pads(sd1_pads,
|
||||
ARRAY_SIZE(sd1_pads));
|
||||
break;
|
||||
case 1:
|
||||
imx_iomux_v3_setup_multiple_pads(sd2_pads,
|
||||
ARRAY_SIZE(sd2_pads));
|
||||
break;
|
||||
default:
|
||||
printf("Warning: you configured more ESDHC controller"
|
||||
"(%d) as supported by the board(2)\n",
|
||||
CONFIG_SYS_FSL_ESDHC_NUM);
|
||||
return -EINVAL;
|
||||
}
|
||||
ret = fsl_esdhc_initialize(bis, &esdhc_cfg[index]);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \
|
||||
PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
|
||||
|
||||
|
@ -327,7 +204,6 @@ static void clock_1GHz(void)
|
|||
int board_early_init_f(void)
|
||||
{
|
||||
setup_iomux_uart();
|
||||
setup_iomux_fec();
|
||||
setup_iomux_lcd();
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -1,11 +1,14 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_MX5=y
|
||||
CONFIG_SYS_TEXT_BASE=0x77800000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_ENV_SIZE=0x2000
|
||||
CONFIG_ENV_OFFSET=0xC0000
|
||||
CONFIG_TARGET_MX53LOCO=y
|
||||
CONFIG_DM_GPIO=y
|
||||
# CONFIG_CMD_BMODE is not set
|
||||
CONFIG_DEFAULT_DEVICE_TREE="imx53-qsb"
|
||||
CONFIG_SUPPORT_RAW_INITRD=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg"
|
||||
CONFIG_USE_PREBOOT=y
|
||||
|
@ -13,8 +16,9 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
|||
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_DM=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_SATA=y
|
||||
# CONFIG_CMD_PINMUX is not set
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
@ -23,15 +27,28 @@ CONFIG_CMD_PING=y
|
|||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_FS_GENERIC=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_DWC_AHSATA=y
|
||||
CONFIG_DM=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_FSL_ESDHC_IMX=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_SMSC=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_FEC_MXC=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_IMX5=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_REGULATOR_GPIO=y
|
||||
CONFIG_MXC_UART=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_USB_EHCI_MX5=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_HOST_ETHER=y
|
||||
|
@ -40,4 +57,3 @@ CONFIG_USB_ETHER_MCS7830=y
|
|||
CONFIG_USB_ETHER_SMSC95XX=y
|
||||
CONFIG_SYS_WHITE_ON_BLACK=y
|
||||
CONFIG_SPLASH_SCREEN=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
|
|
|
@ -30,12 +30,6 @@
|
|||
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
|
||||
#define CONFIG_SYS_FSL_ESDHC_NUM 2
|
||||
|
||||
/* Eth Configs */
|
||||
|
||||
#define CONFIG_FEC_MXC
|
||||
#define IMX_FEC_BASE FEC_BASE_ADDR
|
||||
#define CONFIG_FEC_MXC_PHYADDR 0x1F
|
||||
|
||||
/* USB Configs */
|
||||
#define CONFIG_MXC_USB_PORT 1
|
||||
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
|
||||
|
|
Loading…
Reference in a new issue