Commit graph

13064 commits

Author SHA1 Message Date
Eugen Hristev
c260cb2c8c ARM: dts: sama5d3: fix gadget endpoint address warning
arch/arm/dts/sama5d36ek.dtb: Warning (graph_endpoint): /ahb/gadget@00500000/endpoint@10: graph node unit address error, expected "a"
arch/arm/dts/sama5d36ek.dtb: Warning (graph_endpoint): /ahb/gadget@00500000/endpoint@11: graph node unit address error, expected "b"
arch/arm/dts/sama5d36ek.dtb: Warning (graph_endpoint): /ahb/gadget@00500000/endpoint@12: graph node unit address error, expected "c"
arch/arm/dts/sama5d36ek.dtb: Warning (graph_endpoint): /ahb/gadget@00500000/endpoint@13: graph node unit address error, expected "d"
arch/arm/dts/sama5d36ek.dtb: Warning (graph_endpoint): /ahb/gadget@00500000/endpoint@14: graph node unit address error, expected "e"
arch/arm/dts/sama5d36ek.dtb: Warning (graph_endpoint): /ahb/gadget@00500000/endpoint@15: graph node unit address error, expected "f"

Fixed by changing address in node name to hex.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-06-18 14:28:37 +03:00
Eugen Hristev
4675b519c9 ARM: dts: sama5d4: fix gadget endpoint address warning
arch/arm/dts/at91-sama5d4ek.dtb: Warning (graph_endpoint): /ahb/gadget@00400000/endpoint@10: graph node unit address error, expected "a"
arch/arm/dts/at91-sama5d4ek.dtb: Warning (graph_endpoint): /ahb/gadget@00400000/endpoint@11: graph node unit address error, expected "b"
arch/arm/dts/at91-sama5d4ek.dtb: Warning (graph_endpoint): /ahb/gadget@00400000/endpoint@12: graph node unit address error, expected "c"
arch/arm/dts/at91-sama5d4ek.dtb: Warning (graph_endpoint): /ahb/gadget@00400000/endpoint@13: graph node unit address error, expected "d"
arch/arm/dts/at91-sama5d4ek.dtb: Warning (graph_endpoint): /ahb/gadget@00400000/endpoint@14: graph node unit address error, expected "e"
arch/arm/dts/at91-sama5d4ek.dtb: Warning (graph_endpoint): /ahb/gadget@00400000/endpoint@15: graph node unit address error, expected "f"

Fixed by changing address in node name to hex.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-06-18 14:28:37 +03:00
Tero Kristo
803e9a1f28 omap5: uevm: convert to device model
Convert omap5 uevm board to device model.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-16 17:00:12 +05:30
Tero Kristo
8f1ed2e4ed omap5: Copy device tree from linux 5.7.y
Copy all the device tree files required for omap5 uevm support from
mainline Linux.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-16 17:00:12 +05:30
Peter Ujfalusi
8812ed9725 omap4: sdp: convert to device model
Convert omap4 sdp to device model.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-16 17:00:12 +05:30
Peter Ujfalusi
e58b697e36 omap4: Copy device tree from Linux 5.7.y for SDP4430
Copy all device tree files required for omap4 sdp4430 support from
mainline Linux.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-16 17:00:12 +05:30
Tero Kristo
0a45375115 omap4: panda: convert to device model
Convert omap4 panda to device model.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-16 17:00:12 +05:30
Tero Kristo
00fde6b873 omap4: Copy device tree from Linux 5.7.y
Copy all device tree files required for omap4 panda support from
mainline Linux.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-16 17:00:12 +05:30
Etienne Carriere
9e69696506 dts: ARM: stm32mp15: add OP-TEE node in u-boot DTSI
Add OP-TEE firmware node in stm32mp15 U-Boot DTSI. This node is
needed since commit [1] that changed U-Boot/stm32mp15 to detect
OP-TEE availability by probing the resource instead of relying on
U-Boot configuration. The software sequence implemented by [1] is
fine but U-Boot DTS/DTSI files were not updated accordingly since,
hence OP-TEE presence is never detected by U-Boot, preventing Linux
kernel from using OP-TEE resources.

For consistency and to synchronize stm32mp15 DTSI files (excluding
U-Boot specific DTSI files) with the Linux kernel ones, this change
also moves the OP-TEE reserved memory nodes from board generic DTSI
files to U-Boot specific board DTSI files.

Link: [1] commit 43df0a159d ("stm32mp1: dynamically detect op-tee presence")
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-06-16 10:39:28 +02:00
Etienne Carriere
164873a0c0 board: stm32mp1: fix handling of DT OP-TEE reserved memory nodes
Fix the sequence in stm32mp1 fdt.c that disables OP-TEE resources
defined in FDT when U-boot detects OP-TEE firmware is not present.

Before this change, helper function stm32_fdt_disable_optee()
set property status to "disabled" for the OP-TEE reserved memory
nodes but this has no impact since Linux kernel does not consider
the status property for reserved-memory subnodes. This change
make U-Boot to attempt to delete the node instead.

Fixes: 4a1b975dac ("board: stm32mp1: reserve memory for OP-TEE in device tree")
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-06-16 10:38:09 +02:00
Tom Rini
bb1ff1371e Merge tag 'mmc-2020-6-15' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- fsl_esdhc sdr104 and hs200 fix and error path fix
- fsl_esdhc workaround 3.3v io issue
- ca_dw_mmc cleanup
- presidio-asic emmc DT update.
2020-06-15 10:20:35 -04:00
Alex Nemirovsky
1ac6447644 board: presidio-asic: update eMMC DT information
Change DT compatibility name to match change in driver's name.
Remove unused io_ds and fifo_mode fields from DT.

Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Peng Fan <peng.fan@nxp.com>
CC: Jaehoon Chung <jh80.chung@samsung.com>
CC: Tom Rini <trini@konsulko.com>
2020-06-15 09:45:22 +08:00
Tom Rini
18d8977bdf Merge https://gitlab.denx.de/u-boot/custodians/u-boot-socfpga
- cyclone5 bugfix
2020-06-14 12:00:50 -04:00
Ley Foon Tan
a0bda1dd83 arm: dts: socfpga: cyclone5: Update i2c-scl-falling-time-ns
Commit e71b6f6622 ("i2c: designware_i2c: Rewrite timing calculation")
change the hcnt and lcnt timing calculation. New timing calculation is
based on calculation from Designware i2c databook.

After this new timing calculation, hcnt will have negative value
with i2c-scl-falling-time-ns 5000 that set in socfpga_cyclone5_socdk.dts.

This patch overwrite i2c-scl-falling-time-ns to 300ns (default SCL fall
time used in Designware i2c driver) for Uboot.

Before the fix:
=> i2c dev 0
Setting bus to 0
Failure changing bus number (-22)

After the fix:
=> i2c dev 0
Setting bus to 0
=> i2c probe
Valid chip addresses: 17 51 55 5B 5C 5E 66 68 70

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-06-14 13:37:31 +02:00
Faiz Abbas
c78ae11e07 mmc: davinci_mmc: Cleanup to use dt in U-boot and static platdata in SPL
Cleanup this driver to use dt in U-boot and static platdata in SPL.
This requires the following steps:

1. Move all platdata assignment from probe() to ofdata_to_platdata().
   This function is only called in U-boot.
2. Replicate all the platdata assignment being done in
   ofdata_to_platdata() in the omapl138 board file. This data is used in
   the SPL case where SPL_OF_CONTROL is not enabled.
3. Remove SPL_OF_CONTROL and related configs from omapl138_lcdk_defconfig

This cleanup effectively reverts 3ef94715cc ('mmc: davinci: fix mmc boot in SPL')

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2020-06-13 23:12:17 +05:30
Jagan Teki
64efd11d3b arm: Remove pcm051 board
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Acked-by: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11 15:14:04 +05:30
Jagan Teki
a9c84ffa99 arm: Remove omap3_pandora_defconfig board
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Remove it.

Acked-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11 15:14:04 +05:30
Tom Rini
be79009f3b Fixes for 2020.07
-----------------
 
 - mx53: mx53menlo Convert to DM_ETH, fix fail boot
 - imx8mp_evk: fix boot issue
 - MX6, display5: fix environment
 - drop warnings (watchdog) for i.MX8mm i.mx8mp
 - enable bootaux for i.MX8M
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/695929999
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Merge tag 'u-boot-imx-20200609' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2020.07
-----------------

- mx53: mx53menlo Convert to DM_ETH, fix fail boot
- imx8mp_evk: fix boot issue
- MX6, display5: fix environment
- drop warnings (watchdog) for i.MX8mm i.mx8mp
- enable bootaux for i.MX8M

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/695929999
2020-06-09 09:17:24 -04:00
Stefano Babic
3854296801 Revert "imx: rom api: fix image offset computation"
This reverts commit 1f63ee6566.

As reported by Ye Li on ML:

1. Removing the image_offset will break secondary (redundant) boot support for sd and emmc.
2. When booting from emmc boot partition, the image_offset is 0. But the flash.bin
generated by mkimage with imximage-8mp-lpddr4.cfg is for sd. It expects to be burn at 32KB offset.
The fit offset 0x60000 has already included the 32KB offset.  So when you burn this flash.bin
to emmc boot partition at offset 0, the fit offset should subtract the 32KB (0x60000 - 0x8000).

Signed-off-by: Stefano Babic <sbabic@denx.de>
2020-06-09 11:19:55 +02:00
Marek Vasut
a13644c065 ARM: dts: imx: m53menlo: Convert to DM_ETH
Convert the board to DM_ETH instead of legacy networking. This requires
a minor addition to the DT to satisfy the requirement for specifying a
PHY node. No functional change from board user perspective.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-06-08 10:43:02 +02:00
Marek Vasut
0e06d63d19 ARM: imx: ddr: Add missing PHY reset
The iMX7D RM 9.2.4.9.3 Power removal flow Table 9-11. Re-enabling power
explicitly says both the DDR controller and the PHY must be reset in the
correct sequence. Currently the code only resets the controller. This
leads to a misbehavior where the system brings the DRAM up after reboot,
but the DRAM is unstable. Add the missing reset.

The easiest way to trigger this is by triggering WDT without having the
WDT assert WDOG_B signal, i.e. mw.w 0x30280000 0x25 .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-06-08 10:42:54 +02:00
Sébastien Szymanski
1f63ee6566 imx: rom api: fix image offset computation
When not booting from FlexSPI, the offset computation is:

offset = image_offset + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000;

When booting from SD card or eMMC user partition, image_offset is
0x8000. It is useless to add and remove 0x8000.
When booting from other device, image_offset is 0 so this computation is wrong.

Simplfy this computation to work on all booting devices.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2020-06-08 10:42:14 +02:00
Patrick Wildt
0e9c045b2b imx: move ATF to the back of the FIT to fix loading over yModem
With yModem the FIT Image is only supplied once, so we can only
seek forward in the yModem supplied image and never backwards.
With the recent changes to the SPL mechanism, including loading
U-Boot first, FDT after, then the loadables, we must also reorder
the FIT image script to make sure that the loadables are last in
the FIT image.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2020-06-08 10:41:38 +02:00
Peng Fan
f3e1c536a9 imx: Kconfig: enable IMX_BOOTAUX for i.MX8M
i.MX8M could use imx bootaux to boot m4/m7 core, so let's add it
to the dependency list.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-06-08 10:39:24 +02:00
Giulio Benetti
8fde50f702 ARM: dts: imxrt1050: indent lcdif node correctly
Accidentally submitted a patch with indentation not correct, let's fix it
by indenting wrong lines.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-06-08 10:39:07 +02:00
Heiko Stuebner
97fa784725 rockchip: puma: reorganize devicetrees to actually work and match upstream
So far the puma dts files only just included the main puma dtsi without
handling the actual baseboard and rk3399-puma.dtsi was very much
detached from the variant in the mainline Linux kernel.

Recent changes resulted in a strange situation with nonworking puma boards.

Commit ab800e5a6f ("arm: dts: rockchip: puma: move U-Boot specific bits to u-boot.dtsi")
moved the sdram include from rk3399-puma-ddrX.dts to new files
rk3399-puma-ddrx-u-boot.dtsi which were never included anywhere though.

Commit 167efc2c7a ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux")
replaced the rk3399-puma.dtsi nearly completely, but in the kernel
it definitly depends on a baseboard dts to actually enable peripherals
like sd-slot, uarts, etc.

So to untagle this and bring the whole thing more in line with mainline
Linux, bring the rk3399-puma-haikou.dts over as well, drop the separate
DDR-option devicetrees and instead replace them with a puma Kconfig option
to select and include the needed DDR variant.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07 18:57:16 +08:00
Heiko Stuebner
efcb2bd9cb rockchip: puma: fix indentation for -u-boot.dtsi
Tabs not spaces, so transform it to the common styling.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07 18:57:16 +08:00
Heiko Stuebner
e2dd607bce arm64: dts: rk3399-puma: fix gpio levels for vcc5v0-host regulator
The regulator enable-gpio uses opposite values for the declaration
vs. the enable_active_low property, breaking the regulator enablement.

Make the usbhost-supply work again by bringing them in sync again.

This mimics the upstream Linux change found on:
http://lore.kernel.org/r/20200604091239.424318-1-heiko@sntech.de

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2020-06-07 18:57:16 +08:00
Heiko Stuebner
41c985d5fb arm64: dts: rk3399-puma: fix gpio levels for gmac reset pin
The gmac reset has opposite values for the gpio declaration
and the separate reset-active, bring this in line to make
u-boot also find the ethernet-phy.

This mimics the upstream Linux commit found on
https://lore.kernel.org/r/20200603132836.362519-1-heiko@sntech.de

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07 18:57:16 +08:00
Marcin Juszkiewicz
b587acc6b1 rockchip: rockpro64: add SPI boot
U-Boot TPL 2020.07-rc3-00121-gab88251130 (Jun 03 2020 - 16:43:42)
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
256B stride
256B stride
lpddr4_set_rate: change freq to 400000000 mhz 0, 1
lpddr4_set_rate: change freq to 800000000 mhz 1, 0
Trying to boot from BOOTROM
Returning to boot ROM...

U-Boot SPL 2020.07-rc3-00121-gab88251130 (Jun 03 2020 - 16:43:42 +0200)
Trying to boot from SPI

U-Boot 2020.07-rc3-00121-gab88251130 (Jun 03 2020 - 16:43:42 +0200)

SoC: Rockchip rk3399
Reset cause: RST
Model: Pine64 RockPro64 v2.1
DRAM:  3.9 GiB
PMIC:  RK808
MMC:   mmc@fe310000: 2, mmc@fe320000: 1, sdhci@fe330000: 0
Loading Environment from SPI Flash... SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
*** Warning - bad CRC, using default environment

In:    serial
Out:   vidconsole
Err:   vidconsole
Model: Pine64 RockPro64 v2.1
Net:   eth0: ethernet@fe300000
Hit any key to stop autoboot:  0
=>

Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07 18:57:16 +08:00
Jagan Teki
1831191b18 roc-rk3399-pc: Add SPI boot
U-Boot TPL 2020.07-rc3-00090-gd4e919f927-dirty (Jun 01 2020 - 23:45:53)
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
256B stride
256B stride
lpddr4_set_rate: change freq to 400000000 mhz 0, 1
lpddr4_set_rate: change freq to 800000000 mhz 1, 0
Trying to boot from BOOTROM
Returning to boot ROM...

U-Boot SPL 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530)
Trying to boot from MMC1
NOTICE:  BL31: v2.2(release):
NOTICE:  BL31: Built : 15:05:37, May 12 2020

U-Boot 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530)

SoC: Rockchip rk3399
Reset cause: POR
Model: Firefly ROC-RK3399-PC Board
DRAM:  3.9 GiB
PMIC:  RK808
MMC:   mmc@fe320000: 1, sdhci@fe330000: 0
Loading Environment from SPI Flash... SF: Detected w25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Model: Firefly ROC-RK3399-PC Board

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07 18:57:16 +08:00
Kever Yang
3d82b1b3d3 rockchip: rk3399-evb: add stdout-path for the board
The 'stdout-path' is missing after dts sync.
Fixes: 167efc2c7a ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux")

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-07 18:57:16 +08:00
b.l.huang
5764911e67 rockchip: rk3328: add rock-pi-e dts file
The ROCK-PI-E is a credit card size SBC based on Rockchip RK3328
Quad-Core ARM Cortex A53.

    Net - Dual ethernet port, 1 X Gbe, 1 X 100M
    USB - USB 3.0
    DC  - USB-Type C, 5V 2A
    Storage - TF card, eMMC

Just build idbloader.img and u-boot.itb for Rockpi E board and
follow the blow steps to replace the relevant partition.

    dd if=idbloader.img of=/dev/sdcard seek=64 conv=notrunc
    dd if=u-boot.itb of=/dev/sdcard seek=16384 conv=notrunc

Signed-off-by: Banglang Huang <banglang.huang@foxmail.com>
2020-06-07 18:57:16 +08:00
Tom Rini
c27178ba36 First set of u-boot-atmel fixes for 2020.07 cycle
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Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel fixes for 2020.07 cycle

This set includes just two small commits that fix a build warning and
add a missing serial node.
2020-06-04 10:21:51 -04:00
Tom Rini
1b6ae82a5a Pull request for UEFI sub-system for efi-2020-07-rc4
This patch series addresses the following issues:
 
 * allow compiling with clang
 * add missing function descriptions to the HTML documentation
 * simplify the validation of UEFI images
 * validate load options in the UEFI boot manager
 
 In a preparatory patch a structure definition is moved.
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Merge tag 'efi-2020-07-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-07-rc4

This patch series addresses the following issues:

* allow compiling with clang
* add missing function descriptions to the HTML documentation
* simplify the validation of UEFI images
* validate load options in the UEFI boot manager

In a preparatory patch a structure definition is moved.
2020-06-03 14:10:03 -04:00
Tom Rini
f1a69b8c73 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- H6 emac support
- USB PHY H6 logic alignment
2020-06-03 11:52:13 -04:00
Heinrich Schuchardt
4f7dc5f608 efi_loader: allow compiling with clang
On ARM systems gd is stored in register r9 or x18. When compiling with
clang gd is defined as a macro calling function gd_ptr(). So we can not
make assignments to gd.

In the UEFI sub-system we need to save gd when leaving to UEFI binaries and
have to restore gd when reentering U-Boot.

Define a new function set_gd() for setting gd and use it in the UEFI
sub-system.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Tom Rini <trini@konsulko.com>
2020-06-03 17:19:17 +02:00
Masahiro Yamada
9f8aa0fbee ARM: add psci_arch_init() declaration for CONFIG_ARMV7_PSCI
arch/arm/include/asm/system.h declares psci_arch_init(), but it is
surrounded by #ifdef CONFIG_ARMV8_PSCI.

psci_arch_init() is called for CONFIG_ARMV7_PSCI too. Add the missing
function declaration.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-06-02 17:27:04 -04:00
Samuel Holland
5cfeeacaea sunxi: Silence warning about non-static inline function
When compiling with CONFIG_SPL_SERIAL=n, gcc warns about
mbus_configure_port not being marked as static:

In file included from include/common.h:34,
                 from arch/arm/mach-sunxi/dram_sunxi_dw.c:11:
include/log.h:185:4: warning: 'printf' is static but used in inline function 'mbus_configure_port' which is not static
  185 |    printf(pr_fmt(fmt), ##args); \
      |    ^~~~~~
include/log.h:192:2: note: in expansion of macro 'debug_cond'
  192 |  debug_cond(_DEBUG, fmt, ##args)
      |  ^~~~~~~~~~
arch/arm/mach-sunxi/dram_sunxi_dw.c💯2: note: in expansion of macro 'debug'
  100 |  debug("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1);
      |  ^~~~~

Fix this by updating the function accordingly.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 22:38:08 +05:30
Tom Rini
42c8a112d2 - stm32mp15: fix DT on DHCOR SOM and avenger96 board
- stm32mp15: re-enable KS8851 on DHCOM
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Merge tag 'u-boot-stm32-20200528' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- stm32mp15: fix DT on DHCOR SOM and avenger96 board
- stm32mp15: re-enable KS8851 on DHCOM
2020-06-01 11:42:22 -04:00
Tom Rini
9452b7496f Merge tag 'u-boot-rockchip-20200531' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix mmc of path after syncfrom kernel dts;
- Add dwc3 host support with DM for rk3399;
- Add usb2phy and typec phy for rockchip platform;
- Migrate board list doc to rockchip.rst;
- Add rk3399 Pinebook Pro board support;
- Update dram_init in board_init and add memory node in SPL;
2020-05-31 20:07:39 -04:00
Heiko Stuebner
b6740fb116 rockchip: spl: do full dram_init instead of only probing
Parts of later SPL may need RAM information as well, so do full
dram_init() call, which includes the existing dram probing but also
initializes the ram information in gd.

dram_init() from sdram.c does the following steps:
- uclass_get_device(UCLASS_RAM, ...) like the current code
- ret = ram_get_info(dev, &ram);
- gd->ram_size = ram.size;

CONFIG_SPL_RAM already makes sure that sdram.c gets compiled
and thus no other variant of dram_init() can exist.

So it's the same functionality as before and only adds that the
SPL now aquires knowledge about the amount of available ram,
which it didn't know about before.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31 22:22:07 +08:00
Peter Robinson
9fb8e24804 rockchip: Add initial support for the Pinebook Pro laptop from Pine64.
Specification:
- Rockchip RK3399
- 4GB Dual-Channel LPDDR4
- eMMC socket
- mSD card slot
- 128Mbit (16Mb) SPI Flash
- AP6256 for 11AC WiFi + BT5
- 14 inch 1920*1080 eDP MiPi display
- Camera
- USB 3.0, 2.0 ports
- Type-C port with alt-mode display (DP 1.2) and 15W charge
- DC 5V/3A
- optional PCIe slot for NVMe SSD drive

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31 22:22:07 +08:00
Peter Robinson
7390fb9999 arm: dts: rockchip: Add initial DT for Pinebook Pro
Sync initial support for Pinebook Pro device tree from Linux 5.7-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31 20:46:08 +08:00
Frank Wang
86554ab10a ARM: dts: rk3399-evb: usb3.0 host support
Configure 'tcphy1' and 'usbdrd_dwc3_1' nodes to support USB3.0 host
for Rockchip RK3399 Evaluation Board.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30 07:38:50 +08:00
Frank Wang
c28ef1bcc8 arm: mach-rockchip: bind sub-nodes for rk3399_syscon
There are some sub-nodes under the grf DT, so add bind callback
function in rk3399 syscon driver to scan them recursively.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 18:13:19 +08:00
Jagan Teki
20dcee45cb arm64: dts: rk3399-nanopi4: Add u-boot,spl-boot-order
Add u-boot,spl-boot-order as sdhci and sdmmc for booting
from eMMC and SD card.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 17:58:55 +08:00
Jagan Teki
97de3935aa rockchip: Fix spl mmc boot device ofpath
Linux v5.7-rc1 dts(i) sync has changed the sdmmc node from
dwmmc@fe320000 to mmc@fe320000 and this ofpath is being
used in rockchip spl bootdevice code.

So, update the ofpath with a new node name and prefix "same-as-spl"
to missing u-boot,spl-boot-order.

Bug log:
U-Boot SPL 2020.07-rc2-00256-g9c5fef5774 (May 24 2020 - 20:20:43 +0530)
Trying to boot from MMC2
mmc_load_image_raw_sector: mmc block read error
Trying to boot from MMC1
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices

Fixes: 167efc2c7a ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux"
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 17:58:21 +08:00
Neil Armstrong
3678a5f059 arm: dts: meson-gxl: fix USB gadget by adding missing nodes for U-Boot
The khadas-vim, khadas-vim2, libretech-ac & libretech-*-pc boards were missing
DT tweak to enable USB gadget.
Add them to their -u-boot.dtsi files and include the right gxl-u-boot.dtsi.

Fixes: a19e8a0f03 ("arm: dts: meson-gxl: Add USB Gadget nodes for U-Boot")
Reported-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-05-29 10:20:34 +02:00
Neil Armstrong
21981c1059 arm: dts: khadas-vim3: include meson-g12-common-u-boot.dtsi to enable HDMI output
Include the common g12 u-boot tweaks to permit enabling video output tweaks
on Khadas VIM3 boards.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-05-29 10:20:34 +02:00
Marek Vasut
08f372ac2a ARM: dts: stm32: Disable SDR104 mode on AV96
Disable SDR104 mode until we know it is really stable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-28 08:52:04 +02:00
Marek Vasut
39a18aaa33 ARM: dts: stm32: Repair I2C2 operation on AV96
The I2C2 uses different pinmux on AV96, use correct pinmux and
also add comments about the I2C being present on the "low-speed"
expansion connector X6.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-28 08:52:04 +02:00
Marek Vasut
b1ebcd27ee ARM: dts: stm32: Add alternate pinmux for I2C2 pins
Add another mux option for I2C2 pins, this is used on AV96 board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-28 08:52:04 +02:00
Marek Vasut
8b4101d0f9 ARM: stm32: Hog GPIO PF7 high on DHCOR to unlock SPI NOR nWP
The SPI NOR nWP line is connected to GPIO PF7 on the SoM,
pull the GPIO line high by default to clear SPI NOR WP.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-28 08:52:04 +02:00
Luka Kovacic
df9ebbe17e arm: mvebu: Convert CRS305-1G-4S board to CRS3xx-98DX3236
Convert the CRS305-1G-4S board to CRS3xx-98DX3236 to enable easier
implementation of new CRS3xx series boards, based on Marvell Prestera
98DX3236.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
2020-05-27 07:03:17 +02:00
Jakov Petrina
8678776df6 arm: mvebu: armada-3720-uDPU: fix PHY mode definition to sgmii-2500
Commit f49ac7e1c4 switched the default PHY speed to 3.125Gbit to resolve
issues with SFP modules. However, U-Boot does not have a "2500base-x"
phy-mode.

Resolve this by using "sgmii-2500" instead.

Signed-off-by: Jakov Petrina <jakov.petrina@sartura.hr>
Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Stefan Roese <sr@denx.de>
2020-05-27 07:03:01 +02:00
Ezra Buehler
a1a61b0672 arm: mvebu: ds414: add u-boot,dm-pre-reloc to spi0
Without this U-Boot-specific property, booting on the Synology DS414
(or DS214+) fails in SPL. The spi0 DT node is not scanned, as a result
the SPI flash cannot be found.

Signed-off-by: Ezra Buehler <ezra@easyb.ch>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-05-27 07:02:24 +02:00
Tom Rini
60c7facfc9 Merge tag 'ti-v2020.07-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Enable DM_ETH on omap3_logic board
- Enable Caches in SPL for K3 platforms
- Enable backup boot mode support for J721E
- Update the DDR timings for AM654 EVM
- Add automated tests for RX-51
2020-05-25 14:09:42 -04:00
Peng Fan
b4b2619211 armv8: cache_v8: fix mmu_set_region_dcache_behaviour
The enum dcache_optoion contains a shift left 2 bits in the armv8 case
already.  The PMD_ATTRINDX(option) macro will perform a left shift of 2
bits.  Perform a right shift so that in the end we get the correct
value.

[trini: Reword the commit message]
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-25 11:54:53 -04:00
Tom Rini
9c5fef5774 Merge git://git.denx.de/u-boot-usb
- DM support for OMAP
- DWC3 fix
- Typo fix in eth/r8152
2020-05-22 22:58:50 -04:00
Tom Rini
f53c2dc162 Merge tag 'u-boot-rockchip-20200522' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix rk3288 chromebook veyron support;
- Add pcie driver support for rk3399;
- other fixes for rk3399 boards
2020-05-22 10:28:38 -04:00
Adam Ford
94ed66194f usb: ehci-omap: Add Support for DM_USB and OF_CONTROL
The omap3.dtsi file shows the usbhshost node with two sub-nodes
for ohci and ehci.  This patch file creates the usbhshost, and
pulls the portX-mode information.  It then locates the EHCI
sub-node, and initializes the EHCI controller with the info
pulled from the usbhshost node.

There is still more to do since there isn't an actual link
between the 'phys' reference and the corresponding phy driver,
and there is no nop-xceiv driver yet.

In the meantime, the older style reference to
CONFIG_OMAP_EHCI_PHYx_RESET_GPIO is still needed to pull
the phy out of reset until the phy driver is completed and the
phandle reference is made.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-05-22 15:22:35 +02:00
Kurt Miller
33863f744d rockchip: rk3328: rock64 - fix gen3 SPL hang
Use the same approach as ROC-RK3328-CC which enables SPL GPIO,
pinctl and regulator support. This allows the gen3 board to
boot through SPL and does not break gen2 in the process.

Signed-off-by: Kurt Miller <kurt@intricatesoftware.com>
Acked-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-22 20:53:20 +08:00
Urja Rannikko
e68a843601 rockchip: spl-boot-order: do not attempt to access fdt if OF_PLATDATA
gd->fdt_blob is null if using OF_PLATDATA in SPL, which causes a hang
after f0921f5098 ("fdt: Sync up to the latest libfdt").
We use the same test that is used in spl_common_init on whether to call
fdtdec_setup to unconditionally avoid linking in the fdt-using code
when not necessary and thus reduce SPL size.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-22 20:53:20 +08:00
Urja Rannikko
353ad95aa6 rockchip: spl: veyron speedy boots from SPI
Apparently speedy was forgotten from this list of veyron devices.

Fixes: 49105fb7ed ("rockchip: add common spl board file")
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-22 20:53:20 +08:00
Jagan Teki
765a12d6a3 rockchip: Enable PCIe/M.2 on rk3399 board w/ M.2
Enable PCIe/M.2 support on
- NanoPC-T4
- ROC-RK3399-PC Mezzanine boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> #roc-rk3399-pc
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-22 20:53:20 +08:00
Deepak Das
5c606ca35c rockchip: rk3399: enable spl-fifo-mode for sdmmc
adapting commit fa2047c473 ("rockchip: rk3328: enable spl-fifo-mode
for emmc and sdmmc") for rk3399.
Since mmc to sram can't do dma, add patch to prevent aborts transferring
TF-A parts.

Signed-off-by: Deepak Das <deepakdas.linux@gmail.com>
2020-05-22 17:24:30 +08:00
Masahiro Yamada
6cbe90486c ARM: uniphier: remove board_eth_init()
This platform completely migrated to CONFIG_DM_ETH.

board_eth_init() is only called from net/eth_legacy.c

Remove the legacy hook.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-22 11:21:06 +09:00
Masahiro Yamada
6717e15447 ARM: uniphier: delete or replace <common.h> includes
<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-22 11:21:06 +09:00
Masahiro Yamada
1e1518866f ARM: uniphier: drop #include <log.h> again
I do not understand the changes made to these files by
commit f7ae49fc4f ("common: Drop log.h from common header").

  git show f7ae49fc4f -- arch/arm/mach-uniphier/

None of them uses the log function feature.

Simply revert the changes made to these files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-22 11:21:06 +09:00
Masahiro Yamada
e9d3b23505 ARM: uniphier: drop #include <init.h> again from umc-pxs2.c
I do not understand the change made to this file by
commit 691d719db7 ("common: Drop init.h from common header").

  git show 691d719db7 -- arch/arm/mach-uniphier/dram/umc-pxs2.c

This file does not call or define any functions declared in <init.h>

Simply revert the change made to this file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-22 11:21:06 +09:00
Masahiro Yamada
e6396fcab2 ARM: uniphier: remove #include <net.h> again from micro-support-card.c
I do not understand the changes made to this file by
commit 90526e9fba ("common: Drop net.h from common header").

  git show 90526e9fba -- arch/arm/mach-uniphier/micro-support-card.c

The necessary declaration is already included by <netdev.h> at line 112.
It also moved the <dm/of.h> inclusion, but I do not understand the
motivation of doing so, either.

Simply revert the changes made to this file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-22 11:21:06 +09:00
Masahiro Yamada
f49049a8ec ARM: uniphier: include <asm/system.h> instead of <asm/cache.h> from psci.c
I do not understand the change made to this file by
commit 90526e9fba ("common: Drop net.h from common header").

  git show 90526e9fba -- arch/arm/mach-uniphier/arm32/psci.c

It added <asm/cache.h> while this file does not call the standard cache
functions at all.

All the uniphier-specific cache functions, uniphier_cache_*() are
declared in cache-uniphier.h, which is already included from this file.

Including <asm/system.h> is sensible to fix the -Wmissing-prototypes
warnings because this file defines psci_cpu_on and psci_system_reset().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-22 11:21:06 +09:00
Masahiro Yamada
1517126fda ARM: uniphier: select DM_ETH
drivers/net/smc911x.c has been converted to DM.

select DM_ETH to enable it for all the UniPhier platform boards.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-22 11:21:06 +09:00
Tom Rini
2fa581ba91 Merge git://git.denx.de/u-boot-sh
- Enable -ffunction-sections / -fdata-sections --gc-sections to SH
- RCar Gen3 updates
2020-05-21 08:26:40 -04:00
Tom Rini
b0b13f4114 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add DM_ETH support for lx2160aqds, ls2080aqds, ls1088aqds
- QSI related fixes on ls1012a, ls2080a, ls1046a, ls1088a, ls1043a based
  platforms
- Bug-fixes/updtaes related to ls1046afrwy, fsl-mc, msi-map property
2020-05-20 08:46:56 -04:00
Marek Vasut
03578d940d ARM: dts: rmobile: Enable eMMC DDR52 modes on Gen3 Salvator-X(S),ULCB,Ebisu
Enable DDR52 modes, since the SD core supports correct switching now.
For completeness, list HS200 modes, however those were already enabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-05-20 13:20:25 +02:00
Marek Vasut
5d17a1691b ARM: dts: rmobile: Reserve space in R-Car Gen3 DTs
Reserve 4 kiB of space in R-Car Gen3 DTs when those DTs are compiled
to permit patching in OpTee-OS /firmware node, /reserved-memory node
and possibly also additional /memory@ nodes.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2020-05-20 13:20:19 +02:00
Jan Kiszka
c02712a748 arm: mach-k3: Enable dcache in SPL
Add support for enabling dcache already in SPL. It accelerates the boot
and resolves the risk to run into unaligned 64-bit accesses.

Based on original patch by Lokesh Vulta.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-05-19 14:41:13 +05:30
Andreas Dannenberg
7bf82cc1f8 arm: mach-k3: j721e_init: Add support for backup boot modes
When the boot of J721E devices using the primary bootmode (configured
via device pins) fails a boot using the configured backup bootmode is
attempted. To take advantage of the backup boot mode feature go ahead
and add support to the J721E init code to determine whether the ROM code
performed the boot using the primary or backup boot mode, and if booted
from the backup boot mode, decode the bootmode settings into the
appropriate U-Boot mode accordingly so that the boot can proceed.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-05-19 14:40:54 +05:30
Adam Ford
62ca4aa16f ARM: omap3_logic boards: Convert to DM_ETH
With the converstion of SMC911x to DM, this can facilitate the omap3
boards from LogicPD (now called Beacon EmbeddedWorks) to be converted.
There isn't a clean solution to doing this in phases, so the boards are
all being done together to avoid breaking functionality.

Because the GPMC bus hasn't been converted, the -u-boot.dtsi node needs
to show the address of the ethernet controller for each board.

The board file, which is common betwen the OMAP35 and DM37 SOM LV and
Torpedo boards, can remove the manual ethernet initialization, but it
still needs to register the address and GPMC configuration for the Ethernet
controller which is now being moved around to board_late_init().

Lastly, this patch updates the various config files to add the reference
for DM_ETH and remove the SMC address, which is now fetched from the
newly created device tree nodes.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-05-19 14:40:42 +05:30
Praneeth Bajjuri
a665cb13dc ddr: k3-am654: EMIF Tool update to 2.02 for IO optimizations and fixes
EMIF tool for AM65x [1] is now updated from rev 1.98 to 2.02

This update includes
* Optimizations in IO configuration.
* Fix for byte enablement in GCR registers.
* Fixes for PG2.0 including ZQ control.

[1]: http://www.ti.com/lit/zip/sprcah7

Acked-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
2020-05-19 14:40:27 +05:30
Ioana Ciornei
020ed9c666 arm: dts: ls2080aqds: add CONFIG_MULTI_DTB_FIT support
Add support for selecting the appropriate DTS file depending on the
SERDES protocol used.

The fsl-ls2080a-qds DTS will be used by default if there isn't a DTS
file specifically made for the current SERDES protocol.

This patch adds the necessary DPMAC nodes (DPMAC 1-8) for
protocol 42 (0x2A) on SD#1.

Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled
implement the board_fit_config_name_match() function in order to choose
the appropriate DTS.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:08 +05:30
Ioana Ciornei
b62526282a arm: dts: ls1088aqds: add CONFIG_MULTI_DTB_FIT support
Add support for selecting the appropriate DTS file depending on the
SERDES protocol used. The fsl-ls2088a-qds DTS will be used by default if
there isn't a DTS file specifically made for the current SERDES
protocol.

This patch adds support for the on-board ports (DPMAC 1,2 and 4,5) found
on the SERDES protocols 21(0x15) and 29(0x1d) for SD#1.

On the LS1088AQDS board EMDIO1 is used with two onboard RGMII PHYs
(Realtek RTL8211FD-CG), as well as 2 input/output connectors for
mezzanine cards. Configuration signals from the Qixis FPGA control the
routing of the external MDIOs.

Register 0x54 of the Qixis FPGA controls the routing of the EMDIO1 one
of the 2 IO slots. As a consequence, a new node is added to
describe register 0x54 as a MDIO mux controlled with child nodes
describing all the IO slots as MDIO buses.

Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled
implement the board_fit_config_name_match() function in order to choose
the appropriate DTS.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:08 +05:30
Ioana Ciornei
74f04490f2 arm: dts: lx2160aqds: add nodes describing possible mezzanine cards
Add device trees describing possible uses of mezzanine cards depending
on the SERDES protocol employed.

This patch adds DPAA2 networking support for the following protocols on
each SERDES block:
 * SD #1: 3, 7, 19, 20
 * SD #2: 11

Each SERDES block has a different device tree file per protocol
supported, where the IO SLOTs used are enabled and PHYs located on the
mezzanine cards are described. Also, dpmac nodes are edited and their
associated phy-connection-type and phy-handle are added.

Top DTS files are also added for each combination of protocol on the 3
SERDES blocks.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:07 +05:30
Ioana Ciornei
3695e4ccfd arm: dts: lx2160aqds: add MDIO slots
The LX2160A processor has two external MDIO interfaces, described in the
DTS as emdio1 and emdio2.

On the LX2160AQDS board EMDIO1 is used with two onboard RGMII PHYs
(Realtek RTL8211FD-CG), as well as eight input/output connectors for
mezzanine cards. Configuration signals from the Qixis FPGA control the
routing of the external MDIOs.

Register 0x54 of the Qixis FPGA controls the routing of the EMDIO1 one
of the 8 IO slots. As a consequence, a new node is added to
describe register 0x54 as a MDIO mux controlled with child nodes
describing all the IO slots as MDIO buses.

Also, DPMAC 17 and 18 are updated to reference the on-board PHYs.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:07 +05:30
Ioana Ciornei
237b262009 arm: dts: lx2160a: add noted for dpmacs 1, 2, 5-6
Add nodes for DPMACs 1, 2 and 5-6 which were missing from the
description. These will be later used on the LX2160AQDS specific DTS.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:07 +05:30
Kuldeep Singh
b480bcca80 treewide: Update fsl qspi node dt properties as per spi-mem driver
According to new qspi driver, some properties like "bus-num, num-cs,
big-endian" are no longer used. Device endiannes can be determined from
device-type data in driver.

Now use board specific compatibles, generic node names and specific
labels to align with linux device-tree properties.

Also consolidate spi-max-frequency to 50Mhz treewide.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:05 +05:30
Kuldeep Singh
c93ad777b8 treewide: Remove unused FSL QSPI config options for Layerscape platforms
Some of these options are not used by the driver anymore and some of
them are obsolete as the information is gathered from the dt. Also
consolidating defines in common headers.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:05 +05:30
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f09f1ecbe7 Use __ASSEMBLY__ as the assembly macros
Some places use __ASSEMBLER__ instead which does not work since the
Makefile does not define it. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
07e1114671 Fix some checkpatch warnings in calls to udelay()
Fix up some incorrect code style in calls to functions in the linux/time.h
header, mostly udelay().

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
1af3c7f422 common: Drop linux/stringify.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
eb41d8a1be common: Drop linux/bug.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
25a5818ff8 common: Drop asm/ptrace.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
0914011310 command: Remove the cmd_tbl_t typedef
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 18:36:55 -04:00
Simon Glass
691d719db7 common: Drop init.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
4d72caa5b9 common: Drop image.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
52f2423804 common: Drop bootstage.h from common header
Move this fairly uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
e6f6f9e648 common: Drop part.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
0528979fa7 part: Drop disk_partition_t typedef
We should not be using typedefs and these make it harder to use
forward declarations (to reduce header file inclusions). Drop the typedef.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
90526e9fba common: Drop net.h from common header
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:31 -04:00
Simon Glass
c3dc39a2f8 arm: Don't include common.h in header files
It is bad practice to include common.h in other header files since it can
bring in any number of superfluous definitions. It implies that some C
files don't include it and thus may be missing CONFIG options that are set
up by that file. The C files should include these themselves.

Update some header files in arch/arm to drop this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 14:54:24 -04:00
Simon Glass
b79fdc7697 common: Drop flash.h from common header
Move this uncommon header out of the common header.

Fix up some style problems in flash.h while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 14:53:28 -04:00
Simon Glass
a595a0e910 flash: Tidy up coding style for flash functions
Some functions use the wrong code style and generate checkpatch errors.
Fix these.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 14:53:28 -04:00
Tiaki Rice
d32cbefc8a ARM: dts: sama5d2: Add uart4 definition
This patch adds support for uart4 to the
processor level device tree include file.

Signed-off-by: Tiaki Rice <tiakirice@hotmail.com>
Cc: Eugen Hristev <Eugen.Hristev@microchip.com>
2020-05-18 15:00:20 +03:00
Ilias Apalodimas
7f44c7e281 dts: nxp2160ardb: add op-tee node
A defconfig is added on lx2160ardb which allows UEFI variable management
via OP-TEE. Enable the the node in the relevant DTS file.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-05-17 21:59:53 +02:00
Michael Walle
714497e327 efi_loader: round the memory area in efi_add_memory_map()
Virtually all callers of this function do the rounding on their own.
Some do it right, some don't. Instead of doing this in each caller,
do the rounding in efi_add_memory_map(). Change the size parameter
to bytes instead of pages and remove aligning and size calculation in
all callers.

There is no more need to make the original efi_add_memory_map() (which
takes pages as size) available outside the module. Thus rename it to
efi_add_memory_map_pg() and make it static to prevent further misuse
outside the module.

Signed-off-by: Michael Walle <michael@walle.cc>
Add missing comma in sunxi_display.c.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-17 21:59:53 +02:00
Samuel Holland
3988be5fd4 spl: Always define preloader_console_init
A large number of boards call preloader_console_init unconditionally.
Currently, they fail to build with CONFIG_SPL_SERIAL=n, because the
function is undefined in that case. To fix the build, always define
preloader_console_init, but make it no-op when CONFIG_SPL_SERIAL=n.

For the few boards that did check for CONFIG_SPL_SERIAL before calling
preloader_console_init, remove the checks, since the function can now
be called unconditionally.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
71f6354b0e rename symbol: CONFIG_STM32 -> CONFIG_ARCH_STM32
Have this symbol follow the pattern of all other such symbols.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
18138ab203 rename symbol: CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
Have this symbol follow the pattern of all other such symbols.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
bb0fb4c0f4 rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
Have this symbol follow the pattern of all other such symbols.
This patch also removes a TODO from the code.

Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
b48f72a86b arm: orion5x: finish moving SoC to mach-orion5x
The SPL linker script had been left in arch/$(ARCH)/cpu/$(CPU)/$(SOC);
therefore move it to the already-established arch/$(ARCH)/mach-$(SOC)
location.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
b16a331697 rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
Have this symbol follow the pattern of all other such symbols.
This patch removes a TODO from the code.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
9bffc54996 arch/arm/Makefile: sort machine names
The comment immediately above the block of machine directory names implored
users to keep the macro names sorted, but, alas, this is no longer the case.

Put the list of machine directory names back in alphanumerical order by
CONFIG_* macro name, as the comment asks. Sort all the symbols as though they
all followed the convention of having the string "ARCH_" in the middle of
their definitions.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
b3d9a8b185 arm: lpc32xx: move SoC to mach-lpc32xx
Following the example of most other SoCs in arch/$(ARCH)/cpu/$(CPU)/$(SOC)
move the lpc32xx code from arch/arm/cpu/arm926ejs/lpc32xx to
arch/arm/mach-lpc32xx.

Following the checklist from
commit 01f1445630 ("ARM: prepare for moving SoC sources into mach-*"):

    [1] move files from arch/arm/cpu/arm926ejs/lpc32xx to arch/arm/mach-lpx32xx
    [2] add machine entry to arch/arm/Makefile
    [3] remove "obj-y += ..." from arch/arm/cpu/arm926ejs/Makefile
    [4] fix the Kconfig file path in arch/arm/Kconfig
    [5] (no MAINTAINERS update)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Tom Rini
e2b86e23ce - stm32mp1: migrate MTD and DFU configuration in Kconfig
- stm32mp1: add command stm32prog
 - stm32mp1: several board and arch updates
 - stm32mp1: activate data cache in SPL and before relocation
 - Many improvment for AV96 board and DHCOR SoM
   (add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM
    Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM)
 - clk: stm32mp1: fix CK_MPU calculation
 - DT alignment of stm32mp1 device tree with Linux 5.7-rc2
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Merge tag 'u-boot-stm32-20200514' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- stm32mp1: migrate MTD and DFU configuration in Kconfig
- stm32mp1: add command stm32prog
- stm32mp1: several board and arch updates
- stm32mp1: activate data cache in SPL and before relocation
- Many improvment for AV96 board and DHCOR SoM
  (add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM
   Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM)
- clk: stm32mp1: fix CK_MPU calculation
- DT alignment of stm32mp1 device tree with Linux 5.7-rc2
2020-05-14 08:44:06 -04:00
Tom Rini
fe16786149 - fix phy configuration for RPi4's bcmgenet
- sync RPi4's env size with other RPi configs
 - add kconfig option to reserver more pages in the EFI mem map
 - add support for SDMA which is used by RPi4
 - fix corner case boot bug for RPi3 32-bit
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Merge tag 'rpi-next-2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi

- fix phy configuration for RPi4's bcmgenet
- sync RPi4's env size with other RPi configs
- add kconfig option to reserver more pages in the EFI mem map
- add support for SDMA which is used by RPi4
- fix corner case boot bug for RPi3 32-bit
2020-05-14 08:43:33 -04:00
Patrick Delaunay
1b28a5e2b0 ARM: dts: stm32mp1: DT alignment with Linux 5.7-rc2
DT alignment with Linux 5.7-rc2, including the kernel commits

431c89e6f323 ARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boards
79e965053872 ARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boards
877db62ea516 ARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boards
7519e95ba5f8 ARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boards
f68e2dbc591a ARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1
d6210da4f8bf ARM: dts: stm32: add cpu clock-frequency property on stm32mp15x
b65b6fc56925 ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c
1c1cf5996cfb ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1
bef15fc0fad9 ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1
b7fc0a87b9ac ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx
a5e557655285 ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boards
8bc631b650a6 ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1
fccd6a577bb3 ARM: dts: stm32: Correct stmfx node name on stm32mp157c-ev1 board
cc775a83db65 ARM: dts: stm32: add resets property on all DMA nodes on stm32mp151
c5fae093511b ARM: dts: stm32: enable USB OTG Dual Role on stm32mp157c-ev1
9879e2165758 ARM: dts: stm32: add USB OTG pinctrl to stm32mp15
82ac8a81f985 ARM: dts: stm32: add USB OTG full support on stm32mp151
8714b26e2863 ARM: dts: stm32: remove useless properties in stm32mp157a-avenger96 stmpic node
a7959919709e ARM: dts: stm32: Add UART8 pins A pinmux entry on stm32mp1
4d7c53a684da ARM: dts: stm32: Add USART3 pins A pinmux entry on stm32mp1
80ab128332ee ARM: dts: stm32: Add SAI2A pins B pinmux entry on stm32mp1
ab7f98c0c546 ARM: dts: stm32: Add Ethernet0 RMII pins A pinmux entry on stm32mp1

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
dc7e5f190d arm: stm32mp: activate data cache on DDR in SPL
Activate cache on DDR to improve the accesses to DDR used by SPL:
- CONFIG_SPL_BSS_START_ADDR
- CONFIG_SYS_SPL_MALLOC_START

Cache is configured only when DDR is fully initialized,
to avoid speculative access and issue in get_ram_size().
Data cache is deactivated at the end of SPL, to flush the data cache
and the TLB.

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
7e8471cae5 arm: stm32mp: activate data cache in SPL and before relocation
Activate the data cache in SPL and in U-Boot before relocation.

In arch_cpu_init(), the function early_enable_caches() sets the early
TLB, early_tlb[] located .init section, and set cacheable:
- for SPL, all the SYSRAM
- for U-Boot, all the DDR

After relocation, the function enable_caches() (called by board_r)
reconfigures the MMU with new TLB location (reserved in
board_f.c::reserve_mmu) and re-enable the data cache.

This patch allows to reduce the execution time, particularly
- for the device tree parsing in U-Boot pre-reloc stage
  (dm_extended_scan_fd =>dm_scan_fdt)
- in I2C timing computation in SPL (stm32_i2c_choose_solution())

For example, the result on STM32MP157C-DK2 board is:
   1,6s gain for trusted boot chain with TF-A
   2,2s gain for basic boot chain with SPL

For information, as TLB is added in .data section, the binary size
increased and the SPL load time by ROM code increased (30ms on DK2).

But early malloc can't be used for TLB because arch_cpu_init()
is executed before the early poll initialization done in spl_common_init()
called by spl_early_init() So it too late for this use case.
And if I initialize the MMU and the cache after this function it is
too late, as dm_init_and_scan and fdt parsing is also called in
spl_common_init().

And .BSS can be used in board_init_f(): only stack and global can use
before BSS init done in board_init_r().

So .data is the better solution without hardcoded location but if you
have size issue for SPL you can deactivate cache for SPL only
(with CONFIG_SPL_SYS_DCACHE_OFF).

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14 09:02:12 +02:00
Marek Vasut
1e444bdc98 ARM: stm32: Hog GPIO PF7 high on DHCOM to unlock SPI NOR nWP
The SPI NOR nWP line is connected to GPIO PF7 on the SoM,
pull the GPIO line high by default to clear SPI NOR WP.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14 09:02:12 +02:00
Marek Vasut
92ca0f7446 ARM: dts: stm32: Synchronize DDR setttings on DH SoMs
Add custom DDR DRAM settings for the DHCOR and DHCOM SoMs and put them
into use by the board file instead of the default ones. These new DRAM
settings are a better fit for the SoMs.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14 09:02:12 +02:00
Marek Vasut
1ca5017418 ARM: dts: stm32: Fix AV96 and DHCOR split
The commit 132e5b6898 ("ARM: dts: stm32: Split AV96 into DHCOR SoM
and AV96 board") was not applied correctly and in full, and omitted
an important split of the SoM into 3V3 and 1V8 options. The Avenger96
board is based on the 1V8 IO option of the DHCOR SoM, however this is
an optional modification of the 3V3 IO DHCOR SoM with extra on-SoM
regulator to cater for the 96boards 1V8 IO requirements.

Reinstate the split between the 1V8 and 3V3 IO variants.

Fixes: 132e5b6898 ("ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
414315bcdf ARM: dts: stm32mp15: use DDR3 files generated by STM32CubeMX
Use the DDR3 dtsi files generated by STM32CubeMX 5.6.0
Speed Bin Grade = using DDR3-1066G / 8-8-8 and all others
parameters at default value.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
0c95295e17 board: stm32mp1: update management of boot-led
Force boot-led ON and no more rely on default-state.
This patch avoid device-tree modification for U-Boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
eaec1f9e90 arm: stm32mp: spl: update error management in board_init_f
Call hang when an error is detected for probe of any driver
needed for console or DDR init: clk, reset and pincontrol

NB: previous behavior with a return in board_init_f() was not correct;
    DDR is not initialized and SPL execution can't continue

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
586117ce80 arm: stm32mp: remove dependency for STM32KEY
This command is not more depending on fuse command, but have
direct access to BSEC misc driver, so the dependency with
can be removed CMD_FUSE

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
306a5cf24f stm32mp: stm32prog: add support of RAM target
Add support of RAM target in flashlayout to load kernel image
("system") and device tree ("filesystem") in DDR with DFU and
start these images.

The flashlayout.tsv is:

-	0x01	fsbl		Binary		none	0x00000000	tf-a.stm32
-	0x03	ssbl		Binary		none	0x00000000	u-boot.stm32
P	0x10	kernel		System		ram0	0xC2000000	uImage.bin
P	0x11	dtb		FileSystem	ram0	0xC4000000	dtb.bin

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
d0686c69ff stm32mp: stm32prog: support for script
Support an U-Boot script included in uimage instead of flashlayout file
(text file in tsv format).

This feature is used to execute this script directly when U-Boot is
loaded in DDR (for update without STM32CubeProgrammer for example).

A simple example with dfu-util only is:

$> echo "dfu 0" > script.cmd
$> mkimage -C none -A arm -T script -d script.cmd script.uimg
$> mkimage -T stm32image -a 0xC0000000 -e 0xC0000000 -d script.uimg \
  script.stm32

$> dfu-util -d 0483:df11 -a 1 -D tf-a.stm32
$> dfu-util -d 0483:df11 -a 0 -D script.stm32
$> dfu-util -d 0483:df11 -a 0 -D u-boot.stm32
$> dfu-util -d 0483:df11 -a 0 -e

Then you can used dfu-utils to update your device

To increase speed, you can also switch to fastboot protocol with:
  echo "fastboot 0" > script.cmd

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
99d643cb41 stm32mp: stm32prog: enable videoconsole
Enable the videoconsole during the stm32prog command execution
to have information without UART.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
468f0508b5 stm32mp: stm32prog: add serial link support
Add a support of UART, using the same protocol than MCU STM32.

See "AN5275: USB DFU/USART protocols used in STM32MP1 Series
bootloaders" for details.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
6ce1f4ad8d stm32mp: stm32prog: add pmic NVM update support
Add a virtual partition to update the pmic non volatile memory.
(on ST board, STPMIC1).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
936f1aea80 stm32mp: stm32prog: add otp update support
Add a virtual partition to update the STM32MP15x OTP based
on SMC service provided by TF-A.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
2bad5d082d stm32mp: stm32prog: add support for delete option in flashlayout
Add support for delete option 'D' in flashlayout for
full device or for partitions

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
b83caf9fcb stm32mp: stm32prog: add support of ssbl copy
For reliability of boot from NAND/SPI-NAND (with read-disturb issue)
the SSBL can be present several time, when it is indicated in the
flashlayout with "Binary(X)".
The received binary is copied X times by U-Boot on the target.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
8f035f7b48 stm32mp: stm32prog: adapt the MTD partitions
Dynamically adapt the MTD partitions in NOR/NAND/SPI-NAND when stm32prog
command detects in the parsed flash layout files:
- a fsbl partition in NOR.
- a tee partition in NOR/NAND/SPI-NAND

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
eb845d6f8b stm32mp: stm32prog: add MTD devices support
Add support of MTD device (DFU_MTD backend) for
NOR, NAND or SPI-NAND target.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
ffc405e63b stm32mp: stm32prog: add upport of partial update
Add support of partial update, update only some partitions,
and check the coherence of the layout with the existing GPT
partitions (offset and size).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
878f7542f1 stm32mp: stm32prog: add support of boot partition for eMMC device
Add support of eMMC device boot partition with
part_id = -1 for offset="boot1"
     or = -2 for offset="boot2"

The stm32prog command configures the MMC DFU backend with "mmcpart"
and configure the eMMC (command "mmc bootbus" and "mmc partconf")
when the update is done.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
aff4c5dd82 stm32mp: stm32prog: add MMC device
Add support of MMC device (based on DFU_MMC backend)
for SD card and eMMC update.

Create a GPT partitioning on the device.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
6ee6839183 stm32mp: stm32prog: add flash layout parsing
Build the list of device and of partition with
a tab separated value file with a stm32 header: the FlashLayout.tsv
(https://wiki.st.com/stm32mpu/wiki/STM32CubeProgrammer_flashlayout)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
954bd1a923 stm32mp: add the command stm32prog
Add a specific command stm32prog for STM32MP soc family
witch allows to program the boot devices with the tool
STM32CubeProgrammer (http://www.st.com/STM32CubeProg).

This command uses the same UART STM32 protocol than MCU
STM32 with or USB with DFU protocol v1.1 (ithe MCU ST
extension are no supported).

The executed actions are based on a tab separated value file
with a stm32 header, the FlashLayout file
(https://wiki.st.com/stm32mpu/wiki/STM32CubeProgrammer_flashlayout).

This file is parsed by the U-Boot command to:
- initialize the devices
- create the partition table on each device
- initialize the DFU backend to access to not volatile memory
  (NOR/NAND/SD/eMMC) or to virtual device (OTP/PMIC)

Up to STM32PROG_MAX_DEV (5) devices can be updated with a FlashLayout.

The communication between U-Boot and STM32CubeProgrammer is done with
the specific alternate configuration (see "AN5275: USB DFU/USART protocols
used in STM32MP1 Series bootloaders" for details).

The command stm32prog is executed when a boot from USB is detected
(selected with bootpins) and we can program the boot devices with
a simple command (on Windows or Linux):

PC $>  STM32_Programmer_CLI -c port=usb1 -w flaslayout.tsv

1/ the ROM code loads TF-A in embedded RAM (DFU or uart)
2/ TF-A loads flashlayout file and U-Boot in DDR (DFU or uart)
3/ U-Boot executes the stm32prog command (DFU or uart)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
7802a4495f stm32mp: add function get_cpu_dev
Add a function get_cpu_dev to get the DEV_ID present
in DBGMCU_IDC register.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
b664a74537 board: stm32mp1: support boot from spi-nand
Manage BOOT_FLASH_SPINAND, with boot_device="spi-nand"
and treat this value in bootcmd_stm32mp.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
4ac345220a board: stm32mp1: use FDT address provided by TF-A at boot time
Save and use the FDT address provided by TF-A in r2 at boot time
(it is NT_FW_CONFIG = Non Trusted Firmware configuration file)

Address is saved in save_boot_params(), called by start.S
and the used DTB is gd->fdt_blob = board_fdt_blob_setup().

If dtb is not provided or invalid, U-Boot use as fallback
the builtin DTB.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
43df0a159d stm32mp1: dynamically detect op-tee presence
Activate OP-TEE driver for trusted and optee defconfig.

This driver allows detection of TEE presence for boot from flash;
CONFIG_STM32MP1_OPTEE is also removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
4a1b975dac board: stm32mp1: reserve memory for OP-TEE in device tree
Add reserve memory for OP-TEE in U-Boot and in kernel device tree:
- no more reduce the DDR size in "memory" node:
  CONFIG_SYS_MEM_TOP_HIDE is no more used
- U-Boot device-tree defines the needed "reserved-memory" for OP-TEE
  and U-Boot should not use this reserved memory: board_get_usable_ram_top
  use lmb lib to found the first free region, the not reserved
  memory, enough to relocate U-Boot: the needed size of U-Boot
  is estimated with gd->mon_len + CONFIG_SYS_MALLOC_LEN.
- the optee node ("optee@...": firmware with compatible "linaro,optee-tz")
  and the associated "reserved-memory" are deactivated in kernel device
  tree when OP-TEE is not detected by U-Boot to prevent kernel issue
  (memory is reserved but not used, optee driver probe failed).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Marek Vasut
2d68365da1 ARM: stm32: Implement DDR3 coding on DHCOR SoM
The DHCOR board does exist in multiple variants with different DDR3
DRAM sizes. To cater for all of them, implement DDR3 code handling.
There are two GPIOs which code the DRAM size populated on the SoM,
read them out and use the value to pick the correct DDR3 config.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Marek Vasut
a8c97f4a00 ARM: dts: stm32: Rework DDR DT inclusion
Adjust the DDR configuration dtsi such that they only generate the
DRAM configuration node, the DDR controller node is moved into the
stm32mp157-u-boot.dtsi itself. This permits including multiple DDR
configuration dtsi files in board DT.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Marek Vasut
731fd50e27 ARM: stm32: Implement board coding on AV96
The AV96 board does exist in multiple variants. To cater for all of
them, implement board code handling. There are two GPIOs which code
the type of the board, read them out and use the value to pick the
correct device tree from an fitImage.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Change-Id: Iddb330b9a66500495885457cbe17edc0eacaaf43
2020-05-14 09:02:12 +02:00
Marek Vasut
65e38e81ac ARM: stm32: Add board_early_init_f() to SPL
Add weak implementation of board_early_init_f() hook into the
STM32MP1 SPL. This can be used to read out e.g. configuration
straps before initializing the DRAM.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Kyle Evans
c6badda85c rpi: Kconfig option for initial page reservation
While the nearly-universal default for the Raspberry Pi family is to use
spin tables and the spin table implementation provided by the Raspberry Pi
Foundation, FreeBSD and others may use a PSCI implementation instead.

Accommodate these setups by allowing them to configure for more than one
page to be reserved in the initial reservation.  The default reservation
remains as one page.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-13 14:04:49 +02:00
Tom Rini
1e6d9f515d - Enable USB Host for Odroid-C2 board
- Add Open-Drain/Open-Source emulation in GPIO uclass
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Merge tag 'u-boot-amlogic-20200511' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Enable USB Host for Odroid-C2 board
- Add Open-Drain/Open-Source emulation in GPIO uclass
2020-05-12 09:23:15 -04:00
Simon Glass
6cbb41432d arm: dts: bcm283x: Allow UARTs to work before relocation
At present the pinctrl nodes are not enabled in pre-relocation U-Boot so
the UARTs do not correctly select the pinconfig to enable the UART pins.
Fix this so that the U-Boot banner is printed.

This fixes serial output on rpi_3b_32b with the following config.txt
options:

   enable_uart=1
   gpu_freq=250

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 9821636b64 (bcm2835_pinctrl: Probe pre-reloc)
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-12 10:59:12 +02:00
Tom Rini
bb488ac34d Merge tag 'ti-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix boot issues on Nokia RX-51
- Configure AM6 CPSW for 10Mbps in rgmii mode.
- Minor changes for J721e
2020-05-11 12:04:54 -04:00
Tom Rini
1bccb23b7b i.MX for 2020.07
----------------
 
 - i.MX NAND and nandbxb for i.MX8M
 - imx8MM : new beacon devkit
 - imx8MQ : new pico-imx8MQ
 - imx8QXP : extend to enable M4, fixes
 - add thermal support
 - caches in SPL (missing board)
 - Fixes
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/685391011
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Merge tag 'u-boot-imx-20200511' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2020.07
----------------

- i.MX NAND and nandbxb for i.MX8M
- imx8MM : new beacon devkit
- imx8MQ : new pico-imx8MQ
- imx8QXP : extend to enable M4, fixes
- add thermal support
- caches in SPL (missing board)
- Fixes

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/685391011
2020-05-11 09:46:43 -04:00
Beniamino Galvani
375d79cdbb odroid-c2: enable USB host controller
Enable the second USB controller, which is connected to a hub with 4
ports. The first controller is for the OTG port and is currently not
supported.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
[narmstrong: removed useless DWC2_UTMI_WIDTH in meson64.h]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-05-11 10:07:57 +02:00
Andrew F. Davis
b76bea1205 arm: K3: Increase default SYSFW image size allocation
The memory allocated to store the FIT image containing SYSFW and board
configuration data is statically defined to the largest size expected.
Some additions to the board configuration data has pushed us slightly
over the current defined size on some HS devices, expand to 278000.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2020-05-11 10:16:49 +05:30
Jagan Teki
5a2b6778fa phy: Use _nodev naming convention if non-device clients
Clients that are requesting some of uclass API's
without a device (with ofnode) usually have _nodev
naming convention.

- clk_get_by_index_nodev
- clk_get_by_name_nodev
- reset_get_by_index_nodev
- gpio_request_by_name_nodev

So, update the same naming convention PHY framework.

This doesn't change the existing functionality.

Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-11 01:30:49 +05:30
Peng Fan
d52a03b130 imx8: cpu: check resource owned after sid fail
When we create software partition, we still need let parent
partition to configure sid, so move the check after sid failed.

Acked-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:21 +02:00
Peng Fan
ed5b253d0e imx: imx8qm/qxp: check whether m4 partition booted
Add code to check m4 partition booted or not, we will use this
to runtime set device tree file that passed to Linux Kernel.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
42b26ddc80 imx8: Select boot device dynamically
For fspi build, we will enable both SPL NOR support and SPL SPI
support. SPL will dynamically check the resource owner then
select corresponding boot device.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
6aead23323 imx: imx8qm/qxp: Recover SPL data section for partition reboot
When doing partition reboot, the boot image won't be reloaded by ROM,
it is just CPU reset to boot entry. The SW has to keep the boot image
inside the RAM unchanged. It includes both the TEXT section and DATA
section.

For SPL, the problem is DATA section will be updated at runtime, so in
next partition reboot the data is not same as the initial value from
cold boot. If any code depends on the initial value, then it will have
problem.

This patch introduces a mechanism to recover the data section
for partition reboot. It adds a new section in image for saving
data section. When from cold boot, the data section will be saved
to that new section at SPL early phase. When from partition reboot,
the data section will be restored from the new section.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
231401de2e imx: imx8qm/imx8qxp: Power down the resources before SPL jump to u-boot
Make sure that all devices that are powered up by SPL are powered down
before entering into the u-boot. Otherwise the subsystem/device will
never be powered down by SCFW, due to SPL and u-boot are in different
partitions.

Benefiting from power domain driver, this patch implements the function
"imx8_power_off_pd_devices" to power off all active devices.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
8103767256 imx: imx8qm/qxp: add get_board_serial
Add get_board_serial support, the info could be got from fuse.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
7c351ff5e0 imx: imx8qm/qxp: Fix issue in get_effective_memsize
When Trusty OS allocates the mem region from 0xfe0000000-0xffffffff,
the get_effective_memsize does not return correct memory size.
There is a check in get_effective_memsize to find the memreg where
the u-boot is running, and return the size of that memreg as the result
of get_effective_memsize. When using aligned start, the value is
0x80200000 since it is 2MB aligned. Thus the finding of memreg will
fail and return the PHYS_SDRAM_1_SIZE because u-boot text base is
0x80020000. This cause u-boot is relocated to the high memory where has
been occupied by Trusty OS.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
f44afd546f imx: imx8qm/qxp: reserving DDR memory for M4
The DDR memory from 0x88000000 to 0x8FFFFFFF is assigned to M4 on
QM and QXP. The M4 can allocate this memory by two ways,
in SCD or u-boot.

In this patch, u-boot addes the memory reserve node to DTB to pass
the info to kernel, no matter the M4 memory is reserved in SCD
or u-boot. So kernel won't access M4 reserved memory.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Han Xu
f797fe84fc nandbcb: read boot search count from fuse for imx8qxp
add support for imx8qxp to read boot search count from fuse in nandbcb

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Han Xu
214b7d534d cmd: nandbcb: Reconstruct the nandbcb tool for all platforms
The original nandbcb tool was designed for imx6 only, when trying to
leverage it to replace the kobs-ng tool, we found the design is not
friendly for supporting all platforms. To support all iMX6/7/8 platforms
and for easy further maintain, I reconstruct the structure of the tool.

The main changes including:

1. Use platform_data to determine the logic branches rather than simply
   use SOC name.
2. More data structures as parameter for functions.
3. Global variables to define the FCB/DBBT/FW locations.
4. Implement the kobs-ng default 4 FCB/4 DBBT/2 FW layout.
5. Support Hamming coding/ 40bit BCH/ 62bit BCH coding FCB.
6. Dump and compare all written FCB/DBBT to verify data integrity.

The tool has been verified on iMX6Q/DL, 6SX, 7D, 6ULL, iMX8QX, iMX8MM.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Alice Guo
49f8454705 nandbcb: add nandbcb dump command for i.MX6
Verify/dump boot structures.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Alice Guo
0b10337b21 nandbcb: add nandbcb dump command for i.MX8MM
Verify/dump boot structures written to NAND Flash chip.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Alice Guo
66dbd9c9ed nandbcb: support i.MX8M
Tested on i.MX8MM EVK, imx8mm evk uses BCH
encoding and randomizer
modify macro and print size_t with %zx
use CONFIG_IMX8M because it should apply to imx8mq/mm/mn

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Han Xu
c6ed3508bd nandbcb: fix the issue cannot support gf_14 NAND boot
bchtype in FCB should be associated to the gf_13/14 settings in BCH, fix
the issue and test on Micron 29F64G08CBABB, it can boot after the
change.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Leonard Crestez
6fcb2ee783 imx8: Replace SC_R_LAST with SC_R_NONE in DTB
We are currently using SC_R_LAST as a marker for imx8 power domain tree
nodes without a resource attached. This value is compiled into dtb as
part of the linux build and used by uboot.

The SC_R_LAST constant changes frequently as SCFW resources are added
(by design) and every time we need to update linux and uboot headers
together or boot can fail.

Fix this by replacing SC_R_LAST usage with a new constant SC_R_NONE
defined to be 0xFFF0.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
8c0a1c6de8 imx8: power: Add PD device lookup interface to power domain uclass
Add power_domain_lookup_name interface to power domain uclass to find
a power domain device by its DTB node name, not using its associated
client device.

Through this interface, we can operate the power domain devices directly.
This is needed for non-DM drivers.

Modified from Ye's NXP downstream patch

only for legacy imx8 power domain driver, since we have not migrated
to use new power domain driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Adam Ford
f36f8bc627 imx: Add support for i.MX8MM Beacon EmbeddedWorks devkit.
Beacon EmbeddedWorks, formerly known as Logic PD, is releasing
a devkit based on the i.MX8M Mini SoC consisting of baseboard +
SOM.

It supports eMMC on the SOM, microSD on the baseboard, various
GPIO, the PINCTRL, and UART.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-05-10 20:55:20 +02:00
Peng Fan
39320e7256 mtd: nand: support GPMI NAND driver for i.MX8
enable the GPMI NAND driver for i.MX8, i.MX8 use similar controller as
i.MX8M

- register definition for i.mx8
- DMA structure must be 32bit address

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Han Xu
17282f45ab mtd: mxs_nand: fix the gf_13/14 definition issue
gf_13/14 mask was not set correctly in register definition.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
ff99041b3b mxs_nand: Add support for i.MX8M
Update the gpmi/apbh_dma/bch drivers and relevant registers for i.MX8M.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
29f40c07e7 nand: mxs: correct bitflip for erased NAND page
This patch is a porting of
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/
commit/?h=imx_4.1.15_1.0.0_ga&id=e4dacc44d22e9474ec456cb330df525cd805ea38
"
i.MX6QP and i.MX7D BCH module integrated a new feature to detect the
bitflip number for erased NAND page. So for these two platform, set the
erase threshold to gf/2 and if bitflip detected, GPMI driver will
correct the data to all 0xFF.

Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q
with the one for i.MX6QP.
"

In this patch, i.MX6UL is added and threshold changed to use ecc_strength.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
dc597d1d40 imx: cpu: support tmu
Support tmu when print cpu info

Signed-off-by: peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
ef56281cf3 imx: regs: add more fuse bank structure
Add more fuse bank structure for use.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
3462b55d17 imx8mp: Set default SNSR25C for TMU probe1
So far u-boot only load SNSR25C for TMU main probe (probe 0). However,
kernel enables two probes. So it also needs to set default SNSR25C of
TCALIV1 for blank samples.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
ebb9aab318 imx: load calibration parameters from fuse for i.MX8MP
i.MX8MP thermal which has two probes and supports temperature range
from -40 to 125.  The driver still uses default 1p HW
calibration at 25C and loads calibration parameters from fuse.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
94c693d782 imx: i.MX8MN: Enable loading TASR and TCALIV from fuse
Like iMX8MM, iMX8MN also needs SW to load TMU TASR and TCALIV registers
value from fuse before enabling TMU calibration. Otherwise the calibration
is not exact.

Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
70487ff386 imx8mm: Load fuse for TMU TCALIV and TASR
On iMX8MM, the default value of TMU registers TCALIV and TASR need
be loaded from fuse. HW won't do this, it expect SW loads them before
using TMU.

Reviewed-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
9d4194f179 fec: Move imx_get_mac_from_fuse declare to imx file
imx_get_mac_from_fuse is used to load MAC address from fuse. On imx8mp,
we have two different ENET controllers and both need to call this
function. So decouple its declare from fec driver.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
3c42c0f673 imx: add module fuse support
There are different parts from one SoC. Take i.MX6ULL for example,
some part might not have ENET, some might have; some might not have
USB, some might have. The information could be got from OCOTP,
to make one image support the different parts, we need runtime
disable linux kernel dts node and uboot driver probe if the
corresponding module not exists in the part.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:21:13 +02:00
Marek Vasut
b52fb0b0b5 ARM: imx: pico-imx8mq: Add support for Technexion Pico-iMX8MQ
Add initial support for Technexion Pico-iMX8MQ SoM on PicoPI carrier
board. Currently working is ethernet, serial, eMMC. DT is imported
from Linux 5.4.28 ("462afcd6e7ea") .

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-05-10 13:19:39 +02:00
Stefano Babic
b77d0292ca Merge branch 'master' of git://git.denx.de/u-boot 2020-05-10 13:03:56 +02:00
Patrice Chotard
c2a2123e33 cmd: cache: Fix non-cached memory cachability
If dcache is switched OFF to ON state and if non-cached memory is
used, this non-cached memory must be re-declared as uncached to mmu
each time dcache is set ON.

Introduce noncached_set_region() to set this non-cached region's mmu
settings. Let architecture override it by defining it as a weak
function.

For ARM architecture, noncached_set_region() defines all noncached
region as non-cacheable.

Issue found on STM32MP1 platform using dwc_eth_qos ethernet driver,
when going from dcache OFF to dcache ON state, ethernet driver issued
TX timeout errors when performing dhcp or ping.

It can be reproduced with the following sequence:

dhcp
while true ; do
  ping 192.168.1.300 ;
  dcache off ;
  ping 192.168.1.300 ;
  dcache on ;
done

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2020-05-07 09:01:42 -04:00
Andre Przywara
56e403d95f arm: juno: enable USB
The Juno board features a standard compliant EHCI/OHCI USB host
controller pair, which we can just enable.
The platform data is taken from the device tree.

This allows to use USB mass storage (the only storage on a Juno r0)
for loading.

At least on my board USB seems a bit flaky, I need two "usb reset"
sequences after the "usb start" to detect an USB hard drive.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-07 09:01:42 -04:00
Andre Przywara
be0d09695d arm: juno: Use PSCI based reset
So far the Juno board wasn't implementing reset. Let's just use the
already existing PSCI_RESET based method to avoid any extra code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-07 09:01:42 -04:00
Andre Przywara
b3270e9138 arm: juno: Enable OF_CONTROL
The Arm Juno board was still somewhat stuck in "hardcoded land", even
though there are stable DTs around, and one happens to actually be on
the memory mapped NOR flash.

Enable the configuration options to let the board use OF_CONTROL, and
add a routine to find the address of the DTB partition in NOR
flash, to use that for U-Boot's own purposes.
This can also passed on via $fdtcontroladdr to any kernel or EFI
application, removing the need to actually load a device tree.

Since the existing "afs" command and its flash routines require
flash_init() to be called before being usable, and this is done much
later in the boot process, we introduce a stripped-down partition finder
routine in vexpress64.c, to scan the NOR flash partitions for the
DT partition. This location is then used for U-Boot to find and probe
devices.

The name of the partition can be configured, if needed, but defaults
to "board.dtb", which is used by Linaro's firmware image provided.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-07 09:01:42 -04:00
Tom Rini
1259567ae3 Merge git://git.denx.de/u-boot-usb
- MediaTek USB host support
2020-05-05 14:53:51 -04:00
Tom Rini
a1f5f4ac20 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- 2 MVEBU related fixes
2020-05-04 11:05:48 -04:00
Tom Rini
143414c03f i.MX for 2020.07
----------------
 
 - imxrt: fix LCD clock, fix doc
 - new board: Coral Dev
 - imx8: enable Cache in SPL. SNVS, update SCFW API
 - imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading
 - MX6ULL : is_imx6ull to include i.MX6ULZ
 - Net: add config to enable TXC delay
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
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Merge tag 'u-boot-imx-20200502' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2020.07
----------------

- imxrt: fix LCD clock, fix doc
- new board: Coral Dev
- imx8: enable Cache in SPL. SNVS, update SCFW API
- imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading
- MX6ULL : is_imx6ull to include i.MX6ULZ
- Net: add config to enable TXC delay

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
2020-05-04 09:29:42 -04:00
Tom Rini
04da42770b Merge tag 'u-boot-rockchip-20200501' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- dts clean up to use -u-boot for px30, rk3399 boards
- dts sycn from upstream kernel for rk3328, rk3399
- add rockchip rng driver
- new board support: rk3328-roc-cc, rk3399-roc-pc,Nanopi M4 2GB
2020-05-04 07:28:14 -04:00
Jakov Petrina
f49ac7e1c4 arm: dts: uDPU: switch default PHY speed to 3.125Gbit
This resolves issues with certain SFP modules.

Signed-off-by: Jakov Petrina <jakov.petrina@sartura.hr>
Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-05-04 07:04:04 +02:00
Frank Li
8142a97d54 cpu: imx8: show RevC instead of Rev? at boot log
Add REVC informaiton.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-03 15:45:49 +02:00
Chunfeng Yun
ba42c286f6 arm: dts: mt7629: add usb related nodes
Add usb, phy and clock nodes

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-05-02 12:32:28 +02:00
Tom Rini
36c2f020f2 actions: Fix syntax for enabling SYS_RELOC_GD_ENV_ADDR
The correct syntax is 'select SYS_...' and not 'select CONFIG_SYS...'

Fixes: d5c819b885 ("actions: Move defconfig options to Kconfig")
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-05-01 13:30:52 -04:00
Harald Seiler
d81a68957f imx: spl: Fix use of removed SPL_FAT_SUPPORT config
CONFIG_SPL_FAT_SUPPORT was removed in commit 0c3a9ed409
("spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT").
Fixup a leftover use of the symbol.

Fixes: 9d86dbd9cf ("imx: spl: implement spl_boot_mode for i.MX7/8/8M")
Signed-off-by: Harald Seiler <hws@denx.de>
2020-05-01 18:48:48 +02:00
Harald Seiler
5fc5bac67b imx: spl: Remove ifdefs in spl_mmc_boot_mode()
It is hard to read code which contains nested ifdef blocks.  Replace
them with normal if-blocks and the IS_ENABLED() macro.  This is not only
more readable but also helps as both arms are validated by the compiler
in all cases.

Signed-off-by: Harald Seiler <hws@denx.de>
2020-05-01 18:48:36 +02:00
Harald Seiler
15aec318ef Revert "imx: Introduce CONFIG_SPL_FORCE_MMC_BOOT to force MMC boot on falcon mode"
The CONFIG_SPL_FORCE_MMC_BOOT config flag is not needed as its behavior
is the correct one in all cases;  using spl_boot_device() instead of the
boot_device parameter will lead to inconsistency issues, for example,
when a board_boot_order() is defined.  In fact, this is the reason the
parameter was introduced in the first place, in commit 2b1cdafa9f
("common: Pass the boot device into spl_boot_mode()").

This reverts commit 772b55723b.

Link: https://lists.denx.de/pipermail/u-boot/2020-April/405979.html
Signed-off-by: Harald Seiler <hws@denx.de>
2020-05-01 18:47:07 +02:00
Anatolij Gustschin
a15d0aa680 imx: spl: return boot mode for asked MMC device in spl_mmc_boot_mode()
Boards may extend or re-define the boot list in their board_boot_order()
function by modifying spl_boot_list. E.g. a board might boot SPL from a
slow SPI NOR flash and then load the U-Boot from an eMMC or SD-card.
Or it might use additional MMC boot device in spl_boot_list for cases
when the image in SPI NOR flash is not found, so it could fall back to
eMMC, SD-card or another boot device.

Getting the MMC boot mode in spl_mmc will fail when we are trying to
boot from an MMC device in the spl_boot_list and the original board
boot mode (as returned by spl_boot_device()) is not an MMC boot mode.
Fix it by checking the asked MMC boot device from the spl_mmc_boot_mode()
argument.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-05-01 18:46:55 +02:00
Ovidiu Panait
5cf9e3b237 common/board_r: arm: Merge initr_enable_interrupts into interrupts_init
initr_enable_interrupts() is an ARM-specific wrapper over
enable_interrupts(), which is run during the common init sequence. It can
be eliminated by moving the enable_interrupts() call to the end of
interrupt_init() function, in arch/arm/lib/interrupts*.c.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-01 11:34:01 -04:00
Patrick Delaunay
54be09cd8f arm: caches: manage phys_addr_t overflow in mmu_set_region_dcache_behaviour
Solved the overflow on phys_addr_t type for start + size in
mmu_set_region_dcache_behaviour() function.

This overflow is avoided by dividing start and end by 2 before addition,
and we only expecting that start and size are even.

This patch doesn't change the current function behavior if the
parameters (start or size) are not aligned on MMU_SECTION_SIZE.

For example, this overflow occurs on ARM32 with:
start = 0xC0000000 and size = 0x40000000
then start + size = 0x100000000 and end = 0x0.

For information the function behavior change with risk of regression,
if we just shift start and size before the addition.
Example with 2MB section size:
  MMU_SECTION_SIZE 0x200000 and MMU_SECTION_SHIFT = 21
  with start = 0x1000000, size = 0x1000000,
  - with the proposed patch, start = 0 and end = 0x1 as previously
  - with the more simple patch:
    end = (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT)
    the value of end change:
    start >> 21 = 0, size >> 21 = 0 and end = 0x0 !!!

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-01 11:34:01 -04:00
Patrick Delaunay
2e8d68e241 arm: caches: add DCACHE_DEFAULT_OPTION
Add the new flags DCACHE_DEFAULT_OPTION to define the default
option to use according the compilation flags
CONFIG_SYS_ARM_CACHE_*.

This new compilation flag allows to simplify dram_bank_mmu_setup()
and can be used as third parameter (option=dcache option to select)
of mmu_set_region_dcache_behaviour function.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-01 11:34:01 -04:00
Patrick Delaunay
c8ec1e3ff5 arm: caches: protect dram_bank_mmu_setup access to bi_dram
Add protection in dram_bank_mmu_setup() to avoid access to bd->bi_dram
before relocation.

This patch allow to use the generic weak function dram_bank_mmu_setup
to activate the MMU and the data cache in SPL or in U-Boot before
relocation, when bd->bi_dram is not yet initialized.

In this cases, the MMU must be initialized explicitly with
mmu_set_region_dcache_behaviour function.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-01 11:34:01 -04:00
Patrick Delaunay
f8dc7f2f18 configs: migrate CONFIG_SYS_ARM_CACHE_* in Kconfig
Move CONFIG_SYS_ARM_CACHE_WRITETHROUGH and
CONFIG_SYS_ARM_CACHE_WRITEALLOC into Kconfig done by moveconfig.py.

Kconfig uses a choice between the 3 values supported in U-Boot,
including the new configuration CONFIG_SYS_ARM_CACHE_WRITEBACK
(the default configuration).

The patch also avoids to select simultaneously 2 configurations.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-01 11:34:01 -04:00
Alifer Moraes
ef99f3d9e8 arm: imx: Add support for Google's Coral Dev Board
Add initial support for Google's Coral Dev Board based on i.MX8MQ.

https://coral.ai/products/dev-board

The Phanbell naming has been used here to match the naming convention
used in Google's U-Boot source tree:

https://coral.googlesource.com/uboot-imx/

Co-developed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
Tested-by: Marco Franchi <marcofrk@gmail.com>
2020-05-01 13:49:15 +02:00
Marek Vasut
d304e7ace3 ARM: imx8m: Fix reset in SPL on Toradex iMX8MM Verdin
Board files should not re-implement do_reset() to work around this
function not being defined in for specific configurations. Rather,
the fix is to compile in drivers which implement this properly.
This patch enables sysreset and watchdog drivers in SPL and ties
them together to implement the same as the do_reset() hack in the
board file, except correctly in the DM/DT framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Acked-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-05-01 13:46:22 +02:00
Marek Vasut
f24dea4e1b ARM: imx8m: Fix reset in SPL on NXP iMX8MP EVK
Board files should not re-implement do_reset() to work around this
function not being defined in for specific configurations. Rather,
the fix is to compile in drivers which implement this properly.
This patch enables sysreset and watchdog drivers in SPL and ties
them together to implement the same as the do_reset() hack in the
board file, except correctly in the DM/DT framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-05-01 13:46:22 +02:00
Marek Vasut
2455f91833 ARM: imx8m: Fix reset in SPL on NXP iMX8MN EVK
Board files should not re-implement do_reset() to work around this
function not being defined in for specific configurations. Rather,
the fix is to compile in drivers which implement this properly.
This patch enables sysreset and watchdog drivers in SPL and ties
them together to implement the same as the do_reset() hack in the
board file, except correctly in the DM/DT framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-05-01 13:46:22 +02:00
Marek Vasut
77cfd0d2b6 ARM: imx8m: Fix reset in SPL on NXP iMX8MM EVK
Board files should not re-implement do_reset() to work around this
function not being defined in for specific configurations. Rather,
the fix is to compile in drivers which implement this properly.
This patch enables sysreset and watchdog drivers in SPL and ties
them together to implement the same as the do_reset() hack in the
board file, except correctly in the DM/DT framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-05-01 13:46:22 +02:00
Claudius Heine
c5635a032a ARM: imx8m: Don't use the addr parameter of reset_cpu()
imx8m has the only implementation of reset_cpu() which does not ignore
the addr parameter and instead gives it some meaning as the base address
of watchdog registers.  This breaks convention with the rest of U-Boot
where the parameter is ignored and callers are passing in 0.

Fixes: d2041725e8 ("imx8m: restrict reset_cpu")
Co-developed-by: Harald Seiler <hws@denx.de>
Signed-off-by: Harald Seiler <hws@denx.de>
Signed-off-by: Claudius Heine <ch@denx.de>
2020-05-01 13:46:22 +02:00
Harald Seiler
568af92679 ARM: imx8m: Fix indentation of reset_cpu() function
Use proper code-style, tabs instead of spaces for indentation.

Signed-off-by: Harald Seiler <hws@denx.de>
2020-05-01 13:46:22 +02:00
Marek Vasut
efa1a62ad2 ARM: imx8m: Do not define do_reset() if sysreset is enabled
The SPL can also be compiled with sysreset drivers just fine, so
update the condition to cater for that option.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-05-01 13:46:22 +02:00
Marek Vasut
dabaabd3f1 ARM: imx: imx8m: Do not warn about cpu-idle-states if missing
If the cpu-idle-states is missing from the DT in the first place, do
not fail on removing in. Just move on and do not even print an error,
since not being able to remove something which is not there in the
first place is not an error and surely does not justify failing to
boot.

Turn the surrounding prints into debugs to reduce the useless noise.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-05-01 13:46:22 +02:00
Adam Ford
87372fed19 arm: dts: imx8mm: sync dts from Linux Kernel 5.6.7
This patch synchronizes the device tree with that from 5.6.7.

This also adds nodes for crypto and ddrc, which makes keeping
the device tree files from individual boards in sync with the
Linux kernel.  This is helpful when boads reference those nodes.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-05-01 13:46:22 +02:00
Claudius Heine
3675d93875 imx: imx8m: Don't use the addr parameter of reset_cpu
imx8m has the only implementation of `reset_cpu` which does not ignore
the addr parameter and instead gives it some meaning as the base address
of watchdog registers.  This breaks convention with the rest of U-Boot
where the parameter is ignored and callers are passing in 0.

Fixes: d2041725e8 ("imx8m: restrict reset_cpu")
Co-Authored-by: Harald Seiler <hws@denx.de>
Signed-off-by: Claudius Heine <ch@denx.de>
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2020-05-01 13:46:22 +02:00
Claudius Heine
b46e6cc581 ARM: reset: use do_reset in SPL/TPL if SYSRESET was not enabled for them
In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available
anywere, even if SYSRESET is disabled for SPL/TPL.

'do_reset' is called from SPL for instance from the panic handler and
PANIC_HANG is not set

Signed-off-by: Claudius Heine <ch@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2020-05-01 13:46:22 +02:00
Franck LENORMAND
242d1cd69b imx8: Configure SNVS
Add a module to configure the tamper and secure violation of
the SNVS using the SCU API.

The module also adds some commands:
 - snvs_cfg: Configure the SNVS HP and LP registers
 - snvs_dgo_cfg: Configure the SNVS DGO bloc if present (8QXP)
 - tamper_pin_cfg: Change the configuration of the tamper pins
 - snvs_clear_status: Allow to write to LPSR and LPTDSR to clear
   status bits

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Ye Li
73d769d8af imx8: Update SCFW API to version 1.5
Sync the latest SCFW API with below commit
6dcd0242ae7a53ac ("SCF-105: Revert accidental change") to add
interfaces for PM resource reset and read/write SNVS security
violation and tamper DGO registers.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Breno Lima
f959594db2 imx8: scu api: Add support for SECO manufacturing protection APIs
SECO provides APIs to support CAAM manufacturing protection:

- sc_seco_get_mp_key()
- sc_seco_get_mp_sign()
- sc_seco_update_mpmr()

Add SCFW APIs support.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Ye Li
7247974643 imx8m: Enable WDOG_B for timeout
When doing reset_cpu, in normal case the WDOG_B outputs immediately
after we clean WDA bit. But on mscale, the WDOG_B may be later than
internal reset, and cause PMIC not reset. As we enabled the SD3.0
support, the PMIC must be reset to reset SD card.

Change the reset_cpu to enable the WDOG_B for timeout as well, and set
WDOG timeout to 1s.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Ye Li
1c97fcda7f imx8mm: clock: fix fracpll decode issue
The fracpll decoding is using the bit definitions for int pll. Most of
them are same, but the CLKE bit is different. Fix the wrong CLKE_MASK
for fracpll and correct all bit definitions in fracpll decoding.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Peng Fan
828ad358a5 imx8: parser: fix some bad debug message formating
In SPL build, the formatting '%llx' in debug() is not supported.
Also, fix some misplaced parameters in printf.

Modified from Seb Fagard's downstream patch

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Seb Fagard
0e248b5f02 imx8: ahab: fix some bad debug message formating
In SPL build, the formatting '%llx' in debug() is not supported.
Also, fix some misplaced parameters in printf.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Peng Fan
abf7752c40 imx8: ahab: fix 'end address' parameter of rm_find_memreg
parameter 'end address' must be inclusive of address range.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Ye Li
a903e13f97 imx8: Change to use new SECO API commands
Latest SCFW has removed old MISC SECO commands. So update the codes
to use new SECO commands.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
b7328de6cd imx8: parser: fix 'end address' parameter of rm_find_memreg
parameter 'end address' must be inclusive of address range.

Modified from Seb's downstream patch.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Ye Li
6fcd0b2388 imx8m: Dump DRAM PLL rate by clocks command
Add the dump of DRAM PLL into "clocks" command

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
712a341c76 imx8mq: Set ARM core clock directly from ARM PLL
For ARM core clock, there are two input branches, and can select via mux:
one from ARM PLL directly, second from CCM A53 clock root.

Currently we are using second branch. But IC confirmed the CCM A53 root
signoff timing is 1Ghz, so we should switch to input from ARM PLL directly.

This patch fixes the CORE SEL slice configuration and switch ARM clock
to ARM PLL.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Ye Li
15a7426045 imx8mq: Enable eMMC HS400 and SD UHS mode on EVK
iMX8MQ EVK board has a eMMC5.0 chip and supports SD3.0, so enable the UHS
and HS400 configs to enhance the eMMC/SD access.

The change also needs to set usdhc clock to 400Mhz, and add the
off-on-delay-us to SD reset pin, otherwise some SD cards will
fail to select UHS mode in re-initialization.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
6b87b3f4dc imx8m: update clock root and fix core_sel
Update clock root table to let it be easy to configure clock at
very early stage. Also the core_sel mux parent should be A53 CLK
root and ARM PLL.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
a07bcec403 imx8m: acquire ATF commit hash
Acquire ATF commit hash when booting U-Boot to make user easy
to know the ATF version.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
3f49742801 imx8: move SIP macro to common header
Move the SIP macro to common header and unify the name to
make others could reuse them.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
9b4e197d4b imx: update is_imx6ull to include i.MX6ULZ
Update is_imx6ull helper to include i.MX6ULZ SoC. i.MX6ULZ could
share same macro, then we no need to add is_imx6ulz in various drivers.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
c915403218 imx: imx8m: add i.MX8MN variants support
Add i.MX8MN variants support

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
cb1a1de6a0 imx: imx8m: add i.MX8MQ Dual and QuadLite support
Add i.MX8MQ Dual and QuadLite variants.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
354dcce682 imx: cpu: support speed grade for i.MX8MP
i.MX8MP speed grade use same layout as i.MX8MN, so reuse it for i.MX8MP

Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
47586a4a55 imx8mn: Update speed grade
imx8mn speed grade fuse uses new definitions as below. So have
to update get_cpu_speed_grade_hz function to match it.

SPEED_GRADE[5:4]    SPEED_GRADE[3:0]    MHz
      xx                0000            2300
      xx                0001            2200
      xx                0010            2100
      xx                0011            2000
      xx                0100            1900
      xx                0101            1800
      xx                0110            1700
      xx                0111            1600
      xx                1000            1500
      xx                1001            1400
      xx                1010            1300
      xx                1011            1200
      xx                1100            1100
      xx                1101            1000
      xx                1110             900
      xx                1111             800

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-05-01 13:46:21 +02:00
Ye Li
c9a1a24be5 imx8mm: Update CPU speed grading
According to iMX8MM datasheet (IMX8MMIEC_Rev_D and IMX8MMCEC_Rev_D),
the speed grading for imx8mm is 800Mhz, 1.2Ghz, 1.6Ghz and 1.8Ghz.
Update them to get_cpu_speed_grade_hz function.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
499c94975e imx: fix cpu_type helper
i.MX8MP use 0x182 as its ID, so 0xff is not valid to get the cpu type,
extend it to 0x1ff.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Marek Vasut
126dcc925d ARM: imx: imx8mm: Add missing clock entries for FEC clock
All the FEC ethernet clock entries for iMX8MM are missing, while they
are already present on iMX8MQ. Fill in the nodes on iMX8MM, as the FEC
ethernet gets bogus clock information otherwise which makes ethernet
inoperable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-05-01 13:46:21 +02:00