Commit graph

17378 commits

Author SHA1 Message Date
Kever Yang
5d19ddf0db ram: rockchip: rename sdram_common.c/h to sdram.c
rename sdram_common.c in arch/arm/mach-rockchip to sdram.c;
so that we can use the file name sdram_common.c in dram driver for
better understand the code;
clean the related file who has use the header file at the same time.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17 16:23:56 +08:00
Kever Yang
2a2f0b177c ram: rockchip: rename sdram.h to sdram_rk3288.h
The header file sdram.h is used for rk3288 and similar SoCs, rename it
to make it more understandable.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17 16:23:56 +08:00
Marek Vasut
8cdb1ff33c ARM: rmobile: Temporarily disable PCI dma-ranges update
According to discussion in the Linux PCI list [1], the dma-ranges should
be continuous and describe the entire inbound window which the controller
can address and not take into account the possible DRAM holes.

Temporarily disable this code which updates the dma-ranges until this
meaning is sorted out.

[1] PCI: rcar: Do not abort on too many inbound dma-ranges

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-11-16 16:52:45 +01:00
Tom Rini
14b254b5f5 Pull request for UEFI sub-system for efi-2020-01-rc3
The following changes for the UEFI subsystem are provided:
 
 * allow building UEFI binaries on the sandbox
 * enable access to file systems without partition tables
 * correctly check the return value of efi_dp_from_file()
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Merge tag 'efi-2020-01-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-01-rc3

The following changes for the UEFI subsystem are provided:

* allow building UEFI binaries on the sandbox
* enable access to file systems without partition tables
* correctly check the return value of efi_dp_from_file()
2019-11-14 09:51:39 -05:00
Heinrich Schuchardt
4ecb506434 sandbox: use correct type reading /proc/self/maps
Compiling arch/sandbox/cpu/os.c results in an error

../arch/sandbox/cpu/os.c: In function ‘os_find_text_base’:
../arch/sandbox/cpu/os.c:823:12: error: cast to pointer from
integer of different size [-Werror=int-to-pointer-cast]
  823 |     base = (void *)addr;
      |            ^
cc1: all warnings being treated as errors

The size of void* differs from that of unsigned long long on 32bit
systems.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-11-14 07:09:34 -06:00
Baruch Siach
70bae02f71 arm: mvebu: clearfog: fix boot from SD card
Enable gpio0 in SPL to allow the sdhci driver read the SD card-detect
signal.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-11-14 08:28:39 +01:00
Chris Packham
2ec330fcc2 ARM: mvebu: don't dereference null bd pointer
As mentioned in doc/README.arm-relocation gd->bd is not available in
dram_init() so we shouldn't attempt to access it.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-11-14 08:28:39 +01:00
Heinrich Schuchardt
3b4847cbee efi_loader: support building UEFI binaries on sandbox
On the sandbox the UEFI binaries must match the host architectures.

Adjust the Makefiles. Provide the PE/COFF header and relocation files.

Allow building helloworld.efi on the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-11-12 23:13:54 +01:00
Patrick Delaunay
754815b854 video: stm32: remove the compatible "synopsys, dw-mipi-dsi" support
Remove the compatible "synopsys,dw-mipi-dsi" added in U-Boot
(it don't exist in Linux kernel binding); it is only used
to bind the generic synopsys UCLASS_DSI_HOST "dw_mipi_dsi" to
the driver "stm32-display-dsi" UCLASS_VIDEO_BRIDGE

This binding is done in Linux kernel drivers without compatible
(dw_mipi_dsi_bind() is called in bind of driver, for example in
drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c).

This patch does the same in U-Boot driver, the STM32 driver
calls during its bind the function device_bind_driver_to_node
to bind the generic driver "dw_mipi_dsi" at the same address.

This patch reduces the device tree differences
between Linux kernel and U-Boot for stm32mp1 platform.

Tested with v2020.01-rc1 on STM32MP157C-EV1 and STM32MP157C-DK2.

The dependency of driver is clearer and the probe order is guaranteed.

STM32MP> dm tree
 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
 root          0  [ + ]   root_driver           root_driver
 sysreset      0  [   ]   syscon_reboot         |-- reboot
 simple_bus    0  [ + ]   generic_simple_bus    |-- soc
 serial        0  [ + ]   serial_stm32          |   |-- serial@40010000
...
 video_brid    0  [ + ]   stm32-display-dsi     |   |-- dsi@5a000000
 dsi_host      0  [ + ]   dw_mipi_dsi           |   |   |-- dsihost
 panel         0  [ + ]   rm68200_panel         |   |   `-- panel-dsi@0
...

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-11-12 16:15:53 +01:00
Tom Rini
5f7ff6d63e u-boot-imx-20191105
-------------------
 i.MX8MN SoC support
 ROM API image download support
 i.MX8MM enet enabling
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Merge tag 'u-boot-imx-20191105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20191105
-------------------
i.MX8MN SoC support
ROM API image download support
i.MX8MM enet enabling
2019-11-12 07:18:23 -05:00
Tom Rini
086e391bc4 Merge tag 'u-boot-rockchip-20191110' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Add support for rockchip pmic rk805,rk809, rk816, rk817
- Add rk3399 board Leez support
- Fix bug in rk3328 ram driver
- Adapt SPL to support ATF bl31 with entry at 0x40000
- Fix the u8 type comparision with '-1'.
- Fix checkpatch warning for multi blank line and review signature.
2019-11-11 14:19:32 -05:00
Tom Rini
0b73ef0c02 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC.
- Few bug fixes and updates related to SPI, hwconfig, ethernet,
  fsl-layerscape, pci, icid, PSCI
2019-11-11 14:19:04 -05:00
Kever Yang
f74a089e47 rockchip: firefly-rk3288: Enable TPL support
This patch enable TPL support for firefly-rk3288 board, which works ths
same way with other RK3288 board like Tinker, evb.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10 20:40:20 +08:00
Levin Du
2d86ab50ce rockchip: adding the missing "/" in entries of boot_devices
Without the prefix, "same-as-spl" in `u-boot,spl-boot-order` will not work
as expected. When board_boot_order() `spl-boot-order.c` meets
"same-as-spl", it gets the conf by looking the boot_devices table by boot
source, and parse the node by the conf with:

   node = fdt_path_offset(blob, conf);

which will failed without the "/" indicating the path.

Currently only entries of boot_devices in rk3399 have the "/" prefix.
Therefore add the missing ones in other boards.

Signed-off-by: Levin Du <djw@t-chip.com.cn>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10 20:40:20 +08:00
Kever Yang
006ab58d46 rockchip: rk3399: update SPL_STACK_R_ADDR
Use the same SPL_STACK_R_ADDR in Kconfig instead of each board config;
default to 0x4000000(64MB) instead of 0x80000(512KB) for this address
can support all the SoCs including those may have only 64MB memory, and
also reserve enough space for atf, kernel(in falcon mode) loading.

After the ATF entry move to 0x40000, the stack from 0x80000 may be override
when loading ATF bl31.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10 20:40:20 +08:00
Heiko Stuebner
f848d2b2c8 rockchip: make_fit_atf.py: allow inclusion of a tee binary
A trusted execution environment should also get loaded as loadable from
a fit image, so add the possibility to present a tee.elf to make_fit_atf.py
that then gets included as additional loadable into the generated its.

For ease of integration the additional loadable is created as atf_(x+1)
after all others to re-use core generation loops.

Tested against the combinations of 1-part-atf and multi-part-atf each
time with and without a tee binary present.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10 20:40:20 +08:00
Emmanuel Vadot
b5500b2057 rockchip: dts: rk3328: rock64: Add same-as-spl order
rk3328 can use same-as-spl option so next loaders are loaded from the same
medium.
Add the boot order in the rock64 dts otherwise booting from sdcard
will result in u-boot looking into the eMMC.

Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10 20:40:20 +08:00
Simon South
2cbdb6e051 clk: rockchip: rk3328: Configure CPU clock
Add a call to rk3328_configure_cpu() during initialization to set the
CPU-clock frequency.

Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10 20:40:20 +08:00
Andy Yan
a4bbc662fc rockchip: rk3399: Add Leez P710 support
Specification
- Rockchip RK3399
- LPDDR4
- TF sd scard slot
- eMMC
- M.2 B-Key for 4G LTE
- AP6256 for WiFi + BT
- Gigabit ethernet
- HDMI out
- 40 pin header
- USB 2.0 x 2
- USB 3.0 x 1
- USB 3.0 Type-C x 1
- TYPE-C Power supply

Commit details of rk3399-leez-p710.dts sync from linus tree for Linux 5.4-rc1:
"arm64: dts: rockchip: Add dts for Leez RK3399 P710 SBC"
(sha1: 	fc702ed49a8668a17343811ee28214d845bfc5e6)

Signed-off-by: Andy Yan <andyshrk@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10 20:40:20 +08:00
Tom Rini
ee1c499851 Merge branch '2019-11-07-master-imports'
- Add Phytium Durian Board
- Assorted bugfixes
- Allow for  make ERR_PTR/PTR_ERR architecture specific
2019-11-08 07:27:45 -05:00
Udit Agarwal
bef1845404 freescale/powerpc: Rename the config CONFIG_SECURE_BOOT name
Rename the CONFIG_SECURE_BOOT name to CONFIG_NXP_ESBC to avoid
conflicts with UEFI secure boot.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 16:32:08 +05:30
Udit Agarwal
5536c3c9d0 freescale/layerscape: Rename the config CONFIG_SECURE_BOOT name
Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC to avoid conflict
with UEFI secure boot.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 16:32:08 +05:30
Pankaj Bansal
812ff53c3e fsl-layerscape: fix warning if no hwconfig is defined
While getting the 'subarg' of 'hwconfig' env variable in
config_core_prefetch(), if no hwconfig variable is defined,
below warning is received:
WARNING: Calling __hwconfig without a buffer and
	before environment is ready

Fix this by checking 'hwconfig' env variable.
If not found return without further processing.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
2019-11-08 15:50:12 +05:30
Michael Walle
762ee522e2 armv8: fsl-layerscape: introduce fsl_board_late_init()
The fsl-layerscape already occupies board_late_init(), therefore it is
not possible for a board to have its own board_late_init(). Introduce
fsl_board_late_init() which can be implemented in the board specific
code.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:39 +05:30
Michael Walle
065ee175e0 armv8: fsl-lsch3: convert CONFIG_TARGET_x to CONFIG_ARCH_x
The clocks are not dependent on the target but only on the SoC.
Therefore, convert the CONFIG_TARGET_x macros to the corresponding
CONFIG_ARCH_x. This will allow other targets to automatically use the
common code. Otherwise every new target would have to add itself to the
"#if defined(CONFIG_TARGET_x) || .." macros.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:39 +05:30
Laurentiu Tudor
b4a59115e2 armv8: ls1028a: add erratum A-050382 workaround
Erratum A-050382 states that the eDMA ICID programmed in the eDMA_AMQR
register in DCFG is not correctly forwarded to the SMMU.
The workaround consists in programming the eDMA ICID in the eDMA_AMQR
register in DCFG to 40.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Laurentiu Tudor
30449aea50 armv8: lx2160a: add icid setup for platform devices
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Laurentiu Tudor
ab04dee542 fsl-layerscape: add missing SATA3 and SATA4 base addresses
LX2160A chips have 4 sata controllers. Add missing base addresses for
SATA3 and SATA4.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Laurentiu Tudor
e33938acc9 armv8: ls2088a: add icid setup for platform devices
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Laurentiu Tudor
5047781e99 fsl-layerscape: fix compile error with sec fw disabled
If SEC FW support is not enabled (ARMV8_SEC_FIRMWARE_SUPPORT=n), below
compilation error appears
arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h:169:4: error:
'CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT' undeclared here (not in a function)

Fix it by wrapping with CONFIG_IS_ENABLED().

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Laurentiu Tudor
db49c1b2de armv8: fsl-layerscape: guard caam specific defines
These macros should only be used when CONFIG_FSL_CAAM is present.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Mathew McBride
28f9393b1a fsl-layerscape: do not use layerscape EFI reset if PSCI used
If the secure world reset handlers are used (via CONFIG_PSCI_RESET),
then do not use the layerscape-specific implementation.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Mathew McBride
b50fe3fb7e armv8: dts: ls1088a: add PSCI binding for LS1088A
This allows the use of PSCI calls to trusted firmware to
initiate reset and poweroff events with CONFIG_PSCI_RESET and
CONFIG_ARM_PSCI_FW. This is desirable, for example, if the target
board has implemented a custom reset or poweroff procedure in EL3.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Adam Ford
899836c315 ARM: dts: logicpd-som-lv-37xx-devkit-u-boot: Remove unused GPIO
The only GPIO bank needed in SPL is GPIO4 and the SPL space is tight.

This patch removes the all but GPIO4 from the spl device tree to
reduce the SPL footprint.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-11-07 18:39:18 -05:00
Adam Ford
1e3d015a03 ARM: dts: logicpd-torpedo-37xx-devkit-u-boot: Remove unused GPIO
The only GPIO bank needed in SPL is GPIO4 and the SPL space is tight.

This patch removes the all but GPIO4 from the spl device tree to
reduce the SPL footprint.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-11-07 18:39:18 -05:00
Keerthy
2f71498d52 arm: dts: k3-j721e-r5-common-proc-board: Hook buck12_reg to vtm supply
Hook buck12_reg to vtm avs supply

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy
0f63ceaf54 arm: dts: k3-j721e-r5-common: Add tps65941 node and dependent wkup_i2c0 node
Add tps65941 node and dependent wkup_i2c0 node needed for AVS class 0 support

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy
69eceae870 arm: dts: k3-j721e-r5-common-proc-board: Add VTM node
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Tero Kristo
56adc6615f arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in supplies
Link the vdd-supplies for the voltage domains under the VTM node. Also,
enable the node under SPL. This will enable the AVS class 0 support on
am65x-evm board.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Tero Kristo
c5f73d1c9f arm: dts: k3-am654-r5-base-board: add supply rail for MPU
MPU voltage on AM65x-evm is controlled via the TPS62363 chip attached
to i2c0 bus. Add device node for this so that it can be controlled via
a regulator driver.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Tero Kristo
4bbb3849aa arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl
Enable wkup_i2c0 as this is needed for voltage control.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy
cfa6bd549c arm: dts: k3-am654-r5-base-board: Add VTM node
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy
7b13493088 arm: mach-k3: j721e_init: Initialize avs class 0
Initialize avs class 0

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
Keerthy
27380cb7e9 arm: mach-k3: am6_init: Initialize AVS class 0
Initialize AVS class 0 so that mpu voltage rail is
programmed to the AVS class 0 compensated value.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:17 -05:00
liu hao
e3aafef4cf arm: add initial support for the Phytium Durian Board
This adds platform code and the device tree for the Phytium Durian Board.
The initial support comprises the UART and the PCIE.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>

Signed-off-by: Steven Hao <liuhao@phytium.com.cn>
2019-11-07 18:01:13 -05:00
Lokesh Vutla
7a540eeecc arm: caches: Disable mmu only if mmu is available
As part of disabling caches MMU as well gets disabled. But MMU is not
available on all armv7 cores like R5F. So disable MMU only if it is
available.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-11-07 18:01:13 -05:00
Simon Goldschmidt
a43b60cc78 arm: socfpga: gen5: fix ERR_PTR_OFFSET
The default implementation of ERR_PTR/PTR_ERR maps errno values at the
and of the address range (e.g. -EINVAL/-22 gets 0xFFFFFFEA).

For socfpga gen5 SPL, this doesn't really work, as the heap is nearly
at the end of the 32 bit address range.

This patch adjusts the ERR_PTR_OFFSET to map errno values into the range
of the Boot ROM, which should not be used for valid pointers.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-07 18:01:13 -05:00
Vignesh Raghavendra
37e66ba916 arm64: Add memcpy_{from, to}io() and memset_io() helpers
Provide optimized memcpy_{from,to}io() and memset_io(). This is required
when moving large amount of data to and from IO regions such as IP
registers or accessing memory mapped flashes.

Code is borrowed from Linux Kernel v5.4.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-11-07 18:01:12 -05:00
Heiko Schocher
81a7abe593 mpc85xx, dts, socrates: add u-boot specific dtsi
add u-boot specific dtsi file for socrates board.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06 16:30:19 +05:30
Heiko Schocher
7d8c77e844 mpc85xx: add socrates dts from linux
add socrates device tree from linux:

commit 71ae5fc87c34 ("Merge tag 'linux-kselftest-5.2-rc1' of
git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest")

and added SPDX license identifier.
Did not fix checkpatch warnings:
arch/powerpc/dts/socrates.dts:235: check: Please don't use multiple blank lines
arch/powerpc/dts/socrates.dts:238: error: code indent should use tabs where possible

Also, add me as board maintainer.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06 16:30:19 +05:30
Peng Fan
bdcf3a88cc imx: imx8mm-evk: enable ethernet
add phy-reset-gpios to reset phy
Add board_phy_config to configure phy
Enable DM_ETH

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
98bcf9a5df arm: dts: imx8mm: drop assigned clocks for clk node
Drop assigned clocks for clk node, this will break boot on i.MX8MM EVK
board.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
cd7c806f4f imx: imx8m: fix boot when CONFIG_$(SPL_)CLK not defined
When CONFIG_$(SPL_)CLK not defined, the clock controller device
not exist, so to avoid boot failure for platform not have
CONFIG_$(SPL_)CLK, add a check.

Reviewed-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
d239d9d946 imx: add i.MX8MN DDR4 board support
Support pinctrl/clk/sdhc, include ddr4 timing data.

Log:
U-Boot SPL 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800)
Normal Boot
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0

U-Boot 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800)

CPU:   Freescale i.MX8MNano rev1.0 at 24 MHz
Reset cause: POR
Model: NXP i.MX8MNano DDR4 EVK board
DRAM:  2 GiB
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
dadb072f12 imx: add dtsi for i.MX8MN
Add dtsi for i.MX8MN

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
88a4ece74a imx8m: add i.MX8MN ddr4 image cfg file
Add cfg file for i.MX8MN DDR4

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
b1821376ee imx8mn: add get_boot_device
No ROM INFO structure on iMX8MN, use new ROM API to get boot device
from ROM.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
b890c4aede imx: cpu: restrict get_boot_device
i.MX8MN has its own get_boot_device, so restrict with i.MX8MQ and
i.MX8MM.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
1cbebc7862 imx: add rom api support
i.MX8MN support loading images with rom api, so we implement
reuse board_return_to_bootrom to let ROM loading images.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
a92c7b144f imx: spl: use spl_board_boot_device for i.MX8MN
i.MX8MN follow same logic as i.MX8MM, so use spl_board_boot_device

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
59e9da7af0 imx8mn: add pin header
Add pin header for i.MX8MN

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
35c9b7c041 imx: add i.MX8MN PE property
i.MX8MN does not have LVTTL, it has a PE property

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
deca6cfbf5 imx8mn: set BYPASS ID SWAP to avoid AXI bus errors
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
f4c36ab6ee imx8m: add clk support for i.MX8MN
i.MX8MN has similar architecture with i.MX8MM, so it could reuse
the clock code of i.MX8MM, but i.MX8MN has different CCM root
configurations, so need a separate root entry.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
2434131a7b imx8mn: support get_cpu_rev
Add a dummy cpu type and support get_cpu_rev for i.MX8MN

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
66ec590c49 imx: add i.MX8MN kconfig entry
Add i.MX8MN kconfig entry

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
2634ba5743 arm: dts: imx8qm-mek: add u-boot, dm-spl for lpuart0
lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL
is enabled. Since uclass power domain is also enabled, to make
lpuart work properly, need add u-boot,dm-spl for lpuart power domain
and its parent.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
c1a64dccc0 arm: dts: imx8qxp-mek: add u-boot, dm-spl for lpuart0
lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL
is enabled. Since uclass power domain is also enabled, to make
lpuart work properly, need add u-boot,dm-spl for lpuart power domain
and its parent.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
84abc8d533 imx8qm: mek: enable dm-spl for pm
with u-boot,dm-spl added for imx8qm-pm node, and SPL_SIMPLE_BUS enabled,
the bind and probe code in board file could be removed.

Also we need to enlarge SYS_MALLOC_F_LEN to avoid calloc fail.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Tom Rini
73b6e6ad25 u-boot-imx-20191104
-------------------
 
 - i.MX NAND: nandbcb support for MX6UL / i.MX7
 - i.MX8: support for HAB
 - Convert to DM (opos6ul, mccmon6)
 - Toradex i.MX6ull colibri
 - sync DTS with kernel
 
 Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/606853416
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Merge tag 'u-boot-imx-20191104' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20191104
-------------------

- i.MX NAND: nandbcb support for MX6UL / i.MX7
- i.MX8: support for HAB
- Convert to DM (opos6ul, mccmon6)
- Toradex i.MX6ull colibri
- sync DTS with kernel

Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/606853416
2019-11-04 12:57:41 -05:00
Tom Rini
3b02d614b4 Merge branch '2019-11-04-ti-imports'
- Various CPSW related improvements, DTS resync
2019-11-04 12:57:34 -05:00
Tom Rini
ee93ef0c4b Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Add support for Intel FSP-S and FSP-T in binman
- Correct priority selection for image loaders for SPL
- Add a size check for TPL
- Various small SPL/TPL bug fixes and changes
- SPI: Add support for memory-mapped flash
2019-11-03 19:28:54 -05:00
Igor Opaniuk
ae8a53ece0 imx: nandbcb: add support for writing BCB only
Add subcommand for add writing BCB only, where we provide appropriate
offsets for firmware1 and firmware2 and size.

Example of usage:
> nandbcb bcbonly 0x00180000 0x00080000 0x00200000
Writing 1024 bytes to 0x0: randomizing
OK
Writing 1024 bytes to 0x20000: randomizing
OK

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03 21:49:49 +01:00
Igor Opaniuk
1b899a8041 imx: nandbcb: refactor update function
Move code for writing FCB/DBBT pages to a separate function

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03 21:49:40 +01:00
Igor Opaniuk
dad30dd72b imx: nandbcb: add support for i.MX7
Add support for updating FCB/DBBT on i.MX7:
- additional new fields in FCB structure
- Leverage hardware BCH/randomizer for writing FCB

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03 21:49:28 +01:00
Igor Opaniuk
6e735248e3 imx: gpmi: add defines for hw randominizer
Extend GPMI Integrated ECC Control Register Description, include
additional defines for enabling randomizer function and providing
proper randomizer type.

For additional details check i.MX7 APR, section
9.6.6.3 GPMI Integrated ECC Control Register Description
(GPMI_ECCCTRLn)

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03 21:49:10 +01:00
Oliver Graute
eef72440db imx: support i.MX8QM ROM 7720 a1 board
Add i.MX8QM ROM 7720a1 board support

Boot log as below:
U-Boot 2019.10-rc3-00004-gd073e0242f (Sep 20 2019 - 08:24:13 +0200)

CPU:   NXP i.MX8QM RevB A53 at 1200 MHz

Model: Advantech iMX8QM Qseven series
Board: ROM-7720-A1 4GB
Build: SCFW 65afe5f6
Boot:  SD2
DRAM:  4 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial@5a060000
Out:   serial@5a060000
Err:   serial@5a060000
Net:   eth0: ethernet@5b040000Could not get PHY for FEC1: addr 1
, eth-1: ethernet@5b050000
Hit any key to stop autoboot:  0

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2019-11-03 21:18:00 +01:00
Peng Fan
387c44904d arm: dts: imx8mm: sync dts from Linux Kernel
Sync dts for i.MX8MM from Linux Kernel 5.4.0-rc1

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 21:18:00 +01:00
Hannes Schmelzer
c04ac5bd40 board/BuR/brppt2: initial commit
This commit adds support for the brppt2 board. The board is based on the
i.mx6 dual-lite SoC.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-11-03 21:17:55 +01:00
Anatolij Gustschin
910b2fca97 imx8: output SECO-FW and ATF commit IDs
Borrow ID reading code from Ye Li (NXP U-Boot, commit ID 5b443e3e2617)
but drop imx-mkimage commit ID reading since we now use in tree mkimage.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Ye Li
264977d1c2 mach-imx: Adding new argument for SIP call interface
Need to pass total 5 arguments for SIP HAB call on i.MX8MQ,
so update the interface to add new argument.

Signed-off-by: Ye Li <ye.li@nxp.com>
[agust: fixed imx8m-power-domain build]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
7e2db74231 imx8: Add AHAB secure boot support
Add function and new command "auth_cntr" for secure boot support.
When booting with life cycle set to OEM closed, we need to use
this function to authenticate the OS container and load kernel & FDT
from OS container to their destination.

Also add image authentication call when loading container images.

Users can set CONFIG_AHAB_BOOT=y to enable the feature. It is not
set at default.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
8c61eba03d imx8mm: evk: enable bd71837 pmic
Enable bd71837 pmic for i.MX8MM EVK board, need to set voltage for
DRAM and linux suspend voltage requirement.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
9d86dbd9cf imx: spl: implement spl_boot_mode for i.MX7/8/8M
It will be easy to separate SD/EMMC when booting in SPL stage, then
no need to bother which device is BOOT_DEVICE_MMC1/2.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
2dfecdd1ed imx: imx8mq: add init_nand_clk
Add init_nand_clk to enable gpmi nand clock. Since i.MX8MQ not use CCF,
so we still use legacy mode to configure the clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
eeca15a50a imx8m: clock: improve irq response latency
Improve the IRQ response latency by setting GIC root clock source to
sys_pll2_200m from osc.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
9e09445549 imx8m: imx8mq: get chip rev for B1 revision
The i.MX8MQ B1 uses OCOTP_HW_OCOTP_READ_FUSE_DATA register for chip id.
It returns a magic number 0xff0055aa. update get_cpu_rev to support it,
and enable ocotp clock to access ocotp.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Sébastien Szymanski
b1be79b417 opos6uldev: migrate to DM_VIDEO
Migrate to DM_VIDEO, update the device tree and remove code that is no
longer necessary.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2019-11-03 17:04:16 +01:00
Sébastien Szymanski
b72dd938ec imx6ul: opos6ul: migrate to DM_ETH
Migrate to DM_ETH and remove code that is no longer necessary.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2019-11-03 17:04:16 +01:00
Patrick Wildt
05737f3585 imx: update i.MX8MQ device trees
This updates the i.MX8MQ device trees and, necessarily, also the
i.MX8MQ clock bindings.  These are taken verbatim from from the
Linux kernel version v5.4-rc2, which three small changes which
were already part of the previous device tree:

 * Keep the PSCI reserved memory range
 * Keep the alias for ethernet, so that the MAC address can be set
 * Keep the modified #include for the IOMUXC pins

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Acked-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Lukasz Majewski
8e64181a99 ARM: imx: Convert mccmon6 to use DM/DTS in the u-boot proper
This commit converts mccmon6's u-boot proper (in a single commit to avoid
build breaks) to use solely DM/DTS.

The DTS description of the mccmon6 has been ported from Linux kernel
(v4.20, SHA1: 8fe28cb58bcb235034b64cbbb7550a8a43fd88be)

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-11-03 17:04:16 +01:00
Lukasz Majewski
f6a4df3846 imx: Enable RTC (ds1307) support in the U-Boot proper on TPC70 board
The TPC70 is equipped with DS1307 RTC device. Add code to enable support
for it.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-11-03 17:04:16 +01:00
Igor Opaniuk
6b4339d312 ARM: dts: imx6ull-colibri: pre-reloc for uart pinmux modes
Add u-boot,dm-pre-reloc properties for uart pinmux configuration
nodes, which enables UART as early as possible (before relocation).

Without this we miss almost the half of output (U-boot version,
CPU defails, Reset cause, DRAM details etc.).

Fixes: cd69e8ef9b ("colibri-imx6ull: migrate pinctrl and regulators to dtb/dm")
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-11-03 17:04:16 +01:00
Igor Opaniuk
7d6ca12313 ARM: dts: imx6ull-colibri: change hierarchy of DTS files
Introduce imx6ull-colibri-u-boot.dtsi for u-boot specific properties to
keep original imx6ull-colibri.dts in sync with Linux.

Move all contents of imx6ull-colibri.dts to imx6ull-colibri.dtsi +
additionally fix checkpatch warnings.

Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-11-03 17:04:16 +01:00
Marek Vasut
b4a2cdc13e arm: mxs: Increase VDDD voltage to match specification
According to IMX28CEC rev. 4, 10/2018, Table 15. Recommended Operating
Conditions, page 16, the VDDD should be set to 1.55V when the CPU is
operating at 454MHz. This is the case in U-Boot, hence increase the
VDDD voltage. This fixes instability when performing TFTP transfers.
Increase the brownout threshold to 1.4V. The documentation recommends
1.45V setting for the brownout, however, this triggers failure during
power block init, so keep the brownout slightly lower.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-11-03 17:04:16 +01:00
Claudius Heine
dde31a14ec ARM: imx: Use IMX6_SRC_GPR10_BMODE instead of magic number
Signed-off-by: Claudius Heine <ch@denx.de>
2019-11-03 17:04:16 +01:00
Claudius Heine
e01c8cfe57 ARM: imx: Fix bmode detection from grp10
imx6_is_bmode_from_gpr9 always returns false, because
IMX6_SRC_GPR10_BMODE is 1<<28 and gets casted to u8 on return.

This moves the function body into imx6_src_get_boot_mode, since that is the
only one using it and it is on the same abstraction level (accessing
registers directly).

Signed-off-by: Claudius Heine <ch@denx.de>
2019-11-03 17:04:16 +01:00
Manivannan Sadhasivam
7f8a6a66af arm: dts: Add devicetree support for iMXQXP AI_ML board
Add devicetree support for iMXQXP AI_ML board from Einfochips.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-11-03 17:04:16 +01:00
Parthiban Nallathambi
6aa874911e i.MX6: nand: extend nandbcb command for imx6UL(L)
Firmware Configuration Block(FCB) for imx6ul(l) needs to be
BCH encoded.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Acked-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Grygorii Strashko
3b3e8a37d3 arm: dts: am335x: sync cpsw/mdio/phy with latest linux - drop phy_id
Synchronize CPSW/MDIO/PHY DT nodes with latest linux - replace deprecated
phy_id property with phy-handle.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Felix Brack <fb@ltec.ch>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-11-03 09:15:46 -05:00
Grygorii Strashko
b1fe4fe330 arm: dts: am437x: sync cpsw/mdio/phy with latest linux - drop phy_id
Synchronize CPSW/MDIO/PHY DT nodes with latest linux - replace deprecated
phy_id property with phy-handle.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
2019-11-03 09:15:46 -05:00
Grygorii Strashko
68d875da4c arm: dts: dra7: sync cpsw/mdio/phy with latest linux - drop phy_id
Synchronize CPSW/MDIO/PHY DT nodes with latest linux - replace deprecated
phy_id property with phy-handle.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
2019-11-03 09:15:46 -05:00
Fabio Estevam
fa64df4602 mx6: clock: Introduce disable_ipu_clock()
Introduce disable_ipu_clock(). This is done in preparation for
configuring the NoC registers on i.MX6QP in SPL.

Afer the NoC registers are set the IPU clocks can be disabled.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 13:16:51 +01:00
Fabio Estevam
1be51fed56 mx6: clock: Use setbits_le32()
The code can be made simpler by using setbits_le32(), so switch
to it.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 13:16:41 +01:00
Simon Glass
73c6cd6c0b x86: Quieten TPL's jump_to_image_no_args()
We already a message indicating that U-Boot is about to jump to SPL, so
make this one a debug() to reduce code size.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03 07:20:29 +08:00
Simon Glass
09455d3a8f x86: Don't print CPU info in TPL
We don't need to do this and it is done (in more detail) in U-Boot proper.
Drop this to save code space.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03 07:20:28 +08:00
Simon Glass
0e72ac7150 x86: Move CPU init to before spl_init()
At present we call spl_init() before identifying the CPU. This is not a
good idea - e.g. if bootstage is enabled then it will try to set up the
timer which works better if the CPU is identified.

Put explicit code at each entry pointer to identify the CPU.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03 07:20:28 +08:00
Simon Glass
ece3a46070 x86: Add a CPU init function for TPL
For TPL we only need to set up the features and identify the CPU to a
basic level. Add a function to handle that.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03 07:20:28 +08:00
Simon Glass
0ced70a0bb x86: tpl: Add a fake PCI bus
In TPL we try to minimise code size so do not include the PCI subsystem.
We can use fixed BARs and drivers can directly program the devices that
they need.

However we do need to bind the devices on the PCI bus and without PCI this
does not ordinarily happen. As a work-around, define a fake PCI bus which
does this binding, but no other PCI operations. This is a convenient way
to ensure that we can use the same device tree for TPL, SPL and U-Boot
proper:

   TPL    - CONFIG_TPL_PCI is not set (no auto-config, fake PCI bus)
   SPL    - CONFIG_SPL_PCI is set (no auto-config but with real PCI bus)
   U-Boot - CONFIG_PCI is set (full auto-config after relocation)

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03 07:20:28 +08:00
Simon Glass
c0e2c81d8e x86: spl: Support init of a PUNIT
The x86 power unit handles power management. Support initing this device
which is modelled as a new type of system controller since there are no
operations needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03 07:20:27 +08:00
Simon Glass
a478a26cd0 x86: timer: Use a separate flag for whether timer is inited
At present the value of the timer base is used to determine whether the
timer has been set up or not. It is true that the timer is essentially
never exactly 0 when it is read. However 'time 0' may indicate the time
that the machine was reset so it is useful to be able to denote that.

Update the code to use a separate flag instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-03 07:20:27 +08:00
Tom Rini
61e8f2985b Merge tag 'arc-fixes-for-2020.01-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-arc
ARC fixes for v2020.01-rc2

The main change is move to DM_MMC of yet 2 another ARC boards:
AXS101 & IoTDK.

Among that we improve handling of stock-formatted SD-cards of high volume
on EM SDP as well as introduction of reset driver for HSDK which is required
for prepser reinitialization of some peripherals like USB etc.
2019-11-01 17:49:40 -04:00
Alexey Brodkin
0da32633ab arc: emsdp/iotdk: Switch to DM_MMC
Somehow EMSDP & IoT DK boards were skipped on ARC boads conversion
to DM MMC. So doing it now.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-11-01 16:45:40 +03:00
Tom Rini
bb1bb4bb5d Fix for patman with email addresses containing commas
Bootstage improvements for TPL, SPL
 Various sandbox and dm improvements and fixes
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Merge tag 'dm-pull-29oct19' of git://git.denx.de/u-boot-dm

- Fix for patman with email addresses containing commas
- Bootstage improvements for TPL, SPL
- Various sandbox and dm improvements and fixes
2019-11-01 09:34:35 -04:00
Marek Vasut
80e7e7c2ab lib: time: Add microsecond timer
Add get_timer_us(), which is useful e.g. when we need higher
precision timestamps.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
[trini: Fixup arch/arm/mach-bcm283x/include/mach/timer.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-10-31 07:22:53 -04:00
Tom Rini
412326d1bc Merge tag 'u-boot-clk-23Oct2019' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk
- Add I2C clocks for i.MX6Q CCF driver
- Fix check in clk_set_default_parents()
- Managed API to get clock from device tree
- Fixes for core clock code (including sandbox regression tests)
2019-10-30 13:13:46 -04:00
Tom Rini
ba742b839c Merge branch '2019-10-28-azure-ci-support'
- Clean up Travis-CI slightly and then add support for Microsoft Azure
  pipelines, all from Bin Meng.
2019-10-30 09:05:13 -04:00
Tom Rini
cc64810dc6 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- H6 dts(i) sync (Clément)
- H6 PIO (Icenowy)
- Fix pll1 clock calculation (Stefan)
- H6 dram, half DQ (Jernej)
- A64 OLinuXino eMMC (Sunil)
2019-10-30 09:04:52 -04:00
Bin Meng
6cdd177ca9 arm: mvebu: Avoid generating kwbimage.cfg in the source tree
At present some boards generate kwbimage.cfg in the source tree
during the build. This breaks buildman testing on some systems
where the source tree is read-only. Update makefile rules to
generate it in the build tree instead.

Note some other boards have the kwbimage.cfg file written in
advance, hence we need check if the file exists in the build
tree first, otherwise we fall back to one in the source tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-10-29 16:17:36 -04:00
Simon Glass
619025b8d6 sandbox: test: Add a prototype for sandbox_set_enable_memio()
This function needs a prototype so that tests can use it. Add one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-27 10:56:41 -06:00
Simon Glass
8417385dc9 sandbox: Drop 'const' from sandbox_write()
This function writes to its address so the address should not be declared
as const. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-27 10:56:41 -06:00
Tom Rini
ffc379b42c - bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
 - mtmips: add new drivers for clock, reset-controller and pinctrl
 - mtmips: add support for high speed UART
 - mtmips: update/enhance drivers for SPI and ethernet
 - mtmips: add support for MMC
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Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mips

- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC
2019-10-25 20:07:24 -04:00
Tom Rini
15147dc6a9 Merge branch '2019-10-24-ti-imports'
- Enable DFU on dra7xx boards
- Further Keystone 3 platform improvements
2019-10-25 17:33:28 -04:00
Suman Anna
d0e134b909 arm: dts: k3-am65: Add R5F ranges in interconnect nodes
Add the address spaces for the R5F cores in MCU domain to the ranges
property of the cbass_mcu interconnect node so that the addresses
within the R5F nodes can be translated properly by the relevant OF
address API.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
22b548044b armv7R: K3: j721e: Add support for triggering ddr init from SPL
In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support for
triggering DDR initialization from board_init_f().

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
ec2fa9f76e arm: dts: k3-j721e: Add ddr node
Use the 3733MTs DDR configuration that is auto generated from
DDR_Regconfig tool.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
2019-10-25 17:33:21 -04:00
James Doublesin
34f27b2e86 ram: k3-am654: Do not rely on default values for certain DDR register
Added the following registers to the DDR configuration:
- ACIOCR0,
- ACIOCR3,
- V2H_CTL_REG,
- DX8SLxDQSCTL.

Modified enable_dqs_pd and disable_dqs_pd to only touch the associated
bit fields for pullup and pulldown registers (to preserve slew rate and
other bits in that same register). Also update the dts files in the same
patch to maintain git bisectability.

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
James Doublesin
d5e08fd204 armv7r: dts: am654-base-board: Rename 1600MHz to 1600MTs in dtsi filename
The current configuration of DDR on AM654 base board is for 1600MTs but
the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi.
Since 1600MHz is misleading, rename it to
k3-am654-base-board-ddr4-1600MTs.dtsi

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
e938b22521 arm: K3: Clean and invalidate Linux Image before jumping to Linux
U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux
by set/way in cleanup_before_linux(). Additionally there is a custom
hook provided to clean and invalidate L3 cache.

Unfortunately on K3 devices(having a coherent architecture), there is no
easy way to quickly clean all the cache lines for L3. The entire address
range needs to be cleaned and invalidated by Virtual Address. This can
be implemented using the L3 custom hook but it take lot of time to clean
the entire address range. In the interest of boot time this might not be
a viable solution.

The best hit is to make sure the loaded Linux image is flushed so that
the entire image is written to DDR from L3. When Linux starts running with
caches disabled the full image is available from DDR.

Reported-by: Andrew F. Davis <afd@ti.com>
Reported-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
899a9de3e4 boot: arm: Enable support for custom board_prep_linux
Once the arch specific boot_prepare_linux completes, boards wants to
have a custom preparation for linux. Add support for a custom
board_prep_linux.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Faiz Abbas
6b23f53b08 ARM: dts: dra7: Add usb peripheral nodes in spl
Add usb peripheral and usb phy nodes in spl to enable SPL_DFU bootmode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-10-25 17:33:21 -04:00
Tom Rini
271103ac0b Merge branch 'master' of git://git.denx.de/u-boot-usb
- DWC3 improvements
- i.MX7 EHCI bugfix
2019-10-25 13:50:51 -04:00
Tom Rini
c9e50bb12a Second set of u-boot-atmel features and fixes for 2020.01 cycle
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Merge tag 'u-boot-atmel-2020.01-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

Second set of u-boot-atmel features and fixes for 2020.01 cycle

This feature set includes Eugen's work on a new tiny flexcom driver and
eeprom mac retrieval for the sam9x60-ek board.
2019-10-25 13:50:33 -04:00
Tom Rini
e382713d22 Xilinx/FPGA changes for v2020.01 part 2
common:
 - Fix manual relocation for repeatable commands
 
 arm:
 - Also clean up generated dtbos
 
 microblaze:
 - Add support for Manual relocation in crypto framework
 - Tune and align architecture bootm support
 
 zynq:
 - DT sync ups
 - Some defconfig updates
 - Remove empty board_early_init_f()
 
 zynqmp:
 - Clean firmware handing via drivers/firmware/
 - DT/defconfig name alignments
 - DT cleanups with using firmware based clock driver
 - Some defconfig updates
 - Add IIO ina226 DT description
 - Tune zynqmp_psu_init_minimalize.sh script
 - Add single nand mini configuration, e-a2197, m-a2197-02/03 and zcu216
 
 versal:
 - Clean firmware handing via drivers/firmware/
 - Add gpio support
 - Enable DT overlay/USB/CLK/FPGA
 - DT updates
 - Tune mini configuration
 
 spi:
 - gqspi - Remove unused headers
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Merge tag 'xilinx-for-v2020.01-part2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2020.01 part 2

common:
- Fix manual relocation for repeatable commands

arm:
- Also clean up generated dtbos

microblaze:
- Add support for Manual relocation in crypto framework
- Tune and align architecture bootm support

zynq:
- DT sync ups
- Some defconfig updates
- Remove empty board_early_init_f()

zynqmp:
- Clean firmware handing via drivers/firmware/
- DT/defconfig name alignments
- DT cleanups with using firmware based clock driver
- Some defconfig updates
- Add IIO ina226 DT description
- Tune zynqmp_psu_init_minimalize.sh script
- Add single nand mini configuration, e-a2197, m-a2197-02/03 and zcu216

versal:
- Clean firmware handing via drivers/firmware/
- Add gpio support
- Enable DT overlay/USB/CLK/FPGA
- DT updates
- Tune mini configuration

spi:
- gqspi - Remove unused headers
2019-10-25 11:23:46 -04:00
Weijie Gao
3f851c992d mips: mtmips: select essential drivers in Kconfig
Some drivers (clk, pinctrl, reset, ...) are necessary for reset of the
system, they should be always selected.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
4e2ccca26d dts: mtmips: add default pinctrl to eth nodes for all boards
This patch adds default eth pinctrl for all boards.

There are two pinctrl nodes used for two scenarios:
ephy_iot_mode    - for IOT boards which have only one port (PHY0)
ephy_router_mode - For routers which have more than one ports

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
ef55fa03d4 dts: mtmips: add default pinctrl for gardena-smart-gateway-mt7688
This adds default pinctrl (dual SPI chip select) for gardena smart gateway

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
e3b326fee5 dts: mtmips: add mmc related nodes for mt7628an.dtsi
This patch adds mmc related nodes for mt7628an.dtsi

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
cff0b044d2 dts: mtmips: enable eth port0 led and link poll functions for all boards
This patch adds default p0led status and phy0 link polling for all boards.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
6658ebc96a dts: mtmips: update reset controller node for mt7628
This patch updates reset controller node for mt7628

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
123ffd4679 dts: mtmips: add default pinctrl for uart nodes
This patch adds default pinctrl for uart nodes

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
fdf92df285 dts: mtmips: add pinctrl node for mt7628
This patch adds pinctrl node with default pin state for mt7628an.dtsi.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
2d767a7497 dts: mtmips: add clock node for mt7628
This patch adds clkctrl node for mt7628 and adds clocks property for
some node.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
5fcea8d3f9 dts: mtmips: enable high-speed UART support for mt7628
All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate <= 115200.

Add compatible string to dtsi file so u-boot can use it when serial_mtk
driver is built in.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
d1d8814458 dts: mtmips: move uart property clock-frequency into mt7628an.dtsi
The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Álvaro Fernández Rojas
a69bae04fd mips: bmips: switch to board defines for dtb
Fixes commit 344db3f, which added missing bmips dtbs depending on their SoCs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
f923c758e0 bmips: correct name characters
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
331bee8786 bmips: enable vr-3032u nand support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
0f57c932f9 bmips: bcm63268: add support for brcmnand
BCM63268 uses 4.0 HW nand controller, which is currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
c4bf879063 bmips: bcm6362: add support for brcmnand
BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00