Commit graph

3859 commits

Author SHA1 Message Date
Stefano Stabellini
ce42bd2fa3 arm64: zynqmp: Add missing SMID for pcie to zynqmp.dtsi
The SMMU is disabled in device tree so this change has no impact.
The benefit is that this way it is in sync with xen.dtsi. Xen enables
the SMMU and makes use of it.

Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
d9be8b4f2f arm64: zynqmp: Disable CCI by default
There is no reason to have CCI no enabled by default. Enable it when your
system configuration requires it. In Xilinx configuration flow this is
work for Device Tree Generator which reads information from HW Design
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
1242a6b13d arm64: zynqmp: Update psgtr clocks index for boards
Update the psgtr clock indexing for couple of zynqmp boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
767aa16d41 ARM: zynq: Rename bus to be align with simple-bus yaml
Rename amba to AXI. Based on Xilinx Zynq TRM (Chapter 5) chip is "AXI
point-to-point channels for communicating addresses, data, and response
transactions between master and slave clients. This ARM AMBA 3.0..."

Issues are reported as:
.. amba: $nodename:0: 'amba' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>From schema:
../github.com/devicetree-org/dt-schema/dtschema/schemas/simple-bus.yaml

Similar change has been done for Xilinx ZynqMP SoC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8a4bc80debfbb79c296e76fc1e4c173e62657286.1606397101.git.michal.simek@xilinx.com
2021-06-23 09:48:35 +02:00
Michal Simek
351b9f5f95 arm64: zynqmp: Enable gpio driver for zcu1275/zcu1285
Enable gpio driver on these boards. GPIOs can be used on any board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
e246dc49cf ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
The Linux commit f69629919942 ("dt-bindings: sram: Convert SRAM bindings to
json-schema") converted binding to yaml and some missing required
properties started to be reported. Align binding based on it.

The patch is fixing these warnings:
.../zynq-zc702.dt.yaml: sram@fffc0000: '#address-cells' is a required property
.../zynq-zc702.dt.yaml: sram@fffc0000: '#size-cells' is a required property
.../zynq-zc702.dt.yaml: sram@fffc0000: 'ranges' is a required property
>From schema: .../Documentation/devicetree/bindings/sram/sram.yaml

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/87c02786ccd8d7827827a9d95a8737bb300caeb0.1606397101.git.michal.simek@xilinx.com
2021-06-23 09:48:35 +02:00
Michal Simek
742fdd1e6b ARM: zynq: Convert at25 binding to new description on zc770-xm013
The Linux commit f8f79fa6bb25 ("dt-bindings: at25: convert the binding
document to yaml") converted binding to yaml and 3 deprecated properties
pop up.

The patch is fixing these warnings:
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'pagesize' is a required property
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'size' is a required property
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'address-width' is a required property
>From schema: .../Documentation/devicetree/bindings/eeprom/at25.yaml

by converting them to new binding.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/be2c1125d98386033e182012eb08986924707a76.1606397101.git.michal.simek@xilinx.com
2021-06-23 09:48:35 +02:00
Michael Walle
82a3c9ef20 net: use the same alias stem for ethernet as linux
Linux uses the prefix "ethernet" whereas u-boot uses "eth". This is from
the linux tree:

$ grep "eth[0-9].*=.*&" arch/**/*dts{,i}|wc -l
0
$ grep "ethernet[0-9].*=.*&" arch/**/*dts{,i}|wc -l
633

In u-boot device trees both prefixes are used. Until recently the only
user of the ethernet alias was the sandbox test device tree. This
changed with commit fc054d563b ("net: Introduce DSA class for Ethernet
switches"). There, the MAC addresses are inherited based on the devices
sequence IDs which is in turn given by the device tree.

Before there are more users in u-boot and both worlds will differ even
more, rename the alias prefix to "ethernet" to match the linux ones.
Also adapt the test cases and rename any old aliases in the u-boot
device trees.

Cc: David Wu <david.wu@rock-chips.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-18 11:29:17 +03:00
Tom Rini
a298d4fbcd Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- fsl-qoriq: Bug fixes related pfe, eth, thermal node, vid.c, cpu release,
  mmc, usb, env, etc for Layerscape boards
- powerpc: Update Maintainers for some boards.
2021-06-17 08:44:56 -04:00
Aleksandar Gerasimovski
a7fd6fa1c2 board/km: add support for expu1 design based on nxp
The EXPU1 design is a new 40G capable ethernet service unit card for
Hitachi-Powergrids wired-com product lines.

The base SoC is same as for already added SELI8 card, consequently the
already added u-boot support for SELI8 is reused.

Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
[Fixed new line error at EOF]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Lasse Klok Mikkelsen
fb6c96f14e arm: dts: ls1021a.dtsi: Fix invalid reg on gpio nodes
Address and size cells on SOC are set to 1. But gpio nodes are specified
with 2 cells. This fixes the gpio nodes to correct cells.

Signed-off-by: Lasse Klok Mikkelsen <lkmi@prevas.dk>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Yangbo Lu
38d1a18750 arm: dts: lx2162aqds: support eMMC HS400 mode on esdhc1
Add properties related to eMMC HS400 mode for esdhc1.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Tom Rini
b2c4b7f665 u-boot-imx-20210616
-------------------
 
 - imxrt : fixes, USB, imxrt1020-evk
 - imx8m:
 	fix for verdin-imx8mm
 	Add conga-QMX8 board
 - imx6 :
 	documentation for pico-imx6:
 	Add SeeedStudio NPI-IMX6ULL Support
 	ventana: DM PCI
 - imx7d:
 	added SMEGW01 board
 
 CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7765
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Merge tag 'u-boot-imx-20210616' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20210616
-------------------

- imxrt : fixes, USB, imxrt1020-evk
- imx8m:
	fix for verdin-imx8mm
	Add conga-QMX8 board
- imx6 :
	documentation for pico-imx6:
	Add SeeedStudio NPI-IMX6ULL Support
	ventana: DM PCI
- imx7d:
	added SMEGW01 board

CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7765
2021-06-16 11:18:11 -04:00
Michael Walle
2bf4658b8c board: sl28: fix RGMII clock and voltage
It was noticed that the clock isn't continuously enabled when there is
no link. This is because the 125MHz clock is derived from the internal
PLL which seems to go into some kind of power-down mode every once in a
while. The LS1028A expects a contiuous clock. Thus enable the PLL all
the time.

Also, the RGMII pad voltage is wrong, it was configured to 2.5V (that is
the VDDH regulator). The correct voltage is 1.8V, i.e. the VDDIO
regulator.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-16 18:14:08 +05:30
Marek Behún
f221333400 arm: mvebu: dts: turris_mox: add nodes for SPI NOR partitions
Add nodes for SPI NOR partitions to the device tree of Turris MOX, as
are in Linux' device tree.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-10 07:18:06 +02:00
Marek Behún
e04bf43681 arm: mvebu: dts: turris_mox: add button and LED nodes
Add nodes for indicator LED and reset button so that board code can
implement board factory reset mechanism.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-10 07:18:06 +02:00
Fabio Estevam
40496ac3b7 mx7d: Add Storopack's SMEGW01 board
Add support for Storopack's SMEGW01 board, which is an
IoT gateway based on the i.MX7D SoC.

Based on the original U-Boot work done by Phytec.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2021-06-09 13:34:38 +02:00
Navin Sankar Velliangiri
a3a0bc85c0 imx: Add SeeedStudio NPI-IMX6ULL Support
CPU:   Freescale i.MX6ULL rev1.1 792 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 49C
Reset cause: POR
Model: Seeed NPi iMX6ULL Dev Board with NAND
Board: Seeed NPi i.MX6ULL Dev Board
DRAM:  512 MiB
NAND:  512 MiB
MMC:   FSL_SDHC: 0
In:    serial@2020000
Out:   serial@2020000
Err:   serial@2020000
Net:   FEC0

Working:
- Eth0
- MMC/SD
- NAND
- UART 1
- USB host

Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>

Note:

Changes in v2:

 * removed unnecessary space in imx6ull-seeed-npi-imx6ull-dev-board.dts file.
 * Used SZ_2M for CONFIG_SYS_MALLOC_LEN size allocation.
2021-06-09 13:34:18 +02:00
Oliver Graute
fe133eb192 imx: support for conga-QMX8 board
Add i.MX8QM qmx8 congatec board support

U-Boot 2021.07-rc3-00528-gc9a966d9dd (May 31 2021 - 15:21:25 +0200)

CPU:   NXP i.MX8QM RevB A53 at 1200 MHz

Model: Congatec QMX8 Qseven series
Board: conga-QMX8
Build: SCFW 494c97f3, SECO-FW d63fdb21, ATF 09c5cc9
Boot:  SD2
DRAM:  6 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial@5a060000
Out:   serial@5a060000
Err:   serial@5a060000
switch to partitions #0, OK
mmc2 is current device
Net:
Error: ethernet@5b040000 address not set.
No ethernet found.

Hit any key to stop autoboot:  0

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2021-06-09 13:34:09 +02:00
Tim Harvey
cd18f1e6e6 imx: ventana: enable dm support for PCI and FEC ethernet
Enable driver model support for FEC ethernet which allows us to remove
the iomux and board_eth_init function. Replace the toggling of the ethernet
phy reset with dt configuration.

Enable driver model support for PCI which allows us to remove the
eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for
PCI devices on init such as the e1000 that is present on the GW552x.

Convert board_pci_fixup to use dm callback and remove pcidisable env
variable which is not supported for DM_PCI and thus leave PCI always
enabled during init.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-06-09 13:33:35 +02:00
Oleh Kravchenko
1180baec98 Add EV-iMX280-NANO-X-MB board
A simple prototyping board with one microSD port, one Ethernet port,
2 USB ports, I2C, SPI, GPIO, and UART interfaces.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Stefano Babic <sbabic@denx.de>
2021-06-09 13:32:49 +02:00
Oleh Kravchenko
3675ac081a Add out4.ru O4-iMX-NANO board
Board designed for quick prototyping and has one microSD port,
2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO,
UART interfaces, and 2 RGB LEDs.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Stefano Babic <sbabic@denx.de>
2021-06-09 13:32:42 +02:00
Giulio Benetti
42b967216e ARM: dts: imxrt1050-evk: enable usbotg1 node as host
Enable usbotg1 port node as host usb.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:04:00 +02:00
Giulio Benetti
9b91484a89 ARM: dts: imxrt1050: add usbotg1, usbphy1 and usbmisc nodes
Usb is now supported so add all required nodes for it in imxrt1050.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:03:54 +02:00
Giulio Benetti
d7308dbd86 ARM: dts: imxrt1020: add gpio5 node to this SoC
i.MXRT1020 supports gpio5, so let's add a node for it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:03:26 +02:00
Giulio Benetti
dc54f82901 ARM: dts: imxrt1020-evk: move all u-boot, dm-spl to imxrt1020-evk-u-boot.dtsi file
At the moment a lot of u-boot,dm-spl properties are present in board .dts
file but this is not correct since u-boot,dm-spl property is u-boot
specific and must be listed into the separate imrt1020-evk-u-boot.dtsi
file. So let's move every u-boot,dm-spl property present in
imxrt1020-evk.dts to imxrt1020-evk-u-boot.dtsi file.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:03:19 +02:00
Giulio Benetti
1f3555d906 ARM: dts: imxrt1050-evk: move all u-boot, dm-spl to imxrt1050-evk-u-boot.dtsi file
At the moment a lot of u-boot,dm-spl properties are present in board .dts
file but this is not correct since u-boot,dm-spl property is u-boot
specific and must be listed into the separate imrt1050-evk-u-boot.dtsi
file. So let's move every u-boot,dm-spl property present in
imxrt1050-evk.dts to imxrt1050-evk-u-boot.dtsi file.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:03:08 +02:00
Giulio Benetti
31f0e58527 ARM: dts: imxrt1050-evk: remove u-boot,dm-spl
We don't need lcdif to be enable in SPL, so let's remove u-boot,dm-spl.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
a9a5c33d57 ARM: dts: imxrt1050: set lcdif clocks according to mxsfb driver
Lcdif needs both "pix" and "axi" clocks to be enabled so let's add them to
lcdif node.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
f2d91e606b ARM: dts: imxrt1050: move lcdif assigned clock to dtsi
Since we assume pll5 is the default lcdif clock source let's move
assigned-clocks(-parents) properties to .dtsi file.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
6f6f03af0e ARM: dts: imxrt1050-evk: add device_type = "memory" to memory node
Now device_type = "memory" is mandatory to allow u-boot to read memory
node, so let's add it to memory node.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
0684ec8a9d ARM: dts: imxrt1050-evk-u-boot: make gpt1 present for SPL
Timer needs to be already enabled in spl, so let's add its node to spl dtb.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
7892f3eba1 ARM: dts: imxrt1050-evk: set gpt1 as tick-timer for u-boot
Let's set gpt1 as u-boot timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
7eacc427bb ARM: dts: imxrt1050-evk: enable gpt1 timer
Enable gpt1 timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
5790db9283 ARM: dts: imxrt1050: add gpt1 node
Add gpt1 node for using it as timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
6cd7a9b850 ARM: dts: imxrt1050: add node label to osc
Let's add node label to osc to be used as clock source for other nodes.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
d956990c69 ARM: dts: imxrt1020-evk: add device_type = "memory" to memory node
Now device_type = "memory" is mandatory to allow u-boot to read memory
node, so let's add it to memory node.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
faa4e95b5c ARM: dts: imxrt1020-evk-u-boot: make gpt1 present for SPL
Timer needs to be already enabled in spl, so let's add its node to spl dtb.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
e5d10f4442 ARM: dts: imxrt1020-evk: set gpt1 as tick-timer for u-boot
Let's set gpt1 as u-boot timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
bc4944051e ARM: dts: imxrt1020-evk: enable gpt1 timer
Enable gpt1 timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
df243c93d3 ARM: dts: imxrt1020: add gpt1 node
Add gpt1 node for using it as timer.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
bfdbe871a0 ARM: dts: imxrt1020: add node label to osc
Let's add node label to osc to be used as clock source for other nodes.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Pali Rohár
079b35a261 arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiB
For some configurations with more PCIe cards and PCIe bridges, 16 MiB of
PCIe MEM space may not be enough. Since TF-A already allocates a 128 MiB
CPU window for PCIe, and since IO port space is only 64 KiB in total,
use all the remaining space (64 + 32 + 16 + 8 + 4 + 2 + 1 = 127 MiB) for
PCIe MEM.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
a544d65f1d arm: a37xx: pci: Fix DT compatible string to Linux' DT compatible
Change DT compatible string for A3700 PCIe from 'marvell,armada-37xx-pcie'
to 'marvell,armada-3700-pcie' to make U-Boot A3700 PCIe DT node compatible
with Linux' DT node.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Andre Przywara
6785434709 sunxi: Bring back SD card as MMC device 0
Commit 2243d19e56 ("mmc: mmc-uclass: Use dev_seq() to read aliases
node's index") now actually enforces U-Boot's device enumeration policy,
where explicitly named devices come first, then any other non-named
devices follow, without filling gaps.

For quite a while we have had an "mmc1 = &mmc2;" alias in our
sunxi-u-boot.dtsi, which now leads to the problem that the SD card
(which was always mmc device 0) now gets to be number 2.
This breaks quite some boot scripts, including our own distro boot
commands, and some other features looking at $mmc_bootdev, also
fastboot.

Just add an explicit mmc0 alias in the very same file to fix this and
restore the old behaviour.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Samuel Holland <samuel@sholland.org>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
2021-05-31 00:39:54 +01:00
Grzegorz Szymaszek
7bda7cee2d arm: dts: stm32mp157c-odyssey-som: enable the RNG1
Enable the true random number generator. It can be used, for example, to
generate partition UUIDs when partitioning with the gpt command. The
generator is already enabled in the device trees of several other
STM32MP1‐based boards, like DKx or DHCOM.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-05-28 15:05:39 +02:00
Suman Anna
7194a95d13 arm: dts: k3-am642-sk: Add sysreset controller node
The AM64x SoC uses a central Device Management and Security Controller
(DMSC) processor that manages all the low-level device controls
including the system-wide SoC reset. The system-wide reset is managed
through the system reset driver.

Add a sysreset controller node as a child of the dmsc node to enable
the "reset" command from U-Boot prompt for the K3 AM642 SK.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-27 14:53:14 +05:30
Suman Anna
a97ee92e4a arm: dts: k3-am642-evm: Add sysreset controller node
The AM64x SoC uses a central Device Management and Security Controller
(DMSC) processor that manages all the low-level device controls
including the system-wide SoC reset. The system-wide reset is managed
through the system reset driver.

Add a sysreset controller node as a child of the dmsc node to enable
the "reset" command from U-Boot prompt for the K3 AM642 EVM.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-27 14:53:14 +05:30
Suman Anna
4ec04073ab arm: dts: k3-j721e: Fix up MAIN R5FSS cluster mode back to Split-mode
The default U-Boot environment variables and design are all set up for
both the MAIN R5FSS clusters to be in Split-mode. This is the setting
in v2021.01 U-Boot and the dt nodes are synched with the kernel binding
property names in commit 468ec2f3ef ("remoteproc: k3_r5: Sync to
upstreamed kernel DT property names") merged in v2021.04-rc2.

The modes for both the clusters got switched back to LockStep mode by
mistake in commit 70e167495a ("arm: dts: k3-j721e: Sync Linux v5.11-rc6
dts into U-Boot") also in v2021.04-rc2. This throws the following warning
messages when early-booting the cores using default env variables,

  k3_r5f_rproc r5f at 5d00000: Invalid op: Trying to start secondary core 7 in lockstep mode
  Load Remote Processor 3 with data at addr=0x82000000 98484 bytes: Failed!
  k3_r5f_rproc r5f at 5f00000: Invalid op: Trying to start secondary core 9 in lockstep mode
  Load Remote Processor 5 with data at addr=0x82000000 98484 bytes: Failed!

Fix this by switching back both the clusters to the expected Split-mode.
Make this mode change in the u-boot specific dtsi file to avoid such
sync overrides in the future until the kernel dts is also switched to
Split-mode by default.

Fixes: 70e167495a ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot")
Reported-by: Minas Hambardzumyan <minas@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-27 14:52:16 +05:30
Stefan Roese
c350601348 arm: mvebu: armada-3720-uDPU.dts: Change back to phy-mode "2500base-x"
With commit 8678776df6 (arm: mvebu: armada-3720-uDPU: fix PHY mode
definition to sgmii-2500) the PHY mode was switch to "sgmii-2500", even
when this is functionally incorrect since "2500base-x" was not supported
in U-Boot at that time. As this mode is now supported (at least present
in the headers), this patch moves back to the orinal version.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Cc: Vladimir Vid <vladimir.vid@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2021-05-20 13:05:31 +02:00