Commit graph

467 commits

Author SHA1 Message Date
Wolfram Sang
0b38fffbe4 mtd: nand: mxs: reset BCH earlier, too, to avoid NAND startup problems
It could happen (1 out of 100 times) that NAND did not start up correctly after
warm rebooting, so we end up with various failures or DMA timed out due to a
stalled BCH. When resetting BCH together with GPMI, the issue could not be
observed anymore (after 10000+ reboots). We probably need the consistent state
already before sending commands to NAND. This behaviour was observed in barebox
and kernel, so I assume it affects U-Boot as well. I chose to keep the extra
reset for BCH when changing the flash layout to be on the safe side.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Marek Vasut <marex@denx.de>
2012-12-11 17:19:51 -06:00
Ilya Yanok
5846b11e88 am33xx_spl_bch: simple SPL nand loader for AM33XX
AM33XX with BCH8 can't work with nand_spl_simple correctly
because custom read_page implementation is required for proper
syndrome generation.

This simple driver mostly duplicates nand_spl_simple but has
nand_read_page changed to suit our needs.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:02 -07:00
Mansoor Ahamed
c3754e9cc2 omap_gpmc: BCH8 support (ELM based)
This patch adds support for BCH8 error correction code to omap_gpmc
driver. We use GPMC to generate codes/syndromes but we need ELM to find
error locations from given syndrome.

Signed-off-by: Mansoor Ahamed <mansoor.ahamed@ti.com>
[ilya: merge it with omap_gpmc driver, some fixes and cleanup]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:02 -07:00
Benoît Thébaudeau
3287f6d385 nand: Add torture feature
This patch adds a NAND Flash torture feature, which is useful as a block stress
test to determine if a block is still good and reliable (or should be marked as
bad), e.g. after a write error.

This code is ported from mtd-utils' lib/libmtd.c.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
[scottwood@freescale.com: removed unnec. ifdef and unwrapped error strings]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:29 -06:00
Benoît Thébaudeau
8156f732ee nand: Fix nand_erase_opts() offset check
NAND Flash is erased by blocks, not by pages.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:28 -06:00
Benoît Thébaudeau
bd74280d62 nand: Clean up nand_util
This patch cleans up nand_util.c:
 - Fix tabs.
 - Fix typos.
 - Remove space character before opening parenthesis in function calls.
 - Fix comments.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:28 -06:00
Joe Hershberger
c788ecfdc3 nand: Move the sub-page read support enable to a flag
Use a flag instead of a hard-coded macro so that sub-page reads can be
enabled in other cases (such as on-die ecc).

This is the same as a5ff4f102937a3492bca4a9ff0c341d78813414c in Linux

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-11-26 15:41:28 -06:00
Prabhakar Kushwaha
79da5e3d5d driver/mtd:IFC NAND:Initialise internal SRAM before any write
IFC-1.1.0 uses 28nm techenology for SRAM. This tech has known limitaion for
SRAM i.e. "byte select" is not supported. Hence Read Modify Write is
implemented in IFC for any "system side write" into sram buffer. Reading an
uninitialized memory results in ECC Error from sram wrapper.

Hence we must initialize/prefill SRAM buffer by any data before writing
anything in SRAM from system side. To initialize SRAM user can use "READID"
NAND command with read bytes equal to SRAM size. It will be a one time
activity post boot

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[scottwood@freescale.com: fix fsl_ifc_sram_init prototype]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:28 -06:00
Scott Wood
cb04c77234 nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC drivers
These controllers can only do hardware ECC on full page transfers.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:27 -06:00
Scott Wood
7d4b79552d spl/nand: config symbol documentation
Document parameters used for specifying the NAND image to be loaded.

Also fix the definition of CONFIG_SPL_NAND_SIMPLE -- it's only
nand_spl_simple.c, not the entire nand directory.  The word "simple" is
there for a reason.  :-)

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
v2: updated for makefile changes earlier in patchset
2012-11-26 15:41:26 -06:00
Scott Wood
6f2f01b9f3 spl/nand: introduce CONFIG_SPL_NAND_DRIVERS, _BASE, and _ECC.
Some small SPLs do not use nand_base.c, and a subset of those also
require a special driver.  Some SPLs need software ECC but others can't
fit it.

All existing boards that specify CONFIG_SPL_NAND_SUPPORT have these
symbols added to preserve existing behavior.

Signed-off-by: Scott Wood <scottwood@freescale.com>
--
v2: use positive logic for including bits of NAND, rather than
a MINIMAL symbol that excludes things.
2012-11-26 15:41:25 -06:00
Tom Rini
6acc7c3cbc Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-11-05 07:42:00 -07:00
Kim Phillips
7d2ab9ae4e drivers/mtd/nand: sparse fixes
nand_ecc.c:82:5: warning: symbol 'nand_calculate_ecc' was not declared. Should it be static?
nand_ecc.c:155:5: warning: symbol 'nand_correct_data' was not declared. Should it be static?
nand_base.c:2854:1: error: directive in argument list
nand_base.c:2856:1: error: directive in argument list

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-11-04 11:00:38 -07:00
Lucas Stach
a833b95039 tegra: nand: make ONFI detection work
Add the missing bits to the Tegra NAND driver to make ONFI detection work
properly.

Also add it to the Tegra default config, as it seems to be a reasonable thing
to have it available on all boards that use any kind of NAND.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Lucas Stach
c0720afbb5 tegra: nand: add board pinmux
Boards may require a different pinmux setup for NAND than the default one.
Add a way to call into board specific code to set this up.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:07 -07:00
Tom Warren
150c24936b Tegra20: Move some include files to arch-tegra for sharing with Tegra30
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.

All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Wolfgang Denk
d923a5d59f MPC85xx: remove support for TQM85xx boards
Due to grown code sizes the TQM85xx boards don't build any more with
some older tool chains (like ELDK 4.2).  As these boards have long
reached EOL it seems a waste of effort trying to fix them.  The vendor
has agreed to drop support for them, too.  So let's get rid of them.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
cc: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
2012-10-05 11:07:42 -07:00
Albert ARIBAUD
1c27059a2f Merge remote-tracking branch 'u-boot/master' 2012-09-30 23:49:17 +02:00
Albert ARIBAUD
fa651cce4f Merge remote-tracking branch 'u-boot-atmel/master' 2012-09-29 08:34:09 +02:00
Tom Rini
495dbd72dd Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-09-21 14:53:13 -07:00
Tom Rini
efa1f43b7d mxc nand: Fix warning on !MXC_NFC_V2_1
In board_nand_init() we only need the 'tmp' variable if MXC_NFC_V2_1 is
defined.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-18 09:24:22 -07:00
Benoît Thébaudeau
9c60e75e05 mxc nand: Homogenize IP revisions with Linux
Use the same IP revisions as in Linux in order to make the comparison more
clear.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:51:45 -05:00
Benoît Thébaudeau
13927f0733 mtd mxc nand: Merge init functions
Merge mxc_setup_config1() into board_nand_init() in order to ease the addition
of i.MX5 support in the following patches.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:51:45 -05:00
Benoît Thébaudeau
7c28a1cfdf mtd mxc nand: Fix ECC state after read_page_raw_syndrome()
mxc_nand_read_page_raw_syndrome() should reenable ECC upon exit. This fixes ECC
errors left uncorrected after a call to this function.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:51:45 -05:00
Benoît Thébaudeau
0e499b07ef mtd mxc nand: Use _mxc_nand_enable_hwecc()
Use _mxc_nand_enable_hwecc() instead of duplicating its code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:51:45 -05:00
Benoît Thébaudeau
c1db8dd62b mxc nand: Access all ecc_status_result fields
On the NFC IP 1.1, the 32-bit ecc_status_result value comes from 2
consecutive 16-bit registers. This patch reads all the fields of this value,
which makes a difference for 4-kiB NF pages.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:42:46 -05:00
Benoît Thébaudeau
365b2c0761 mxc nand: cosmectic: Light cleanup
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:42:46 -05:00
Benoît Thébaudeau
80c8ab7b25 mxc nand: Merge mtd and spl register definitions
This patches fixes the TODO to use same register definitions in mtd mxc_nand and
nand_spl fsl nfc drivers.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:42:46 -05:00
Marek Vasut
9c790a748f mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver
This is based on Linux kernel -next:

commit 14f44abf1dafc20ba42ce8616a8fc8fbd1b3712b
Author: Brian Norris <computersforpeace@gmail.com>
Date:   Fri Jul 13 09:28:24 2012 -0700

    mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver

    The NAND_CHIPOPTIONS_MSK has limited utility and is causing real bugs. It
    silently masks off at least one flag that might be set by the driver
    (NAND_NO_SUBPAGE_WRITE). This breaks the GPMI NAND driver and possibly
    others.

    Really, as long as driver writers exercise a small amount of care with
    NAND_* options, this mask is not necessary at all; it was only here to
    prevent certain options from accidentally being set by the driver. But the
    original thought turns out to be a bad idea occasionally. Thus, kill it.

    Note, this patch fixes some major gpmi-nand breakage.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 18:54:43 -05:00
Joe Hershberger
e70bfa2986 nand: Make NAND lock status compatible with Micron
Micron NAND flash (e.g. MT29F4G08ABADAH4) BLOCK LOCK READ STATUS is not
the same as others.  Instead of bit 1 being lock, it is #lock_tight.
To make the driver support either format, ignore bit 1 and use only
bit 0 and bit 2.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 17:33:43 -05:00
Joe Hershberger
33b1d5cae3 nand: consolidate duplicated constants
NAND_CMD_ constants for lock/unlock should be in the header

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 17:33:42 -05:00
Joe Hershberger
e331ab2ee9 nand: Change ulong to loff_t and size_t
Missed in previous cleanup.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 17:33:42 -05:00
Joe Hershberger
eee623a504 nand: Add support for unlock.invert
NAND unlock command allows an invert bit to be set to unlock all but
the selected page range.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
[scottwood@freescale.com: updated docs and added comment about invert bit]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 17:32:10 -05:00
Matthieu CASTET
d62e9caaaf mtd: support ONFI multi lun NAND
With onfi a flash is organized into one or more logical units (LUNs).
A logical unit (LUN) is the minimum unit that can independently execute
commands and report status.

Mtd does not exploit LUN, so make it see a big single flash where size is
lun_size * number_of_lun.

Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB.

Artem: split long line on 2 shorter ones.

This is commit 637957551c0ac80de8dfc7650d320c5a98c2c0c0 from Linux

Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com>
Acked-by: Florian Fainelli <ffainelli@freebox.fr>
Signed-off-by:  Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
[scottwood@freescale.com: picked from Linux into U-Boot]
Reported-by: Rafael Beims <rafael.beims@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 16:17:28 -05:00
Wu, Josh
b9c83c6815 atmel_nand: fix the U-Boot output information about nand flash with PMECC enable.
Before the patch, it looks like:
	|U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:11:06)
	|
	|CPU: AT91SAM9G35
	|Crystal frequency:       12 MHz
	|CPU clock        :      400 MHz
	|Master clock     :  133.333 MHz
	|DRAM:  128 MiB
	|WARNING: Caches not enabled
>	|NAND:  Initialize PMECC params, cap: 2, sector: 512
>	|256 MiB
	|MMC:   mci: 0
	|In:    serial
	|Out:   serial
	|Err:   serial
	|Net:   macb0
	|Hit any key to stop autoboot:  0

After the patch:
	|U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:18:11)
	|
	|CPU: AT91SAM9G35
	|Crystal frequency:       12 MHz
	|CPU clock        :      400 MHz
	|Master clock     :  133.333 MHz
	|DRAM:  128 MiB
	|WARNING: Caches not enabled
>	|NAND:  256 MiB
	|	... ...
	|Hit any key to stop autoboot:  0

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-13 14:28:13 +02:00
Tom Warren
651eb73224 NAND: MXS: include common.h first so cache.h is included in correct order
With Simon Glass's include/nand.h alignment changes, some mxs builds
were generating errors. Fix is to ensure asm/cache.h is included before
linux/mtd/nand.h. Moving common.h to top of include list does that.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
2012-09-10 15:31:11 -07:00
Jim Lin
312693c3dd tegra: nand: Add Tegra NAND driver
A device tree is used to configure the NAND, including memory
timings and block/pages sizes.

If this node is not present or is disabled, then NAND will not
be initialized.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Simon Glass
b572595ee9 nand: Try to align the default buffers
The NAND layer needs to use cache-aligned buffers by default. Towards this
goal. align the default buffers and their members according to the minimum
DMA alignment defined for the architecture.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-09-07 13:54:30 -07:00
Wu, Josh
bdfd59aa0f at91: atmel_nand: Update driver to support Programmable Multibit ECC controller
The Programmable Multibit ECC (PMECC) controller is a programmable binary
BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
can be used to support both SLC and MLC NAND Flash devices. It supports to
generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data.

To use PMECC in this driver, the user needs to set the PMECC correction
capability, the sector size and ROM lookup table offsets in board config file.

This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference
is in this version it uses registers structure access hardware instead of using macros.
It is tested in 9x5 serial boards.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[rebase]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Wu, Josh
ae79794e54 at91: atmel_nand: remove unused variables.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Wu, Josh
fe2185ea80 at91: atmel_nand: extract HWECC initialization code into one function: atmel_hw_nand_init_param().
This patch
1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support.
2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail().

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix empty newline at EOF error and move return value check into ifdef]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Otavio Salvador
fa7a51cb82 mxs: Convert sys_proto.h prefixes to 'mxs'
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:25 +02:00
Jeroen Hofstee
d43950463c arm: omap: Fix switching back to nandecc sw.
Orjan Friberg wrote at [1]:

"For the beagleboard, ecc.size is not explicitly set when doing 'nandecc
sw'. If it's not set for the NAND_ECC_SOFT case in nand_scan_tail, it's
set to 256 bytes.

When doing 'nandecc hw', ecc.size is set to 512 bytes. Hence, when
changing back to 'nandecc sw' ecc.size remains at 512 bytes and suddenly
the format has changed."

No patch has been submitted and the issue was still present. This patch
adds the mentioned solution. Tested on a tam3517 board.

[1] http://lists.denx.de/pipermail/u-boot/2012-February/119002.html

cc: Orjan Friberg <of@flatfrog.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
2012-09-01 14:58:19 +02:00
Otavio Salvador
9c471142bc mxs: prefix register structs with 'mxs' prefix
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00
Vipin KUMAR
0def98e7be mtd/NAND: Remove obsolete SPEAr specific NAND drivers
Since, SPEAr platform uses generic FSMC driver now, so spear specific files
drivers/mtd/nand/spr_nand.c, arch/arm/include/asm/arch-spear/spr_nand.h are
removed

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-07-07 14:07:38 +02:00
Vipin KUMAR
7f0730a02e mtd/NAND: Add FSMC driver support
Flexible static memory controller is a peripheral provided by ST,
which controls the access to NAND chips along with many other
memory device chips eg NOR, SRAM.

This patch adds the driver support for FSMC controller interfacing
with NAND memory.

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-07-07 14:07:38 +02:00
Wolfgang Denk
8fa3d2b816 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
* 'master' of git://git.denx.de/u-boot-nand-flash:
  NAND: Remove ONFI detection message to from bootup log
  driver/mtd:IFC: Fix possible memory leak
  driver/mtd: IFC NAND: Add support of ONFI NAND flash
  mtd, nand: move some printfs to debug output.
  nand_util: correct YAFFS image write function
  powerpc/85xx: fix NAND boot linker scripts for -fpic
  nand: extend .raw accesses to work on multiple pages
2012-05-20 22:47:40 +02:00
Stefan Roese
e52fee9b04 NAND: Remove ONFI detection message to from bootup log
Without this patch, boot shows this messages upon NAND detection:

NAND:  ONFI flash detected
ONFI param page 0 valid
ONFI flash detected
ONFI param page 0 valid
128 MiB

With this patch, its back to the U-Boot "standard":

NAND:  128 MiB

Tested on x600 (SPEAr600).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
2012-05-18 18:17:06 -05:00
Prabhakar Kushwaha
76d067ac33 driver/mtd:IFC: Fix possible memory leak
if priv->bank >= MAX_BANK, priv should be freed before returning ENODEV.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
2012-05-18 18:15:24 -05:00
Prabhakar Kushwaha
807fc702e0 driver/mtd: IFC NAND: Add support of ONFI NAND flash
- Fix NAND_CMD_READID command for ONFI detect.
  - Add NAND_CMD_PARAM command to read the ONFI parameter page.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
2012-05-18 18:13:50 -05:00
Heiko Schocher
a35ea8070c mtd, nand: move some printfs to debug output.
current U-Boot shows on startup (for example on the enbw_cmc
board) the following printfs from the nand subsystem:

Flash: 2 MiB
NAND:  Bad block table found at page 65472, version 0x01
Bad block table found at page 65408, version 0x01
nand_read_bbt: Bad block at 0x000002980000
nand_read_bbt: Bad block at 0x000003240000
128 MiB
MMC:   davinci: 0

remove them to debug output, so it shows with this patch:

Flash: 2 MiB
NAND:  128 MiB
MMC:   davinci: 0

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
2012-05-18 18:11:37 -05:00
Liu, Wentao
65683026a5 nand_util: correct YAFFS image write function
In function nand_write_skip_bad(),for YAFFS filesystem part,
write_oob() will return 0 when success, so when rval equals 0,
it should continue to write the next page, and no break.

Signed-off-by: Wentao, Liu <wentao.liu@intel.com>
Acked-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Scott Wood <scott@tyr.buserror.net>
2012-05-18 18:08:45 -05:00
Timo Ketola
a1028730b5 imx: nand: Support flash based BBT
Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-05-15 08:31:33 +02:00
Mike Frysinger
7b15e2bb9b linux/compat.h: rename from linux/mtd/compat.h
This lets us use it in more places than just mtd code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-30 16:54:51 +02:00
Marek Vasut
96666a39ae DMA: Split the APBH DMA init into block and channel init
This fixes the issue where mxs_dma_init() was called either twice or never,
without introducing any new init hooks.

The idea is to allow each and every device using the APBH DMA block to
configure and request only the channels it uses, instead of making it call init
for all the channels as is now.

The common DMA block init part, which only configures the block, is then called
from CPUs arch_cpu_init() call.

NOTE: This patch depends on:

	http://patchwork.ozlabs.org/patch/150957/

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-04-16 14:53:59 +02:00
Marek Vasut
6b9408edd3 i.MX28: Add cache support to MXS NAND driver
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-03-29 07:56:28 +02:00
Stefano Babic
f7dad8f121 NAND: TI: fix warnings in omap_gpmc.c
The following warnings are reported for boards using SOFT ECC.

omap_gpmc.c:33:30: warning: 'hw_nand_oob' defined but not used
omap_gpmc.c:78:13: warning: 'omap_hwecc_init' defined but not used
omap_gpmc.c:116:12: warning: 'omap_correct_data' defined but not used
omap_gpmc.c:182:12: warning: 'omap_calculate_ecc' defined but not used
omap_gpmc.c:208:13: warning: 'omap_enable_hwecc' defined but not used

Signed-off-by: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Scott Wood <scottwood@freescale.com>
2012-03-27 22:05:29 +02:00
Prabhakar Kushwaha
5f720b8514 mtd/nand:Fix wrong usage of is_blank() in fsl_ifc_run_command
Freescale IFC NAND Machine calculates ECC on 512byte sector and same is used in
fsl_ifc_run_command() during ECC status verification. Also this sector is passed
to is_blank() for blank checking. It is wrong at first place because
is_blank()'s implementation checks for Page size and OOB area size.
is_blank() should be called per page for main and OOB area verification.

Variables name are redefined to avoid confusion between buffer and ecc sector.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-02-28 14:03:39 -06:00
Prabhakar Kushwaha
d90361285c mtd/nand: Fix IFC driver to support 2K NAND page
1) OOB area should be updated irrespective of NAND page size. Earlier it was
updated only for 512byte NAND page.

2) During OOB update fbcr should be equal to OOB size.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-02-28 14:03:39 -06:00
Scott Wood
fb49454b1b nand: reinstate lazy bad block scanning
commit 2a8e0fc8b3 ("nand: Merge changes
from Linux nand driver") accidentally reverted commit
13f0fd94e3 ("NAND: Scan bad blocks
lazily.").

Reinstate the change, as amended by commit
ff49ea8977 ("NAND: Mark the BBT as scanned
prior to calling scan_bbt.").

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-02-28 14:03:39 -06:00
Scott Wood
1f7b1743d3 Revert "nand: make 1-bit software ECC configurable"
This reverts commit 4fee6c2f29.

It breaks boards that currently rely on soft-ecc, as pointed out here:
http://patchwork.ozlabs.org/patch/140872/

The reverted patch should be resubmitted with documentation, and with the
CONFIG_MTD_ECC_SOFT selected from every board that needs it.  We could
start by looking at what NAND driver the board selects, and whether
that driver ever asks for soft ECC.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-02-28 14:03:39 -06:00
Mike Frysinger
3f54108be9 Blackfin: bfin_nand: mark local func static
This devready func is only used in this driver, so mark it static.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-02-12 15:03:26 -05:00
Scott Wood
c178347492 nand/fsl_elbc: Convert to self-init
This driver doesn't yet make use of the added flexibility (not that that
should stop anyone from converting...), but it will with the in-progress
hack to support 4k-page NAND.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-01-26 16:09:06 -06:00
Scott Wood
578931b34d nand: Introduce CONFIG_SYS_NAND_SELF_INIT
This allows a driver to run code between nand_scan_ident() and
nand_scan_tail(), among other things.  See the additions to
doc/README.nand for details.

To allow a gradual transition, Boards that don't set
CONFIG_SYS_NAND_SELF_INIT will still be initialized the old way, but
new drivers should not require this, and existing drivers should be
converted when convenient.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-01-26 16:09:06 -06:00
Shengzhou Liu
80519c8334 mtd/nand: Add ONFI support for FSL NAND controller
- fix NAND_CMD_READID command for ONFI detect.
- add NAND_CMD_PARAM command to read the ONFI parameter page.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-01-26 16:09:03 -06:00
Christian Hitz
4fee6c2f29 nand: make 1-bit software ECC configurable
The software ECC algorithm is not necessary when hardware ECC
is available and can be left out for a smaller image size.
Enable with CONFIG_MTD_ECC_SOFT.

Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-01-26 16:09:02 -06:00
Christian Hitz
5454ddbc9b nand: Sanitize ONFI strings.
[backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe]

This is part of the synchronization with the nand driver to the
Linux 3.0 state.

Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-01-26 16:09:02 -06:00
Christian Hitz
ff8a8a7183 nand: Merge changes to BBT from Linux nand driver
[backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe]

This patch synchronizes the nand driver with the Linux 3.0 state.

Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-01-26 16:09:02 -06:00
Christian Hitz
2a8e0fc8b3 nand: Merge changes from Linux nand driver
[backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe]

This patch synchronizes the nand driver with the Linux 3.0 state.

Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
[scottwood@freescale.com: minor fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-01-26 16:09:02 -06:00
Christian Hitz
90e3f395bf nand: cleanup whitespace
Bring up to date with corresponding file from linux.

Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-01-26 16:09:02 -06:00
Christian Hitz
8c2d9c6862 nand: Add more NAND types from Linux nand driver
[backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe]

This patch merges the additional NAND flash types from the 3.0 Linux
kernel.

Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-01-26 16:09:02 -06:00
Christian Hitz
4c6de8560c nand: Merge BCH code from Linux nand driver
[backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe]

This patch merges the BCH ECC algorithm from the 3.0 Linux kernel.
This enables U-Boot to support modern NAND flash chips that
require more than 1-bit of ECC in software.

Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-01-26 16:09:02 -06:00
Stefano Babic
d3022c5f5c nand_spl_simple: store ecc data on the stack
Currently nand_spl_simple puts it's temp data at 0x10000 offset in SDRAM
which is likely to contain already loaded data.
The patch saves the oob data and the ecc on the stack replacing
the fixed address in RAM.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Ilya Yanok <yanok@emcraft.com>
CC: Scott Wood <scottwood@freescale.com>
CC: Tom Rini <tom.rini@gmail.com>
CC: Simon Schwarz <simonschwarzcor@googlemail.com>
CC: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-01-26 16:06:21 -06:00
Anatolij Gustschin
b7fde587bf drivers/mtd/nand/nand_spl_load.c: Fix GCC 4.6 warning
Fix:
nand_spl_load.c: In function 'nand_boot':
nand_spl_load.c:31:6: warning: variable 'ret' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-12-07 16:02:07 -06:00
Anatolij Gustschin
18b89072f6 drivers/mtd/nand/nand_spl_simple.c: Fix GCC 4.6 warnings
Fix warnings for both cases:

definded CONFIG_SYS_NAND_HW_ECC_OOBFIRST:
nand_spl_simple.c: In function 'nand_read_page':
nand_spl_simple.c:156:6: warning: variable 'stat' set but not used
[-Wunused-but-set-variable]

not definded CONFIG_SYS_NAND_HW_ECC_OOBFIRST:
nand_spl_simple.c: In function 'nand_read_page':
nand_spl_simple.c:196:6: warning: variable 'stat' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-12-07 16:01:56 -06:00
Ilya Yanok
ff62fb4c6a omap_gpmc: use SOFTECC in SPL if it's enabled
Use software ECC for the SPL build if support for software ECC in SPL is
enabled.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2011-12-06 23:59:36 +01:00
Ilya Yanok
1df308e5be nand_spl_simple: add support for software ECC
This patch adds support for software ECC to the nand_spl_simple driver.
To enable this one have to define CONFIG_SPL_NAND_SOFTECC.

Tested on OMAP3.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2011-12-06 23:59:36 +01:00
Simon Schwarz
56c91bc3b6 Fix regression in SMDK6400
s3c64xx.c implemented its own nand_read_byte, nand_write_buf and
nand_read_buf functions. This provoked a regression when these functions
were made public by patch 55f429bb39614a16b1bacc9a8bea9ac01a60bfc8.

This deletes these duplicated functions from s3c64xx.c and adds the generic
implementations in nand_base.c to the spl Makefile. It also adds
-ffcuntion-sections and -gc-sections to the compilation flags of the SPL to
avoid errors originating from unused functions in nand_base.c.

Description of the regression:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/108873

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Cc: scottwood@freescale.com
Cc: s-paulraj@ti.com
Cc: albert.u.boot@aribaud.net
2011-12-06 23:59:31 +01:00
Simon Schwarz
82645f816f nand: Add common functions to linux/mtd/nand.h
Functions often used in SPL are now part of linux/mtd/nand.h.
Static modifiers are removed from these functions in
drivers/mtd/nand/nand_base.c.

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Cc: scottwood@freescale.com
Cc: s-paulraj@ti.com
Cc: albert.u.boot@aribaud.net
Acked-by: Scott Wood <scottwood@freescale.com>
2011-12-06 23:59:31 +01:00
Stelian Pop
c9e798d35a Fix Stelian's email address
Change my old email address which is no longer valid.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-11-29 15:43:38 +01:00
Marek Vasut
0d4e850980 iMX28: Add GPMI NAND driver
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2011-11-11 11:36:57 +01:00
Heiko Schocher
68bb829500 spl, nand: add 4bit HW ecc oob first nand_read_page function
similiar to commit dc7cd8e59b, only
adapted for the new spl framework.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:25 +01:00
Heiko Schocher
435199f380 arm, davinci: add support for new spl framework
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-11-03 22:56:25 +01:00
Marek Vasut
7a129a5592 GCC4.6: Use debug() instead of debugX() in s3c24xx_nand.c
The debugX() macro was always used with debug level 1. There is no point to use
it here instead of debug().

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
2011-10-27 23:54:08 +02:00
Wolfgang Denk
d8fffa057c Merge branch 'master' of git://git.denx.de/u-boot-mips
* 'master' of git://git.denx.de/u-boot-mips:
  MIPS: Jz4740: Add qi_lb60 board support
  MIPS: Jz4740: Add NAND driver
  MIPS: Ingenic XBurst Jz4740 processor support
2011-10-12 22:47:15 +02:00
Xiangfu Liu
3a6591a86a MIPS: Jz4740: Add NAND driver
Jz4740 NAND flash controller can support:
* MLC NAND as well as SLC NAND
* all 8-bit/16-bit NAND flash devices
* HAMMING and RS hardware ECC
* automatic boot up from NAND flash devices

nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60.
We'll bring up boot-from-NAND support in nand_spl/ in the future.

Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Daniel <zpxu@ingenic.cn>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-10-12 23:28:37 +09:00
Laurence Withers
6016194371 NAND: davinci: choose correct 1-bit h/w ECC reg
In nand_davinci_readecc(), select the correct NANDF<n>ECC register based
on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC.
This allows 1-bit hardware ECC to work with chip select other than CS2.

Note this now matches the usage in nand_davinci_enable_hwecc(), which
already had the correct handling, and allows refactoring to a single
function encapsulating the register read.

Without this fix, writing NAND pages to a chip not wired to CS2 would
result in in the ECC calculation always returning FFFFFF for each
512-byte segment, and reading back a correctly written page (one with
ECC intact) would always fail. With this fix, the ECC is written and
verified correctly.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-10 15:28:05 -05:00
Wolfgang Denk
4f7549d2dc Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
* 'master' of git://git.denx.de/u-boot-nand-flash:
  PPC: Fix socrates NAND problem
  PPC: Fix fsl_upm.c by renaming nand handling functions
  NAND: Make page, erase, oob size available via cmd_nand
  mtd: eLBC NAND: remove elbc_fcm_ctrl->oob_poi
  NAND: Add -y option to nand scrub command
  NAND: Add nand read.raw and write.raw commands
  NAND: Really ignore bad blocks when scrubbing
  spl, nand: add 4bit HW ecc oob first nand_read_page function
  mxc_nand: fix a problem writing more than 32MB
  mxc_nand: fixed some typos (cosmetic)
  nand: increase chip_delay in mv kirkwood nand driver
2011-10-04 22:20:25 +02:00
Wolfgang Denk
1fed668b3f Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
  powerpc/p3060: Add SoC related support for P3060 platform
  powerpc/85xx: Add support for setting up RAID engine liodns on P5020
  powerpc/85xx: Refactor some defines out of corenet_ds.h
  fm-eth: Add ability for board code to disable a port
  powerpc/mpc8548: Add workaround for erratum NMG_LBC103
  powerpc/mpc8548: Add workaround for erratum NMG_DDR120
  powerpc/mpc85xxcds: Fix PCI speed
  powerpc/mpc8548cds: Fix booting message
  powerpc/p4080: Add support for secure boot flow
  powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH
  powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards
  powerpc/p2041rdb: remove watch dog related codes
  powerpc/p2041rdb: updated description of cpld command
  powerpc/p2041rdb: add more ddr frequencies support
  powerpc/p2041rdb: set sysclk according to status of physical switch SW1
  powerpc/p2041rdb: update cpld reset command according to CPLD 2.0
  powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver
  powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
  powerpc/mpc8xxx: Add DDR2 to unified DDR driver
  powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()
  powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots
  powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en
  powerpc/85xx: Refactor P2041RDB to use common p_corenet files
  powerpc/85xx: refactor common P-Series CoreNet files for FSL boards
  powerpc/85xx: Enable CMD_REGINFO on corenet boards
  powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries
  powerpc/85xx: Fix USB protocol definitions for P1020RDB
  powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM
  powerpc/mpc8xxx: Move DDR RCW overriding to common code
  powerpc/mpc8xxx: Extend CWL table
  powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536
  powerpc/85xx: Cleanup extern in corenet_ds board code
  powerpc/p2041rdb: Add ethernet support on P2041RDB board
  powerpc/85xx: Add networking support to P1023RDS
  powerpc/hydra: Add ethernet support on P5020/P3041 DS boards
  powerpc/85xx: Add FMan ethernet support to P4080DS
  powerpc/85xx: Add support for FMan ethernet in Independent mode
  powerpc/mpc8548cds: Cleanup mpc8548cds.c
  powerpc/mp: add support for discontiguous cores
  powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries
  fdt: Add new fdt_create_phandle helper
  fdt: Rename fdt_create_phandle to fdt_set_phandle
  powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set
  fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
  powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC)
  fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010)
  powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M
  powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB
  nand: Freescale Integrated Flash Controller NAND support
  powerpc/85xx: Add basic support for P1010RDB
  powerpc/85xx: Add support for new P102x/P2020 RDB style boards
  powerpc/85xx: relocate CCSR before creating the initial RAM area
  powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
  powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0
  powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
2011-10-04 22:08:13 +02:00
Marek Vasut
24dd863f8b PPC: Fix fsl_upm.c by renaming nand handling functions
This avoids colision with nand subsystem's functions.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:41:02 -05:00
mhench
17d261df18 mtd: eLBC NAND: remove elbc_fcm_ctrl->oob_poi
The eLBC NAND driver currently follows up each program/write operation with a
read-back of the page, in order to [ostensibly] fill in ECC data for the
caller. However, the page address used for this read is always -1, so the read
will never work correctly.  Remove this useless (and potentially problematic)
block of code.

v2: fix broken mailer

Signed-off-by: mhench <mhench@elutions.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:12 -05:00
Marek Vasut
6d41419f0b NAND: Really ignore bad blocks when scrubbing
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
[scottwood@freescale.com: use chip instead of redundant priv_nand]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:12 -05:00
Helmut Raiger
b4b1e769b8 mxc_nand: fix a problem writing more than 32MB
When writing 0x4000 to the unlockend_blkaddr register, large writes to
a 2k page NAND sometimes fail. The current kernel driver writes 0xFFFF
to this register for V2 of the nand controller.

However on an i.MX31 this also fixes writes larger than 32MB.
The datasheet is very unspecific, but (0x4000=16384)*2000
roughly fits the limits we're encountering with NAND writes.
This problem might be NAND chip specific.

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:12 -05:00
Helmut Raiger
780f30b642 mxc_nand: fixed some typos (cosmetic)
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:11 -05:00
Stefan Bigler
156800905a nand: increase chip_delay in mv kirkwood nand driver
The new SAMSUNG NAND Flash K9F1G08U0D require a bigger chip_delay.
The Data Transfer from Cell to Register is >= 35us. Other Vendors
and older chips normally use >= 25us. To have enough margin 40us
is selected.

Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Stefan Roese <sr@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03 18:35:11 -05:00
Marek Vasut
89131e90a2 GCC4.6: Squash warning in nand_bbt.c
nand_bbt.c: In function ‘search_bbt’:
nand_bbt.c:465:6: warning: variable ‘bits’ set but not used
[-Wunused-but-set-variable]

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
2011-10-01 23:33:25 +02:00
Simon Schwarz
12c2f1ee3c spl: add NAND Library to new SPL
Adds NAND library to SPL.

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:54 +02:00
Dipen Dudhat
52f90dad60 nand: Freescale Integrated Flash Controller NAND support
Add NAND support (including spl) on IFC, such as is found on the p1010.

Note that using hardware ECC on IFC with small-page NAND (which is what
comes on the p1010rdb reference board) means there will be insufficient
OOB space for JFFS2, since IFC does not support 1-bit ECC.  UBI should
work, as it does not use OOB for anything but ECC.

When hardware ECC is not enabled in CSOR, software ECC is now used.

Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
[scottwood@freescale.com: ECC rework and misc fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-09-29 19:01:04 -05:00
Alex Waterman
eced4626e4 NAND: Add 16bit NAND support for the NDFC
This patch adds support for 16 bit NAND devices attached to the
NDFC on ppc4xx processors. Two config entries were added:

  CONFIG_SYS_NDFC_16        - Setting this tells the NDFC that a
			      16 bit device is attached.
  CONFIG_SYS_NDFC_EBC0_CFG  - This is for the External Bus
			      Controller configuration register.

Also, a new ndfc_read_byte() function was added which does not
first convert the data to little endian.

The NAND SPL was also modified to do 16bit bad block testing
when a 16 bit chip is being used.

Signed-off-by: Alex Waterman <awaterman@dawning.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:52 -05:00
Ben Gardiner
169d54d8b3 nand_util: drop trailing all-0xff pages if requested
Add a flag to nand_read_skip_bad() such that if true, any trailing
pages in an eraseblock whose contents are entirely 0xff will be
dropped.

The implementation is via a new drop_ffs() function which is
based on the function of the same name from the ubiformat
utility by Artem Bityutskiy.

This is as-per the reccomendations of the UBI FAQ [1]

[1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Artem Bityutskiy <dedekind1@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
Ben Gardiner
c135456ff5 nand_util: treat WITH_YAFFS_OOB as a mode
When specified in the flags argument of nand_write, WITH_YAFFS_OOB causes an
operation which is mutually exclusive with the 'usual' way of writing.

Add a check that client code does not specify WITH_YAFFS_OOB along with any
other flags and add a comment indicating that the WITH_YAFFS_OOB flag should
not be mixed with other flags.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
Ben Gardiner
a6c9aa1f92 nand_util: convert nand_write_skip_bad() to flags
In a future commit the behaviour of nand_write_skip_bad()
will be further extended.

Convert the only flag currently passed to the nand_write_
skip_bad() function to a bitfield of only one allocated
member. This should avoid an explosion of int's at the
end of the parameter list or the ambiguous calls like

nand_write_skip_bad(info, offset, len, buf, 0, 1, 1);
nand_write_skip_bad(info, offset, len, buf, 0, 1, 0);

Instead there will be:

nand_write_skip_bad(info, offset, len, buf, WITH_YAFFS_OOB |
			WITH_OTHER);

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Acked-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
Ben Gardiner
bee038e9fe nand_base: trivial: fix comment read/write comment
Replace an incorrect 'read' with 'write' in a comment.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Acked-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
Florian Fainelli
aad99bbc39 NAND: rearrange ONFI revision checking, add ONFI 2.3
This patch sync with Brian's patch on Linux in nand_flash_detect_onfi()

	commit b7b1a29d94c17e4341856381bccb4d17495bea60
	Author: Brian Norris <computersforpeace@gmail.com>
	Date:   Sun Dec 12 00:23:33 2010 -0800

	    mtd: nand: rearrange ONFI revision checking, add ONFI 2.3

	    In checking for the ONFI revision, the first conditional (for checking
	    "unsupported" ONFI) seems unnecessary.  All ONFI revisions should be
	    backwards-compatible; even if this is not the case on some newer ONFI
	    revision, it should simply fail the second version-checking if-else block
	    (i.e., the bit-fields for 1.0, 2.0, etc. would not be set to 1). Thus, we
	    move our "unsupported" condition after having checked each bit field.

	    Also, it's simple enough to add a condition for ONFI revision 2.3. Note
	    that this does *NOT* mean we handle all new features of ONFI versions
	    above 1.0.

	    Signed-off-by: Brian Norris <computersforpeace@gmail.com>
	    Acked-by: Florian Fainelli <ffainelli@freebox.fr>
	    Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: Florian Fainelli <florian@openwrt.org>
2011-04-15 15:53:11 -05:00
Florian Fainelli
a931f49296 NAND: Fix integer overflow in ONFI detection of chips >= 4GiB
This patch sync with David's patch on Linux in nand_flash_detect_onfi()

	commit 4ccb3b4497ce01fab4933704fe21581e30fda1a5
	Author: David Woodhouse <David.Woodhouse@intel.com>
	Date:   Fri Dec 3 16:36:34 2010 +0000

    	mtd: nand: Fix integer overflow in ONFI detection of chips >= 4GiB

    	Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: Florian Fainelli <florian@openwrt.org>
2011-04-15 15:53:11 -05:00
michael
67a490d60d atmel_nand: don't require CONFIG_SYS_NAND_ENABLE_PIN
If NCE is hooked up to NCS3, we don't need to (and can't)
explicitly set the state of the NCE pin. Instead, the
controller asserts it automatically as part of a
command/data access. Only "CE don't care"-type NAND chips
can be used in this manner.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-04-01 14:49:08 -05:00
Florian Fainelli
0272c718ba NAND: add support for reading ONFI page table
This patch adds support for reading an ONFI page parameter from a NAND
device supporting it. If this is the case, struct nand_chip onfi_version
member contains the supported ONFI version, 0 otherwise.

This allows NAND drivers past nand_scan_ident to set the best timings for the
NAND chip.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-04-01 14:49:08 -05:00
Scott Wood
6f2ffc3da2 NAND: add more watchdog resets
Poke the watchdog in a variety of looping constructs, which could take
a long time to complete.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-04-01 14:49:08 -05:00
Wolfgang Denk
d1a24f0618 Minor Coding Style Cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-02-02 22:36:10 +01:00
Stefano Babic
58c758fe5a mxc_nand: add support for i.MX35 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2011-02-02 00:54:42 +01:00
Lei Wen
245eb90091 mtd: nand: Allow caller to pass alternative ID table to nand_scan_ident()
This patch sync with David's patch on Linux for handling nand_scan_ident.

	commit 5e81e88a4c140586d9212999cea683bcd66a15c6
	Author: David Woodhouse <David.Woodhouse@intel.com>
	Date:   Fri Feb 26 18:32:56 2010 +0000

	mtd: nand: Allow caller to pass alternative ID table to nand_scan_ident()

	Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-01-12 17:13:10 -06:00
Lei Wen
47fc18f1e7 NAND: add the ability to directly write yaffs image
This patch add addition suffix to nand write to give the uboot
the power to directly burn the yaffs image to nand.

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-01-12 17:13:10 -06:00
Alexander Holler
7fab9dfffa nand: fix bug with multiple NAND devices if CONFIG_MTD_DEVICE is defined.
The variable i has to be static, otherwise it would be always zero.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
2011-01-12 17:13:10 -06:00
Reinhard Meyer
7a8fc36e6c MTD/NAND: fix nand_base.c to use get_timer() correctly
This is part of the timer cleanup effort.
In the future we only use get_timer() in its intended way to
program timeout loops.
reset_timer() shall not be used anymore.

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-12-17 14:32:12 -06:00
Mike Frysinger
0bdecd82dd nand: constify id/manu tables
These id tables need not be writable.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-12-17 14:32:11 -06:00
John Schmoller
9fd84915a9 fsl_upm: Add MxMR/MDR synchronization
According to Freescale reference manuals (eg section "13.4.4.2
Programming the UPMs" of the P4080 Reference Manual):

"Since the result of any update to the MxMR/MDR register must be in
effect before the dummy read or write to the UPM region, a write to
MxMR/MDR should be followed immediately by a read of MxMR/MDR."

The UPM on a custom P4080-based board did not work without performing
a read of MxMR/MDR after a write.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-12-13 09:32:15 -06:00
David Müller (ELSOFT AG)
2111cb44a7 fix s3c2410_nand timing default values
The attached patch fixes wrong timing default values and adds the
possibility to specify board specific timing value in the board config file.

Signed-off-by: David Mueller <d.mueller@elsoft.ch>
2010-12-06 18:28:48 -06:00
Stefan Roese
c5d02825ae ppc4xx/NAND: Reduce size of NAND SPL image
This is needed for the canyonlands_nand build target. Without it
the resulting image won't fit into 4k.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
2010-11-27 23:35:09 +01:00
Sebastien Carlier
6d8962e814 Switch from archive libraries to partial linking
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-11-17 21:02:18 +01:00
Wolfgang Denk
17dd883c5b Merge branch 'master' of git://git.denx.de/u-boot-samsung 2010-10-29 21:47:48 +02:00
Wolfgang Denk
2e5167ccad Replace CONFIG_RELOC_FIXUP_WORKS by CONFIG_NEEDS_MANUAL_RELOC
By now, the majority of architectures have working relocation
support, so the few remaining architectures have become exceptions.
To make this more obvious, we make working relocation now the default
case, and flag the remaining cases with CONFIG_NEEDS_MANUAL_RELOC.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-10-29 21:32:07 +02:00
C Nauman
d9abba8254 Add generic support for samsung s3c2440
This patch adds generic support for the Samsung s3c2440 processor.

Global s3c24x0 changes to struct members converting from upper case to
lower case.

Signed-off-by: Craig Nauman <cnauman@diagraph.com>
Cc: kevin.morfitt@fearnside-systems.co.uk
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-10-28 15:35:56 +09:00
Ben Gardiner
10d6ac94e0 davinci_nand, trivial : use symbolic ECC start command
The ECC calculations were started by writing 1 << 13 to the nand FCR register;
that value is also defined as DAVINCI_NANDFCR_4BIT_CALC_START in emif_defs.h.

This patch substitutes the macro DAVINCI_NANDFCR_4BIT_CALC_START for the
magic number '1 << 13'.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-10-17 20:14:43 +02:00
Scott Wood
5b8e6bb517 nand: remove dead code and suspend/resume
Get rid of the several "#if 0" sections that were keeping around Linux
code that isn't relevant to U-Boot.  Besides cluttering the code, these
sections make tracking upstream changes harder, rather than easier.
It's easy to discard obviously irrelevant diff hunks that patch rejects,
but it's not as easy to notice hunks that apply cleanly to the #if 0
section, but *are* relevant to U-Boot and require modification elsewhere.

Also remove suspend/resume, as this is not applicable to U-Boot.  Removal
saves 232 bytes on powerpc.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:10:35 -05:00
Scott Wood
3048632251 nand erase: .spread, .part, .chip subcommands
A while back, in http://lists.denx.de/pipermail/u-boot/2009-June/054428.html,
Michele De Candia posted a patch to not count bad blocks toward the
requested size to be erased.  This is desireable when you're passing in
something like $filesize, but not when you're trying to erase a partition.

Thus, a .spread subcommand (named for consistency with
http://lists.denx.de/pipermail/u-boot/2010-August/075163.html) is introduced
to make explicit the user's desire to erase for a given amount of data,
rather than to erase a specific region of the chip.

While passing $filesize to "nand erase" is useful, accidentally passing
something like $fliesize currently produces quite unpleasant results, as the
variable evaluates to nothing and U-Boot assumes that you want to erase
the entire rest of the chip/partition.  To improve the safety of the
erase command, require the user to make explicit their intentions by
using a .part or .chip subcommand.  This is an incompatible user interface
change, but keeping compatibility would eliminate the safety gain, and IMHO
it's worth it.

While touching nand_erase_opts(), make it accept 64-bit offsets and sizes,
fix the percentage display when erase length is rounded up, eliminate
an inconsistent warning about rounding up the erase length which only
happened when the length was less than one block (rounding up for $filesize
is normal operation), and add a diagnostic if there's an attempt to erase
beginning at a non-block boundary.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:10:17 -05:00
Scott Wood
f9a5254111 nand util: read/write: accept unaligned length
The underlying code in nand_base.c already supports non-page-aligned reads
and writes, but the block-skipping wrapper code did not.

With block skipping, an unaligned start address is not useful since you
really want to be starting at the beginning of a partition -- or at least
that's where you want to start checking for blocks to skip, but we don't
(yet) support that.  So we still require the start address to be aligned.

An unaligned length, though, is useful for passing $filesize to the
read/write command, and handling it does not complicate block skipping.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:09:23 -05:00
Stefan Roese
b36df56115 ppc4xx: Move ppc4xx headers to powerpc include directory
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Wolfram Sang
1075b07e2c nand/davinci: make sure ECC calculation has really started
Due to a register glitch (result code <4 might show up right after the
start-calculation-bit was set), make sure the ECC has really started.

See 1c3275b656045aff9a75bb2c9f3251af1043ebb3 in the kernel.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-13 14:43:05 -05:00
Steve Sakoman
4c468397cf mtd: nand: supress 'unknown NAND' warning if no nand is found
This printk was added recently and results in ugly output on systems
with no NAND:

NAND:  nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00, Chip ID: 0x00 0 MiB

instead of:

NAND:  0 MiB

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:29 -04:00
Becky Bruce
f51cdaf191 83xx/85xx/86xx: LBC register cleanup
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers.  Merge
this into a single spot.

To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.

In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.

I have done a successful ppc build all and tested a board or two from
each processor family.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Wolfgang Denk
cb8f031729 Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2010-07-14 21:54:45 +02:00
Mike Frysinger
253f47f3a7 Blackfin: bfin_nand: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Scott Wood <scottwood@freescale.com>
2010-07-13 17:50:49 -04:00
Mike Frysinger
bc1a884686 mtd: nand_plat: add simple GPIO framework DEV_READY option
Make it easy to use GPIOs for the DEV_READY pin by using the common GPIO
framework.  Also make the NAND_PLAT_INIT() define optional.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
2010-07-08 16:52:12 -05:00
Florian Fainelli
1445f6ffd5 NAND: add Toshiba TC58NVG0 identifier
The Toshiba TC58NVG0* parts are 128Mbytes x 8 bits 3.3V parts with the 0xD1
identifier. Add these to the list of known devices IDs.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2010-07-08 16:49:50 -05:00
Florian Fainelli
3e9b349c7f NAND: show manufacturer and device ID for unknown chips
When the NAND part is not supported, it is useful to show the manufacturer
and device ID to help debugging and reporting.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2010-07-08 16:49:50 -05:00
Andrew Caldwell
c941b77adc Blackfin: nand: drain the write buffer before returning
The current Blackfin nand write function fills up the write buffer but
returns before it has had a chance to drain.  On faster systems, this
isn't a problem as the operation finishes before the ECC registers are
read, but on slower systems the ECC may be incomplete when the core tries
to read it.

So wait for the buffer to drain once we're done writing to it.

Signed-off-by: Andrew Caldwell <Andrew.Caldwell@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-05-26 17:59:13 -05:00
Nikolay Petukhov
7c27b7b1ea at91: add hwecc method for nand
This is a patch to use the hardware ECC controller of
the AT91SAM9260 for the AT91 nand. Taken from the kernel 2.6.33.

Signed-off-by: Nikolay Petukhov <Nikolay.Petukhov@gmail.com>
2010-03-23 14:29:09 -05:00
Cyril Chemparathy
cc41a59a74 TI: Davinci: NAND Driver Cleanup
Modified to use IO accessor routines consistently.  Eliminated volatile usage
to keep checkpatch.pl happy.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
2010-03-23 14:29:09 -05:00
Thomas Weber
5647f78d04 mod change 755 => 644 for multiple files
I executed 'find . -name "*.[chS]" -perm 755 -exec chmod 644 {} \;'

Signed-off-by: Thomas Weber <swirl@gmx.li>
Add some more: neither Makefile nor config.mk need execute permissions.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-21 22:22:53 +01:00
Wolfgang Denk
93910edb59 Prepare v2010.03-rc1
Coding style cleanup, update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-03-12 23:06:04 +01:00
John Rigby
b081c2e9b9 Nand mxc_nand add v1.1 controller support
Add support for version 1.1 of the nfc nand flash
controller which is on the i.mx25 soc.

Signed-off-by: John Rigby <jcrigby@gmail.com>
CC: Scott Wood <scottwood@freescale.com>
2010-01-27 14:22:41 -06:00
Vipin KUMAR
165fa406ad SPEAr : nand driver support for SPEAr SoCs
SPEAr SoCs contain an FSMC controller which can be used to interface
with a range of memories eg. NAND, SRAM, NOR.
Currently, this driver supports interfacing FSMC with NAND memories

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-23 08:15:49 -06:00
Magnus Lilja
c4832dffff MXC: Add large page oob layout for i.MX31 NAND controller.
Import the large page oob layout from Linux mxc_nand.c driver.

The CONFIG_SYS_NAND_LARGEPAGE option is used to activate
the large page oob layout. Run time detection is not supported
as this moment.

This has been tested on the i.MX31 PDK board with a large
page NAND device.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2010-01-19 17:08:13 -06:00
Magnus Lilja
f6a9748e32 mxc_nand: Update driver to work with i.MX31.
Tested on i.MX31 Litekit.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2010-01-19 17:08:13 -06:00
Wolfgang Denk
2ff6922280 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-01-12 23:47:03 +01:00
Nick Thompson
20da6f4d93 Davinci: davinci_nand.c performance enhancments
Introduces various optimisations that approximately triple the
read data rate from NAND when run on da830evm.

Most of these optimisations depend on the endianess of the machine
and most of them are very similar to optimisations already present
in the Linux Kernel.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
2010-01-06 16:11:16 -06:00
Nick Thompson
26be2c53d6 Davinci: NAND enable ECC even when not in NAND boot mode
Davinci: NAND enable ECC even when not in NAND boot mode

On Davinci platforms, the default NAND device is enabled (for ECC)
in low level boot code when NAND boot mode is used. If booting in
another mode, NAND ECC is not enabled. The driver should make
sure ECC is enabled regardless of boot mode if NAND is configured
in U-Boot.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
2010-01-04 08:48:17 -06:00
Nick Thompson
97f4eb8cfb Davinci: Configurable NAND chip selects
Davinci: Configurable NAND chip selects

Add a CONFIG_SYS_NAND_CS setting to all davinci configs and
use it to setup the NAND controller in the davinci_nand
mtd driver.

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
2010-01-04 08:48:17 -06:00
Wolfgang Denk
bb3bcfa242 Merge branch 'next' of ../next 2009-12-15 23:38:34 +01:00
Stefan Roese
f4cfe42758 nand: Fix access to last block in NAND devices
Currently, the last block of NAND devices can't be accessed. This patch
fixes this issue by correcting the boundary checking (off-by-one error).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
2009-12-11 13:11:57 -06:00
Heiko Schocher
4b142febff common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
There is more and more usage of printing 64bit values,
so enable this feature generally, and delete the
CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
defines.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-12-08 22:14:07 +01:00
Wolfgang Denk
206c00f26f Merge branch 'master' into next
Conflicts:
	lib_generic/zlib.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-12-07 22:47:17 +01:00
Daniel Hobi
0ec81db202 Fix computation in nand_util.c:get_len_incl_bad
Depending on offset, flash size and the number of bad blocks,
get_len_incl_bad may return a too small value which may lead to:

1) If there are no bad blocks, nand_{read,write}_skip_bad chooses the
bad block aware read/write code. This may hurt performance, but does
not have any adverse effects.

2) If there are bad blocks, the nand_{read,write}_skip_bad may choose
the bad block unaware read/write code (if len_incl_bad == *length)
which leads to corrupted data.

Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
2009-12-07 22:38:16 +01:00
kevin.morfitt@fearnside-systems.co.uk
ac67804fbb Add a unified s3c24x0 header file
This patch adds a unified s3c24x0 cpu header file that selects the header
file for the specific s3c24x0 cpu from the SOC and CPU configs defined in
board config file. This removes the current chain of s3c24-type #ifdef's
from the s3c24x0 code.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-27 16:26:13 -06:00
Minkyu Kang
47e801bec3 s3c64xx: move s3c64xx header files to asm-arm/arch-s3c64xx
This patch moves the s3c64xx header files from include/
to include/asm-arm/arch-s3c64xx

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-27 16:26:13 -06:00
kevin.morfitt@fearnside-systems.co.uk
492fb1fdbc Move s3c24x0 header files to asm-arm/arch-s3c24x0/
This patch moves the s3c24x0 header files from include/ to
include/asm-arm/arch-s3c24x0/.

checkpatch.pl showed 2 errors and 3 warnings. The 2 errors were both due
to a non-UTF8 character in David M?ller's name:

ERROR: Invalid UTF-8, patch and commit message should be encoded in UTF-8
#489: FILE: include/asm-arm/arch-s3c24x0/s3c2410.h:3:
+ * David M?ller ELSOFT AG Switzerland. d.mueller@elsoft.ch

As David's name correctly contains a non-UTF8 character I haven't fixed
these errors.

The 3 warnings were all because of the use of 'volatile' in s3c24x0.h:

WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt
#673: FILE: include/asm-arm/arch-s3c24x0/s3c24x0.h:35:
+typedef volatile u8	S3C24X0_REG8;
+typedef volatile u16	S3C24X0_REG16;
+typedef volatile u32	S3C24X0_REG32;

I'll fix these errors in another patch.

Tested by running MAKEALL for ARM8 targets and ensuring there were no new
errors or warnings.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-27 16:26:12 -06:00
Sandeep Paulraj
10a5a79912 NAND: Add Support for 4K page size in DaVinci NAND driver
This patch adds support for NAND devices with a page size of
4K in the DaVinci NAND driver. The layout matches the layout that TI uses
for 4K page size NAND devices in the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-20 13:15:38 -06:00
Hui.Tang
5e1ded558b S3C2410 NAND Flash Add Missing Function
This patch add nand_read_buf() for S3C2410 NAND SPL.
In nand_spl/nand_boot.c, nand_boot() will check nand->select_chip,
so nand->select_chip should also be initialized.

Signed-off-by: Hui.Tang <zetalabs@gmail.com>
2009-11-18 14:30:13 -06:00
Sandeep Paulraj
6cd752f927 NAND: Update read_read_subpage API check
This patch updates a check condition in the NAND driver.
The check condition is similat to what is in linux/next.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-18 14:26:40 -06:00
Mingkai Hu
35209cbcee fsl_elbc_nand: remove the bbt descriptors relocation fixup
The commit 66372fe2 manually relocated the bbt pattern pointer,
which can be removed by using full relocation.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
2009-11-13 16:56:18 -06:00
David Brownell
7e86661cd7 NAND: fix "raw" reads with ECC syndrome layouts
The syndrome based page read/write routines store ECC, and possibly other
"OOB" data, right after each chunk of ECC'd data.  With ECC chunk size of
512 bytes and a large page (2KiB) NAND, the layout is:

  data-0 OOB-0 data-1 OOB-1 data-2 OOB-2 data-3 OOB-3 OOB-leftover

Where OOBx is (prepad, ECC, postpad).  However, the current "raw" routines
use a traditional layout -- data OOB, disregarding the prepad and postpad
values -- so when they're used with that type of ECC hardware, those calls
mix up the data and OOB.  Which means, in particular, that bad block
tables won't be found on startup, with data corruption and related chaos
ensuing.

The current syndrome-based drivers in mainline all seem to use one chunk
per page; presumably they haven't noticed such bugs.

Fix this, by adding read/write page_raw_syndrome() routines as siblings of
the existing non-raw routines; "raw" just means to bypass the ECC
computations, not change data and OOB layout.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-11-13 16:56:17 -06:00
Sandeep Paulraj
5df3c2b62c NAND: Don't walk past end of oobfree[]
When computing oobavail from the list of free areas in the OOB,
don't assume there will always be an unused slot at the end.
This syncs up with the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:16 -06:00
Sandeep Paulraj
18b5a4b43a NAND: Update check condition for nand_read_page_hwecc API
The patch updates the check condition for determining
whether the ECC corrections has failed.
This makes it similar to what is in the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:16 -06:00
Sandeep Paulraj
e25ee03962 NAND: Updating comments/explanations in the NAND driver
Patch updates the comments and explanations for
the arguments to various functions.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:16 -06:00
Sandeep Paulraj
aad4a28b25 NAND: Subpage shift for ecc_steps equal to 16
This was originally part of Thomas Gleixner's patch for
adding support for 4KiB pages.
This is not part of the U-Boot NAND driver so updating the
driver with this to sync up with the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:15 -06:00
Sandeep Paulraj
36e0b98ec8 NAND: Remove commented out code
Patch removes already commented out dead code

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:15 -06:00
Sandeep Paulraj
4f41e7ea1a NAND: Correct the "chip_shift" calculation
This patch updates the "chip_shift" calculation in the
NAND driver. This is being done to sync up the NAND driver with
the kernel NAND driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-11-13 16:56:15 -06:00
Sandeep Paulraj
aaa8eec532 NAND: Update to support 64 bit device size
This patch adds support for NANDs greater than 2 GB.
Patch is based on the MTD NAND driver in the kernel.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-11-13 16:56:14 -06:00
kevin.morfitt@fearnside-systems.co.uk
3d1988ab47 Clean-up of s3c24x0 nand driver
This patch re-formats the arm920t s3c24x0 nand driver in preparation for changes
to add support for the Embest SBC2440-II Board.

The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports

It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
 - patches 1/4, 2/4 and 3/4 of this series

Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-10-13 21:13:57 -05:00
Peter Tyser
521af04d85 Conditionally perform common relocation fixups
Add #ifdefs where necessary to not perform relocation fixups.  This
allows boards/architectures which support relocation to trim a decent
chunk of code.

Note that this patch doesn't add #ifdefs to architecture-specific code
which does not support relocation.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 10:17:57 +02:00
Scott Wood
d44e9c1736 NAND: davinci: Fix warnings when 4-bit ECC not used
I accidentally left v2 of "NAND: DaVinci:Adding 4 BIT ECC support"
applied when I pushed the tree last merge window, and missed these fixes
which were in v3 of that patch.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-09-28 16:33:18 -05:00
Paul Gibson
d3f4941874 mpc512x. Micron nand flash needs a reset before a read command is issued.
Micron nand flash needs a reset before a read command is issued.
The current mpc5121_nfc driver ignores the reset command.
2009-09-22 22:59:42 +02:00
Stefan Roese
d1c3b27525 ppc4xx: Big cleanup of PPC4xx defines
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-11 10:35:58 +02:00
Scott Wood
cfcbf8c4cf mxc_nand: Remove Freescale's "All Rights Reserved."
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-09-04 23:03:10 +02:00
Sandeep Paulraj
77b351cd0f NAND: DaVinci: V2 Adding 4 BIT ECC support
This patch adds 4 BIT ECC support in the DaVinci NAND
driver. Tested on both the DM355 and DM365.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:03 -05:00
Sandeep Paulraj
f83b7f9e8a MTD:NAND: ADD new ECC mode NAND_ECC_HW_OOB_FIRST
This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to
support 4-bit ECC on TI DaVinci devices with large page (up to 2K) NAND
chips.  This ECC mode is similar to NAND_ECC_HW, with the exception of
read_page API that first reads the OOB area, reads the data in chunks,
feeds the ECC from OOB area to the ECC hw engine and perform any
correction on the data as per the ECC status reported by the engine.

This patch has been accepted by Andrew Morton and can be found at

http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-new-ecc-mode-ecc_hw_oob_first.patch

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:03 -05:00
Ilya Yanok
36fab997d8 mxc_nand: add nand driver for MX2/MX3
Driver for NFC NAND controller found on Freescale's MX2 and MX3
processors. Ported from Linux. Tested only with i.MX27 but should
works with other MX2 and MX3 processors too.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:03 -05:00
Sandeep Paulraj
a2c65b47ef NAND: ADD page Parameter to all read_page/read_page_raw API's
This patch adds a new "page" parameter to all NAND read_page/read_page_raw
APIs.  The read_page API for the new mode ECC_HW_OOB_FIRST requires the
page information to send the READOOB command and read the OOB area before
the data area.

This patch has been accepted by Andrew Morton and can be found at
http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-page-parameter-to-all-read_page-read_page_raw-apis.patch

WE would like this to become part of the u-boot GIT as well

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:02 -05:00
Heiko Schocher
de4250929f 83xx, kmeter1: added NAND support
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:02 -05:00
Matthias Kaehlcke
403ce1f759 KB9202: Add NAND support
Add KB9202 NAND driver

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:01 -05:00
Feng Kan
68e74567cf ppc4xx: Fix ECC Correction bug with SMC ordering for NDFC driver
Fix ECC Correction bug where the byte offset location were double
flipped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
        /* The NDFC uses Smart Media (SMC) bytes order */
        ecc_code[0] = p[2];
        ecc_code[1] = p[1];
        ecc_code[2] = p[3];
But in the Correction algorithm when calculating the byte offset
location, the s1 is used as the upper part of the address. Which
again reverse the order making the final byte offset address
location incorrect.
	byteoffs = (s1 << 0) & 0x80;
	.
	.
	byteoffs |= (s0 >> 4) & 0x08;
The order is change to read it in straight and let the correction
function to revert it to SMC order.

Signed-off-by: Feng Kan <fkan@amcc.com>
Acked-by: Victor Gallardo <vgallardo@amcc.com>
Acked-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-08-25 17:41:42 +02:00
Giulio Benetti
1fc1d9aed0 add WATCHDOG_RESET() on nand write and read
Signed-off-by: giulio.benetti@micronovasrl.com
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-21 22:55:21 +02:00
Dirk Behme
894113529e omap3: replace all instances of gpmc config struct by one global
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-08 11:34:11 +02:00
Dirk Behme
97a099eaa4 omap3: remove typedefs for configuration structs
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-08 11:33:23 +02:00
Matthias Ludwig
187af954cf omap3: embedd gpmc_cs into gpmc config struct
Embedd chip select configuration into struct for gpmc config
instead of having it completely separated as suggested by
Wolfgang Denk on
http://lists.denx.de/pipermail/u-boot/2009-May/052247.html

Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
2009-08-07 23:31:51 +02:00
Scott Wood
be33b046b5 Remove legacy NAND and disk on chip code.
Legacy NAND had been scheduled for removal.  Any boards that use this
were already not building in the previous release due to an #error.

The disk on chip code in common/cmd_doc.c relies on legacy NAND,
and it has also been removed.  There is newer disk on chip code
in drivers/mtd/nand; someone with access to hardware and sufficient
time and motivation can try to get that working, but for now disk
on chip is not supported.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 19:07:47 -05:00
Stefan Roese
f2f376ab95 nand: ndfc: Remove unnecessary #ifdef's
Now that the 4xx NAND driver ndfc is moved to the common NAND driver
directory we don't need this #ifdef's anymore.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:03 -05:00
Stefan Roese
12582ac771 nand/ppc4xx: Move PPC4xx NAND driver to common NAND driver directory
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:02 -05:00
Valeriy Glushkov
3ebf70db54 nand: fixed failed reads on corrected ECC errors in nand_util.c
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Paulraj, Sandeep <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:01 -05:00
David Brownell
ed727d394c Typo fix: use CONFIG_SOC_DM644X, not CONFIG_SOC_DM646.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:01 -05:00
Wolfgang Denk
c3ae126c2c Merge branch 'master' of git://git.denx.de/u-boot-arm 2009-07-13 23:45:02 +02:00
Prafulla Wadaskar
205a0988d8 nand: Add Marvell Kirkwood NAND driver
This patch adds a NAND driver for the Marvell Kirkwood SoC's

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2009-07-08 21:20:10 +02:00
Mingkai Hu
66372fe2ab fsl_elbc_nand: redirect the pointer of bbt pattern to RAM
The bbt descriptors contains the pointer to the bbt pattern which
are statically initialized memory struct. When relocated to RAM,
these pointers will continue point to NOR flash(or L2 SRAM, or
other boot device). If the contents of NOR flash changed or L2
SRAM disabled, it'll hang the system.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:10 -05:00
kevin.morfitt@fearnside-systems.co.uk
98713d2663 Bug-fix in drivers mtd nand Makefile
The S3C2410 NAND driver source file is included in the makefile instead of
the object file.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:09 -05:00
Jean-Christophe PLAGNIOL-VILLARD
378adfcdf4 mtd: nand: use loff_t for offset
nand_util currently uses size_t which is arch dependent and not always a
unsigned long.  Now use loff_t, as does the linux mtd layer.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:06 -05:00
Mike Frysinger
cd84423a09 mtd: nand: new base driver for memory mapped nand devices
The BF537-STAMP Blackfin board had a driver for working with NAND devices
that are simply memory mapped.  Since there is nothing Blackfin specific
about this, generalize the driver a bit so that everyone can leverage it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:04 -05:00
David Brownell
154b5484ac davinci_nand chipselect/init cleanup
Update chipselect handling in davinci_nand.c so that it can
handle 2 GByte chips the same way Linux does:  as one device,
even though it has two halves with independent chip selects.
For such chips the "nand info" command reports:

  Device 0: 2x nand0, sector size 128 KiB

Switch to use the default chipselect function unless the board
really needs its own.  The logic for the Sonata board moves out
of the driver into board-specific code.  (Which doesn't affect
current build breakage if its NAND support is enabled...)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:03 -05:00
David Brownell
6e29ed8e57 davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC)
Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option.  It's not just nasty;
it's also unused by any current boards, and doesn't even match the
main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC
on newer chips that support it).

DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30,
match non-BROKEN code paths for 1-bit HW ECC.  The BROKEN code paths
do seem to partially match what MontaVista/TI kernels (4.0/2.6.10,
and 5.0/2.6.18) do ... but only for small pages.  Large page support
is really broken (and it's unclear just what software it was trying
to match!), and the ECC layout was making three more bytes available
for use by filesystem (or whatever) code.

Since this option itself seems broken, remove it.  Add a comment
about the MV/TI compat issue, and the most straightforward way to
address it (should someone really need to solve it).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:01 -05:00
David Brownell
fcb7747775 davinci_nand: cleanup I (minor)
Minor cleanup for DaVinci NAND code:

 - Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't
   be defined when there are multiple chipselect lines in use
   (as with common 2 GByte chips).

 - Cleanup handling of EMIF control registers
    * Only need one pointer pointing to them
    * Remove incorrect and unused struct supersetting them

 - Use the standard waitfunc; we don't need a custom version

 - Partial legacy cleanup:
    * Don't initialize every board like it's a DM6446 EVM
    * #ifdef a bit more code for BROKEN_ECC

Sanity checked with small page NAND on dm355 and dm6446 EVMs;
and large page on dm355 EVM (packaged as two devices, not one).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:44:55 -05:00
Thomas Lange
d583ef5147 ARM DaVinci: EMIF settings
NAND module should not modify EMIF registers unrelated to CS2
that is used for NAND, i.e. do not modify EWAIT config register
or registers for other Chip Selects.

Without this patch, EMIF configurations made in board_init()
will be invalidated.

Signed-off-by: Thomas Lange <thomas@corelatus.se>
2009-07-06 21:52:23 +02:00
Stefan Roese
35f2edbb6c nand/mpc512x: Add MPC512x NAND support (NFC)
This patch adds NAND Flash Controller driver for MPC5121 revision 2.
All device features, except hardware ECC and power management, are
supported.

This NFC driver replaces the one orignally posted by John Rigby:

"[PATCH] Freescale NFC NAND driver"

It's a port of the Linux driver version posted by Piotr Ziecik a few
weeks ago. Using this driver has the following advantages (from my
point of view):

- Compatibility with the Linux NAND driver (e.g. ECC usage)
- Better code quality in general
- Resulting U-Boot image is a bit smaller (approx. 3k)
- Better to sync with newer Linux driver versions

The only disadvantage I can see, is that HW-ECC is not supported right
now. But this could be added later (e.g. port from Linux driver after
it's supported there). Using HW-ECC on the MCP5121 NFC has a general
problem because of the ECC usage in the spare area. This collides with
JFFS2 for example.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Piotr Ziecik <kosmo@semihalf.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
2009-06-12 20:47:19 +02:00
Stefan Roese
d558107c18 mtd: Introduce CONFIG_MTD_DEVICE to select compilation of mtdcore.o
This new define enables mtdcore.c compilation and with this we can
select the MTD device infrastructure needed for the reworked mtdparts
command.

We now have the 2 MTD infrastructure defines, CONFIG_MTD_DEVICE and
CONFIG_MTD_PARTITIONS. CONFIG_MTD_DEVICE is needed (as explained above)
for the "mtdparts" command and CONFIG_MTD_PARTITIONS is needed for UBI.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
2009-06-12 20:45:47 +02:00
Stefan Roese
8d2effea23 mtd: Update MTD infrastructure to support 64bit device size
This patch brings the U-Boot MTD infrastructure in sync with the current
Linux MTD version (2.6.30-rc3). Biggest change is the 64bit device size
support and a resync of the mtdpart.c file which has seen multiple fixes
meanwhile.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Kyungmin Park <kmpark@infradead.org>
2009-06-12 20:45:47 +02:00
Stefan Roese
f40f6db278 nand: Fix problem with ECC ordering for PPC4xx NDFC platforms
This patch enables Smart Media (SMC) ECC byte ordering which is used
on the PPC4xx NAND FLASH controller (NDFC). Without this patch we have
incompatible ECC byte ordering to the Linux kernel NDFC driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2009-05-23 12:51:39 +02:00
Stefan Roese
dbe29e36a4 mtd: nand/onenand: Register mtd device upon device scanning
With this patch the NAND and OneNAND devices are registered in the MTD
subsystem and can then be referenced by the mtdcore code (e.g.
get_mtd_device_nm()). This is needed for the new "ubi part" command
syntax without the flash type parameter (nor|nand|onenand).

Signed-off-by: Stefan Roese <sr@denx.de>
2009-04-28 01:15:38 +02:00
Stefan Roese
10bb62d85a mtd: nand: Include linux/mtd/partitions.h in nand_base.h
This patch removes this compilation warning when CONFIG_MTD_PARTITIONS is
defined:

nand_base.c: In function 'nand_release':
nand_base.c:2922: warning: implicit declaration of function 'del_mtd_partitions'

Signed-off-by: Stefan Roese <sr@denx.de>
2009-04-28 01:15:37 +02:00
Graf Yang
a343ba87ea Blackfin: nand: flush peripheral before polling it
We need to make sure the data written to the nand flash controller makes
it there before we start polling its status register.  Otherwise, we may
get stale data and return before the controller is actually ready.

Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Scott Wood <scottwood@freescale.com>
2009-04-06 17:37:37 -04:00
Jean-Christophe PLAGNIOL-VILLARD
b3f66b0ba0 s3c2410: move nand driver to drivers/mtd/nand
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-30 18:58:40 +02:00
Jean-Christophe PLAGNIOL-VILLARD
ee4f3e2765 davinci: move nand driver to drivers/mtd/nand
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-30 18:58:39 +02:00
Wolfgang Denk
aaa0e0812f Merge branch 'master' of git://git.denx.de/u-boot-at91 2009-03-26 22:27:45 +01:00
Wolfgang Grandegger
33846df28f Add wait flags to support board/chip specific delays
The NAND flash on the TQM8548_BE modules requires a short delay after
running the UPM pattern like the MPC8360ERDK board does. The TQM8548_BE
requires a further short delay after writing out a buffer. Normally the
R/B pin should be checked, but it's not connected on the TQM8548_BE.
The corresponding Linux FSL UPM driver uses similar delay points at the
same locations. To manage these extra delays in a more general way, I
introduced the "wait_flags" field allowing the board-specific driver to
specify various types of extra delay.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-03-23 15:53:40 -05:00
Wolfgang Grandegger
06e9f7df05 Add support for TQM-specific chip select logic to FSL-UPM
For the NAND chips on the TQM8548 modules, a special chip-select logic is
used. It uses dedicated address lines to be set via UPM machine address
register (mar). This patch adds such support to the FSL-UPM driver.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-03-23 15:53:39 -05:00
Wolfgang Grandegger
e93c1c169d Add multi chip support to the FSL-UPM driver
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. The "dev_ready" callback of the "struct fsl_upm_nand" is now
called with the argument "chip_nr" to allow testing the proper chip
select line. The NAND support of the MPC8360ERDK is updated as well.
No other boards are currently using the FSL UPM driver.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-03-23 15:53:38 -05:00
Wolfgang Grandegger
672ed2aee9 Enable multi chip support in the NAND layer
This patch adds support for NAND_MAX_CHIPS to the MTD NAND layer.
Multi-chips devices are displayed as shown:

  Device 0: 2x NAND 512MiB 3,3V 8-bit, sector size 128 KiB

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-03-23 15:53:37 -05:00
Jean-Christophe PLAGNIOL-VILLARD
74c076d6c3 at91sam9/at91cap: move nand drivers to drivers/mtd/nand
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 13:22:24 +01:00
Jean-Christophe PLAGNIOL-VILLARD
0176c03a24 nomadik/nand: fix 'ecc512' discards qualifiers from pointer target type
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-02-22 17:56:50 +01:00
Alessandro Rubini
0d8c6eab24 Nand driver for Nomadik SoC
This driver implements the ECC algorithm described in
the CPU data sheet and uses the OOB layout chosen in
already-released development systems (shipped with a custom-made
u-boot 1.3.1).

Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
2009-02-22 13:40:28 +01:00
Peter Tyser
8da601280a NAND: Add timeout for reset command
Without the timeout present an infinite loop can occur if the
NAND device is broken or not present.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-02-06 17:29:38 -06:00
Peter Tyser
10dc6a9bef NAND: Silence warning when CONFIG_SYS_NAND_QUIET_TEST
Commit cfa460adfd removed support
for disabling the "No NAND device found!!!" warning when
CONFIG_SYS_NAND_QUIET_TEST was defined.  This re-adds support
for silencing the warning.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-02-06 17:29:29 -06:00
Valeriy Glushkov
ad09ab2e3a NAND: Fixed invalid pointers to static relocated chip names
Dear Wolfgang,

You are right, the patch was ugly.
The new one seems to be better.

Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-02-06 17:28:31 -06:00
Mike Frysinger
be9d8c780e Blackfin: add driver for on-chip NAND controller
This is a port of the Linux Blackfin on-chip NFC driver to U-Boot.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-02-02 12:27:07 -05:00
Dirk Behme
12201a1354 OMAP3: Add NAND support
Add NAND support.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Syed Mohammed Khasim <khasim@ti.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-01-24 17:51:21 +01:00
Mike Frysinger
d4bade8d77 nand: fixup printf modifiers to match types used
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23 10:32:52 -06:00
Wolfgang Grandegger
6c869637fe NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS
This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and
changes the default from 8 to 1 for the legacy and the new MTD
NAND layer. This allows to remove all NAND_MAX_CHIPS definitions
in the board config files because none of the boards use multi
chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440
define

 #define NAND_MAX_CHIPS          CONFIG_SYS_MAX_NAND_DEVICE

but that's bogus and did not work anyhow.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23 10:32:51 -06:00
Nishanth Menon
50657c2732 NAND: Enable nand lock, unlock feature
Enable nand lock, unlock and status of lock feature.
Not every device and platform requires this, hence,
it is under define for CONFIG_CMD_NAND_LOCK_UNLOCK

Nand unlock and status operate on block boundary instead
of page boundary. Details in:
http://www.micron.com/products/partdetail?part=MT29C2G24MAKLAJG-6%20IT

Intial solution provided by Vikram Pandita <vikram.pandita@ti.com>
Includes preliminary suggestions from Scott Wood

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23 10:32:49 -06:00
Mike Frysinger
69fb8be4fc NAND: move board_nand_init to nand.h
Rather than putting the function prototype for board_nand_init() in the one
place where it gets called, put it into nand.h so that every place that also
defines it gets the prototype.  Otherwise, errors can go silently unnoticed
such as using the wrong return value (void rather than int) when defining
the function.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23 10:32:49 -06:00
Wolfgang Denk
f85cd46918 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2008-12-30 23:30:47 +01:00
Kumar Gala
9d94aff699 NAND FSL elbc: Use virt_to_phys to determine which bank is in use
The current code that determines which bank/chipselect is used for a
given NAND instance only worked for 32-bit addresses and assumed
a 1:1 mapping.  This breaks in 36-bit physical configs.

The proper way to handle this is to use the virt_to_phys() and
BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address
with the the virtual address the NAND code uses.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Scott Wood <scottwood@freescale.com>
2008-12-19 18:20:08 -06:00
Scott Wood
ff49ea8977 NAND: Mark the BBT as scanned prior to calling scan_bbt.
Otherwise, recursion can occur if scan_bbt does not find a bad block
table, and tries to write one, and the attempt to erase the BBT area
causes a bad block check.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-12-16 14:40:34 -06:00
Scott Wood
2077e348c2 NAND: Fix misplaced return statement in nand_{read,write}_skip_bad().
This caused the operation to be needlessly repeated if there were
no bad blocks and no errors.

Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-11-25 10:47:02 -06:00
Scott Wood
bd78bc6b2a NAND: Properly create JFFS2 cleanmarkers.
As reported by Ilko Iliev <iliev@ronetix.at>, the "nand erase clean"
command is currently broken, and among other things causes all blocks
to be marked bad.

This implements it properly using MTD_OOB_AUTO, along with some
indentation fixes.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 14:20:26 -05:00
Scott Wood
f7fe57c098 NAND fsl elbc: Set FMR[ECCM] based on page size.
Hardware expects ECCM 0 for small page and ECCM 1 for large page
when booting from NAND, so use those defaults.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 13:42:41 -05:00
Haiying Wang
4e190b03aa Make Freescale local bus registers available for both 83xx and 85xx.
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.

Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 11:12:53 -05:00
Karl Beldan
33efde5eca NAND: Reset chip on power-up
Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
The first command sent is NAND_CMD_READID.
Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
Tested with an MT29F4G08AAC.

Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 10:42:17 -05:00
Scott Wood
c45912d8ab NAND: sync with 2.6.27
This brings the core NAND code up to date with the Linux kernel.

Since there were several drivers in Linux as of the last update that are
not in u-boot, I'm not bringing over new drivers that have been added
since in the absence of an interested party.

I did not update OneNAND since it was recently synced by Kyungmin Park,
and I'm not sure exactly what the common ancestor is.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 10:42:16 -05:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Jason Jin
fecb5ade3b Fix the NAND size overflow issue.
When the total size of all NAND devices exceeds 4 GiB, the size  will
overflow. This patch tries to fix this.

Note that we still have a problem when a single NAND device is bigger
than 4 GiB: then the overflow would actually happen earlier, i. e.
when storing the size in nand_info[].size, as nand_info[].size is an
"u_int32_t".

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-14 13:27:16 +02:00
Anton Vorontsov
0008b6d968 fsl_elbc_nand: ecclayout cleanups
This patch deletes oobavail assignments, they're calculated by the nand
core code in nand_scan_tail, plus current oobavail values are wrong for
the LP NANDs.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-09-12 14:58:33 -05:00
Anton Vorontsov
8f42bf1c39 fsl_elbc_nand: implement support for flash-based BBT
This patch implements support for flash-based BBT for chips working
through ELBC NAND controller, so that NAND core will not have to re-scan
for bad blocks on every boot.

Because ELBC controller may provide HW-generated ECCs we should adjust
bbt pattern and bbt version positions in the OOB free area.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-09-12 14:57:20 -05:00
Anton Vorontsov
97ae023648 fsl_elbc_nand: fix OOB workability for large page NAND chips
For large page chips, nand_bbt is looking into OOB area, and checking
for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be
reserved for bbt means.

But ELBC driver is specifying ecclayout so that oobfree area starts at
offset 1, so only one byte left for the bbt purposes.

This causes problems with any OOB users, namely JFFS2: after first mount
JFFS2 will fill all OOBs with "erased marker", so OOBs will contain:

  OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

And on the next boot, NAND core will rescan for bad blocks, then will
see "0xff 0x19" pattern, and will mark all blocks as bad ones.

To fix the issue we should implement our own bad block pattern: just one
byte at OOB start. Though, this will work only for x8 chips. For x16
chips two bytes must be checked. Since ELBC driver does not support x16
NANDs (yet), we're safe for now.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-09-12 14:56:03 -05:00
Guennadi Liakhovetski
e0056b3410 NAND: add NAND driver for S3C64XX
Based on the original S3C64XX NAND driver by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-08-31 00:39:47 +02:00
Wolfgang Denk
4b0708093e Coding Style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-14 14:41:06 +02:00
Jean-Christophe PLAGNIOL-VILLARD
cc4a0ceeac drivers/mtd/nand: Move conditional compilation to Makefile
rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-13 01:40:43 +02:00
Marcel Ziswiler
eafcabd15f NAND: chip->state does not always get set.
Fixes an issue with chip->state not always being set causing troubles.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:29 -05:00
Ilya Yanok
13f0fd94e3 NAND: Scan bad blocks lazily.
Rather than scanning on boot, scan upon the first attempt to check the
badness of a block.  This speeds up boot when not using NAND, and reduces
the likelihood of needing to reflash via JTAG if NAND becomes
nonfunctional.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:28 -05:00
Scott Wood
dfbf617ff0 NAND read/write fix
Implement block-skipping read/write, based on a patch from
Morten Ebbell Hestens <morten.hestnes@tandberg.com>.

Signed-off-by: Morten Ebbell Hestnes <morten.hestnes@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:28 -05:00
Anton Vorontsov
e1c3dbada3 nand: fsl_upm: convert to updated MTD NAND infrastructure
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:27 -05:00
Scott Wood
300253306a fsl_elbc_nand: Hard-code the FBAR/FPAR split.
The hardware has separate registers for block and page-within-block,
but the division between the two has no apparent relation to the
actual erase block size of the NAND chip.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:26 -05:00
Anton Vorontsov
9c814b0a71 fsl_elbc_nand: workaround for hangs during nand write
Using current driver elbc sometimes hangs during nand write. Reading back
last byte helps though (thanks to Scott Wood for the idea).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:26 -05:00
Scott Wood
9fd020d6b4 Freescale eLBC FCM NAND driver
This is a driver for the Flash Control Machine of the enhanched Local Bus
Controller found on some Freescale chips (such as the mpc8313 and the
mpc8379).

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:25 -05:00