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This patch implements support for flash-based BBT for chips working through ELBC NAND controller, so that NAND core will not have to re-scan for bad blocks on every boot. Because ELBC controller may provide HW-generated ECCs we should adjust bbt pattern and bbt version positions in the OOB free area. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Scott Wood <scottwood@freescale.com> |
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.. | ||
diskonchip.c | ||
fsl_elbc_nand.c | ||
fsl_upm.c | ||
Makefile | ||
nand.c | ||
nand_base.c | ||
nand_bbt.c | ||
nand_ecc.c | ||
nand_ids.c | ||
nand_util.c | ||
s3c64xx.c |